diff --git a/examples/template_configuration/FreeRTOSConfig.h b/examples/template_configuration/FreeRTOSConfig.h index a672600ff..14aa3b24b 100644 --- a/examples/template_configuration/FreeRTOSConfig.h +++ b/examples/template_configuration/FreeRTOSConfig.h @@ -531,6 +531,38 @@ * setting configKERNEL_PROVIDED_STATIC_MEMORY to 0 or leaving it undefined. */ #define configKERNEL_PROVIDED_STATIC_MEMORY 1 +/******************************************************************************/ +/* ARMv8-M port Specific Configuration definitions. ***************************/ +/******************************************************************************/ + +/* Set configENABLE_TRUSTZONE to 1 when running FreeRTOS on the non-secure side + * to enable the TrustZone support in FreeRTOS ARMv8-M ports which allows the + * non-secure FreeRTOS tasks to call the (non-secure callable) functions + * exported from secure side. */ +#define configENABLE_TRUSTZONE 1 + +/* If the application writer does not want to use TrustZone, but the hardware does + * not support disabling TrustZone then the entire application (including the FreeRTOS + * scheduler) can run on the secure side without ever branching to the non-secure side. + * To do that, in addition to setting configENABLE_TRUSTZONE to 0, also set + * configRUN_FREERTOS_SECURE_ONLY to 1. */ +#define configRUN_FREERTOS_SECURE_ONLY 1 + +/* Set configENABLE_MPU to 1 to enable the Memory Protection Unit (MPU), or 0 + * to leave the Memory Protection Unit disabled. */ +#define configENABLE_MPU 1 + +/* Set configENABLE_FPU to 1 to enable the Floating Point Unit (FPU), or 0 + * to leave the Floating Point Unit disabled. */ +#define configENABLE_FPU 1 + +/* Set configENABLE_MVE to 1 to enable the M-Profile Vector Extension (MVE) support, + * or 0 to leave the MVE support disabled. This option is only applicable to Cortex-M55 + * and Cortex-M85 ports as M-Profile Vector Extension (MVE) is available only on + * these architectures. configENABLE_MVE must be left undefined, or defined to 0 + * for the Cortex-M23,Cortex-M33 and Cortex-M35P ports. */ +#define configENABLE_MVE 1 + /******************************************************************************/ /* Definitions that include or exclude functionality. *************************/ /******************************************************************************/