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Add additional memory barriers into ARM GCC asm code to ensure no re-ordering across asm code as optimisers get more aggressive.
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16 changed files with 100 additions and 98 deletions
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@ -436,7 +436,7 @@ void xPortPendSVHandler( void )
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" mov r0, #0 \n"
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" msr basepri, r0 \n"
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" ldmia sp!, {r3, r14} \n"
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" \n" /* Restore the context, including the critical nesting count. */
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" \n" /* Restore the context, including the critical nesting count. */
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" ldr r1, [r3] \n"
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" ldr r0, [r1] \n" /* The first item in pxCurrentTCB is the task top of stack. */
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" ldmia r0!, {r4-r11} \n" /* Pop the registers. */
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@ -501,7 +501,7 @@ void xPortSysTickHandler( void )
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/* Enter a critical section but don't use the taskENTER_CRITICAL()
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method as that will mask interrupts that should exit sleep mode. */
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__asm volatile( "cpsid i" );
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__asm volatile( "cpsid i" ::: "memory" );
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__asm volatile( "dsb" );
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__asm volatile( "isb" );
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@ -522,7 +522,7 @@ void xPortSysTickHandler( void )
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/* Re-enable interrupts - see comments above the cpsid instruction()
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above. */
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__asm volatile( "cpsie i" );
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__asm volatile( "cpsie i" ::: "memory" );
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}
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else
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{
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@ -545,7 +545,7 @@ void xPortSysTickHandler( void )
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configPRE_SLEEP_PROCESSING( xModifiableIdleTime );
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if( xModifiableIdleTime > 0 )
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{
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__asm volatile( "dsb" );
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__asm volatile( "dsb" ::: "memory" );
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__asm volatile( "wfi" );
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__asm volatile( "isb" );
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}
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@ -553,10 +553,10 @@ void xPortSysTickHandler( void )
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/* Re-enable interrupts - see comments above the cpsid instruction()
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above. */
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__asm volatile( "cpsie i" );
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/* Disable the SysTick clock without reading the
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portNVIC_SYSTICK_CTRL_REG register to ensure the
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__asm volatile( "cpsie i" ::: "memory" );
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/* Disable the SysTick clock without reading the
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portNVIC_SYSTICK_CTRL_REG register to ensure the
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portNVIC_SYSTICK_COUNT_FLAG_BIT is not cleared if it is set. */
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portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT );
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@ -661,7 +661,7 @@ __attribute__(( weak )) void vPortSetupTimerInterrupt( void )
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uint8_t ucCurrentPriority;
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/* Obtain the number of the currently executing interrupt. */
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__asm volatile( "mrs %0, ipsr" : "=r"( ulCurrentInterrupt ) );
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__asm volatile( "mrs %0, ipsr" : "=r"( ulCurrentInterrupt ) :: "memory" );
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/* Is the interrupt number a user defined interrupt? */
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if( ulCurrentInterrupt >= portFIRST_USER_INTERRUPT_NUMBER )
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