mirror of
https://github.com/FreeRTOS/FreeRTOS-Kernel.git
synced 2025-09-12 09:07:46 -04:00
Merge remote-tracking branch 'upstream/master'
This commit is contained in:
commit
b9a8658019
523 changed files with 84833 additions and 78492 deletions
2
.github/ISSUE_TEMPLATE/bug-report.md
vendored
2
.github/ISSUE_TEMPLATE/bug-report.md
vendored
|
@ -34,3 +34,5 @@ If applicable, add screenshots to help explain your problem.
|
|||
Add any other context about the problem here.
|
||||
e.g. code snippet to reproduce the issue.
|
||||
e.g. stack trace, memory dump, debugger log, and many etc.
|
||||
|
||||
<!-- For general inquiries, please post in [FreeRTOS forum](https://forums.FreeRTOS.org) for community support. -->
|
||||
|
|
|
@ -19,3 +19,5 @@ If applicable, please attach screenshot.
|
|||
**Browser**
|
||||
- Browser: [e.g. Chrome]
|
||||
- Version: [e.g. 80.0.3987.132]
|
||||
|
||||
<!-- For general inquiries, please post in [FreeRTOS forum](https://forums.FreeRTOS.org) for community support. -->
|
||||
|
|
12
.github/ISSUE_TEMPLATE/general-inquiry.md
vendored
12
.github/ISSUE_TEMPLATE/general-inquiry.md
vendored
|
@ -1,12 +0,0 @@
|
|||
---
|
||||
name: General inquiry
|
||||
about: Free form communication.
|
||||
title: "[Inquiry]"
|
||||
labels: question
|
||||
assignees: ''
|
||||
|
||||
---
|
||||
|
||||
We do encourage you to take a look at [FreeRTOS official site](https://www.freertos.org) for general information and [FreeRTOS forum](https://forums.freertos.org) to access our community.
|
||||
|
||||
If still needed, could create a general inquiry report here.
|
|
@ -41,7 +41,7 @@ To send us a pull request, please:
|
|||
|
||||
1. Fork the repository.
|
||||
2. Modify the source; focus on the specific change you are contributing. If you also reformat all the code, it will be hard for us to focus on your change.
|
||||
3. Follow the [coding style guide](https://www.freertos.org/FreeRTOS-Coding-Standard-and-Style-Guide.html).
|
||||
3. Follow the [coding style guide](https://www.FreeRTOS.org/FreeRTOS-Coding-Standard-and-Style-Guide.html).
|
||||
4. Commit to your fork using clear commit messages.
|
||||
5. Send us a pull request, answering any default questions in the pull request interface.
|
||||
NOTE: Please make sure the default option (Allow edits from maintainers) is left checked.
|
||||
|
@ -51,7 +51,7 @@ GitHub provides additional document on [forking a repository](https://help.githu
|
|||
[creating a pull request](https://help.github.com/articles/creating-a-pull-request/).
|
||||
|
||||
## Coding style
|
||||
* Please ensure that your code complies to the [FreeRTOS coding style guidelines](https://www.freertos.org/FreeRTOS-Coding-Standard-and-Style-Guide.html).
|
||||
* Please ensure that your code complies to the [FreeRTOS coding style guidelines](https://www.FreeRTOS.org/FreeRTOS-Coding-Standard-and-Style-Guide.html).
|
||||
|
||||
|
||||
## Getting your pull request merged
|
||||
|
|
88
History.txt
88
History.txt
|
@ -1,17 +1,56 @@
|
|||
Documentation and download available at http://www.FreeRTOS.org/
|
||||
Documentation and download available at https://www.FreeRTOS.org/
|
||||
|
||||
Changes between FreeRTOS V10.4.0 and FreeRTOS V10.3.1 released September 1 2020
|
||||
|
||||
See https://www.FreeRTOS.org/FreeRTOS-V10.4.x.html
|
||||
|
||||
Major enhancements:
|
||||
|
||||
+ Task notifications: Prior to FreeRTOS V10.4.0 each created task had a
|
||||
single direct to task notification. From FreeRTOS V10.4.0 each task has
|
||||
an array of notifications. The direct to task notification API has been
|
||||
extended with API functions postfixed with "Indexed" to enable the API to
|
||||
operate on a task notification at any array index. See
|
||||
https://www.freertos.org/RTOS-task-notifications.html for more information.
|
||||
+ Kernel ports that support memory protection units (MPUs): The ARMv7-M and
|
||||
ARMv8-M MPU ports now support a privilege access only heap. The ARMv7-M
|
||||
MPU ports now support devices that have 16 MPU regions, have the ability
|
||||
to override default memory attributes for privileged code and data
|
||||
regions, and have the ability to place the FreeRTOS kernel code outside of
|
||||
the Flash memory. The ARMv8-M MPU ports now support tickless idle mode.
|
||||
See https://www.freertos.org/FreeRTOS-MPU-memory-protection-unit.html
|
||||
for more information.
|
||||
|
||||
Additional noteworthy updates:
|
||||
|
||||
+ Code formatting is now automated to facilitate the increase in
|
||||
collaborative development in Git. The auto-formated code is not identical
|
||||
to the original formatting conventions. Most notably spaces are now used
|
||||
in place of tabs.
|
||||
+ The prototypes for callback functions (those that start with "Application",
|
||||
such as vApplicationStackOverflowHook()) are now in the FreeRTOS header
|
||||
files, removing the need for application writers to add prototypes into
|
||||
the C files in which they define the functions.
|
||||
+ New Renesas RXv3 port layer.
|
||||
+ Updates to the Synopsys ARC code, including support for EM and HS cores,
|
||||
and updated BSP.
|
||||
+ Added new POSIX port layer that allows FreeRTOS to run on Linux hosts in
|
||||
the same way the Windows port layer enables FreeRTOS to run on Windows
|
||||
hosts.
|
||||
+ Many other minor optimisations and enhancements. For full details
|
||||
see https://github.com/FreeRTOS/FreeRTOS-Kernel/commits/master
|
||||
|
||||
|
||||
Changes between FreeRTOS V10.3.0 and FreeRTOS V10.3.1 released February 18 2020
|
||||
|
||||
See http://www.FreeRTOS.org/FreeRTOS-V10.3.x.html
|
||||
See https://www.FreeRTOS.org/FreeRTOS-V10.3.x.html
|
||||
|
||||
+ ./FreeRTOS-Labs directory was removed from this file. The libraries it
|
||||
contained are now available as a separate download.
|
||||
+ Replaced the single task notification per task with an array of
|
||||
notificatinos per task.
|
||||
|
||||
Changes between FreeRTOS V10.2.1 and FreeRTOS V10.3.0 released February 7 2020
|
||||
|
||||
See http://www.FreeRTOS.org/FreeRTOS-V10.3.x.html
|
||||
See https://www.FreeRTOS.org/FreeRTOS-V10.3.x.html
|
||||
|
||||
New and updated kernel ports:
|
||||
|
||||
|
@ -205,8 +244,8 @@ Changes between FreeRTOS V9.0.1 and FreeRTOS V10.0.0:
|
|||
|
||||
New Features and components:
|
||||
|
||||
+ Stream Buffers - see http://www.FreeRTOS.org/RTOS-stream-buffer-example.html
|
||||
+ Message Buffers - see http://www.FreeRTOS.org//RTOS-message-buffer-example.html
|
||||
+ Stream Buffers - see https://www.FreeRTOS.org/RTOS-stream-buffer-example.html
|
||||
+ Message Buffers - see https://www.FreeRTOS.org//RTOS-message-buffer-example.html
|
||||
+ Move FreeRTOS+TCP into the main repository, along with the basic Win32
|
||||
TCP demo FreeRTOS_Plus_TCP_Minimal_Windows_Simulator.
|
||||
|
||||
|
@ -308,7 +347,7 @@ Changes since FreeRTOS V9.0.0:
|
|||
|
||||
Changes between FreeRTOS V9.0.0 and FreeRTOS V9.0.0rc2 released May 25 2016:
|
||||
|
||||
See http://www.FreeRTOS.org/FreeRTOS-V9.html
|
||||
See https://www.FreeRTOS.org/FreeRTOS-V9.html
|
||||
|
||||
RTOS kernel updates:
|
||||
|
||||
|
@ -317,7 +356,7 @@ Changes between FreeRTOS V9.0.0 and FreeRTOS V9.0.0rc2 released May 25 2016:
|
|||
"CreateStatic()" API functions. The stack size parameter in
|
||||
xTaskCreateStatic() is now uint32_t, which changes the prototype of the
|
||||
callback functions. See the following URL:
|
||||
http://www.freertos.org/xTaskCreateStatic.html
|
||||
https://www.FreeRTOS.org/xTaskCreateStatic.html
|
||||
+ GCC ARM Cortex-A port: Introduced the configUSE_TASK_FPU_SUPPORT
|
||||
constant. When configUSE_TASK_FPU_SUPPORT is set to 2 every task is
|
||||
automatically given a floating point (FPU) context.
|
||||
|
@ -366,7 +405,7 @@ Changes between FreeRTOS V9.0.0 and FreeRTOS V9.0.0rc2 released May 25 2016:
|
|||
Changes between FreeRTOS V9.0.0rc1 and FreeRTOS V9.0.0rc2 (release candidate 2)
|
||||
released March 30 2016:
|
||||
|
||||
NOTE - See http://www.FreeRTOS.org/FreeRTOS-V9.html for details
|
||||
NOTE - See https://www.FreeRTOS.org/FreeRTOS-V9.html for details
|
||||
|
||||
+ The functions that create RTOS objects using static memory allocation have
|
||||
been simplified and will not revert to using dynamic allocation if a
|
||||
|
@ -579,7 +618,7 @@ Changes between V8.1.2 and V8.2.0 released 16th January 2015
|
|||
Significant RTOS kernel updates:
|
||||
|
||||
+ MAJOR NEW FEATURE! Task notifications. Please see the following URL for
|
||||
details: http://www.FreeRTOS.org/RTOS-task-notifications.html
|
||||
details: https://www.FreeRTOS.org/RTOS-task-notifications.html
|
||||
+ NEW HEADER FILE REQUIRED! Obsolete definitions have been separated into
|
||||
a new header file called FreeRTOS/Source/include/deprecated_definitions.h.
|
||||
This header file must be present to build. Note some of the obsolete
|
||||
|
@ -743,21 +782,21 @@ Changes between V8.0.0 and V8.0.1 released 2nd May 2014
|
|||
|
||||
Changes between V7.6.0 and V8.0.0 released 19th Feb 2014
|
||||
|
||||
http://www.freertos.org/upgrading-to-FreeRTOS-V8.html
|
||||
https://www.FreeRTOS.org/upgrading-to-FreeRTOS-V8.html
|
||||
|
||||
FreeRTOS V8.x.x is a drop-in compatible replacement for FreeRTOS V7.x.x,
|
||||
although a change to the type used to reference character strings may result
|
||||
in application code generating a few (easily clearable) compiler warnings
|
||||
after the upgrade, and an updated typedef naming convention means use of the
|
||||
old typedef names is now discouraged.
|
||||
See http://www.freertos.org/upgrading-to-FreeRTOS-V8.html for full
|
||||
See https://www.FreeRTOS.org/upgrading-to-FreeRTOS-V8.html for full
|
||||
information.
|
||||
|
||||
New features and functionality:
|
||||
|
||||
+ Event groups - see http://www.freertos.org/FreeRTOS-Event-Groups.html
|
||||
+ Event groups - see https://www.FreeRTOS.org/FreeRTOS-Event-Groups.html
|
||||
+ Centralised deferred interrupt processing - see
|
||||
http://www.freertos.org/xTimerPendFunctionCallFromISR.html
|
||||
https://www.FreeRTOS.org/xTimerPendFunctionCallFromISR.html
|
||||
|
||||
Other updates:
|
||||
|
||||
|
@ -768,7 +807,7 @@ Changes between V7.6.0 and V8.0.0 released 19th Feb 2014
|
|||
priority of the Running task.
|
||||
+ New low power tickless demonstration project that targets the ST STM32L
|
||||
microcontroller - see
|
||||
http://www.freertos.org/STM32L-discovery-low-power-tickless-RTOS-demo.html
|
||||
https://www.FreeRTOS.org/STM32L-discovery-low-power-tickless-RTOS-demo.html
|
||||
+ Add xPortGetMinimumEverFreeHeapSize() to heap_4.c.
|
||||
+ Small change to the tickless low power implementation on the SAM4L to
|
||||
ensure the alarm value (compare match value) cannot be set to zero when a
|
||||
|
@ -918,8 +957,8 @@ Changes between V7.4.2 and V7.5.0 released July 19 2013
|
|||
|
||||
New API functions:
|
||||
|
||||
+ uxTaskGetSystemState() http://www.freertos.org/uxTaskGetSystemState.html
|
||||
+ xQueueOverwrite() http://www.freertos.org/xQueueOverwrite.html
|
||||
+ uxTaskGetSystemState() https://www.FreeRTOS.org/uxTaskGetSystemState.html
|
||||
+ xQueueOverwrite() https://www.FreeRTOS.org/xQueueOverwrite.html
|
||||
+ xQueueOverwriteFromISR()
|
||||
+ xQueuePeekFromISR()
|
||||
|
||||
|
@ -969,7 +1008,7 @@ Changes between V7.4.1 and V7.4.2 released May 1 2013
|
|||
|
||||
+ Added FreeRTOS+FAT SL source code and demo project. The demo project
|
||||
runs in the FreeRTOS Windows simulator for easy and hardware independent
|
||||
experimentation and evaluation. See http://www.FreeRTOS.org/fat_sl
|
||||
experimentation and evaluation. See https://www.FreeRTOS.org/fat_sl
|
||||
|
||||
Changes between V7.4.0 and V7.4.1 released April 18 2013
|
||||
|
||||
|
@ -998,7 +1037,7 @@ Changes between V7.4.0 and V7.4.1 released April 18 2013
|
|||
Changes between V7.3.0 and V7.4.0 released February 20 2013
|
||||
|
||||
+ New feature: Queue sets. See:
|
||||
http://www.FreeRTOS.org/Pend-on-multiple-rtos-objects.html
|
||||
https://www.FreeRTOS.org/Pend-on-multiple-rtos-objects.html
|
||||
+ Overhauled the default tickless idle mode implementation provided with the
|
||||
ARM Cortex-M3 port layers.
|
||||
+ Enhanced tickless support in the core kernel code with the introduction of
|
||||
|
@ -1145,7 +1184,7 @@ Changes between V7.1.0 and V7.1.1 released May 1 2012
|
|||
|
||||
+ Introduced the portSETUP_TCB() macro to remove the requirement for the
|
||||
Windows simulator to use the traceTASK_CREATE() macro, leaving the trace
|
||||
macro available for use by FreeRTOS+Trace (http://www.FreeRTOS.org/trace).
|
||||
macro available for use by FreeRTOS+Trace (https://www.FreeRTOS.org/trace).
|
||||
+ Added a new trace macro, traceMOVE_TASK_TO_READY_STATE(), to allow future
|
||||
FreeRTOS+Trace versions to provide even more information to users.
|
||||
+ Updated the FreeRTOS MPU port to be correct for changes that were
|
||||
|
@ -1173,7 +1212,7 @@ Changes between V7.1.0 and V7.1.1 released May 1 2012
|
|||
|
||||
+ The command interpreter has now been formally released as FreeRTOS+CLI,
|
||||
and been moved out of the main FreeRTOS download, to instead be available
|
||||
from the FreeRTOS+ Ecosystem site http://www.FreeRTOS.org/plus.
|
||||
from the FreeRTOS+ Ecosystem site https://www.FreeRTOS.org/plus.
|
||||
+ flash_timer.c/h has been added to the list of standard demo tasks. This
|
||||
performs the same functionality as the flash.c tasks, but using software
|
||||
timers in place of tasks.
|
||||
|
@ -1455,7 +1494,7 @@ Changes between V6.0.3 and V6.0.4 released March 14 2010
|
|||
+ All the contributed files that were located in the Demo/Unsupported_Demos
|
||||
directory have been removed. These files are instead now available in the
|
||||
new Community Contributions section of the FreeRTOS website. See
|
||||
http://www.freertos.org/RTOS-contributed-ports.html
|
||||
https://www.FreeRTOS.org/RTOS-contributed-ports.html
|
||||
+ The project file located in the Demo/CORTEX_STM32F107_GCC_Rowley directory
|
||||
has been upgraded to use V2.x of the Rowley Crossworks STM32 support
|
||||
package.
|
||||
|
@ -1748,9 +1787,6 @@ Changes between V4.8.0 and V5.0.0 released April 15, 2008
|
|||
compiler might not issue any type mismatch warnings!
|
||||
|
||||
|
||||
See http://www.FreeRTOS.org/upgrading.html for full information.
|
||||
|
||||
|
||||
Other changes:
|
||||
|
||||
+ Support added for the new Luminary Micro LM3S3768 and LM3S3748 Cortex-M3
|
||||
|
|
|
@ -1,5 +1,5 @@
|
|||
[InternetShortcut]
|
||||
URL=http://www.freertos.org/FreeRTOS-quick-start-guide.html
|
||||
URL=https://www.FreeRTOS.org/FreeRTOS-quick-start-guide.html
|
||||
IDList=
|
||||
[{000214A0-0000-0000-C000-000000000046}]
|
||||
Prop3=19,2
|
||||
|
|
|
@ -1,9 +1,9 @@
|
|||
## Getting started
|
||||
This repository contains FreeRTOS kernel source/header files and kernel ports only. This repository is referenced as a submodule in [FreeRTOS/FreeRTOS](https://github.com/FreeRTOS/FreeRTOS) repository, which contains pre-configured demo application projects under ```FreeRTOS/Demo``` directory.
|
||||
|
||||
The easiest way to use FreeRTOS is to start with one of the pre-configured demo application projects. That way you will have the correct FreeRTOS source files included, and the correct include paths configured. Once a demo application is building and executing you can remove the demo application files, and start to add in your own application source files. See the [FreeRTOS Kernel Quick Start Guide](https://www.freertos.org/FreeRTOS-quick-start-guide.html) for detailed instructions and other useful links.
|
||||
The easiest way to use FreeRTOS is to start with one of the pre-configured demo application projects. That way you will have the correct FreeRTOS source files included, and the correct include paths configured. Once a demo application is building and executing you can remove the demo application files, and start to add in your own application source files. See the [FreeRTOS Kernel Quick Start Guide](https://www.FreeRTOS.org/FreeRTOS-quick-start-guide.html) for detailed instructions and other useful links.
|
||||
|
||||
Additionally, for FreeRTOS kernel feature information refer to the [Developer Documentation](https://www.freertos.org/features.html), and [API Reference](https://www.freertos.org/a00106.html).
|
||||
Additionally, for FreeRTOS kernel feature information refer to the [Developer Documentation](https://www.FreeRTOS.org/features.html), and [API Reference](https://www.FreeRTOS.org/a00106.html).
|
||||
|
||||
### Getting help
|
||||
If you have any questions or need assistance troubleshooting your FreeRTOS project, we have an active community that can help on the [FreeRTOS Community Support Forum](https://forums.freertos.org).
|
||||
|
@ -29,3 +29,7 @@ is normally only used on very memory limited systems.
|
|||
See the readme file in the ```./portable``` directory for more information.
|
||||
|
||||
- The ```./include``` directory contains the real time kernel header files.
|
||||
|
||||
### Code Formatting
|
||||
FreeRTOS files are formatted using the "uncrustify" tool. The configuration file used by uncrustify can be found in the [FreeRTOS/FreeRTOS repository](https://github.com/FreeRTOS/FreeRTOS/blob/master/tools/uncrustify.cfg).
|
||||
|
||||
|
|
|
@ -19,10 +19,9 @@
|
|||
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
* http://www.FreeRTOS.org
|
||||
* http://aws.amazon.com/freertos
|
||||
* https://www.FreeRTOS.org
|
||||
* https://github.com/FreeRTOS
|
||||
*
|
||||
* 1 tab == 4 spaces!
|
||||
*/
|
||||
|
||||
#include "FreeRTOS.h"
|
||||
|
@ -202,7 +201,7 @@
|
|||
{
|
||||
/* Are there any co-routines waiting to get moved to the ready list? These
|
||||
* are co-routines that have been readied by an ISR. The ISR cannot access
|
||||
* the ready lists itself. */
|
||||
* the ready lists itself. */
|
||||
while( listLIST_IS_EMPTY( &xPendingReadyCoRoutineList ) == pdFALSE )
|
||||
{
|
||||
CRCB_t * pxUnblockedCRCB;
|
||||
|
@ -306,7 +305,7 @@
|
|||
}
|
||||
|
||||
/* listGET_OWNER_OF_NEXT_ENTRY walks through the list, so the co-routines
|
||||
* of the same priority get an equal share of the processor time. */
|
||||
* of the same priority get an equal share of the processor time. */
|
||||
listGET_OWNER_OF_NEXT_ENTRY( pxCurrentCoRoutine, &( pxReadyCoRoutineLists[ uxTopCoRoutineReadyPriority ] ) );
|
||||
|
||||
/* Call the co-routine. */
|
||||
|
|
|
@ -19,10 +19,9 @@
|
|||
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
* http://www.FreeRTOS.org
|
||||
* http://aws.amazon.com/freertos
|
||||
* https://www.FreeRTOS.org
|
||||
* https://github.com/FreeRTOS
|
||||
*
|
||||
* 1 tab == 4 spaces!
|
||||
*/
|
||||
|
||||
/* Standard includes. */
|
||||
|
|
1625
include/FreeRTOS.h
1625
include/FreeRTOS.h
File diff suppressed because it is too large
Load diff
|
@ -19,114 +19,14 @@
|
|||
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
* http://www.FreeRTOS.org
|
||||
* http://aws.amazon.com/freertos
|
||||
* https://www.FreeRTOS.org
|
||||
* https://github.com/FreeRTOS
|
||||
*
|
||||
* 1 tab == 4 spaces!
|
||||
*/
|
||||
|
||||
#ifndef STACK_MACROS_H
|
||||
#define STACK_MACROS_H
|
||||
|
||||
#ifndef _MSC_VER /* Visual Studio doesn't support #warning. */
|
||||
#warning The name of this file has changed to stack_macros.h. Please update your code accordingly. This source file (which has the original name) will be removed in future released.
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Call the stack overflow hook function if the stack of the task being swapped
|
||||
* out is currently overflowed, or looks like it might have overflowed in the
|
||||
* past.
|
||||
*
|
||||
* Setting configCHECK_FOR_STACK_OVERFLOW to 1 will cause the macro to check
|
||||
* the current stack state only - comparing the current top of stack value to
|
||||
* the stack limit. Setting configCHECK_FOR_STACK_OVERFLOW to greater than 1
|
||||
* will also cause the last few stack bytes to be checked to ensure the value
|
||||
* to which the bytes were set when the task was created have not been
|
||||
* overwritten. Note this second test does not guarantee that an overflowed
|
||||
* stack will always be recognised.
|
||||
*/
|
||||
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
#if ( ( configCHECK_FOR_STACK_OVERFLOW == 1 ) && ( portSTACK_GROWTH < 0 ) )
|
||||
|
||||
/* Only the current stack state is to be checked. */
|
||||
#define taskCHECK_FOR_STACK_OVERFLOW() \
|
||||
{ \
|
||||
/* Is the currently saved stack pointer within the stack limit? */ \
|
||||
if( pxCurrentTCB->pxTopOfStack <= pxCurrentTCB->pxStack ) \
|
||||
{ \
|
||||
vApplicationStackOverflowHook( ( TaskHandle_t ) pxCurrentTCB, pxCurrentTCB->pcTaskName ); \
|
||||
} \
|
||||
}
|
||||
|
||||
#endif /* configCHECK_FOR_STACK_OVERFLOW == 1 */
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
#if ( ( configCHECK_FOR_STACK_OVERFLOW == 1 ) && ( portSTACK_GROWTH > 0 ) )
|
||||
|
||||
/* Only the current stack state is to be checked. */
|
||||
#define taskCHECK_FOR_STACK_OVERFLOW() \
|
||||
{ \
|
||||
\
|
||||
/* Is the currently saved stack pointer within the stack limit? */ \
|
||||
if( pxCurrentTCB->pxTopOfStack >= pxCurrentTCB->pxEndOfStack ) \
|
||||
{ \
|
||||
vApplicationStackOverflowHook( ( TaskHandle_t ) pxCurrentTCB, pxCurrentTCB->pcTaskName ); \
|
||||
} \
|
||||
}
|
||||
|
||||
#endif /* configCHECK_FOR_STACK_OVERFLOW == 1 */
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
#if ( ( configCHECK_FOR_STACK_OVERFLOW > 1 ) && ( portSTACK_GROWTH < 0 ) )
|
||||
|
||||
#define taskCHECK_FOR_STACK_OVERFLOW() \
|
||||
{ \
|
||||
const uint32_t * const pulStack = ( uint32_t * ) pxCurrentTCB->pxStack; \
|
||||
const uint32_t ulCheckValue = ( uint32_t ) 0xa5a5a5a5; \
|
||||
\
|
||||
if( ( pulStack[ 0 ] != ulCheckValue ) || \
|
||||
( pulStack[ 1 ] != ulCheckValue ) || \
|
||||
( pulStack[ 2 ] != ulCheckValue ) || \
|
||||
( pulStack[ 3 ] != ulCheckValue ) ) \
|
||||
{ \
|
||||
vApplicationStackOverflowHook( ( TaskHandle_t ) pxCurrentTCB, pxCurrentTCB->pcTaskName ); \
|
||||
} \
|
||||
}
|
||||
|
||||
#endif /* #if( configCHECK_FOR_STACK_OVERFLOW > 1 ) */
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
#if ( ( configCHECK_FOR_STACK_OVERFLOW > 1 ) && ( portSTACK_GROWTH > 0 ) )
|
||||
|
||||
#define taskCHECK_FOR_STACK_OVERFLOW() \
|
||||
{ \
|
||||
int8_t * pcEndOfStack = ( int8_t * ) pxCurrentTCB->pxEndOfStack; \
|
||||
static const uint8_t ucExpectedStackBytes[] = { tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, \
|
||||
tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, \
|
||||
tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, \
|
||||
tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, \
|
||||
tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE }; \
|
||||
\
|
||||
\
|
||||
pcEndOfStack -= sizeof( ucExpectedStackBytes ); \
|
||||
\
|
||||
/* Has the extremity of the task stack ever been written over? */ \
|
||||
if( memcmp( ( void * ) pcEndOfStack, ( void * ) ucExpectedStackBytes, sizeof( ucExpectedStackBytes ) ) != 0 ) \
|
||||
{ \
|
||||
vApplicationStackOverflowHook( ( TaskHandle_t ) pxCurrentTCB, pxCurrentTCB->pcTaskName ); \
|
||||
} \
|
||||
}
|
||||
|
||||
#endif /* #if( configCHECK_FOR_STACK_OVERFLOW > 1 ) */
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* Remove stack overflow macro if not being used. */
|
||||
#ifndef taskCHECK_FOR_STACK_OVERFLOW
|
||||
#define taskCHECK_FOR_STACK_OVERFLOW()
|
||||
#endif
|
||||
|
||||
|
||||
|
||||
#endif /* STACK_MACROS_H */
|
||||
#include "stack_macros.h"
|
||||
|
|
331
include/atomic.h
331
include/atomic.h
|
@ -19,10 +19,9 @@
|
|||
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
* http://www.FreeRTOS.org
|
||||
* http://aws.amazon.com/freertos
|
||||
* https://www.FreeRTOS.org
|
||||
* https://github.com/FreeRTOS
|
||||
*
|
||||
* 1 tab == 4 spaces!
|
||||
*/
|
||||
|
||||
/**
|
||||
|
@ -35,18 +34,20 @@
|
|||
*/
|
||||
|
||||
#ifndef ATOMIC_H
|
||||
#define ATOMIC_H
|
||||
#define ATOMIC_H
|
||||
|
||||
#ifndef INC_FREERTOS_H
|
||||
#error "include FreeRTOS.h must appear in source files before include atomic.h"
|
||||
#endif
|
||||
#ifndef INC_FREERTOS_H
|
||||
#error "include FreeRTOS.h must appear in source files before include atomic.h"
|
||||
#endif
|
||||
|
||||
/* Standard includes. */
|
||||
#include <stdint.h>
|
||||
#include <stdint.h>
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
/* *INDENT-OFF* */
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
/* *INDENT-ON* */
|
||||
|
||||
/*
|
||||
* Port specific definitions -- entering/exiting critical section.
|
||||
|
@ -56,22 +57,22 @@
|
|||
* ATOMIC_ENTER_CRITICAL().
|
||||
*
|
||||
*/
|
||||
#if defined( portSET_INTERRUPT_MASK_FROM_ISR )
|
||||
#if defined( portSET_INTERRUPT_MASK_FROM_ISR )
|
||||
|
||||
/* Nested interrupt scheme is supported in this port. */
|
||||
#define ATOMIC_ENTER_CRITICAL() \
|
||||
#define ATOMIC_ENTER_CRITICAL() \
|
||||
UBaseType_t uxCriticalSectionType = portSET_INTERRUPT_MASK_FROM_ISR()
|
||||
|
||||
#define ATOMIC_EXIT_CRITICAL() \
|
||||
#define ATOMIC_EXIT_CRITICAL() \
|
||||
portCLEAR_INTERRUPT_MASK_FROM_ISR( uxCriticalSectionType )
|
||||
|
||||
#else
|
||||
#else
|
||||
|
||||
/* Nested interrupt scheme is NOT supported in this port. */
|
||||
#define ATOMIC_ENTER_CRITICAL() portENTER_CRITICAL()
|
||||
#define ATOMIC_EXIT_CRITICAL() portEXIT_CRITICAL()
|
||||
#define ATOMIC_ENTER_CRITICAL() portENTER_CRITICAL()
|
||||
#define ATOMIC_EXIT_CRITICAL() portEXIT_CRITICAL()
|
||||
|
||||
#endif /* portSET_INTERRUPT_MASK_FROM_ISR() */
|
||||
#endif /* portSET_INTERRUPT_MASK_FROM_ISR() */
|
||||
|
||||
/*
|
||||
* Port specific definition -- "always inline".
|
||||
|
@ -80,12 +81,12 @@
|
|||
* for atomic. Thus, if portFORCE_INLINE is not provided by portmacro.h,
|
||||
* instead of resulting error, simply define it away.
|
||||
*/
|
||||
#ifndef portFORCE_INLINE
|
||||
#define portFORCE_INLINE
|
||||
#endif
|
||||
#ifndef portFORCE_INLINE
|
||||
#define portFORCE_INLINE
|
||||
#endif
|
||||
|
||||
#define ATOMIC_COMPARE_AND_SWAP_SUCCESS 0x1U /**< Compare and swap succeeded, swapped. */
|
||||
#define ATOMIC_COMPARE_AND_SWAP_FAILURE 0x0U /**< Compare and swap failed, did not swap. */
|
||||
#define ATOMIC_COMPARE_AND_SWAP_SUCCESS 0x1U /**< Compare and swap succeeded, swapped. */
|
||||
#define ATOMIC_COMPARE_AND_SWAP_FAILURE 0x0U /**< Compare and swap failed, did not swap. */
|
||||
|
||||
/*----------------------------- Swap && CAS ------------------------------*/
|
||||
|
||||
|
@ -104,28 +105,28 @@
|
|||
* @note This function only swaps *pulDestination with ulExchange, if previous
|
||||
* *pulDestination value equals ulComparand.
|
||||
*/
|
||||
static portFORCE_INLINE uint32_t Atomic_CompareAndSwap_u32( uint32_t volatile * pulDestination,
|
||||
uint32_t ulExchange,
|
||||
uint32_t ulComparand )
|
||||
static portFORCE_INLINE uint32_t Atomic_CompareAndSwap_u32( uint32_t volatile * pulDestination,
|
||||
uint32_t ulExchange,
|
||||
uint32_t ulComparand )
|
||||
{
|
||||
uint32_t ulReturnValue;
|
||||
|
||||
ATOMIC_ENTER_CRITICAL();
|
||||
{
|
||||
uint32_t ulReturnValue;
|
||||
|
||||
ATOMIC_ENTER_CRITICAL();
|
||||
if( *pulDestination == ulComparand )
|
||||
{
|
||||
if( *pulDestination == ulComparand )
|
||||
{
|
||||
*pulDestination = ulExchange;
|
||||
ulReturnValue = ATOMIC_COMPARE_AND_SWAP_SUCCESS;
|
||||
}
|
||||
else
|
||||
{
|
||||
ulReturnValue = ATOMIC_COMPARE_AND_SWAP_FAILURE;
|
||||
}
|
||||
*pulDestination = ulExchange;
|
||||
ulReturnValue = ATOMIC_COMPARE_AND_SWAP_SUCCESS;
|
||||
}
|
||||
else
|
||||
{
|
||||
ulReturnValue = ATOMIC_COMPARE_AND_SWAP_FAILURE;
|
||||
}
|
||||
ATOMIC_EXIT_CRITICAL();
|
||||
|
||||
return ulReturnValue;
|
||||
}
|
||||
ATOMIC_EXIT_CRITICAL();
|
||||
|
||||
return ulReturnValue;
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/**
|
||||
|
@ -140,20 +141,20 @@
|
|||
*
|
||||
* @return The initial value of *ppvDestination.
|
||||
*/
|
||||
static portFORCE_INLINE void * Atomic_SwapPointers_p32( void * volatile * ppvDestination,
|
||||
void * pvExchange )
|
||||
static portFORCE_INLINE void * Atomic_SwapPointers_p32( void * volatile * ppvDestination,
|
||||
void * pvExchange )
|
||||
{
|
||||
void * pReturnValue;
|
||||
|
||||
ATOMIC_ENTER_CRITICAL();
|
||||
{
|
||||
void * pReturnValue;
|
||||
|
||||
ATOMIC_ENTER_CRITICAL();
|
||||
{
|
||||
pReturnValue = *ppvDestination;
|
||||
*ppvDestination = pvExchange;
|
||||
}
|
||||
ATOMIC_EXIT_CRITICAL();
|
||||
|
||||
return pReturnValue;
|
||||
pReturnValue = *ppvDestination;
|
||||
*ppvDestination = pvExchange;
|
||||
}
|
||||
ATOMIC_EXIT_CRITICAL();
|
||||
|
||||
return pReturnValue;
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/**
|
||||
|
@ -172,24 +173,24 @@
|
|||
* @note This function only swaps *ppvDestination with pvExchange, if previous
|
||||
* *ppvDestination value equals pvComparand.
|
||||
*/
|
||||
static portFORCE_INLINE uint32_t Atomic_CompareAndSwapPointers_p32( void * volatile * ppvDestination,
|
||||
void * pvExchange,
|
||||
void * pvComparand )
|
||||
static portFORCE_INLINE uint32_t Atomic_CompareAndSwapPointers_p32( void * volatile * ppvDestination,
|
||||
void * pvExchange,
|
||||
void * pvComparand )
|
||||
{
|
||||
uint32_t ulReturnValue = ATOMIC_COMPARE_AND_SWAP_FAILURE;
|
||||
|
||||
ATOMIC_ENTER_CRITICAL();
|
||||
{
|
||||
uint32_t ulReturnValue = ATOMIC_COMPARE_AND_SWAP_FAILURE;
|
||||
|
||||
ATOMIC_ENTER_CRITICAL();
|
||||
if( *ppvDestination == pvComparand )
|
||||
{
|
||||
if( *ppvDestination == pvComparand )
|
||||
{
|
||||
*ppvDestination = pvExchange;
|
||||
ulReturnValue = ATOMIC_COMPARE_AND_SWAP_SUCCESS;
|
||||
}
|
||||
*ppvDestination = pvExchange;
|
||||
ulReturnValue = ATOMIC_COMPARE_AND_SWAP_SUCCESS;
|
||||
}
|
||||
ATOMIC_EXIT_CRITICAL();
|
||||
|
||||
return ulReturnValue;
|
||||
}
|
||||
ATOMIC_EXIT_CRITICAL();
|
||||
|
||||
return ulReturnValue;
|
||||
}
|
||||
|
||||
|
||||
/*----------------------------- Arithmetic ------------------------------*/
|
||||
|
@ -205,20 +206,20 @@
|
|||
*
|
||||
* @return previous *pulAddend value.
|
||||
*/
|
||||
static portFORCE_INLINE uint32_t Atomic_Add_u32( uint32_t volatile * pulAddend,
|
||||
uint32_t ulCount )
|
||||
static portFORCE_INLINE uint32_t Atomic_Add_u32( uint32_t volatile * pulAddend,
|
||||
uint32_t ulCount )
|
||||
{
|
||||
uint32_t ulCurrent;
|
||||
|
||||
ATOMIC_ENTER_CRITICAL();
|
||||
{
|
||||
uint32_t ulCurrent;
|
||||
|
||||
ATOMIC_ENTER_CRITICAL();
|
||||
{
|
||||
ulCurrent = *pulAddend;
|
||||
*pulAddend += ulCount;
|
||||
}
|
||||
ATOMIC_EXIT_CRITICAL();
|
||||
|
||||
return ulCurrent;
|
||||
ulCurrent = *pulAddend;
|
||||
*pulAddend += ulCount;
|
||||
}
|
||||
ATOMIC_EXIT_CRITICAL();
|
||||
|
||||
return ulCurrent;
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/**
|
||||
|
@ -233,20 +234,20 @@
|
|||
*
|
||||
* @return previous *pulAddend value.
|
||||
*/
|
||||
static portFORCE_INLINE uint32_t Atomic_Subtract_u32( uint32_t volatile * pulAddend,
|
||||
uint32_t ulCount )
|
||||
static portFORCE_INLINE uint32_t Atomic_Subtract_u32( uint32_t volatile * pulAddend,
|
||||
uint32_t ulCount )
|
||||
{
|
||||
uint32_t ulCurrent;
|
||||
|
||||
ATOMIC_ENTER_CRITICAL();
|
||||
{
|
||||
uint32_t ulCurrent;
|
||||
|
||||
ATOMIC_ENTER_CRITICAL();
|
||||
{
|
||||
ulCurrent = *pulAddend;
|
||||
*pulAddend -= ulCount;
|
||||
}
|
||||
ATOMIC_EXIT_CRITICAL();
|
||||
|
||||
return ulCurrent;
|
||||
ulCurrent = *pulAddend;
|
||||
*pulAddend -= ulCount;
|
||||
}
|
||||
ATOMIC_EXIT_CRITICAL();
|
||||
|
||||
return ulCurrent;
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/**
|
||||
|
@ -259,19 +260,19 @@
|
|||
*
|
||||
* @return *pulAddend value before increment.
|
||||
*/
|
||||
static portFORCE_INLINE uint32_t Atomic_Increment_u32( uint32_t volatile * pulAddend )
|
||||
static portFORCE_INLINE uint32_t Atomic_Increment_u32( uint32_t volatile * pulAddend )
|
||||
{
|
||||
uint32_t ulCurrent;
|
||||
|
||||
ATOMIC_ENTER_CRITICAL();
|
||||
{
|
||||
uint32_t ulCurrent;
|
||||
|
||||
ATOMIC_ENTER_CRITICAL();
|
||||
{
|
||||
ulCurrent = *pulAddend;
|
||||
*pulAddend += 1;
|
||||
}
|
||||
ATOMIC_EXIT_CRITICAL();
|
||||
|
||||
return ulCurrent;
|
||||
ulCurrent = *pulAddend;
|
||||
*pulAddend += 1;
|
||||
}
|
||||
ATOMIC_EXIT_CRITICAL();
|
||||
|
||||
return ulCurrent;
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/**
|
||||
|
@ -284,19 +285,19 @@
|
|||
*
|
||||
* @return *pulAddend value before decrement.
|
||||
*/
|
||||
static portFORCE_INLINE uint32_t Atomic_Decrement_u32( uint32_t volatile * pulAddend )
|
||||
static portFORCE_INLINE uint32_t Atomic_Decrement_u32( uint32_t volatile * pulAddend )
|
||||
{
|
||||
uint32_t ulCurrent;
|
||||
|
||||
ATOMIC_ENTER_CRITICAL();
|
||||
{
|
||||
uint32_t ulCurrent;
|
||||
|
||||
ATOMIC_ENTER_CRITICAL();
|
||||
{
|
||||
ulCurrent = *pulAddend;
|
||||
*pulAddend -= 1;
|
||||
}
|
||||
ATOMIC_EXIT_CRITICAL();
|
||||
|
||||
return ulCurrent;
|
||||
ulCurrent = *pulAddend;
|
||||
*pulAddend -= 1;
|
||||
}
|
||||
ATOMIC_EXIT_CRITICAL();
|
||||
|
||||
return ulCurrent;
|
||||
}
|
||||
|
||||
/*----------------------------- Bitwise Logical ------------------------------*/
|
||||
|
||||
|
@ -311,20 +312,20 @@
|
|||
*
|
||||
* @return The original value of *pulDestination.
|
||||
*/
|
||||
static portFORCE_INLINE uint32_t Atomic_OR_u32( uint32_t volatile * pulDestination,
|
||||
uint32_t ulValue )
|
||||
static portFORCE_INLINE uint32_t Atomic_OR_u32( uint32_t volatile * pulDestination,
|
||||
uint32_t ulValue )
|
||||
{
|
||||
uint32_t ulCurrent;
|
||||
|
||||
ATOMIC_ENTER_CRITICAL();
|
||||
{
|
||||
uint32_t ulCurrent;
|
||||
|
||||
ATOMIC_ENTER_CRITICAL();
|
||||
{
|
||||
ulCurrent = *pulDestination;
|
||||
*pulDestination |= ulValue;
|
||||
}
|
||||
ATOMIC_EXIT_CRITICAL();
|
||||
|
||||
return ulCurrent;
|
||||
ulCurrent = *pulDestination;
|
||||
*pulDestination |= ulValue;
|
||||
}
|
||||
ATOMIC_EXIT_CRITICAL();
|
||||
|
||||
return ulCurrent;
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/**
|
||||
|
@ -338,20 +339,20 @@
|
|||
*
|
||||
* @return The original value of *pulDestination.
|
||||
*/
|
||||
static portFORCE_INLINE uint32_t Atomic_AND_u32( uint32_t volatile * pulDestination,
|
||||
uint32_t ulValue )
|
||||
static portFORCE_INLINE uint32_t Atomic_AND_u32( uint32_t volatile * pulDestination,
|
||||
uint32_t ulValue )
|
||||
{
|
||||
uint32_t ulCurrent;
|
||||
|
||||
ATOMIC_ENTER_CRITICAL();
|
||||
{
|
||||
uint32_t ulCurrent;
|
||||
|
||||
ATOMIC_ENTER_CRITICAL();
|
||||
{
|
||||
ulCurrent = *pulDestination;
|
||||
*pulDestination &= ulValue;
|
||||
}
|
||||
ATOMIC_EXIT_CRITICAL();
|
||||
|
||||
return ulCurrent;
|
||||
ulCurrent = *pulDestination;
|
||||
*pulDestination &= ulValue;
|
||||
}
|
||||
ATOMIC_EXIT_CRITICAL();
|
||||
|
||||
return ulCurrent;
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/**
|
||||
|
@ -365,20 +366,20 @@
|
|||
*
|
||||
* @return The original value of *pulDestination.
|
||||
*/
|
||||
static portFORCE_INLINE uint32_t Atomic_NAND_u32( uint32_t volatile * pulDestination,
|
||||
uint32_t ulValue )
|
||||
static portFORCE_INLINE uint32_t Atomic_NAND_u32( uint32_t volatile * pulDestination,
|
||||
uint32_t ulValue )
|
||||
{
|
||||
uint32_t ulCurrent;
|
||||
|
||||
ATOMIC_ENTER_CRITICAL();
|
||||
{
|
||||
uint32_t ulCurrent;
|
||||
|
||||
ATOMIC_ENTER_CRITICAL();
|
||||
{
|
||||
ulCurrent = *pulDestination;
|
||||
*pulDestination = ~( ulCurrent & ulValue );
|
||||
}
|
||||
ATOMIC_EXIT_CRITICAL();
|
||||
|
||||
return ulCurrent;
|
||||
ulCurrent = *pulDestination;
|
||||
*pulDestination = ~( ulCurrent & ulValue );
|
||||
}
|
||||
ATOMIC_EXIT_CRITICAL();
|
||||
|
||||
return ulCurrent;
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/**
|
||||
|
@ -392,23 +393,25 @@
|
|||
*
|
||||
* @return The original value of *pulDestination.
|
||||
*/
|
||||
static portFORCE_INLINE uint32_t Atomic_XOR_u32( uint32_t volatile * pulDestination,
|
||||
uint32_t ulValue )
|
||||
static portFORCE_INLINE uint32_t Atomic_XOR_u32( uint32_t volatile * pulDestination,
|
||||
uint32_t ulValue )
|
||||
{
|
||||
uint32_t ulCurrent;
|
||||
|
||||
ATOMIC_ENTER_CRITICAL();
|
||||
{
|
||||
uint32_t ulCurrent;
|
||||
|
||||
ATOMIC_ENTER_CRITICAL();
|
||||
{
|
||||
ulCurrent = *pulDestination;
|
||||
*pulDestination ^= ulValue;
|
||||
}
|
||||
ATOMIC_EXIT_CRITICAL();
|
||||
|
||||
return ulCurrent;
|
||||
ulCurrent = *pulDestination;
|
||||
*pulDestination ^= ulValue;
|
||||
}
|
||||
ATOMIC_EXIT_CRITICAL();
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
return ulCurrent;
|
||||
}
|
||||
|
||||
/* *INDENT-OFF* */
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
/* *INDENT-ON* */
|
||||
|
||||
#endif /* ATOMIC_H */
|
||||
|
|
|
@ -19,52 +19,54 @@
|
|||
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
* http://www.FreeRTOS.org
|
||||
* http://aws.amazon.com/freertos
|
||||
* https://www.FreeRTOS.org
|
||||
* https://github.com/FreeRTOS
|
||||
*
|
||||
* 1 tab == 4 spaces!
|
||||
*/
|
||||
|
||||
#ifndef CO_ROUTINE_H
|
||||
#define CO_ROUTINE_H
|
||||
#define CO_ROUTINE_H
|
||||
|
||||
#ifndef INC_FREERTOS_H
|
||||
#error "include FreeRTOS.h must appear in source files before include croutine.h"
|
||||
#endif
|
||||
#ifndef INC_FREERTOS_H
|
||||
#error "include FreeRTOS.h must appear in source files before include croutine.h"
|
||||
#endif
|
||||
|
||||
#include "list.h"
|
||||
#include "list.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
/* *INDENT-OFF* */
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
/* *INDENT-ON* */
|
||||
|
||||
/* Used to hide the implementation of the co-routine control block. The
|
||||
* control block structure however has to be included in the header due to
|
||||
* the macro implementation of the co-routine functionality. */
|
||||
typedef void * CoRoutineHandle_t;
|
||||
typedef void * CoRoutineHandle_t;
|
||||
|
||||
/* Defines the prototype to which co-routine functions must conform. */
|
||||
typedef void (* crCOROUTINE_CODE)( CoRoutineHandle_t,
|
||||
UBaseType_t );
|
||||
typedef void (* crCOROUTINE_CODE)( CoRoutineHandle_t,
|
||||
UBaseType_t );
|
||||
|
||||
typedef struct corCoRoutineControlBlock
|
||||
{
|
||||
crCOROUTINE_CODE pxCoRoutineFunction;
|
||||
ListItem_t xGenericListItem; /*< List item used to place the CRCB in ready and blocked queues. */
|
||||
ListItem_t xEventListItem; /*< List item used to place the CRCB in event lists. */
|
||||
UBaseType_t uxPriority; /*< The priority of the co-routine in relation to other co-routines. */
|
||||
UBaseType_t uxIndex; /*< Used to distinguish between co-routines when multiple co-routines use the same co-routine function. */
|
||||
uint16_t uxState; /*< Used internally by the co-routine implementation. */
|
||||
} CRCB_t; /* Co-routine control block. Note must be identical in size down to uxPriority with TCB_t. */
|
||||
typedef struct corCoRoutineControlBlock
|
||||
{
|
||||
crCOROUTINE_CODE pxCoRoutineFunction;
|
||||
ListItem_t xGenericListItem; /*< List item used to place the CRCB in ready and blocked queues. */
|
||||
ListItem_t xEventListItem; /*< List item used to place the CRCB in event lists. */
|
||||
UBaseType_t uxPriority; /*< The priority of the co-routine in relation to other co-routines. */
|
||||
UBaseType_t uxIndex; /*< Used to distinguish between co-routines when multiple co-routines use the same co-routine function. */
|
||||
uint16_t uxState; /*< Used internally by the co-routine implementation. */
|
||||
} CRCB_t; /* Co-routine control block. Note must be identical in size down to uxPriority with TCB_t. */
|
||||
|
||||
/**
|
||||
* croutine. h
|
||||
*<pre>
|
||||
* <pre>
|
||||
* BaseType_t xCoRoutineCreate(
|
||||
* crCOROUTINE_CODE pxCoRoutineCode,
|
||||
* UBaseType_t uxPriority,
|
||||
* UBaseType_t uxIndex
|
||||
* );</pre>
|
||||
* );
|
||||
* </pre>
|
||||
*
|
||||
* Create a new co-routine and add it to the list of co-routines that are
|
||||
* ready to run.
|
||||
|
@ -129,15 +131,16 @@
|
|||
* \defgroup xCoRoutineCreate xCoRoutineCreate
|
||||
* \ingroup Tasks
|
||||
*/
|
||||
BaseType_t xCoRoutineCreate( crCOROUTINE_CODE pxCoRoutineCode,
|
||||
UBaseType_t uxPriority,
|
||||
UBaseType_t uxIndex );
|
||||
BaseType_t xCoRoutineCreate( crCOROUTINE_CODE pxCoRoutineCode,
|
||||
UBaseType_t uxPriority,
|
||||
UBaseType_t uxIndex );
|
||||
|
||||
|
||||
/**
|
||||
* croutine. h
|
||||
*<pre>
|
||||
* void vCoRoutineSchedule( void );</pre>
|
||||
* <pre>
|
||||
* void vCoRoutineSchedule( void );
|
||||
* </pre>
|
||||
*
|
||||
* Run a co-routine.
|
||||
*
|
||||
|
@ -173,12 +176,13 @@
|
|||
* \defgroup vCoRoutineSchedule vCoRoutineSchedule
|
||||
* \ingroup Tasks
|
||||
*/
|
||||
void vCoRoutineSchedule( void );
|
||||
void vCoRoutineSchedule( void );
|
||||
|
||||
/**
|
||||
* croutine. h
|
||||
* <pre>
|
||||
* crSTART( CoRoutineHandle_t xHandle );</pre>
|
||||
* crSTART( CoRoutineHandle_t xHandle );
|
||||
* </pre>
|
||||
*
|
||||
* This macro MUST always be called at the start of a co-routine function.
|
||||
*
|
||||
|
@ -200,18 +204,20 @@
|
|||
*
|
||||
* // Must end every co-routine with a call to crEND();
|
||||
* crEND();
|
||||
* }</pre>
|
||||
* }
|
||||
* </pre>
|
||||
* \defgroup crSTART crSTART
|
||||
* \ingroup Tasks
|
||||
*/
|
||||
#define crSTART( pxCRCB ) \
|
||||
#define crSTART( pxCRCB ) \
|
||||
switch( ( ( CRCB_t * ) ( pxCRCB ) )->uxState ) { \
|
||||
case 0:
|
||||
|
||||
/**
|
||||
* croutine. h
|
||||
* <pre>
|
||||
* crEND();</pre>
|
||||
* crEND();
|
||||
* </pre>
|
||||
*
|
||||
* This macro MUST always be called at the end of a co-routine function.
|
||||
*
|
||||
|
@ -233,27 +239,29 @@
|
|||
*
|
||||
* // Must end every co-routine with a call to crEND();
|
||||
* crEND();
|
||||
* }</pre>
|
||||
* }
|
||||
* </pre>
|
||||
* \defgroup crSTART crSTART
|
||||
* \ingroup Tasks
|
||||
*/
|
||||
#define crEND() }
|
||||
#define crEND() }
|
||||
|
||||
/*
|
||||
* These macros are intended for internal use by the co-routine implementation
|
||||
* only. The macros should not be used directly by application writers.
|
||||
*/
|
||||
#define crSET_STATE0( xHandle ) \
|
||||
#define crSET_STATE0( xHandle ) \
|
||||
( ( CRCB_t * ) ( xHandle ) )->uxState = ( __LINE__ * 2 ); return; \
|
||||
case ( __LINE__ * 2 ):
|
||||
#define crSET_STATE1( xHandle ) \
|
||||
#define crSET_STATE1( xHandle ) \
|
||||
( ( CRCB_t * ) ( xHandle ) )->uxState = ( ( __LINE__ * 2 ) + 1 ); return; \
|
||||
case ( ( __LINE__ * 2 ) + 1 ):
|
||||
|
||||
/**
|
||||
* croutine. h
|
||||
*<pre>
|
||||
* crDELAY( CoRoutineHandle_t xHandle, TickType_t xTicksToDelay );</pre>
|
||||
* <pre>
|
||||
* crDELAY( CoRoutineHandle_t xHandle, TickType_t xTicksToDelay );
|
||||
* </pre>
|
||||
*
|
||||
* Delay a co-routine for a fixed period of time.
|
||||
*
|
||||
|
@ -292,11 +300,12 @@
|
|||
*
|
||||
* // Must end every co-routine with a call to crEND();
|
||||
* crEND();
|
||||
* }</pre>
|
||||
* }
|
||||
* </pre>
|
||||
* \defgroup crDELAY crDELAY
|
||||
* \ingroup Tasks
|
||||
*/
|
||||
#define crDELAY( xHandle, xTicksToDelay ) \
|
||||
#define crDELAY( xHandle, xTicksToDelay ) \
|
||||
if( ( xTicksToDelay ) > 0 ) \
|
||||
{ \
|
||||
vCoRoutineAddToDelayedList( ( xTicksToDelay ), NULL ); \
|
||||
|
@ -311,7 +320,8 @@
|
|||
* void *pvItemToQueue,
|
||||
* TickType_t xTicksToWait,
|
||||
* BaseType_t *pxResult
|
||||
* )</pre>
|
||||
* )
|
||||
* </pre>
|
||||
*
|
||||
* The macro's crQUEUE_SEND() and crQUEUE_RECEIVE() are the co-routine
|
||||
* equivalent to the xQueueSend() and xQueueReceive() functions used by tasks.
|
||||
|
@ -382,11 +392,12 @@
|
|||
*
|
||||
* // Co-routines must end with a call to crEND().
|
||||
* crEND();
|
||||
* }</pre>
|
||||
* }
|
||||
* </pre>
|
||||
* \defgroup crQUEUE_SEND crQUEUE_SEND
|
||||
* \ingroup Tasks
|
||||
*/
|
||||
#define crQUEUE_SEND( xHandle, pxQueue, pvItemToQueue, xTicksToWait, pxResult ) \
|
||||
#define crQUEUE_SEND( xHandle, pxQueue, pvItemToQueue, xTicksToWait, pxResult ) \
|
||||
{ \
|
||||
*( pxResult ) = xQueueCRSend( ( pxQueue ), ( pvItemToQueue ), ( xTicksToWait ) ); \
|
||||
if( *( pxResult ) == errQUEUE_BLOCKED ) \
|
||||
|
@ -410,7 +421,8 @@
|
|||
* void *pvBuffer,
|
||||
* TickType_t xTicksToWait,
|
||||
* BaseType_t *pxResult
|
||||
* )</pre>
|
||||
* )
|
||||
* </pre>
|
||||
*
|
||||
* The macro's crQUEUE_SEND() and crQUEUE_RECEIVE() are the co-routine
|
||||
* equivalent to the xQueueSend() and xQueueReceive() functions used by tasks.
|
||||
|
@ -474,11 +486,12 @@
|
|||
* }
|
||||
*
|
||||
* crEND();
|
||||
* }</pre>
|
||||
* }
|
||||
* </pre>
|
||||
* \defgroup crQUEUE_RECEIVE crQUEUE_RECEIVE
|
||||
* \ingroup Tasks
|
||||
*/
|
||||
#define crQUEUE_RECEIVE( xHandle, pxQueue, pvBuffer, xTicksToWait, pxResult ) \
|
||||
#define crQUEUE_RECEIVE( xHandle, pxQueue, pvBuffer, xTicksToWait, pxResult ) \
|
||||
{ \
|
||||
*( pxResult ) = xQueueCRReceive( ( pxQueue ), ( pvBuffer ), ( xTicksToWait ) ); \
|
||||
if( *( pxResult ) == errQUEUE_BLOCKED ) \
|
||||
|
@ -500,7 +513,8 @@
|
|||
* QueueHandle_t pxQueue,
|
||||
* void *pvItemToQueue,
|
||||
* BaseType_t xCoRoutinePreviouslyWoken
|
||||
* )</pre>
|
||||
* )
|
||||
* </pre>
|
||||
*
|
||||
* The macro's crQUEUE_SEND_FROM_ISR() and crQUEUE_RECEIVE_FROM_ISR() are the
|
||||
* co-routine equivalent to the xQueueSendFromISR() and xQueueReceiveFromISR()
|
||||
|
@ -583,11 +597,13 @@
|
|||
* // many characters are posted to the queue.
|
||||
* xCRWokenByPost = crQUEUE_SEND_FROM_ISR( xCommsRxQueue, &cRxedChar, xCRWokenByPost );
|
||||
* }
|
||||
* }</pre>
|
||||
* }
|
||||
* </pre>
|
||||
* \defgroup crQUEUE_SEND_FROM_ISR crQUEUE_SEND_FROM_ISR
|
||||
* \ingroup Tasks
|
||||
*/
|
||||
#define crQUEUE_SEND_FROM_ISR( pxQueue, pvItemToQueue, xCoRoutinePreviouslyWoken ) xQueueCRSendFromISR( ( pxQueue ), ( pvItemToQueue ), ( xCoRoutinePreviouslyWoken ) )
|
||||
#define crQUEUE_SEND_FROM_ISR( pxQueue, pvItemToQueue, xCoRoutinePreviouslyWoken ) \
|
||||
xQueueCRSendFromISR( ( pxQueue ), ( pvItemToQueue ), ( xCoRoutinePreviouslyWoken ) )
|
||||
|
||||
|
||||
/**
|
||||
|
@ -597,7 +613,8 @@
|
|||
* QueueHandle_t pxQueue,
|
||||
* void *pvBuffer,
|
||||
* BaseType_t * pxCoRoutineWoken
|
||||
* )</pre>
|
||||
* )
|
||||
* </pre>
|
||||
*
|
||||
* The macro's crQUEUE_SEND_FROM_ISR() and crQUEUE_RECEIVE_FROM_ISR() are the
|
||||
* co-routine equivalent to the xQueueSendFromISR() and xQueueReceiveFromISR()
|
||||
|
@ -696,11 +713,13 @@
|
|||
* SEND_CHARACTER( cCharToTx );
|
||||
* }
|
||||
* }
|
||||
* }</pre>
|
||||
* }
|
||||
* </pre>
|
||||
* \defgroup crQUEUE_RECEIVE_FROM_ISR crQUEUE_RECEIVE_FROM_ISR
|
||||
* \ingroup Tasks
|
||||
*/
|
||||
#define crQUEUE_RECEIVE_FROM_ISR( pxQueue, pvBuffer, pxCoRoutineWoken ) xQueueCRReceiveFromISR( ( pxQueue ), ( pvBuffer ), ( pxCoRoutineWoken ) )
|
||||
#define crQUEUE_RECEIVE_FROM_ISR( pxQueue, pvBuffer, pxCoRoutineWoken ) \
|
||||
xQueueCRReceiveFromISR( ( pxQueue ), ( pvBuffer ), ( pxCoRoutineWoken ) )
|
||||
|
||||
/*
|
||||
* This function is intended for internal use by the co-routine macros only.
|
||||
|
@ -711,8 +730,8 @@
|
|||
* Removes the current co-routine from its ready list and places it in the
|
||||
* appropriate delayed list.
|
||||
*/
|
||||
void vCoRoutineAddToDelayedList( TickType_t xTicksToDelay,
|
||||
List_t * pxEventList );
|
||||
void vCoRoutineAddToDelayedList( TickType_t xTicksToDelay,
|
||||
List_t * pxEventList );
|
||||
|
||||
/*
|
||||
* This function is intended for internal use by the queue implementation only.
|
||||
|
@ -721,10 +740,12 @@
|
|||
* Removes the highest priority co-routine from the event list and places it in
|
||||
* the pending ready list.
|
||||
*/
|
||||
BaseType_t xCoRoutineRemoveFromEventList( const List_t * pxEventList );
|
||||
BaseType_t xCoRoutineRemoveFromEventList( const List_t * pxEventList );
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
/* *INDENT-OFF* */
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
/* *INDENT-ON* */
|
||||
|
||||
#endif /* CO_ROUTINE_H */
|
||||
|
|
|
@ -19,10 +19,9 @@
|
|||
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
* http://www.FreeRTOS.org
|
||||
* http://aws.amazon.com/freertos
|
||||
* https://www.FreeRTOS.org
|
||||
* https://github.com/FreeRTOS
|
||||
*
|
||||
* 1 tab == 4 spaces!
|
||||
*/
|
||||
|
||||
#ifndef DEPRECATED_DEFINITIONS_H
|
||||
|
|
File diff suppressed because it is too large
Load diff
186
include/list.h
186
include/list.h
|
@ -19,10 +19,9 @@
|
|||
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
* http://www.FreeRTOS.org
|
||||
* http://aws.amazon.com/freertos
|
||||
* https://www.FreeRTOS.org
|
||||
* https://github.com/FreeRTOS
|
||||
*
|
||||
* 1 tab == 4 spaces!
|
||||
*/
|
||||
|
||||
/*
|
||||
|
@ -53,12 +52,13 @@
|
|||
* \ingroup FreeRTOSIntro
|
||||
*/
|
||||
|
||||
#ifndef INC_FREERTOS_H
|
||||
#error FreeRTOS.h must be included before list.h
|
||||
#endif
|
||||
|
||||
#ifndef LIST_H
|
||||
#define LIST_H
|
||||
#define LIST_H
|
||||
|
||||
#ifndef INC_FREERTOS_H
|
||||
#error "FreeRTOS.h must be included before list.h"
|
||||
#endif
|
||||
|
||||
/*
|
||||
* The list structure members are modified from within interrupts, and therefore
|
||||
|
@ -88,87 +88,89 @@
|
|||
* FreeRTOSConfig.h (without the quotes):
|
||||
* "#define configLIST_VOLATILE volatile"
|
||||
*/
|
||||
#ifndef configLIST_VOLATILE
|
||||
#define configLIST_VOLATILE
|
||||
#endif /* configSUPPORT_CROSS_MODULE_OPTIMISATION */
|
||||
#ifndef configLIST_VOLATILE
|
||||
#define configLIST_VOLATILE
|
||||
#endif /* configSUPPORT_CROSS_MODULE_OPTIMISATION */
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
/* *INDENT-OFF* */
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
/* *INDENT-ON* */
|
||||
|
||||
/* Macros that can be used to place known values within the list structures,
|
||||
* then check that the known values do not get corrupted during the execution of
|
||||
* the application. These may catch the list data structures being overwritten in
|
||||
* memory. They will not catch data errors caused by incorrect configuration or
|
||||
* use of FreeRTOS.*/
|
||||
#if ( configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES == 0 )
|
||||
/* Define the macros to do nothing. */
|
||||
#define listFIRST_LIST_ITEM_INTEGRITY_CHECK_VALUE
|
||||
#define listSECOND_LIST_ITEM_INTEGRITY_CHECK_VALUE
|
||||
#define listFIRST_LIST_INTEGRITY_CHECK_VALUE
|
||||
#define listSECOND_LIST_INTEGRITY_CHECK_VALUE
|
||||
#define listSET_FIRST_LIST_ITEM_INTEGRITY_CHECK_VALUE( pxItem )
|
||||
#define listSET_SECOND_LIST_ITEM_INTEGRITY_CHECK_VALUE( pxItem )
|
||||
#define listSET_LIST_INTEGRITY_CHECK_1_VALUE( pxList )
|
||||
#define listSET_LIST_INTEGRITY_CHECK_2_VALUE( pxList )
|
||||
#define listTEST_LIST_ITEM_INTEGRITY( pxItem )
|
||||
#define listTEST_LIST_INTEGRITY( pxList )
|
||||
#else /* if ( configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES == 0 ) */
|
||||
/* Define macros that add new members into the list structures. */
|
||||
#define listFIRST_LIST_ITEM_INTEGRITY_CHECK_VALUE TickType_t xListItemIntegrityValue1;
|
||||
#define listSECOND_LIST_ITEM_INTEGRITY_CHECK_VALUE TickType_t xListItemIntegrityValue2;
|
||||
#define listFIRST_LIST_INTEGRITY_CHECK_VALUE TickType_t xListIntegrityValue1;
|
||||
#define listSECOND_LIST_INTEGRITY_CHECK_VALUE TickType_t xListIntegrityValue2;
|
||||
#if ( configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES == 0 )
|
||||
/* Define the macros to do nothing. */
|
||||
#define listFIRST_LIST_ITEM_INTEGRITY_CHECK_VALUE
|
||||
#define listSECOND_LIST_ITEM_INTEGRITY_CHECK_VALUE
|
||||
#define listFIRST_LIST_INTEGRITY_CHECK_VALUE
|
||||
#define listSECOND_LIST_INTEGRITY_CHECK_VALUE
|
||||
#define listSET_FIRST_LIST_ITEM_INTEGRITY_CHECK_VALUE( pxItem )
|
||||
#define listSET_SECOND_LIST_ITEM_INTEGRITY_CHECK_VALUE( pxItem )
|
||||
#define listSET_LIST_INTEGRITY_CHECK_1_VALUE( pxList )
|
||||
#define listSET_LIST_INTEGRITY_CHECK_2_VALUE( pxList )
|
||||
#define listTEST_LIST_ITEM_INTEGRITY( pxItem )
|
||||
#define listTEST_LIST_INTEGRITY( pxList )
|
||||
#else /* if ( configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES == 0 ) */
|
||||
/* Define macros that add new members into the list structures. */
|
||||
#define listFIRST_LIST_ITEM_INTEGRITY_CHECK_VALUE TickType_t xListItemIntegrityValue1;
|
||||
#define listSECOND_LIST_ITEM_INTEGRITY_CHECK_VALUE TickType_t xListItemIntegrityValue2;
|
||||
#define listFIRST_LIST_INTEGRITY_CHECK_VALUE TickType_t xListIntegrityValue1;
|
||||
#define listSECOND_LIST_INTEGRITY_CHECK_VALUE TickType_t xListIntegrityValue2;
|
||||
|
||||
/* Define macros that set the new structure members to known values. */
|
||||
#define listSET_FIRST_LIST_ITEM_INTEGRITY_CHECK_VALUE( pxItem ) ( pxItem )->xListItemIntegrityValue1 = pdINTEGRITY_CHECK_VALUE
|
||||
#define listSET_SECOND_LIST_ITEM_INTEGRITY_CHECK_VALUE( pxItem ) ( pxItem )->xListItemIntegrityValue2 = pdINTEGRITY_CHECK_VALUE
|
||||
#define listSET_LIST_INTEGRITY_CHECK_1_VALUE( pxList ) ( pxList )->xListIntegrityValue1 = pdINTEGRITY_CHECK_VALUE
|
||||
#define listSET_LIST_INTEGRITY_CHECK_2_VALUE( pxList ) ( pxList )->xListIntegrityValue2 = pdINTEGRITY_CHECK_VALUE
|
||||
#define listSET_FIRST_LIST_ITEM_INTEGRITY_CHECK_VALUE( pxItem ) ( pxItem )->xListItemIntegrityValue1 = pdINTEGRITY_CHECK_VALUE
|
||||
#define listSET_SECOND_LIST_ITEM_INTEGRITY_CHECK_VALUE( pxItem ) ( pxItem )->xListItemIntegrityValue2 = pdINTEGRITY_CHECK_VALUE
|
||||
#define listSET_LIST_INTEGRITY_CHECK_1_VALUE( pxList ) ( pxList )->xListIntegrityValue1 = pdINTEGRITY_CHECK_VALUE
|
||||
#define listSET_LIST_INTEGRITY_CHECK_2_VALUE( pxList ) ( pxList )->xListIntegrityValue2 = pdINTEGRITY_CHECK_VALUE
|
||||
|
||||
/* Define macros that will assert if one of the structure members does not
|
||||
* contain its expected value. */
|
||||
#define listTEST_LIST_ITEM_INTEGRITY( pxItem ) configASSERT( ( ( pxItem )->xListItemIntegrityValue1 == pdINTEGRITY_CHECK_VALUE ) && ( ( pxItem )->xListItemIntegrityValue2 == pdINTEGRITY_CHECK_VALUE ) )
|
||||
#define listTEST_LIST_INTEGRITY( pxList ) configASSERT( ( ( pxList )->xListIntegrityValue1 == pdINTEGRITY_CHECK_VALUE ) && ( ( pxList )->xListIntegrityValue2 == pdINTEGRITY_CHECK_VALUE ) )
|
||||
#endif /* configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES */
|
||||
#define listTEST_LIST_ITEM_INTEGRITY( pxItem ) configASSERT( ( ( pxItem )->xListItemIntegrityValue1 == pdINTEGRITY_CHECK_VALUE ) && ( ( pxItem )->xListItemIntegrityValue2 == pdINTEGRITY_CHECK_VALUE ) )
|
||||
#define listTEST_LIST_INTEGRITY( pxList ) configASSERT( ( ( pxList )->xListIntegrityValue1 == pdINTEGRITY_CHECK_VALUE ) && ( ( pxList )->xListIntegrityValue2 == pdINTEGRITY_CHECK_VALUE ) )
|
||||
#endif /* configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES */
|
||||
|
||||
|
||||
/*
|
||||
* Definition of the only type of object that a list can contain.
|
||||
*/
|
||||
struct xLIST;
|
||||
struct xLIST_ITEM
|
||||
{
|
||||
listFIRST_LIST_ITEM_INTEGRITY_CHECK_VALUE /*< Set to a known value if configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES is set to 1. */
|
||||
configLIST_VOLATILE TickType_t xItemValue; /*< The value being listed. In most cases this is used to sort the list in descending order. */
|
||||
struct xLIST_ITEM * configLIST_VOLATILE pxNext; /*< Pointer to the next ListItem_t in the list. */
|
||||
struct xLIST_ITEM * configLIST_VOLATILE pxPrevious; /*< Pointer to the previous ListItem_t in the list. */
|
||||
void * pvOwner; /*< Pointer to the object (normally a TCB) that contains the list item. There is therefore a two way link between the object containing the list item and the list item itself. */
|
||||
struct xLIST * configLIST_VOLATILE pxContainer; /*< Pointer to the list in which this list item is placed (if any). */
|
||||
listSECOND_LIST_ITEM_INTEGRITY_CHECK_VALUE /*< Set to a known value if configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES is set to 1. */
|
||||
};
|
||||
typedef struct xLIST_ITEM ListItem_t; /* For some reason lint wants this as two separate definitions. */
|
||||
struct xLIST;
|
||||
struct xLIST_ITEM
|
||||
{
|
||||
listFIRST_LIST_ITEM_INTEGRITY_CHECK_VALUE /*< Set to a known value if configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES is set to 1. */
|
||||
configLIST_VOLATILE TickType_t xItemValue; /*< The value being listed. In most cases this is used to sort the list in descending order. */
|
||||
struct xLIST_ITEM * configLIST_VOLATILE pxNext; /*< Pointer to the next ListItem_t in the list. */
|
||||
struct xLIST_ITEM * configLIST_VOLATILE pxPrevious; /*< Pointer to the previous ListItem_t in the list. */
|
||||
void * pvOwner; /*< Pointer to the object (normally a TCB) that contains the list item. There is therefore a two way link between the object containing the list item and the list item itself. */
|
||||
struct xLIST * configLIST_VOLATILE pxContainer; /*< Pointer to the list in which this list item is placed (if any). */
|
||||
listSECOND_LIST_ITEM_INTEGRITY_CHECK_VALUE /*< Set to a known value if configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES is set to 1. */
|
||||
};
|
||||
typedef struct xLIST_ITEM ListItem_t; /* For some reason lint wants this as two separate definitions. */
|
||||
|
||||
struct xMINI_LIST_ITEM
|
||||
{
|
||||
listFIRST_LIST_ITEM_INTEGRITY_CHECK_VALUE /*< Set to a known value if configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES is set to 1. */
|
||||
configLIST_VOLATILE TickType_t xItemValue;
|
||||
struct xLIST_ITEM * configLIST_VOLATILE pxNext;
|
||||
struct xLIST_ITEM * configLIST_VOLATILE pxPrevious;
|
||||
};
|
||||
typedef struct xMINI_LIST_ITEM MiniListItem_t;
|
||||
struct xMINI_LIST_ITEM
|
||||
{
|
||||
listFIRST_LIST_ITEM_INTEGRITY_CHECK_VALUE /*< Set to a known value if configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES is set to 1. */
|
||||
configLIST_VOLATILE TickType_t xItemValue;
|
||||
struct xLIST_ITEM * configLIST_VOLATILE pxNext;
|
||||
struct xLIST_ITEM * configLIST_VOLATILE pxPrevious;
|
||||
};
|
||||
typedef struct xMINI_LIST_ITEM MiniListItem_t;
|
||||
|
||||
/*
|
||||
* Definition of the type of queue used by the scheduler.
|
||||
*/
|
||||
typedef struct xLIST
|
||||
{
|
||||
listFIRST_LIST_INTEGRITY_CHECK_VALUE /*< Set to a known value if configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES is set to 1. */
|
||||
volatile UBaseType_t uxNumberOfItems;
|
||||
ListItem_t * configLIST_VOLATILE pxIndex; /*< Used to walk through the list. Points to the last item returned by a call to listGET_OWNER_OF_NEXT_ENTRY (). */
|
||||
MiniListItem_t xListEnd; /*< List item that contains the maximum possible item value meaning it is always at the end of the list and is therefore used as a marker. */
|
||||
listSECOND_LIST_INTEGRITY_CHECK_VALUE /*< Set to a known value if configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES is set to 1. */
|
||||
} List_t;
|
||||
typedef struct xLIST
|
||||
{
|
||||
listFIRST_LIST_INTEGRITY_CHECK_VALUE /*< Set to a known value if configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES is set to 1. */
|
||||
volatile UBaseType_t uxNumberOfItems;
|
||||
ListItem_t * configLIST_VOLATILE pxIndex; /*< Used to walk through the list. Points to the last item returned by a call to listGET_OWNER_OF_NEXT_ENTRY (). */
|
||||
MiniListItem_t xListEnd; /*< List item that contains the maximum possible item value meaning it is always at the end of the list and is therefore used as a marker. */
|
||||
listSECOND_LIST_INTEGRITY_CHECK_VALUE /*< Set to a known value if configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES is set to 1. */
|
||||
} List_t;
|
||||
|
||||
/*
|
||||
* Access macro to set the owner of a list item. The owner of a list item
|
||||
|
@ -177,7 +179,7 @@
|
|||
* \page listSET_LIST_ITEM_OWNER listSET_LIST_ITEM_OWNER
|
||||
* \ingroup LinkedList
|
||||
*/
|
||||
#define listSET_LIST_ITEM_OWNER( pxListItem, pxOwner ) ( ( pxListItem )->pvOwner = ( void * ) ( pxOwner ) )
|
||||
#define listSET_LIST_ITEM_OWNER( pxListItem, pxOwner ) ( ( pxListItem )->pvOwner = ( void * ) ( pxOwner ) )
|
||||
|
||||
/*
|
||||
* Access macro to get the owner of a list item. The owner of a list item
|
||||
|
@ -186,7 +188,7 @@
|
|||
* \page listGET_LIST_ITEM_OWNER listSET_LIST_ITEM_OWNER
|
||||
* \ingroup LinkedList
|
||||
*/
|
||||
#define listGET_LIST_ITEM_OWNER( pxListItem ) ( ( pxListItem )->pvOwner )
|
||||
#define listGET_LIST_ITEM_OWNER( pxListItem ) ( ( pxListItem )->pvOwner )
|
||||
|
||||
/*
|
||||
* Access macro to set the value of the list item. In most cases the value is
|
||||
|
@ -195,7 +197,7 @@
|
|||
* \page listSET_LIST_ITEM_VALUE listSET_LIST_ITEM_VALUE
|
||||
* \ingroup LinkedList
|
||||
*/
|
||||
#define listSET_LIST_ITEM_VALUE( pxListItem, xValue ) ( ( pxListItem )->xItemValue = ( xValue ) )
|
||||
#define listSET_LIST_ITEM_VALUE( pxListItem, xValue ) ( ( pxListItem )->xItemValue = ( xValue ) )
|
||||
|
||||
/*
|
||||
* Access macro to retrieve the value of the list item. The value can
|
||||
|
@ -205,7 +207,7 @@
|
|||
* \page listGET_LIST_ITEM_VALUE listGET_LIST_ITEM_VALUE
|
||||
* \ingroup LinkedList
|
||||
*/
|
||||
#define listGET_LIST_ITEM_VALUE( pxListItem ) ( ( pxListItem )->xItemValue )
|
||||
#define listGET_LIST_ITEM_VALUE( pxListItem ) ( ( pxListItem )->xItemValue )
|
||||
|
||||
/*
|
||||
* Access macro to retrieve the value of the list item at the head of a given
|
||||
|
@ -214,7 +216,7 @@
|
|||
* \page listGET_LIST_ITEM_VALUE listGET_LIST_ITEM_VALUE
|
||||
* \ingroup LinkedList
|
||||
*/
|
||||
#define listGET_ITEM_VALUE_OF_HEAD_ENTRY( pxList ) ( ( ( pxList )->xListEnd ).pxNext->xItemValue )
|
||||
#define listGET_ITEM_VALUE_OF_HEAD_ENTRY( pxList ) ( ( ( pxList )->xListEnd ).pxNext->xItemValue )
|
||||
|
||||
/*
|
||||
* Return the list item at the head of the list.
|
||||
|
@ -222,7 +224,7 @@
|
|||
* \page listGET_HEAD_ENTRY listGET_HEAD_ENTRY
|
||||
* \ingroup LinkedList
|
||||
*/
|
||||
#define listGET_HEAD_ENTRY( pxList ) ( ( ( pxList )->xListEnd ).pxNext )
|
||||
#define listGET_HEAD_ENTRY( pxList ) ( ( ( pxList )->xListEnd ).pxNext )
|
||||
|
||||
/*
|
||||
* Return the next list item.
|
||||
|
@ -230,7 +232,7 @@
|
|||
* \page listGET_NEXT listGET_NEXT
|
||||
* \ingroup LinkedList
|
||||
*/
|
||||
#define listGET_NEXT( pxListItem ) ( ( pxListItem )->pxNext )
|
||||
#define listGET_NEXT( pxListItem ) ( ( pxListItem )->pxNext )
|
||||
|
||||
/*
|
||||
* Return the list item that marks the end of the list
|
||||
|
@ -238,7 +240,7 @@
|
|||
* \page listGET_END_MARKER listGET_END_MARKER
|
||||
* \ingroup LinkedList
|
||||
*/
|
||||
#define listGET_END_MARKER( pxList ) ( ( ListItem_t const * ) ( &( ( pxList )->xListEnd ) ) )
|
||||
#define listGET_END_MARKER( pxList ) ( ( ListItem_t const * ) ( &( ( pxList )->xListEnd ) ) )
|
||||
|
||||
/*
|
||||
* Access macro to determine if a list contains any items. The macro will
|
||||
|
@ -247,12 +249,12 @@
|
|||
* \page listLIST_IS_EMPTY listLIST_IS_EMPTY
|
||||
* \ingroup LinkedList
|
||||
*/
|
||||
#define listLIST_IS_EMPTY( pxList ) ( ( ( pxList )->uxNumberOfItems == ( UBaseType_t ) 0 ) ? pdTRUE : pdFALSE )
|
||||
#define listLIST_IS_EMPTY( pxList ) ( ( ( pxList )->uxNumberOfItems == ( UBaseType_t ) 0 ) ? pdTRUE : pdFALSE )
|
||||
|
||||
/*
|
||||
* Access macro to return the number of items in the list.
|
||||
*/
|
||||
#define listCURRENT_LIST_LENGTH( pxList ) ( ( pxList )->uxNumberOfItems )
|
||||
#define listCURRENT_LIST_LENGTH( pxList ) ( ( pxList )->uxNumberOfItems )
|
||||
|
||||
/*
|
||||
* Access function to obtain the owner of the next entry in a list.
|
||||
|
@ -274,7 +276,7 @@
|
|||
* \page listGET_OWNER_OF_NEXT_ENTRY listGET_OWNER_OF_NEXT_ENTRY
|
||||
* \ingroup LinkedList
|
||||
*/
|
||||
#define listGET_OWNER_OF_NEXT_ENTRY( pxTCB, pxList ) \
|
||||
#define listGET_OWNER_OF_NEXT_ENTRY( pxTCB, pxList ) \
|
||||
{ \
|
||||
List_t * const pxConstList = ( pxList ); \
|
||||
/* Increment the index to the next item and return the item, ensuring */ \
|
||||
|
@ -304,7 +306,7 @@
|
|||
* \page listGET_OWNER_OF_HEAD_ENTRY listGET_OWNER_OF_HEAD_ENTRY
|
||||
* \ingroup LinkedList
|
||||
*/
|
||||
#define listGET_OWNER_OF_HEAD_ENTRY( pxList ) ( ( &( ( pxList )->xListEnd ) )->pxNext->pvOwner )
|
||||
#define listGET_OWNER_OF_HEAD_ENTRY( pxList ) ( ( &( ( pxList )->xListEnd ) )->pxNext->pvOwner )
|
||||
|
||||
/*
|
||||
* Check to see if a list item is within a list. The list item maintains a
|
||||
|
@ -315,7 +317,7 @@
|
|||
* @param pxListItem The list item we want to know if is in the list.
|
||||
* @return pdTRUE if the list item is in the list, otherwise pdFALSE.
|
||||
*/
|
||||
#define listIS_CONTAINED_WITHIN( pxList, pxListItem ) ( ( ( pxListItem )->pxContainer == ( pxList ) ) ? ( pdTRUE ) : ( pdFALSE ) )
|
||||
#define listIS_CONTAINED_WITHIN( pxList, pxListItem ) ( ( ( pxListItem )->pxContainer == ( pxList ) ) ? ( pdTRUE ) : ( pdFALSE ) )
|
||||
|
||||
/*
|
||||
* Return the list a list item is contained within (referenced from).
|
||||
|
@ -323,14 +325,14 @@
|
|||
* @param pxListItem The list item being queried.
|
||||
* @return A pointer to the List_t object that references the pxListItem
|
||||
*/
|
||||
#define listLIST_ITEM_CONTAINER( pxListItem ) ( ( pxListItem )->pxContainer )
|
||||
#define listLIST_ITEM_CONTAINER( pxListItem ) ( ( pxListItem )->pxContainer )
|
||||
|
||||
/*
|
||||
* This provides a crude means of knowing if a list has been initialised, as
|
||||
* pxList->xListEnd.xItemValue is set to portMAX_DELAY by the vListInitialise()
|
||||
* function.
|
||||
*/
|
||||
#define listLIST_IS_INITIALISED( pxList ) ( ( pxList )->xListEnd.xItemValue == portMAX_DELAY )
|
||||
#define listLIST_IS_INITIALISED( pxList ) ( ( pxList )->xListEnd.xItemValue == portMAX_DELAY )
|
||||
|
||||
/*
|
||||
* Must be called before a list is used! This initialises all the members
|
||||
|
@ -342,7 +344,7 @@
|
|||
* \page vListInitialise vListInitialise
|
||||
* \ingroup LinkedList
|
||||
*/
|
||||
void vListInitialise( List_t * const pxList ) PRIVILEGED_FUNCTION;
|
||||
void vListInitialise( List_t * const pxList ) PRIVILEGED_FUNCTION;
|
||||
|
||||
/*
|
||||
* Must be called before a list item is used. This sets the list container to
|
||||
|
@ -353,7 +355,7 @@
|
|||
* \page vListInitialiseItem vListInitialiseItem
|
||||
* \ingroup LinkedList
|
||||
*/
|
||||
void vListInitialiseItem( ListItem_t * const pxItem ) PRIVILEGED_FUNCTION;
|
||||
void vListInitialiseItem( ListItem_t * const pxItem ) PRIVILEGED_FUNCTION;
|
||||
|
||||
/*
|
||||
* Insert a list item into a list. The item will be inserted into the list in
|
||||
|
@ -366,8 +368,8 @@
|
|||
* \page vListInsert vListInsert
|
||||
* \ingroup LinkedList
|
||||
*/
|
||||
void vListInsert( List_t * const pxList,
|
||||
ListItem_t * const pxNewListItem ) PRIVILEGED_FUNCTION;
|
||||
void vListInsert( List_t * const pxList,
|
||||
ListItem_t * const pxNewListItem ) PRIVILEGED_FUNCTION;
|
||||
|
||||
/*
|
||||
* Insert a list item into a list. The item will be inserted in a position
|
||||
|
@ -388,8 +390,8 @@
|
|||
* \page vListInsertEnd vListInsertEnd
|
||||
* \ingroup LinkedList
|
||||
*/
|
||||
void vListInsertEnd( List_t * const pxList,
|
||||
ListItem_t * const pxNewListItem ) PRIVILEGED_FUNCTION;
|
||||
void vListInsertEnd( List_t * const pxList,
|
||||
ListItem_t * const pxNewListItem ) PRIVILEGED_FUNCTION;
|
||||
|
||||
/*
|
||||
* Remove an item from a list. The list item has a pointer to the list that
|
||||
|
@ -404,10 +406,12 @@
|
|||
* \page uxListRemove uxListRemove
|
||||
* \ingroup LinkedList
|
||||
*/
|
||||
UBaseType_t uxListRemove( ListItem_t * const pxItemToRemove ) PRIVILEGED_FUNCTION;
|
||||
UBaseType_t uxListRemove( ListItem_t * const pxItemToRemove ) PRIVILEGED_FUNCTION;
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
/* *INDENT-OFF* */
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
/* *INDENT-ON* */
|
||||
|
||||
#endif /* ifndef LIST_H */
|
||||
|
|
|
@ -19,10 +19,9 @@
|
|||
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
* http://www.FreeRTOS.org
|
||||
* http://aws.amazon.com/freertos
|
||||
* https://www.FreeRTOS.org
|
||||
* https://github.com/FreeRTOS
|
||||
*
|
||||
* 1 tab == 4 spaces!
|
||||
*/
|
||||
|
||||
|
||||
|
@ -60,18 +59,20 @@
|
|||
*/
|
||||
|
||||
#ifndef FREERTOS_MESSAGE_BUFFER_H
|
||||
#define FREERTOS_MESSAGE_BUFFER_H
|
||||
#define FREERTOS_MESSAGE_BUFFER_H
|
||||
|
||||
#ifndef INC_FREERTOS_H
|
||||
#error "include FreeRTOS.h must appear in source files before include message_buffer.h"
|
||||
#endif
|
||||
#ifndef INC_FREERTOS_H
|
||||
#error "include FreeRTOS.h must appear in source files before include message_buffer.h"
|
||||
#endif
|
||||
|
||||
/* Message buffers are built onto of stream buffers. */
|
||||
#include "stream_buffer.h"
|
||||
#include "stream_buffer.h"
|
||||
|
||||
#if defined( __cplusplus )
|
||||
extern "C" {
|
||||
#endif
|
||||
/* *INDENT-OFF* */
|
||||
#if defined( __cplusplus )
|
||||
extern "C" {
|
||||
#endif
|
||||
/* *INDENT-ON* */
|
||||
|
||||
/**
|
||||
* Type by which message buffers are referenced. For example, a call to
|
||||
|
@ -79,7 +80,7 @@
|
|||
* then be used as a parameter to xMessageBufferSend(), xMessageBufferReceive(),
|
||||
* etc.
|
||||
*/
|
||||
typedef void * MessageBufferHandle_t;
|
||||
typedef void * MessageBufferHandle_t;
|
||||
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
|
@ -139,7 +140,8 @@
|
|||
* \defgroup xMessageBufferCreate xMessageBufferCreate
|
||||
* \ingroup MessageBufferManagement
|
||||
*/
|
||||
#define xMessageBufferCreate( xBufferSizeBytes ) ( MessageBufferHandle_t ) xStreamBufferGenericCreate( xBufferSizeBytes, ( size_t ) 0, pdTRUE )
|
||||
#define xMessageBufferCreate( xBufferSizeBytes ) \
|
||||
( MessageBufferHandle_t ) xStreamBufferGenericCreate( xBufferSizeBytes, ( size_t ) 0, pdTRUE )
|
||||
|
||||
/**
|
||||
* message_buffer.h
|
||||
|
@ -205,7 +207,8 @@
|
|||
* \defgroup xMessageBufferCreateStatic xMessageBufferCreateStatic
|
||||
* \ingroup MessageBufferManagement
|
||||
*/
|
||||
#define xMessageBufferCreateStatic( xBufferSizeBytes, pucMessageBufferStorageArea, pxStaticMessageBuffer ) ( MessageBufferHandle_t ) xStreamBufferGenericCreateStatic( xBufferSizeBytes, 0, pdTRUE, pucMessageBufferStorageArea, pxStaticMessageBuffer )
|
||||
#define xMessageBufferCreateStatic( xBufferSizeBytes, pucMessageBufferStorageArea, pxStaticMessageBuffer ) \
|
||||
( MessageBufferHandle_t ) xStreamBufferGenericCreateStatic( xBufferSizeBytes, 0, pdTRUE, pucMessageBufferStorageArea, pxStaticMessageBuffer )
|
||||
|
||||
/**
|
||||
* message_buffer.h
|
||||
|
@ -215,7 +218,7 @@
|
|||
* const void *pvTxData,
|
||||
* size_t xDataLengthBytes,
|
||||
* TickType_t xTicksToWait );
|
||||
* <pre>
|
||||
* </pre>
|
||||
*
|
||||
* Sends a discrete message to the message buffer. The message can be any
|
||||
* length that fits within the buffer's free space, and is copied into the
|
||||
|
@ -304,7 +307,8 @@
|
|||
* \defgroup xMessageBufferSend xMessageBufferSend
|
||||
* \ingroup MessageBufferManagement
|
||||
*/
|
||||
#define xMessageBufferSend( xMessageBuffer, pvTxData, xDataLengthBytes, xTicksToWait ) xStreamBufferSend( ( StreamBufferHandle_t ) xMessageBuffer, pvTxData, xDataLengthBytes, xTicksToWait )
|
||||
#define xMessageBufferSend( xMessageBuffer, pvTxData, xDataLengthBytes, xTicksToWait ) \
|
||||
xStreamBufferSend( ( StreamBufferHandle_t ) xMessageBuffer, pvTxData, xDataLengthBytes, xTicksToWait )
|
||||
|
||||
/**
|
||||
* message_buffer.h
|
||||
|
@ -314,7 +318,7 @@
|
|||
* const void *pvTxData,
|
||||
* size_t xDataLengthBytes,
|
||||
* BaseType_t *pxHigherPriorityTaskWoken );
|
||||
* <pre>
|
||||
* </pre>
|
||||
*
|
||||
* Interrupt safe version of the API function that sends a discrete message to
|
||||
* the message buffer. The message can be any length that fits within the
|
||||
|
@ -408,7 +412,8 @@
|
|||
* \defgroup xMessageBufferSendFromISR xMessageBufferSendFromISR
|
||||
* \ingroup MessageBufferManagement
|
||||
*/
|
||||
#define xMessageBufferSendFromISR( xMessageBuffer, pvTxData, xDataLengthBytes, pxHigherPriorityTaskWoken ) xStreamBufferSendFromISR( ( StreamBufferHandle_t ) xMessageBuffer, pvTxData, xDataLengthBytes, pxHigherPriorityTaskWoken )
|
||||
#define xMessageBufferSendFromISR( xMessageBuffer, pvTxData, xDataLengthBytes, pxHigherPriorityTaskWoken ) \
|
||||
xStreamBufferSendFromISR( ( StreamBufferHandle_t ) xMessageBuffer, pvTxData, xDataLengthBytes, pxHigherPriorityTaskWoken )
|
||||
|
||||
/**
|
||||
* message_buffer.h
|
||||
|
@ -496,7 +501,8 @@
|
|||
* \defgroup xMessageBufferReceive xMessageBufferReceive
|
||||
* \ingroup MessageBufferManagement
|
||||
*/
|
||||
#define xMessageBufferReceive( xMessageBuffer, pvRxData, xBufferLengthBytes, xTicksToWait ) xStreamBufferReceive( ( StreamBufferHandle_t ) xMessageBuffer, pvRxData, xBufferLengthBytes, xTicksToWait )
|
||||
#define xMessageBufferReceive( xMessageBuffer, pvRxData, xBufferLengthBytes, xTicksToWait ) \
|
||||
xStreamBufferReceive( ( StreamBufferHandle_t ) xMessageBuffer, pvRxData, xBufferLengthBytes, xTicksToWait )
|
||||
|
||||
|
||||
/**
|
||||
|
@ -597,7 +603,8 @@
|
|||
* \defgroup xMessageBufferReceiveFromISR xMessageBufferReceiveFromISR
|
||||
* \ingroup MessageBufferManagement
|
||||
*/
|
||||
#define xMessageBufferReceiveFromISR( xMessageBuffer, pvRxData, xBufferLengthBytes, pxHigherPriorityTaskWoken ) xStreamBufferReceiveFromISR( ( StreamBufferHandle_t ) xMessageBuffer, pvRxData, xBufferLengthBytes, pxHigherPriorityTaskWoken )
|
||||
#define xMessageBufferReceiveFromISR( xMessageBuffer, pvRxData, xBufferLengthBytes, pxHigherPriorityTaskWoken ) \
|
||||
xStreamBufferReceiveFromISR( ( StreamBufferHandle_t ) xMessageBuffer, pvRxData, xBufferLengthBytes, pxHigherPriorityTaskWoken )
|
||||
|
||||
/**
|
||||
* message_buffer.h
|
||||
|
@ -617,7 +624,8 @@
|
|||
* @param xMessageBuffer The handle of the message buffer to be deleted.
|
||||
*
|
||||
*/
|
||||
#define vMessageBufferDelete( xMessageBuffer ) vStreamBufferDelete( ( StreamBufferHandle_t ) xMessageBuffer )
|
||||
#define vMessageBufferDelete( xMessageBuffer ) \
|
||||
vStreamBufferDelete( ( StreamBufferHandle_t ) xMessageBuffer )
|
||||
|
||||
/**
|
||||
* message_buffer.h
|
||||
|
@ -634,7 +642,8 @@
|
|||
* @return If the message buffer referenced by xMessageBuffer is full then
|
||||
* pdTRUE is returned. Otherwise pdFALSE is returned.
|
||||
*/
|
||||
#define xMessageBufferIsFull( xMessageBuffer ) xStreamBufferIsFull( ( StreamBufferHandle_t ) xMessageBuffer )
|
||||
#define xMessageBufferIsFull( xMessageBuffer ) \
|
||||
xStreamBufferIsFull( ( StreamBufferHandle_t ) xMessageBuffer )
|
||||
|
||||
/**
|
||||
* message_buffer.h
|
||||
|
@ -650,7 +659,8 @@
|
|||
* pdTRUE is returned. Otherwise pdFALSE is returned.
|
||||
*
|
||||
*/
|
||||
#define xMessageBufferIsEmpty( xMessageBuffer ) xStreamBufferIsEmpty( ( StreamBufferHandle_t ) xMessageBuffer )
|
||||
#define xMessageBufferIsEmpty( xMessageBuffer ) \
|
||||
xStreamBufferIsEmpty( ( StreamBufferHandle_t ) xMessageBuffer )
|
||||
|
||||
/**
|
||||
* message_buffer.h
|
||||
|
@ -673,7 +683,8 @@
|
|||
* \defgroup xMessageBufferReset xMessageBufferReset
|
||||
* \ingroup MessageBufferManagement
|
||||
*/
|
||||
#define xMessageBufferReset( xMessageBuffer ) xStreamBufferReset( ( StreamBufferHandle_t ) xMessageBuffer )
|
||||
#define xMessageBufferReset( xMessageBuffer ) \
|
||||
xStreamBufferReset( ( StreamBufferHandle_t ) xMessageBuffer )
|
||||
|
||||
|
||||
/**
|
||||
|
@ -695,8 +706,10 @@
|
|||
* \defgroup xMessageBufferSpaceAvailable xMessageBufferSpaceAvailable
|
||||
* \ingroup MessageBufferManagement
|
||||
*/
|
||||
#define xMessageBufferSpaceAvailable( xMessageBuffer ) xStreamBufferSpacesAvailable( ( StreamBufferHandle_t ) xMessageBuffer )
|
||||
#define xMessageBufferSpacesAvailable( xMessageBuffer ) xStreamBufferSpacesAvailable( ( StreamBufferHandle_t ) xMessageBuffer ) /* Corrects typo in original macro name. */
|
||||
#define xMessageBufferSpaceAvailable( xMessageBuffer ) \
|
||||
xStreamBufferSpacesAvailable( ( StreamBufferHandle_t ) xMessageBuffer )
|
||||
#define xMessageBufferSpacesAvailable( xMessageBuffer ) \
|
||||
xStreamBufferSpacesAvailable( ( StreamBufferHandle_t ) xMessageBuffer ) /* Corrects typo in original macro name. */
|
||||
|
||||
/**
|
||||
* message_buffer.h
|
||||
|
@ -715,7 +728,8 @@
|
|||
* \defgroup xMessageBufferNextLengthBytes xMessageBufferNextLengthBytes
|
||||
* \ingroup MessageBufferManagement
|
||||
*/
|
||||
#define xMessageBufferNextLengthBytes( xMessageBuffer ) xStreamBufferNextMessageLengthBytes( ( StreamBufferHandle_t ) xMessageBuffer ) PRIVILEGED_FUNCTION;
|
||||
#define xMessageBufferNextLengthBytes( xMessageBuffer ) \
|
||||
xStreamBufferNextMessageLengthBytes( ( StreamBufferHandle_t ) xMessageBuffer ) PRIVILEGED_FUNCTION;
|
||||
|
||||
/**
|
||||
* message_buffer.h
|
||||
|
@ -754,7 +768,8 @@
|
|||
* \defgroup xMessageBufferSendCompletedFromISR xMessageBufferSendCompletedFromISR
|
||||
* \ingroup StreamBufferManagement
|
||||
*/
|
||||
#define xMessageBufferSendCompletedFromISR( xMessageBuffer, pxHigherPriorityTaskWoken ) xStreamBufferSendCompletedFromISR( ( StreamBufferHandle_t ) xMessageBuffer, pxHigherPriorityTaskWoken )
|
||||
#define xMessageBufferSendCompletedFromISR( xMessageBuffer, pxHigherPriorityTaskWoken ) \
|
||||
xStreamBufferSendCompletedFromISR( ( StreamBufferHandle_t ) xMessageBuffer, pxHigherPriorityTaskWoken )
|
||||
|
||||
/**
|
||||
* message_buffer.h
|
||||
|
@ -794,10 +809,13 @@
|
|||
* \defgroup xMessageBufferReceiveCompletedFromISR xMessageBufferReceiveCompletedFromISR
|
||||
* \ingroup StreamBufferManagement
|
||||
*/
|
||||
#define xMessageBufferReceiveCompletedFromISR( xMessageBuffer, pxHigherPriorityTaskWoken ) xStreamBufferReceiveCompletedFromISR( ( StreamBufferHandle_t ) xMessageBuffer, pxHigherPriorityTaskWoken )
|
||||
#define xMessageBufferReceiveCompletedFromISR( xMessageBuffer, pxHigherPriorityTaskWoken ) \
|
||||
xStreamBufferReceiveCompletedFromISR( ( StreamBufferHandle_t ) xMessageBuffer, pxHigherPriorityTaskWoken )
|
||||
|
||||
#if defined( __cplusplus )
|
||||
} /* extern "C" */
|
||||
#endif
|
||||
/* *INDENT-OFF* */
|
||||
#if defined( __cplusplus )
|
||||
} /* extern "C" */
|
||||
#endif
|
||||
/* *INDENT-ON* */
|
||||
|
||||
#endif /* !defined( FREERTOS_MESSAGE_BUFFER_H ) */
|
||||
|
|
|
@ -19,10 +19,9 @@
|
|||
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
* http://www.FreeRTOS.org
|
||||
* http://aws.amazon.com/freertos
|
||||
* https://www.FreeRTOS.org
|
||||
* https://github.com/FreeRTOS
|
||||
*
|
||||
* 1 tab == 4 spaces!
|
||||
*/
|
||||
|
||||
/*
|
||||
|
|
|
@ -19,10 +19,9 @@
|
|||
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
* http://www.FreeRTOS.org
|
||||
* http://aws.amazon.com/freertos
|
||||
* https://www.FreeRTOS.org
|
||||
* https://github.com/FreeRTOS
|
||||
*
|
||||
* 1 tab == 4 spaces!
|
||||
*/
|
||||
|
||||
#ifndef MPU_WRAPPERS_H
|
||||
|
|
|
@ -19,10 +19,9 @@
|
|||
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
* http://www.FreeRTOS.org
|
||||
* http://aws.amazon.com/freertos
|
||||
* https://www.FreeRTOS.org
|
||||
* https://github.com/FreeRTOS
|
||||
*
|
||||
* 1 tab == 4 spaces!
|
||||
*/
|
||||
|
||||
/*-----------------------------------------------------------
|
||||
|
@ -30,7 +29,7 @@
|
|||
*----------------------------------------------------------*/
|
||||
|
||||
#ifndef PORTABLE_H
|
||||
#define PORTABLE_H
|
||||
#define PORTABLE_H
|
||||
|
||||
/* Each FreeRTOS port has a unique portmacro.h header file. Originally a
|
||||
* pre-processor definition was used to ensure the pre-processor found the correct
|
||||
|
@ -42,61 +41,63 @@
|
|||
* to make it clear that new projects should not use it, support for the port
|
||||
* specific constants has been moved into the deprecated_definitions.h header
|
||||
* file. */
|
||||
#include "deprecated_definitions.h"
|
||||
#include "deprecated_definitions.h"
|
||||
|
||||
/* If portENTER_CRITICAL is not defined then including deprecated_definitions.h
|
||||
* did not result in a portmacro.h header file being included - and it should be
|
||||
* included here. In this case the path to the correct portmacro.h header file
|
||||
* must be set in the compiler's include path. */
|
||||
#ifndef portENTER_CRITICAL
|
||||
#include "portmacro.h"
|
||||
#endif
|
||||
#ifndef portENTER_CRITICAL
|
||||
#include "portmacro.h"
|
||||
#endif
|
||||
|
||||
#if portBYTE_ALIGNMENT == 32
|
||||
#define portBYTE_ALIGNMENT_MASK ( 0x001f )
|
||||
#endif
|
||||
#if portBYTE_ALIGNMENT == 32
|
||||
#define portBYTE_ALIGNMENT_MASK ( 0x001f )
|
||||
#endif
|
||||
|
||||
#if portBYTE_ALIGNMENT == 16
|
||||
#define portBYTE_ALIGNMENT_MASK ( 0x000f )
|
||||
#endif
|
||||
#if portBYTE_ALIGNMENT == 16
|
||||
#define portBYTE_ALIGNMENT_MASK ( 0x000f )
|
||||
#endif
|
||||
|
||||
#if portBYTE_ALIGNMENT == 8
|
||||
#define portBYTE_ALIGNMENT_MASK ( 0x0007 )
|
||||
#endif
|
||||
#if portBYTE_ALIGNMENT == 8
|
||||
#define portBYTE_ALIGNMENT_MASK ( 0x0007 )
|
||||
#endif
|
||||
|
||||
#if portBYTE_ALIGNMENT == 4
|
||||
#define portBYTE_ALIGNMENT_MASK ( 0x0003 )
|
||||
#endif
|
||||
#if portBYTE_ALIGNMENT == 4
|
||||
#define portBYTE_ALIGNMENT_MASK ( 0x0003 )
|
||||
#endif
|
||||
|
||||
#if portBYTE_ALIGNMENT == 2
|
||||
#define portBYTE_ALIGNMENT_MASK ( 0x0001 )
|
||||
#endif
|
||||
#if portBYTE_ALIGNMENT == 2
|
||||
#define portBYTE_ALIGNMENT_MASK ( 0x0001 )
|
||||
#endif
|
||||
|
||||
#if portBYTE_ALIGNMENT == 1
|
||||
#define portBYTE_ALIGNMENT_MASK ( 0x0000 )
|
||||
#endif
|
||||
#if portBYTE_ALIGNMENT == 1
|
||||
#define portBYTE_ALIGNMENT_MASK ( 0x0000 )
|
||||
#endif
|
||||
|
||||
#ifndef portBYTE_ALIGNMENT_MASK
|
||||
#error "Invalid portBYTE_ALIGNMENT definition"
|
||||
#endif
|
||||
#ifndef portBYTE_ALIGNMENT_MASK
|
||||
#error "Invalid portBYTE_ALIGNMENT definition"
|
||||
#endif
|
||||
|
||||
#ifndef portNUM_CONFIGURABLE_REGIONS
|
||||
#define portNUM_CONFIGURABLE_REGIONS 1
|
||||
#endif
|
||||
#ifndef portNUM_CONFIGURABLE_REGIONS
|
||||
#define portNUM_CONFIGURABLE_REGIONS 1
|
||||
#endif
|
||||
|
||||
#ifndef portHAS_STACK_OVERFLOW_CHECKING
|
||||
#define portHAS_STACK_OVERFLOW_CHECKING 0
|
||||
#endif
|
||||
#ifndef portHAS_STACK_OVERFLOW_CHECKING
|
||||
#define portHAS_STACK_OVERFLOW_CHECKING 0
|
||||
#endif
|
||||
|
||||
#ifndef portARCH_NAME
|
||||
#define portARCH_NAME NULL
|
||||
#endif
|
||||
#ifndef portARCH_NAME
|
||||
#define portARCH_NAME NULL
|
||||
#endif
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
/* *INDENT-OFF* */
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
/* *INDENT-ON* */
|
||||
|
||||
#include "mpu_wrappers.h"
|
||||
#include "mpu_wrappers.h"
|
||||
|
||||
/*
|
||||
* Setup the stack of a new task so it is ready to be placed under the
|
||||
|
@ -104,51 +105,51 @@
|
|||
* the order that the port expects to find them.
|
||||
*
|
||||
*/
|
||||
#if ( portUSING_MPU_WRAPPERS == 1 )
|
||||
#if ( portHAS_STACK_OVERFLOW_CHECKING == 1 )
|
||||
StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
|
||||
StackType_t * pxEndOfStack,
|
||||
TaskFunction_t pxCode,
|
||||
void * pvParameters,
|
||||
BaseType_t xRunPrivileged ) PRIVILEGED_FUNCTION;
|
||||
#else
|
||||
StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
|
||||
TaskFunction_t pxCode,
|
||||
void * pvParameters,
|
||||
BaseType_t xRunPrivileged ) PRIVILEGED_FUNCTION;
|
||||
#endif
|
||||
#else /* if ( portUSING_MPU_WRAPPERS == 1 ) */
|
||||
#if ( portHAS_STACK_OVERFLOW_CHECKING == 1 )
|
||||
StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
|
||||
StackType_t * pxEndOfStack,
|
||||
TaskFunction_t pxCode,
|
||||
void * pvParameters ) PRIVILEGED_FUNCTION;
|
||||
#else
|
||||
StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
|
||||
TaskFunction_t pxCode,
|
||||
void * pvParameters ) PRIVILEGED_FUNCTION;
|
||||
#endif
|
||||
#endif /* if ( portUSING_MPU_WRAPPERS == 1 ) */
|
||||
#if ( portUSING_MPU_WRAPPERS == 1 )
|
||||
#if ( portHAS_STACK_OVERFLOW_CHECKING == 1 )
|
||||
StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
|
||||
StackType_t * pxEndOfStack,
|
||||
TaskFunction_t pxCode,
|
||||
void * pvParameters,
|
||||
BaseType_t xRunPrivileged ) PRIVILEGED_FUNCTION;
|
||||
#else
|
||||
StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
|
||||
TaskFunction_t pxCode,
|
||||
void * pvParameters,
|
||||
BaseType_t xRunPrivileged ) PRIVILEGED_FUNCTION;
|
||||
#endif
|
||||
#else /* if ( portUSING_MPU_WRAPPERS == 1 ) */
|
||||
#if ( portHAS_STACK_OVERFLOW_CHECKING == 1 )
|
||||
StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
|
||||
StackType_t * pxEndOfStack,
|
||||
TaskFunction_t pxCode,
|
||||
void * pvParameters ) PRIVILEGED_FUNCTION;
|
||||
#else
|
||||
StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
|
||||
TaskFunction_t pxCode,
|
||||
void * pvParameters ) PRIVILEGED_FUNCTION;
|
||||
#endif
|
||||
#endif /* if ( portUSING_MPU_WRAPPERS == 1 ) */
|
||||
|
||||
/* Used by heap_5.c to define the start address and size of each memory region
|
||||
* that together comprise the total FreeRTOS heap space. */
|
||||
typedef struct HeapRegion
|
||||
{
|
||||
uint8_t * pucStartAddress;
|
||||
size_t xSizeInBytes;
|
||||
} HeapRegion_t;
|
||||
typedef struct HeapRegion
|
||||
{
|
||||
uint8_t * pucStartAddress;
|
||||
size_t xSizeInBytes;
|
||||
} HeapRegion_t;
|
||||
|
||||
/* Used to pass information about the heap out of vPortGetHeapStats(). */
|
||||
typedef struct xHeapStats
|
||||
{
|
||||
size_t xAvailableHeapSpaceInBytes; /* The total heap size currently available - this is the sum of all the free blocks, not the largest block that can be allocated. */
|
||||
size_t xSizeOfLargestFreeBlockInBytes; /* The maximum size, in bytes, of all the free blocks within the heap at the time vPortGetHeapStats() is called. */
|
||||
size_t xSizeOfSmallestFreeBlockInBytes; /* The minimum size, in bytes, of all the free blocks within the heap at the time vPortGetHeapStats() is called. */
|
||||
size_t xNumberOfFreeBlocks; /* The number of free memory blocks within the heap at the time vPortGetHeapStats() is called. */
|
||||
size_t xMinimumEverFreeBytesRemaining; /* The minimum amount of total free memory (sum of all free blocks) there has been in the heap since the system booted. */
|
||||
size_t xNumberOfSuccessfulAllocations; /* The number of calls to pvPortMalloc() that have returned a valid memory block. */
|
||||
size_t xNumberOfSuccessfulFrees; /* The number of calls to vPortFree() that has successfully freed a block of memory. */
|
||||
} HeapStats_t;
|
||||
typedef struct xHeapStats
|
||||
{
|
||||
size_t xAvailableHeapSpaceInBytes; /* The total heap size currently available - this is the sum of all the free blocks, not the largest block that can be allocated. */
|
||||
size_t xSizeOfLargestFreeBlockInBytes; /* The maximum size, in bytes, of all the free blocks within the heap at the time vPortGetHeapStats() is called. */
|
||||
size_t xSizeOfSmallestFreeBlockInBytes; /* The minimum size, in bytes, of all the free blocks within the heap at the time vPortGetHeapStats() is called. */
|
||||
size_t xNumberOfFreeBlocks; /* The number of free memory blocks within the heap at the time vPortGetHeapStats() is called. */
|
||||
size_t xMinimumEverFreeBytesRemaining; /* The minimum amount of total free memory (sum of all free blocks) there has been in the heap since the system booted. */
|
||||
size_t xNumberOfSuccessfulAllocations; /* The number of calls to pvPortMalloc() that have returned a valid memory block. */
|
||||
size_t xNumberOfSuccessfulFrees; /* The number of calls to vPortFree() that has successfully freed a block of memory. */
|
||||
} HeapStats_t;
|
||||
|
||||
/*
|
||||
* Used to define multiple heap regions for use by heap_5.c. This function
|
||||
|
@ -161,35 +162,35 @@
|
|||
* terminated by a HeapRegions_t structure that has a size of 0. The region
|
||||
* with the lowest start address must appear first in the array.
|
||||
*/
|
||||
void vPortDefineHeapRegions( const HeapRegion_t * const pxHeapRegions ) PRIVILEGED_FUNCTION;
|
||||
void vPortDefineHeapRegions( const HeapRegion_t * const pxHeapRegions ) PRIVILEGED_FUNCTION;
|
||||
|
||||
/*
|
||||
* Returns a HeapStats_t structure filled with information about the current
|
||||
* heap state.
|
||||
*/
|
||||
void vPortGetHeapStats( HeapStats_t * pxHeapStats );
|
||||
void vPortGetHeapStats( HeapStats_t * pxHeapStats );
|
||||
|
||||
/*
|
||||
* Map to the memory management routines required for the port.
|
||||
*/
|
||||
void * pvPortMalloc( size_t xSize ) PRIVILEGED_FUNCTION;
|
||||
void vPortFree( void * pv ) PRIVILEGED_FUNCTION;
|
||||
void vPortInitialiseBlocks( void ) PRIVILEGED_FUNCTION;
|
||||
size_t xPortGetFreeHeapSize( void ) PRIVILEGED_FUNCTION;
|
||||
size_t xPortGetMinimumEverFreeHeapSize( void ) PRIVILEGED_FUNCTION;
|
||||
void * pvPortMalloc( size_t xSize ) PRIVILEGED_FUNCTION;
|
||||
void vPortFree( void * pv ) PRIVILEGED_FUNCTION;
|
||||
void vPortInitialiseBlocks( void ) PRIVILEGED_FUNCTION;
|
||||
size_t xPortGetFreeHeapSize( void ) PRIVILEGED_FUNCTION;
|
||||
size_t xPortGetMinimumEverFreeHeapSize( void ) PRIVILEGED_FUNCTION;
|
||||
|
||||
/*
|
||||
* Setup the hardware ready for the scheduler to take control. This generally
|
||||
* sets up a tick interrupt and sets timers for the correct tick frequency.
|
||||
*/
|
||||
BaseType_t xPortStartScheduler( void ) PRIVILEGED_FUNCTION;
|
||||
BaseType_t xPortStartScheduler( void ) PRIVILEGED_FUNCTION;
|
||||
|
||||
/*
|
||||
* Undo any hardware/ISR setup that was performed by xPortStartScheduler() so
|
||||
* the hardware is left in its original condition after the scheduler stops
|
||||
* executing.
|
||||
*/
|
||||
void vPortEndScheduler( void ) PRIVILEGED_FUNCTION;
|
||||
void vPortEndScheduler( void ) PRIVILEGED_FUNCTION;
|
||||
|
||||
/*
|
||||
* The structures and methods of manipulating the MPU are contained within the
|
||||
|
@ -198,16 +199,18 @@
|
|||
* Fills the xMPUSettings structure with the memory region information
|
||||
* contained in xRegions.
|
||||
*/
|
||||
#if ( portUSING_MPU_WRAPPERS == 1 )
|
||||
struct xMEMORY_REGION;
|
||||
void vPortStoreTaskMPUSettings( xMPU_SETTINGS * xMPUSettings,
|
||||
const struct xMEMORY_REGION * const xRegions,
|
||||
StackType_t * pxBottomOfStack,
|
||||
uint32_t ulStackDepth ) PRIVILEGED_FUNCTION;
|
||||
#endif
|
||||
#if ( portUSING_MPU_WRAPPERS == 1 )
|
||||
struct xMEMORY_REGION;
|
||||
void vPortStoreTaskMPUSettings( xMPU_SETTINGS * xMPUSettings,
|
||||
const struct xMEMORY_REGION * const xRegions,
|
||||
StackType_t * pxBottomOfStack,
|
||||
uint32_t ulStackDepth ) PRIVILEGED_FUNCTION;
|
||||
#endif
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
/* *INDENT-OFF* */
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
/* *INDENT-ON* */
|
||||
|
||||
#endif /* PORTABLE_H */
|
||||
|
|
|
@ -19,10 +19,9 @@
|
|||
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
* http://www.FreeRTOS.org
|
||||
* http://aws.amazon.com/freertos
|
||||
* https://www.FreeRTOS.org
|
||||
* https://github.com/FreeRTOS
|
||||
*
|
||||
* 1 tab == 4 spaces!
|
||||
*/
|
||||
|
||||
#ifndef PROJDEFS_H
|
||||
|
@ -38,7 +37,7 @@ typedef void (* TaskFunction_t)( void * );
|
|||
* overridden by a macro of the same name defined in FreeRTOSConfig.h in case the
|
||||
* definition here is not suitable for your application. */
|
||||
#ifndef pdMS_TO_TICKS
|
||||
#define pdMS_TO_TICKS( xTimeInMs ) ( ( TickType_t ) ( ( ( TickType_t ) ( xTimeInMs ) * ( TickType_t ) configTICK_RATE_HZ ) / ( TickType_t ) 1000 ) )
|
||||
#define pdMS_TO_TICKS( xTimeInMs ) ( ( TickType_t ) ( ( ( TickType_t ) ( xTimeInMs ) * ( TickType_t ) configTICK_RATE_HZ ) / ( TickType_t ) 1000U ) )
|
||||
#endif
|
||||
|
||||
#define pdFALSE ( ( BaseType_t ) 0 )
|
||||
|
|
3412
include/queue.h
3412
include/queue.h
File diff suppressed because it is too large
Load diff
109
include/semphr.h
109
include/semphr.h
|
@ -19,10 +19,9 @@
|
|||
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
* http://www.FreeRTOS.org
|
||||
* http://aws.amazon.com/freertos
|
||||
* https://www.FreeRTOS.org
|
||||
* https://github.com/FreeRTOS
|
||||
*
|
||||
* 1 tab == 4 spaces!
|
||||
*/
|
||||
|
||||
#ifndef SEMAPHORE_H
|
||||
|
@ -43,11 +42,13 @@ typedef QueueHandle_t SemaphoreHandle_t;
|
|||
|
||||
/**
|
||||
* semphr. h
|
||||
* <pre>vSemaphoreCreateBinary( SemaphoreHandle_t xSemaphore )</pre>
|
||||
* <pre>
|
||||
* vSemaphoreCreateBinary( SemaphoreHandle_t xSemaphore );
|
||||
* </pre>
|
||||
*
|
||||
* In many usage scenarios it is faster and more memory efficient to use a
|
||||
* direct to task notification in place of a binary semaphore!
|
||||
* http://www.freertos.org/RTOS-task-notifications.html
|
||||
* https://www.FreeRTOS.org/RTOS-task-notifications.html
|
||||
*
|
||||
* This old vSemaphoreCreateBinary() macro is now deprecated in favour of the
|
||||
* xSemaphoreCreateBinary() function. Note that binary semaphores created using
|
||||
|
@ -103,20 +104,22 @@ typedef QueueHandle_t SemaphoreHandle_t;
|
|||
|
||||
/**
|
||||
* semphr. h
|
||||
* <pre>SemaphoreHandle_t xSemaphoreCreateBinary( void )</pre>
|
||||
* <pre>
|
||||
* SemaphoreHandle_t xSemaphoreCreateBinary( void );
|
||||
* </pre>
|
||||
*
|
||||
* Creates a new binary semaphore instance, and returns a handle by which the
|
||||
* new semaphore can be referenced.
|
||||
*
|
||||
* In many usage scenarios it is faster and more memory efficient to use a
|
||||
* direct to task notification in place of a binary semaphore!
|
||||
* http://www.freertos.org/RTOS-task-notifications.html
|
||||
* https://www.FreeRTOS.org/RTOS-task-notifications.html
|
||||
*
|
||||
* Internally, within the FreeRTOS implementation, binary semaphores use a block
|
||||
* of memory, in which the semaphore structure is stored. If a binary semaphore
|
||||
* is created using xSemaphoreCreateBinary() then the required memory is
|
||||
* automatically dynamically allocated inside the xSemaphoreCreateBinary()
|
||||
* function. (see http://www.freertos.org/a00111.html). If a binary semaphore
|
||||
* function. (see https://www.FreeRTOS.org/a00111.html). If a binary semaphore
|
||||
* is created using xSemaphoreCreateBinaryStatic() then the application writer
|
||||
* must provide the memory. xSemaphoreCreateBinaryStatic() therefore allows a
|
||||
* binary semaphore to be created without using any dynamic memory allocation.
|
||||
|
@ -164,20 +167,22 @@ typedef QueueHandle_t SemaphoreHandle_t;
|
|||
|
||||
/**
|
||||
* semphr. h
|
||||
* <pre>SemaphoreHandle_t xSemaphoreCreateBinaryStatic( StaticSemaphore_t *pxSemaphoreBuffer )</pre>
|
||||
* <pre>
|
||||
* SemaphoreHandle_t xSemaphoreCreateBinaryStatic( StaticSemaphore_t *pxSemaphoreBuffer );
|
||||
* </pre>
|
||||
*
|
||||
* Creates a new binary semaphore instance, and returns a handle by which the
|
||||
* new semaphore can be referenced.
|
||||
*
|
||||
* NOTE: In many usage scenarios it is faster and more memory efficient to use a
|
||||
* direct to task notification in place of a binary semaphore!
|
||||
* http://www.freertos.org/RTOS-task-notifications.html
|
||||
* https://www.FreeRTOS.org/RTOS-task-notifications.html
|
||||
*
|
||||
* Internally, within the FreeRTOS implementation, binary semaphores use a block
|
||||
* of memory, in which the semaphore structure is stored. If a binary semaphore
|
||||
* is created using xSemaphoreCreateBinary() then the required memory is
|
||||
* automatically dynamically allocated inside the xSemaphoreCreateBinary()
|
||||
* function. (see http://www.freertos.org/a00111.html). If a binary semaphore
|
||||
* function. (see https://www.FreeRTOS.org/a00111.html). If a binary semaphore
|
||||
* is created using xSemaphoreCreateBinaryStatic() then the application writer
|
||||
* must provide the memory. xSemaphoreCreateBinaryStatic() therefore allows a
|
||||
* binary semaphore to be created without using any dynamic memory allocation.
|
||||
|
@ -223,10 +228,12 @@ typedef QueueHandle_t SemaphoreHandle_t;
|
|||
|
||||
/**
|
||||
* semphr. h
|
||||
* <pre>xSemaphoreTake(
|
||||
* <pre>
|
||||
* xSemaphoreTake(
|
||||
* SemaphoreHandle_t xSemaphore,
|
||||
* TickType_t xBlockTime
|
||||
* )</pre>
|
||||
* );
|
||||
* </pre>
|
||||
*
|
||||
* <i>Macro</i> to obtain a semaphore. The semaphore must have previously been
|
||||
* created with a call to xSemaphoreCreateBinary(), xSemaphoreCreateMutex() or
|
||||
|
@ -290,10 +297,12 @@ typedef QueueHandle_t SemaphoreHandle_t;
|
|||
|
||||
/**
|
||||
* semphr. h
|
||||
* <pre>
|
||||
* xSemaphoreTakeRecursive(
|
||||
* SemaphoreHandle_t xMutex,
|
||||
* TickType_t xBlockTime
|
||||
* )
|
||||
* );
|
||||
* </pre>
|
||||
*
|
||||
* <i>Macro</i> to recursively obtain, or 'take', a mutex type semaphore.
|
||||
* The mutex must have previously been created using a call to
|
||||
|
@ -385,7 +394,9 @@ typedef QueueHandle_t SemaphoreHandle_t;
|
|||
|
||||
/**
|
||||
* semphr. h
|
||||
* <pre>xSemaphoreGive( SemaphoreHandle_t xSemaphore )</pre>
|
||||
* <pre>
|
||||
* xSemaphoreGive( SemaphoreHandle_t xSemaphore );
|
||||
* </pre>
|
||||
*
|
||||
* <i>Macro</i> to release a semaphore. The semaphore must have previously been
|
||||
* created with a call to xSemaphoreCreateBinary(), xSemaphoreCreateMutex() or
|
||||
|
@ -448,7 +459,9 @@ typedef QueueHandle_t SemaphoreHandle_t;
|
|||
|
||||
/**
|
||||
* semphr. h
|
||||
* <pre>xSemaphoreGiveRecursive( SemaphoreHandle_t xMutex )</pre>
|
||||
* <pre>
|
||||
* xSemaphoreGiveRecursive( SemaphoreHandle_t xMutex );
|
||||
* </pre>
|
||||
*
|
||||
* <i>Macro</i> to recursively release, or 'give', a mutex type semaphore.
|
||||
* The mutex must have previously been created using a call to
|
||||
|
@ -538,7 +551,8 @@ typedef QueueHandle_t SemaphoreHandle_t;
|
|||
* xSemaphoreGiveFromISR(
|
||||
* SemaphoreHandle_t xSemaphore,
|
||||
* BaseType_t *pxHigherPriorityTaskWoken
|
||||
* )</pre>
|
||||
* );
|
||||
* </pre>
|
||||
*
|
||||
* <i>Macro</i> to release a semaphore. The semaphore must have previously been
|
||||
* created with a call to xSemaphoreCreateBinary() or xSemaphoreCreateCounting().
|
||||
|
@ -562,7 +576,7 @@ typedef QueueHandle_t SemaphoreHandle_t;
|
|||
* Example usage:
|
||||
* <pre>
|
||||
\#define LONG_TIME 0xffff
|
||||
\#define TICKS_TO_WAIT 10
|
||||
\#define TICKS_TO_WAIT 10
|
||||
* SemaphoreHandle_t xSemaphore = NULL;
|
||||
*
|
||||
* // Repetitive task.
|
||||
|
@ -629,7 +643,8 @@ typedef QueueHandle_t SemaphoreHandle_t;
|
|||
* xSemaphoreTakeFromISR(
|
||||
* SemaphoreHandle_t xSemaphore,
|
||||
* BaseType_t *pxHigherPriorityTaskWoken
|
||||
* )</pre>
|
||||
* );
|
||||
* </pre>
|
||||
*
|
||||
* <i>Macro</i> to take a semaphore from an ISR. The semaphore must have
|
||||
* previously been created with a call to xSemaphoreCreateBinary() or
|
||||
|
@ -659,7 +674,9 @@ typedef QueueHandle_t SemaphoreHandle_t;
|
|||
|
||||
/**
|
||||
* semphr. h
|
||||
* <pre>SemaphoreHandle_t xSemaphoreCreateMutex( void )</pre>
|
||||
* <pre>
|
||||
* SemaphoreHandle_t xSemaphoreCreateMutex( void );
|
||||
* </pre>
|
||||
*
|
||||
* Creates a new mutex type semaphore instance, and returns a handle by which
|
||||
* the new mutex can be referenced.
|
||||
|
@ -668,7 +685,7 @@ typedef QueueHandle_t SemaphoreHandle_t;
|
|||
* of memory, in which the mutex structure is stored. If a mutex is created
|
||||
* using xSemaphoreCreateMutex() then the required memory is automatically
|
||||
* dynamically allocated inside the xSemaphoreCreateMutex() function. (see
|
||||
* http://www.freertos.org/a00111.html). If a mutex is created using
|
||||
* https://www.FreeRTOS.org/a00111.html). If a mutex is created using
|
||||
* xSemaphoreCreateMutexStatic() then the application writer must provided the
|
||||
* memory. xSemaphoreCreateMutexStatic() therefore allows a mutex to be created
|
||||
* without using any dynamic memory allocation.
|
||||
|
@ -718,7 +735,9 @@ typedef QueueHandle_t SemaphoreHandle_t;
|
|||
|
||||
/**
|
||||
* semphr. h
|
||||
* <pre>SemaphoreHandle_t xSemaphoreCreateMutexStatic( StaticSemaphore_t *pxMutexBuffer )</pre>
|
||||
* <pre>
|
||||
* SemaphoreHandle_t xSemaphoreCreateMutexStatic( StaticSemaphore_t *pxMutexBuffer );
|
||||
* </pre>
|
||||
*
|
||||
* Creates a new mutex type semaphore instance, and returns a handle by which
|
||||
* the new mutex can be referenced.
|
||||
|
@ -727,7 +746,7 @@ typedef QueueHandle_t SemaphoreHandle_t;
|
|||
* of memory, in which the mutex structure is stored. If a mutex is created
|
||||
* using xSemaphoreCreateMutex() then the required memory is automatically
|
||||
* dynamically allocated inside the xSemaphoreCreateMutex() function. (see
|
||||
* http://www.freertos.org/a00111.html). If a mutex is created using
|
||||
* https://www.FreeRTOS.org/a00111.html). If a mutex is created using
|
||||
* xSemaphoreCreateMutexStatic() then the application writer must provided the
|
||||
* memory. xSemaphoreCreateMutexStatic() therefore allows a mutex to be created
|
||||
* without using any dynamic memory allocation.
|
||||
|
@ -780,7 +799,9 @@ typedef QueueHandle_t SemaphoreHandle_t;
|
|||
|
||||
/**
|
||||
* semphr. h
|
||||
* <pre>SemaphoreHandle_t xSemaphoreCreateRecursiveMutex( void )</pre>
|
||||
* <pre>
|
||||
* SemaphoreHandle_t xSemaphoreCreateRecursiveMutex( void );
|
||||
* </pre>
|
||||
*
|
||||
* Creates a new recursive mutex type semaphore instance, and returns a handle
|
||||
* by which the new recursive mutex can be referenced.
|
||||
|
@ -790,7 +811,7 @@ typedef QueueHandle_t SemaphoreHandle_t;
|
|||
* created using xSemaphoreCreateRecursiveMutex() then the required memory is
|
||||
* automatically dynamically allocated inside the
|
||||
* xSemaphoreCreateRecursiveMutex() function. (see
|
||||
* http://www.freertos.org/a00111.html). If a recursive mutex is created using
|
||||
* https://www.FreeRTOS.org/a00111.html). If a recursive mutex is created using
|
||||
* xSemaphoreCreateRecursiveMutexStatic() then the application writer must
|
||||
* provide the memory that will get used by the mutex.
|
||||
* xSemaphoreCreateRecursiveMutexStatic() therefore allows a recursive mutex to
|
||||
|
@ -847,7 +868,9 @@ typedef QueueHandle_t SemaphoreHandle_t;
|
|||
|
||||
/**
|
||||
* semphr. h
|
||||
* <pre>SemaphoreHandle_t xSemaphoreCreateRecursiveMutexStatic( StaticSemaphore_t *pxMutexBuffer )</pre>
|
||||
* <pre>
|
||||
* SemaphoreHandle_t xSemaphoreCreateRecursiveMutexStatic( StaticSemaphore_t *pxMutexBuffer );
|
||||
* </pre>
|
||||
*
|
||||
* Creates a new recursive mutex type semaphore instance, and returns a handle
|
||||
* by which the new recursive mutex can be referenced.
|
||||
|
@ -857,7 +880,7 @@ typedef QueueHandle_t SemaphoreHandle_t;
|
|||
* created using xSemaphoreCreateRecursiveMutex() then the required memory is
|
||||
* automatically dynamically allocated inside the
|
||||
* xSemaphoreCreateRecursiveMutex() function. (see
|
||||
* http://www.freertos.org/a00111.html). If a recursive mutex is created using
|
||||
* https://www.FreeRTOS.org/a00111.html). If a recursive mutex is created using
|
||||
* xSemaphoreCreateRecursiveMutexStatic() then the application writer must
|
||||
* provide the memory that will get used by the mutex.
|
||||
* xSemaphoreCreateRecursiveMutexStatic() therefore allows a recursive mutex to
|
||||
|
@ -920,21 +943,23 @@ typedef QueueHandle_t SemaphoreHandle_t;
|
|||
|
||||
/**
|
||||
* semphr. h
|
||||
* <pre>SemaphoreHandle_t xSemaphoreCreateCounting( UBaseType_t uxMaxCount, UBaseType_t uxInitialCount )</pre>
|
||||
* <pre>
|
||||
* SemaphoreHandle_t xSemaphoreCreateCounting( UBaseType_t uxMaxCount, UBaseType_t uxInitialCount );
|
||||
* </pre>
|
||||
*
|
||||
* Creates a new counting semaphore instance, and returns a handle by which the
|
||||
* new counting semaphore can be referenced.
|
||||
*
|
||||
* In many usage scenarios it is faster and more memory efficient to use a
|
||||
* direct to task notification in place of a counting semaphore!
|
||||
* http://www.freertos.org/RTOS-task-notifications.html
|
||||
* https://www.FreeRTOS.org/RTOS-task-notifications.html
|
||||
*
|
||||
* Internally, within the FreeRTOS implementation, counting semaphores use a
|
||||
* block of memory, in which the counting semaphore structure is stored. If a
|
||||
* counting semaphore is created using xSemaphoreCreateCounting() then the
|
||||
* required memory is automatically dynamically allocated inside the
|
||||
* xSemaphoreCreateCounting() function. (see
|
||||
* http://www.freertos.org/a00111.html). If a counting semaphore is created
|
||||
* https://www.FreeRTOS.org/a00111.html). If a counting semaphore is created
|
||||
* using xSemaphoreCreateCountingStatic() then the application writer can
|
||||
* instead optionally provide the memory that will get used by the counting
|
||||
* semaphore. xSemaphoreCreateCountingStatic() therefore allows a counting
|
||||
|
@ -1000,21 +1025,23 @@ typedef QueueHandle_t SemaphoreHandle_t;
|
|||
|
||||
/**
|
||||
* semphr. h
|
||||
* <pre>SemaphoreHandle_t xSemaphoreCreateCountingStatic( UBaseType_t uxMaxCount, UBaseType_t uxInitialCount, StaticSemaphore_t *pxSemaphoreBuffer )</pre>
|
||||
* <pre>
|
||||
* SemaphoreHandle_t xSemaphoreCreateCountingStatic( UBaseType_t uxMaxCount, UBaseType_t uxInitialCount, StaticSemaphore_t *pxSemaphoreBuffer );
|
||||
* </pre>
|
||||
*
|
||||
* Creates a new counting semaphore instance, and returns a handle by which the
|
||||
* new counting semaphore can be referenced.
|
||||
*
|
||||
* In many usage scenarios it is faster and more memory efficient to use a
|
||||
* direct to task notification in place of a counting semaphore!
|
||||
* http://www.freertos.org/RTOS-task-notifications.html
|
||||
* https://www.FreeRTOS.org/RTOS-task-notifications.html
|
||||
*
|
||||
* Internally, within the FreeRTOS implementation, counting semaphores use a
|
||||
* block of memory, in which the counting semaphore structure is stored. If a
|
||||
* counting semaphore is created using xSemaphoreCreateCounting() then the
|
||||
* required memory is automatically dynamically allocated inside the
|
||||
* xSemaphoreCreateCounting() function. (see
|
||||
* http://www.freertos.org/a00111.html). If a counting semaphore is created
|
||||
* https://www.FreeRTOS.org/a00111.html). If a counting semaphore is created
|
||||
* using xSemaphoreCreateCountingStatic() then the application writer must
|
||||
* provide the memory. xSemaphoreCreateCountingStatic() therefore allows a
|
||||
* counting semaphore to be created without using any dynamic memory allocation.
|
||||
|
@ -1085,7 +1112,9 @@ typedef QueueHandle_t SemaphoreHandle_t;
|
|||
|
||||
/**
|
||||
* semphr. h
|
||||
* <pre>void vSemaphoreDelete( SemaphoreHandle_t xSemaphore );</pre>
|
||||
* <pre>
|
||||
* void vSemaphoreDelete( SemaphoreHandle_t xSemaphore );
|
||||
* </pre>
|
||||
*
|
||||
* Delete a semaphore. This function must be used with care. For example,
|
||||
* do not delete a mutex type semaphore if the mutex is held by a task.
|
||||
|
@ -1099,7 +1128,9 @@ typedef QueueHandle_t SemaphoreHandle_t;
|
|||
|
||||
/**
|
||||
* semphr.h
|
||||
* <pre>TaskHandle_t xSemaphoreGetMutexHolder( SemaphoreHandle_t xMutex );</pre>
|
||||
* <pre>
|
||||
* TaskHandle_t xSemaphoreGetMutexHolder( SemaphoreHandle_t xMutex );
|
||||
* </pre>
|
||||
*
|
||||
* If xMutex is indeed a mutex type semaphore, return the current mutex holder.
|
||||
* If xMutex is not a mutex type semaphore, or the mutex is available (not held
|
||||
|
@ -1114,7 +1145,9 @@ typedef QueueHandle_t SemaphoreHandle_t;
|
|||
|
||||
/**
|
||||
* semphr.h
|
||||
* <pre>TaskHandle_t xSemaphoreGetMutexHolderFromISR( SemaphoreHandle_t xMutex );</pre>
|
||||
* <pre>
|
||||
* TaskHandle_t xSemaphoreGetMutexHolderFromISR( SemaphoreHandle_t xMutex );
|
||||
* </pre>
|
||||
*
|
||||
* If xMutex is indeed a mutex type semaphore, return the current mutex holder.
|
||||
* If xMutex is not a mutex type semaphore, or the mutex is available (not held
|
||||
|
@ -1125,7 +1158,9 @@ typedef QueueHandle_t SemaphoreHandle_t;
|
|||
|
||||
/**
|
||||
* semphr.h
|
||||
* <pre>UBaseType_t uxSemaphoreGetCount( SemaphoreHandle_t xSemaphore );</pre>
|
||||
* <pre>
|
||||
* UBaseType_t uxSemaphoreGetCount( SemaphoreHandle_t xSemaphore );
|
||||
* </pre>
|
||||
*
|
||||
* If the semaphore is a counting semaphore then uxSemaphoreGetCount() returns
|
||||
* its current count value. If the semaphore is a binary semaphore then
|
||||
|
|
|
@ -19,10 +19,9 @@
|
|||
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
* http://www.FreeRTOS.org
|
||||
* http://aws.amazon.com/freertos
|
||||
* https://www.FreeRTOS.org
|
||||
* https://github.com/FreeRTOS
|
||||
*
|
||||
* 1 tab == 4 spaces!
|
||||
*/
|
||||
|
||||
#ifndef STACK_MACROS_H
|
||||
|
|
|
@ -19,10 +19,9 @@
|
|||
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
* http://www.FreeRTOS.org
|
||||
* http://aws.amazon.com/freertos
|
||||
* https://www.FreeRTOS.org
|
||||
* https://github.com/FreeRTOS
|
||||
*
|
||||
* 1 tab == 4 spaces!
|
||||
*/
|
||||
|
||||
/*
|
||||
|
@ -49,15 +48,17 @@
|
|||
*/
|
||||
|
||||
#ifndef STREAM_BUFFER_H
|
||||
#define STREAM_BUFFER_H
|
||||
#define STREAM_BUFFER_H
|
||||
|
||||
#ifndef INC_FREERTOS_H
|
||||
#error "include FreeRTOS.h must appear in source files before include stream_buffer.h"
|
||||
#endif
|
||||
#ifndef INC_FREERTOS_H
|
||||
#error "include FreeRTOS.h must appear in source files before include stream_buffer.h"
|
||||
#endif
|
||||
|
||||
#if defined( __cplusplus )
|
||||
extern "C" {
|
||||
#endif
|
||||
/* *INDENT-OFF* */
|
||||
#if defined( __cplusplus )
|
||||
extern "C" {
|
||||
#endif
|
||||
/* *INDENT-ON* */
|
||||
|
||||
/**
|
||||
* Type by which stream buffers are referenced. For example, a call to
|
||||
|
@ -65,8 +66,8 @@
|
|||
* then be used as a parameter to xStreamBufferSend(), xStreamBufferReceive(),
|
||||
* etc.
|
||||
*/
|
||||
struct StreamBufferDef_t;
|
||||
typedef struct StreamBufferDef_t * StreamBufferHandle_t;
|
||||
struct StreamBufferDef_t;
|
||||
typedef struct StreamBufferDef_t * StreamBufferHandle_t;
|
||||
|
||||
|
||||
/**
|
||||
|
@ -134,7 +135,7 @@
|
|||
* \defgroup xStreamBufferCreate xStreamBufferCreate
|
||||
* \ingroup StreamBufferManagement
|
||||
*/
|
||||
#define xStreamBufferCreate( xBufferSizeBytes, xTriggerLevelBytes ) xStreamBufferGenericCreate( xBufferSizeBytes, xTriggerLevelBytes, pdFALSE )
|
||||
#define xStreamBufferCreate( xBufferSizeBytes, xTriggerLevelBytes ) xStreamBufferGenericCreate( xBufferSizeBytes, xTriggerLevelBytes, pdFALSE )
|
||||
|
||||
/**
|
||||
* stream_buffer.h
|
||||
|
@ -215,7 +216,8 @@
|
|||
* \defgroup xStreamBufferCreateStatic xStreamBufferCreateStatic
|
||||
* \ingroup StreamBufferManagement
|
||||
*/
|
||||
#define xStreamBufferCreateStatic( xBufferSizeBytes, xTriggerLevelBytes, pucStreamBufferStorageArea, pxStaticStreamBuffer ) xStreamBufferGenericCreateStatic( xBufferSizeBytes, xTriggerLevelBytes, pdFALSE, pucStreamBufferStorageArea, pxStaticStreamBuffer )
|
||||
#define xStreamBufferCreateStatic( xBufferSizeBytes, xTriggerLevelBytes, pucStreamBufferStorageArea, pxStaticStreamBuffer ) \
|
||||
xStreamBufferGenericCreateStatic( xBufferSizeBytes, xTriggerLevelBytes, pdFALSE, pucStreamBufferStorageArea, pxStaticStreamBuffer )
|
||||
|
||||
/**
|
||||
* stream_buffer.h
|
||||
|
@ -309,10 +311,10 @@
|
|||
* \defgroup xStreamBufferSend xStreamBufferSend
|
||||
* \ingroup StreamBufferManagement
|
||||
*/
|
||||
size_t xStreamBufferSend( StreamBufferHandle_t xStreamBuffer,
|
||||
const void * pvTxData,
|
||||
size_t xDataLengthBytes,
|
||||
TickType_t xTicksToWait ) PRIVILEGED_FUNCTION;
|
||||
size_t xStreamBufferSend( StreamBufferHandle_t xStreamBuffer,
|
||||
const void * pvTxData,
|
||||
size_t xDataLengthBytes,
|
||||
TickType_t xTicksToWait ) PRIVILEGED_FUNCTION;
|
||||
|
||||
/**
|
||||
* stream_buffer.h
|
||||
|
@ -410,10 +412,10 @@
|
|||
* \defgroup xStreamBufferSendFromISR xStreamBufferSendFromISR
|
||||
* \ingroup StreamBufferManagement
|
||||
*/
|
||||
size_t xStreamBufferSendFromISR( StreamBufferHandle_t xStreamBuffer,
|
||||
const void * pvTxData,
|
||||
size_t xDataLengthBytes,
|
||||
BaseType_t * const pxHigherPriorityTaskWoken ) PRIVILEGED_FUNCTION;
|
||||
size_t xStreamBufferSendFromISR( StreamBufferHandle_t xStreamBuffer,
|
||||
const void * pvTxData,
|
||||
size_t xDataLengthBytes,
|
||||
BaseType_t * const pxHigherPriorityTaskWoken ) PRIVILEGED_FUNCTION;
|
||||
|
||||
/**
|
||||
* stream_buffer.h
|
||||
|
@ -499,10 +501,10 @@
|
|||
* \defgroup xStreamBufferReceive xStreamBufferReceive
|
||||
* \ingroup StreamBufferManagement
|
||||
*/
|
||||
size_t xStreamBufferReceive( StreamBufferHandle_t xStreamBuffer,
|
||||
void * pvRxData,
|
||||
size_t xBufferLengthBytes,
|
||||
TickType_t xTicksToWait ) PRIVILEGED_FUNCTION;
|
||||
size_t xStreamBufferReceive( StreamBufferHandle_t xStreamBuffer,
|
||||
void * pvRxData,
|
||||
size_t xBufferLengthBytes,
|
||||
TickType_t xTicksToWait ) PRIVILEGED_FUNCTION;
|
||||
|
||||
/**
|
||||
* stream_buffer.h
|
||||
|
@ -585,10 +587,10 @@
|
|||
* \defgroup xStreamBufferReceiveFromISR xStreamBufferReceiveFromISR
|
||||
* \ingroup StreamBufferManagement
|
||||
*/
|
||||
size_t xStreamBufferReceiveFromISR( StreamBufferHandle_t xStreamBuffer,
|
||||
void * pvRxData,
|
||||
size_t xBufferLengthBytes,
|
||||
BaseType_t * const pxHigherPriorityTaskWoken ) PRIVILEGED_FUNCTION;
|
||||
size_t xStreamBufferReceiveFromISR( StreamBufferHandle_t xStreamBuffer,
|
||||
void * pvRxData,
|
||||
size_t xBufferLengthBytes,
|
||||
BaseType_t * const pxHigherPriorityTaskWoken ) PRIVILEGED_FUNCTION;
|
||||
|
||||
/**
|
||||
* stream_buffer.h
|
||||
|
@ -610,7 +612,7 @@
|
|||
* \defgroup vStreamBufferDelete vStreamBufferDelete
|
||||
* \ingroup StreamBufferManagement
|
||||
*/
|
||||
void vStreamBufferDelete( StreamBufferHandle_t xStreamBuffer ) PRIVILEGED_FUNCTION;
|
||||
void vStreamBufferDelete( StreamBufferHandle_t xStreamBuffer ) PRIVILEGED_FUNCTION;
|
||||
|
||||
/**
|
||||
* stream_buffer.h
|
||||
|
@ -630,7 +632,7 @@
|
|||
* \defgroup xStreamBufferIsFull xStreamBufferIsFull
|
||||
* \ingroup StreamBufferManagement
|
||||
*/
|
||||
BaseType_t xStreamBufferIsFull( StreamBufferHandle_t xStreamBuffer ) PRIVILEGED_FUNCTION;
|
||||
BaseType_t xStreamBufferIsFull( StreamBufferHandle_t xStreamBuffer ) PRIVILEGED_FUNCTION;
|
||||
|
||||
/**
|
||||
* stream_buffer.h
|
||||
|
@ -650,7 +652,7 @@
|
|||
* \defgroup xStreamBufferIsEmpty xStreamBufferIsEmpty
|
||||
* \ingroup StreamBufferManagement
|
||||
*/
|
||||
BaseType_t xStreamBufferIsEmpty( StreamBufferHandle_t xStreamBuffer ) PRIVILEGED_FUNCTION;
|
||||
BaseType_t xStreamBufferIsEmpty( StreamBufferHandle_t xStreamBuffer ) PRIVILEGED_FUNCTION;
|
||||
|
||||
/**
|
||||
* stream_buffer.h
|
||||
|
@ -673,7 +675,7 @@
|
|||
* \defgroup xStreamBufferReset xStreamBufferReset
|
||||
* \ingroup StreamBufferManagement
|
||||
*/
|
||||
BaseType_t xStreamBufferReset( StreamBufferHandle_t xStreamBuffer ) PRIVILEGED_FUNCTION;
|
||||
BaseType_t xStreamBufferReset( StreamBufferHandle_t xStreamBuffer ) PRIVILEGED_FUNCTION;
|
||||
|
||||
/**
|
||||
* stream_buffer.h
|
||||
|
@ -694,7 +696,7 @@
|
|||
* \defgroup xStreamBufferSpacesAvailable xStreamBufferSpacesAvailable
|
||||
* \ingroup StreamBufferManagement
|
||||
*/
|
||||
size_t xStreamBufferSpacesAvailable( StreamBufferHandle_t xStreamBuffer ) PRIVILEGED_FUNCTION;
|
||||
size_t xStreamBufferSpacesAvailable( StreamBufferHandle_t xStreamBuffer ) PRIVILEGED_FUNCTION;
|
||||
|
||||
/**
|
||||
* stream_buffer.h
|
||||
|
@ -715,7 +717,7 @@
|
|||
* \defgroup xStreamBufferBytesAvailable xStreamBufferBytesAvailable
|
||||
* \ingroup StreamBufferManagement
|
||||
*/
|
||||
size_t xStreamBufferBytesAvailable( StreamBufferHandle_t xStreamBuffer ) PRIVILEGED_FUNCTION;
|
||||
size_t xStreamBufferBytesAvailable( StreamBufferHandle_t xStreamBuffer ) PRIVILEGED_FUNCTION;
|
||||
|
||||
/**
|
||||
* stream_buffer.h
|
||||
|
@ -752,8 +754,8 @@
|
|||
* \defgroup xStreamBufferSetTriggerLevel xStreamBufferSetTriggerLevel
|
||||
* \ingroup StreamBufferManagement
|
||||
*/
|
||||
BaseType_t xStreamBufferSetTriggerLevel( StreamBufferHandle_t xStreamBuffer,
|
||||
size_t xTriggerLevel ) PRIVILEGED_FUNCTION;
|
||||
BaseType_t xStreamBufferSetTriggerLevel( StreamBufferHandle_t xStreamBuffer,
|
||||
size_t xTriggerLevel ) PRIVILEGED_FUNCTION;
|
||||
|
||||
/**
|
||||
* stream_buffer.h
|
||||
|
@ -792,8 +794,8 @@
|
|||
* \defgroup xStreamBufferSendCompletedFromISR xStreamBufferSendCompletedFromISR
|
||||
* \ingroup StreamBufferManagement
|
||||
*/
|
||||
BaseType_t xStreamBufferSendCompletedFromISR( StreamBufferHandle_t xStreamBuffer,
|
||||
BaseType_t * pxHigherPriorityTaskWoken ) PRIVILEGED_FUNCTION;
|
||||
BaseType_t xStreamBufferSendCompletedFromISR( StreamBufferHandle_t xStreamBuffer,
|
||||
BaseType_t * pxHigherPriorityTaskWoken ) PRIVILEGED_FUNCTION;
|
||||
|
||||
/**
|
||||
* stream_buffer.h
|
||||
|
@ -833,31 +835,33 @@
|
|||
* \defgroup xStreamBufferReceiveCompletedFromISR xStreamBufferReceiveCompletedFromISR
|
||||
* \ingroup StreamBufferManagement
|
||||
*/
|
||||
BaseType_t xStreamBufferReceiveCompletedFromISR( StreamBufferHandle_t xStreamBuffer,
|
||||
BaseType_t * pxHigherPriorityTaskWoken ) PRIVILEGED_FUNCTION;
|
||||
BaseType_t xStreamBufferReceiveCompletedFromISR( StreamBufferHandle_t xStreamBuffer,
|
||||
BaseType_t * pxHigherPriorityTaskWoken ) PRIVILEGED_FUNCTION;
|
||||
|
||||
/* Functions below here are not part of the public API. */
|
||||
StreamBufferHandle_t xStreamBufferGenericCreate( size_t xBufferSizeBytes,
|
||||
size_t xTriggerLevelBytes,
|
||||
BaseType_t xIsMessageBuffer ) PRIVILEGED_FUNCTION;
|
||||
StreamBufferHandle_t xStreamBufferGenericCreate( size_t xBufferSizeBytes,
|
||||
size_t xTriggerLevelBytes,
|
||||
BaseType_t xIsMessageBuffer ) PRIVILEGED_FUNCTION;
|
||||
|
||||
StreamBufferHandle_t xStreamBufferGenericCreateStatic( size_t xBufferSizeBytes,
|
||||
size_t xTriggerLevelBytes,
|
||||
BaseType_t xIsMessageBuffer,
|
||||
uint8_t * const pucStreamBufferStorageArea,
|
||||
StaticStreamBuffer_t * const pxStaticStreamBuffer ) PRIVILEGED_FUNCTION;
|
||||
StreamBufferHandle_t xStreamBufferGenericCreateStatic( size_t xBufferSizeBytes,
|
||||
size_t xTriggerLevelBytes,
|
||||
BaseType_t xIsMessageBuffer,
|
||||
uint8_t * const pucStreamBufferStorageArea,
|
||||
StaticStreamBuffer_t * const pxStaticStreamBuffer ) PRIVILEGED_FUNCTION;
|
||||
|
||||
size_t xStreamBufferNextMessageLengthBytes( StreamBufferHandle_t xStreamBuffer ) PRIVILEGED_FUNCTION;
|
||||
size_t xStreamBufferNextMessageLengthBytes( StreamBufferHandle_t xStreamBuffer ) PRIVILEGED_FUNCTION;
|
||||
|
||||
#if ( configUSE_TRACE_FACILITY == 1 )
|
||||
void vStreamBufferSetStreamBufferNumber( StreamBufferHandle_t xStreamBuffer,
|
||||
UBaseType_t uxStreamBufferNumber ) PRIVILEGED_FUNCTION;
|
||||
UBaseType_t uxStreamBufferGetStreamBufferNumber( StreamBufferHandle_t xStreamBuffer ) PRIVILEGED_FUNCTION;
|
||||
uint8_t ucStreamBufferGetStreamBufferType( StreamBufferHandle_t xStreamBuffer ) PRIVILEGED_FUNCTION;
|
||||
#endif
|
||||
#if ( configUSE_TRACE_FACILITY == 1 )
|
||||
void vStreamBufferSetStreamBufferNumber( StreamBufferHandle_t xStreamBuffer,
|
||||
UBaseType_t uxStreamBufferNumber ) PRIVILEGED_FUNCTION;
|
||||
UBaseType_t uxStreamBufferGetStreamBufferNumber( StreamBufferHandle_t xStreamBuffer ) PRIVILEGED_FUNCTION;
|
||||
uint8_t ucStreamBufferGetStreamBufferType( StreamBufferHandle_t xStreamBuffer ) PRIVILEGED_FUNCTION;
|
||||
#endif
|
||||
|
||||
#if defined( __cplusplus )
|
||||
}
|
||||
#endif
|
||||
/* *INDENT-OFF* */
|
||||
#if defined( __cplusplus )
|
||||
}
|
||||
#endif
|
||||
/* *INDENT-ON* */
|
||||
|
||||
#endif /* !defined( STREAM_BUFFER_H ) */
|
||||
|
|
5956
include/task.h
5956
include/task.h
File diff suppressed because it is too large
Load diff
2671
include/timers.h
2671
include/timers.h
File diff suppressed because it is too large
Load diff
15
list.c
15
list.c
|
@ -19,10 +19,9 @@
|
|||
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
* http://www.FreeRTOS.org
|
||||
* http://aws.amazon.com/freertos
|
||||
* https://www.FreeRTOS.org
|
||||
* https://github.com/FreeRTOS
|
||||
*
|
||||
* 1 tab == 4 spaces!
|
||||
*/
|
||||
|
||||
|
||||
|
@ -141,18 +140,18 @@ void vListInsert( List_t * const pxList,
|
|||
{
|
||||
/* *** NOTE ***********************************************************
|
||||
* If you find your application is crashing here then likely causes are
|
||||
* listed below. In addition see https://www.freertos.org/FAQHelp.html for
|
||||
* listed below. In addition see https://www.FreeRTOS.org/FAQHelp.html for
|
||||
* more tips, and ensure configASSERT() is defined!
|
||||
* https://www.freertos.org/a00110.html#configASSERT
|
||||
* https://www.FreeRTOS.org/a00110.html#configASSERT
|
||||
*
|
||||
* 1) Stack overflow -
|
||||
* see https://www.freertos.org/Stacks-and-stack-overflow-checking.html
|
||||
* see https://www.FreeRTOS.org/Stacks-and-stack-overflow-checking.html
|
||||
* 2) Incorrect interrupt priority assignment, especially on Cortex-M
|
||||
* parts where numerically high priority values denote low actual
|
||||
* interrupt priorities, which can seem counter intuitive. See
|
||||
* https://www.freertos.org/RTOS-Cortex-M3-M4.html and the definition
|
||||
* https://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html and the definition
|
||||
* of configMAX_SYSCALL_INTERRUPT_PRIORITY on
|
||||
* https://www.freertos.org/a00110.html
|
||||
* https://www.FreeRTOS.org/a00110.html
|
||||
* 3) Calling an API function from within a critical section or when
|
||||
* the scheduler is suspended, or calling an API function that does
|
||||
* not end in "FromISR" from an interrupt.
|
||||
|
|
|
@ -19,8 +19,8 @@
|
|||
# * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
# * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
# *
|
||||
# * http://www.FreeRTOS.org
|
||||
# * http://aws.amazon.com/freertos
|
||||
# * https://www.FreeRTOS.org
|
||||
# * https://github.com/FreeRTOS
|
||||
# *
|
||||
# * 1 tab == 4 spaces!
|
||||
# */
|
||||
|
|
File diff suppressed because it is too large
Load diff
|
@ -19,8 +19,8 @@
|
|||
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
* http://www.FreeRTOS.org
|
||||
* http://aws.amazon.com/freertos
|
||||
* https://www.FreeRTOS.org
|
||||
* https://github.com/FreeRTOS
|
||||
*
|
||||
* 1 tab == 4 spaces!
|
||||
*/
|
||||
|
|
|
@ -19,8 +19,8 @@
|
|||
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
* http://www.FreeRTOS.org
|
||||
* http://aws.amazon.com/freertos
|
||||
* https://www.FreeRTOS.org
|
||||
* https://github.com/FreeRTOS
|
||||
*
|
||||
* 1 tab == 4 spaces!
|
||||
*/
|
||||
|
|
|
@ -19,8 +19,8 @@
|
|||
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
* http://www.FreeRTOS.org
|
||||
* http://aws.amazon.com/freertos
|
||||
* https://www.FreeRTOS.org
|
||||
* https://github.com/FreeRTOS
|
||||
*
|
||||
* 1 tab == 4 spaces!
|
||||
*/
|
||||
|
|
|
@ -19,8 +19,8 @@
|
|||
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
* http://www.FreeRTOS.org
|
||||
* http://aws.amazon.com/freertos
|
||||
* https://www.FreeRTOS.org
|
||||
* https://github.com/FreeRTOS
|
||||
*
|
||||
* 1 tab == 4 spaces!
|
||||
*/
|
||||
|
|
|
@ -19,8 +19,8 @@
|
|||
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
* http://www.FreeRTOS.org
|
||||
* http://aws.amazon.com/freertos
|
||||
* https://www.FreeRTOS.org
|
||||
* https://github.com/FreeRTOS
|
||||
*
|
||||
* 1 tab == 4 spaces!
|
||||
*/
|
||||
|
|
|
@ -19,8 +19,8 @@
|
|||
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
* http://www.FreeRTOS.org
|
||||
* http://aws.amazon.com/freertos
|
||||
* https://www.FreeRTOS.org
|
||||
* https://github.com/FreeRTOS
|
||||
*
|
||||
* 1 tab == 4 spaces!
|
||||
*/
|
||||
|
|
|
@ -19,8 +19,8 @@
|
|||
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
* http://www.FreeRTOS.org
|
||||
* http://aws.amazon.com/freertos
|
||||
* https://www.FreeRTOS.org
|
||||
* https://github.com/FreeRTOS
|
||||
*
|
||||
* 1 tab == 4 spaces!
|
||||
*/
|
||||
|
|
|
@ -19,8 +19,8 @@
|
|||
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
* http://www.FreeRTOS.org
|
||||
* http://aws.amazon.com/freertos
|
||||
* https://www.FreeRTOS.org
|
||||
* https://github.com/FreeRTOS
|
||||
*
|
||||
* 1 tab == 4 spaces!
|
||||
*/
|
||||
|
|
|
@ -19,8 +19,8 @@
|
|||
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
* http://www.FreeRTOS.org
|
||||
* http://aws.amazon.com/freertos
|
||||
* https://www.FreeRTOS.org
|
||||
* https://github.com/FreeRTOS
|
||||
*
|
||||
* 1 tab == 4 spaces!
|
||||
*/
|
||||
|
|
|
@ -19,8 +19,8 @@
|
|||
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
* http://www.FreeRTOS.org
|
||||
* http://aws.amazon.com/freertos
|
||||
* https://www.FreeRTOS.org
|
||||
* https://github.com/FreeRTOS
|
||||
*
|
||||
* 1 tab == 4 spaces!
|
||||
*/
|
||||
|
|
|
@ -19,8 +19,8 @@
|
|||
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
* http://www.FreeRTOS.org
|
||||
* http://aws.amazon.com/freertos
|
||||
* https://www.FreeRTOS.org
|
||||
* https://github.com/FreeRTOS
|
||||
*
|
||||
* 1 tab == 4 spaces!
|
||||
*/
|
||||
|
|
|
@ -19,8 +19,8 @@
|
|||
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
* http://www.FreeRTOS.org
|
||||
* http://aws.amazon.com/freertos
|
||||
* https://www.FreeRTOS.org
|
||||
* https://github.com/FreeRTOS
|
||||
*
|
||||
* 1 tab == 4 spaces!
|
||||
*/
|
||||
|
|
|
@ -19,8 +19,8 @@
|
|||
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
* http://www.FreeRTOS.org
|
||||
* http://aws.amazon.com/freertos
|
||||
* https://www.FreeRTOS.org
|
||||
* https://github.com/FreeRTOS
|
||||
*
|
||||
* 1 tab == 4 spaces!
|
||||
*/
|
||||
|
|
|
@ -19,8 +19,8 @@
|
|||
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
* http://www.FreeRTOS.org
|
||||
* http://aws.amazon.com/freertos
|
||||
* https://www.FreeRTOS.org
|
||||
* https://github.com/FreeRTOS
|
||||
*
|
||||
* 1 tab == 4 spaces!
|
||||
*/
|
||||
|
|
|
@ -19,8 +19,8 @@
|
|||
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
* http://www.FreeRTOS.org
|
||||
* http://aws.amazon.com/freertos
|
||||
* https://www.FreeRTOS.org
|
||||
* https://github.com/FreeRTOS
|
||||
*
|
||||
* 1 tab == 4 spaces!
|
||||
*/
|
||||
|
|
|
@ -19,8 +19,8 @@
|
|||
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
* http://www.FreeRTOS.org
|
||||
* http://aws.amazon.com/freertos
|
||||
* https://www.FreeRTOS.org
|
||||
* https://github.com/FreeRTOS
|
||||
*
|
||||
* 1 tab == 4 spaces!
|
||||
*/
|
||||
|
|
|
@ -19,8 +19,8 @@
|
|||
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
* http://www.FreeRTOS.org
|
||||
* http://aws.amazon.com/freertos
|
||||
* https://www.FreeRTOS.org
|
||||
* https://github.com/FreeRTOS
|
||||
*
|
||||
* 1 tab == 4 spaces!
|
||||
*/
|
||||
|
|
|
@ -19,8 +19,8 @@
|
|||
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
* http://www.FreeRTOS.org
|
||||
* http://aws.amazon.com/freertos
|
||||
* https://www.FreeRTOS.org
|
||||
* https://github.com/FreeRTOS
|
||||
*
|
||||
* 1 tab == 4 spaces!
|
||||
*/
|
||||
|
|
|
@ -19,8 +19,8 @@
|
|||
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
* http://www.FreeRTOS.org
|
||||
* http://aws.amazon.com/freertos
|
||||
* https://www.FreeRTOS.org
|
||||
* https://github.com/FreeRTOS
|
||||
*
|
||||
* 1 tab == 4 spaces!
|
||||
*/
|
||||
|
|
|
@ -19,8 +19,8 @@
|
|||
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
* http://www.FreeRTOS.org
|
||||
* http://aws.amazon.com/freertos
|
||||
* https://www.FreeRTOS.org
|
||||
* https://github.com/FreeRTOS
|
||||
*
|
||||
* 1 tab == 4 spaces!
|
||||
*/
|
||||
|
|
|
@ -19,8 +19,8 @@
|
|||
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
* http://www.FreeRTOS.org
|
||||
* http://aws.amazon.com/freertos
|
||||
* https://www.FreeRTOS.org
|
||||
* https://github.com/FreeRTOS
|
||||
*
|
||||
* 1 tab == 4 spaces!
|
||||
*/
|
||||
|
|
|
@ -19,8 +19,8 @@
|
|||
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
* http://www.FreeRTOS.org
|
||||
* http://aws.amazon.com/freertos
|
||||
* https://www.FreeRTOS.org
|
||||
* https://github.com/FreeRTOS
|
||||
*
|
||||
* 1 tab == 4 spaces!
|
||||
*/
|
||||
|
|
|
@ -19,8 +19,8 @@
|
|||
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
* http://www.FreeRTOS.org
|
||||
* http://aws.amazon.com/freertos
|
||||
* https://www.FreeRTOS.org
|
||||
* https://github.com/FreeRTOS
|
||||
*
|
||||
* 1 tab == 4 spaces!
|
||||
*/
|
||||
|
|
|
@ -19,8 +19,8 @@
|
|||
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
* http://www.FreeRTOS.org
|
||||
* http://aws.amazon.com/freertos
|
||||
* https://www.FreeRTOS.org
|
||||
* https://github.com/FreeRTOS
|
||||
*
|
||||
* 1 tab == 4 spaces!
|
||||
*/
|
||||
|
|
|
@ -19,8 +19,8 @@
|
|||
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
* http://www.FreeRTOS.org
|
||||
* http://aws.amazon.com/freertos
|
||||
* https://www.FreeRTOS.org
|
||||
* https://github.com/FreeRTOS
|
||||
*
|
||||
* 1 tab == 4 spaces!
|
||||
*/
|
||||
|
|
|
@ -19,8 +19,8 @@
|
|||
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
* http://www.FreeRTOS.org
|
||||
* http://aws.amazon.com/freertos
|
||||
* https://www.FreeRTOS.org
|
||||
* https://github.com/FreeRTOS
|
||||
*
|
||||
* 1 tab == 4 spaces!
|
||||
*/
|
||||
|
|
|
@ -19,8 +19,8 @@
|
|||
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
* http://www.FreeRTOS.org
|
||||
* http://aws.amazon.com/freertos
|
||||
* https://www.FreeRTOS.org
|
||||
* https://github.com/FreeRTOS
|
||||
*
|
||||
* 1 tab == 4 spaces!
|
||||
*/
|
||||
|
|
|
@ -19,8 +19,8 @@
|
|||
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
* http://www.FreeRTOS.org
|
||||
* http://aws.amazon.com/freertos
|
||||
* https://www.FreeRTOS.org
|
||||
* https://github.com/FreeRTOS
|
||||
*
|
||||
* 1 tab == 4 spaces!
|
||||
*/
|
||||
|
|
|
@ -19,8 +19,8 @@
|
|||
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
* http://www.FreeRTOS.org
|
||||
* http://aws.amazon.com/freertos
|
||||
* https://www.FreeRTOS.org
|
||||
* https://github.com/FreeRTOS
|
||||
*
|
||||
* 1 tab == 4 spaces!
|
||||
*/
|
||||
|
|
|
@ -19,8 +19,8 @@
|
|||
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
* http://www.FreeRTOS.org
|
||||
* http://aws.amazon.com/freertos
|
||||
* https://www.FreeRTOS.org
|
||||
* https://github.com/FreeRTOS
|
||||
*
|
||||
* 1 tab == 4 spaces!
|
||||
*/
|
||||
|
|
|
@ -19,29 +19,29 @@
|
|||
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
* http://www.FreeRTOS.org
|
||||
* http://aws.amazon.com/freertos
|
||||
* https://www.FreeRTOS.org
|
||||
* https://github.com/FreeRTOS
|
||||
*
|
||||
* 1 tab == 4 spaces!
|
||||
*/
|
||||
|
||||
/*
|
||||
* Changes from V1.00:
|
||||
*
|
||||
+ Call to taskYIELD() from within tick ISR has been replaced by the more
|
||||
+ efficient portSWITCH_CONTEXT().
|
||||
+ ISR function definitions renamed to include the prv prefix.
|
||||
+
|
||||
+ Changes from V2.6.1
|
||||
+
|
||||
+ Replaced the sUsingPreemption variable with the configUSE_PREEMPTION
|
||||
+ macro to be consistent with the later ports.
|
||||
*/
|
||||
Changes from V1.00:
|
||||
|
||||
+ Call to taskYIELD() from within tick ISR has been replaced by the more
|
||||
efficient portSWITCH_CONTEXT().
|
||||
+ ISR function definitions renamed to include the prv prefix.
|
||||
|
||||
Changes from V2.6.1
|
||||
|
||||
+ Replaced the sUsingPreemption variable with the configUSE_PREEMPTION
|
||||
macro to be consistent with the later ports.
|
||||
*/
|
||||
|
||||
/*-----------------------------------------------------------
|
||||
* Implementation of functions defined in portable.h for the Flashlite 186
|
||||
* port.
|
||||
*----------------------------------------------------------*/
|
||||
* Implementation of functions defined in portable.h for the Flashlite 186
|
||||
* port.
|
||||
*----------------------------------------------------------*/
|
||||
|
||||
#include <dos.h>
|
||||
#include <stdlib.h>
|
||||
|
@ -53,13 +53,13 @@
|
|||
|
||||
/*lint -e950 Non ANSI reserved words okay in this file only. */
|
||||
|
||||
#define portTIMER_EOI_TYPE ( 8 )
|
||||
#define portRESET_PIC() portOUTPUT_WORD( ( uint16_t ) 0xff22, portTIMER_EOI_TYPE )
|
||||
#define portTIMER_INT_NUMBER 0x12
|
||||
#define portTIMER_EOI_TYPE ( 8 )
|
||||
#define portRESET_PIC() portOUTPUT_WORD( ( uint16_t ) 0xff22, portTIMER_EOI_TYPE )
|
||||
#define portTIMER_INT_NUMBER 0x12
|
||||
|
||||
#define portTIMER_1_CONTROL_REGISTER ( ( uint16_t ) 0xff5e )
|
||||
#define portTIMER_0_CONTROL_REGISTER ( ( uint16_t ) 0xff56 )
|
||||
#define portTIMER_INTERRUPT_ENABLE ( ( uint16_t ) 0x2000 )
|
||||
#define portTIMER_1_CONTROL_REGISTER ( ( uint16_t ) 0xff5e )
|
||||
#define portTIMER_0_CONTROL_REGISTER ( ( uint16_t ) 0xff56 )
|
||||
#define portTIMER_INTERRUPT_ENABLE ( ( uint16_t ) 0x2000 )
|
||||
|
||||
/* Setup the hardware to generate the required tick frequency. */
|
||||
static void prvSetTickFrequency( uint32_t ulTickRateHz );
|
||||
|
@ -68,17 +68,15 @@ static void prvSetTickFrequency( uint32_t ulTickRateHz );
|
|||
static void prvExitFunction( void );
|
||||
|
||||
/* The ISR used depends on whether the preemptive or cooperative scheduler
|
||||
* is being used. */
|
||||
#if ( configUSE_PREEMPTION == 1 )
|
||||
|
||||
/* Tick service routine used by the scheduler when preemptive scheduling is
|
||||
* being used. */
|
||||
static void __interrupt __far prvPreemptiveTick( void );
|
||||
is being used. */
|
||||
#if( configUSE_PREEMPTION == 1 )
|
||||
/* Tick service routine used by the scheduler when preemptive scheduling is
|
||||
being used. */
|
||||
static void __interrupt __far prvPreemptiveTick( void );
|
||||
#else
|
||||
|
||||
/* Tick service routine used by the scheduler when cooperative scheduling is
|
||||
* being used. */
|
||||
static void __interrupt __far prvNonPreemptiveTick( void );
|
||||
/* Tick service routine used by the scheduler when cooperative scheduling is
|
||||
being used. */
|
||||
static void __interrupt __far prvNonPreemptiveTick( void );
|
||||
#endif
|
||||
|
||||
/* Trap routine used by taskYIELD() to manually cause a context switch. */
|
||||
|
@ -90,9 +88,9 @@ static void __interrupt __far prvYieldProcessor( void );
|
|||
static BaseType_t xSchedulerRunning = pdFALSE;
|
||||
|
||||
/* Points to the original routine installed on the vector we use for manual
|
||||
* context switches. This is then used to restore the original routine during
|
||||
* prvExitFunction(). */
|
||||
static void( __interrupt __far * pxOldSwitchISR )();
|
||||
context switches. This is then used to restore the original routine during
|
||||
prvExitFunction(). */
|
||||
static void ( __interrupt __far *pxOldSwitchISR )();
|
||||
|
||||
/* Used to restore the original DOS context when the scheduler is ended. */
|
||||
static jmp_buf xJumpBuf;
|
||||
|
@ -102,145 +100,145 @@ static jmp_buf xJumpBuf;
|
|||
/*-----------------------------------------------------------*/
|
||||
BaseType_t xPortStartScheduler( void )
|
||||
{
|
||||
/* This is called with interrupts already disabled. */
|
||||
/* This is called with interrupts already disabled. */
|
||||
|
||||
/* Remember what was on the interrupts we are going to use
|
||||
* so we can put them back later if required. */
|
||||
pxOldSwitchISR = _dos_getvect( portSWITCH_INT_NUMBER );
|
||||
/* Remember what was on the interrupts we are going to use
|
||||
so we can put them back later if required. */
|
||||
pxOldSwitchISR = _dos_getvect( portSWITCH_INT_NUMBER );
|
||||
|
||||
/* Put our manual switch (yield) function on a known
|
||||
* vector. */
|
||||
_dos_setvect( portSWITCH_INT_NUMBER, prvYieldProcessor );
|
||||
/* Put our manual switch (yield) function on a known
|
||||
vector. */
|
||||
_dos_setvect( portSWITCH_INT_NUMBER, prvYieldProcessor );
|
||||
|
||||
#if ( configUSE_PREEMPTION == 1 )
|
||||
{
|
||||
/* Put our tick switch function on the timer interrupt. */
|
||||
_dos_setvect( portTIMER_INT_NUMBER, prvPreemptiveTick );
|
||||
}
|
||||
#else
|
||||
{
|
||||
/* We want the timer interrupt to just increment the tick count. */
|
||||
_dos_setvect( portTIMER_INT_NUMBER, prvNonPreemptiveTick );
|
||||
}
|
||||
#endif
|
||||
#if( configUSE_PREEMPTION == 1 )
|
||||
{
|
||||
/* Put our tick switch function on the timer interrupt. */
|
||||
_dos_setvect( portTIMER_INT_NUMBER, prvPreemptiveTick );
|
||||
}
|
||||
#else
|
||||
{
|
||||
/* We want the timer interrupt to just increment the tick count. */
|
||||
_dos_setvect( portTIMER_INT_NUMBER, prvNonPreemptiveTick );
|
||||
}
|
||||
#endif
|
||||
|
||||
prvSetTickFrequency( configTICK_RATE_HZ );
|
||||
prvSetTickFrequency( configTICK_RATE_HZ );
|
||||
|
||||
/* Clean up function if we want to return to DOS. */
|
||||
if( setjmp( xJumpBuf ) != 0 )
|
||||
{
|
||||
prvExitFunction();
|
||||
xSchedulerRunning = pdFALSE;
|
||||
}
|
||||
else
|
||||
{
|
||||
xSchedulerRunning = pdTRUE;
|
||||
/* Clean up function if we want to return to DOS. */
|
||||
if( setjmp( xJumpBuf ) != 0 )
|
||||
{
|
||||
prvExitFunction();
|
||||
xSchedulerRunning = pdFALSE;
|
||||
}
|
||||
else
|
||||
{
|
||||
xSchedulerRunning = pdTRUE;
|
||||
|
||||
/* Kick off the scheduler by setting up the context of the first task. */
|
||||
portFIRST_CONTEXT();
|
||||
}
|
||||
/* Kick off the scheduler by setting up the context of the first task. */
|
||||
portFIRST_CONTEXT();
|
||||
}
|
||||
|
||||
return xSchedulerRunning;
|
||||
return xSchedulerRunning;
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* The ISR used depends on whether the preemptive or cooperative scheduler
|
||||
* is being used. */
|
||||
#if ( configUSE_PREEMPTION == 1 )
|
||||
static void __interrupt __far prvPreemptiveTick( void )
|
||||
{
|
||||
/* Get the scheduler to update the task states following the tick. */
|
||||
if( xTaskIncrementTick() != pdFALSE )
|
||||
{
|
||||
/* Switch in the context of the next task to be run. */
|
||||
portSWITCH_CONTEXT();
|
||||
}
|
||||
is being used. */
|
||||
#if( configUSE_PREEMPTION == 1 )
|
||||
static void __interrupt __far prvPreemptiveTick( void )
|
||||
{
|
||||
/* Get the scheduler to update the task states following the tick. */
|
||||
if( xTaskIncrementTick() != pdFALSE )
|
||||
{
|
||||
/* Switch in the context of the next task to be run. */
|
||||
portSWITCH_CONTEXT();
|
||||
}
|
||||
|
||||
/* Reset the PIC ready for the next time. */
|
||||
portRESET_PIC();
|
||||
}
|
||||
#else /* if ( configUSE_PREEMPTION == 1 ) */
|
||||
static void __interrupt __far prvNonPreemptiveTick( void )
|
||||
{
|
||||
/* Same as preemptive tick, but the cooperative scheduler is being used
|
||||
* so we don't have to switch in the context of the next task. */
|
||||
xTaskIncrementTick();
|
||||
portRESET_PIC();
|
||||
}
|
||||
#endif /* if ( configUSE_PREEMPTION == 1 ) */
|
||||
/* Reset the PIC ready for the next time. */
|
||||
portRESET_PIC();
|
||||
}
|
||||
#else
|
||||
static void __interrupt __far prvNonPreemptiveTick( void )
|
||||
{
|
||||
/* Same as preemptive tick, but the cooperative scheduler is being used
|
||||
so we don't have to switch in the context of the next task. */
|
||||
xTaskIncrementTick();
|
||||
portRESET_PIC();
|
||||
}
|
||||
#endif
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
static void __interrupt __far prvYieldProcessor( void )
|
||||
{
|
||||
/* Switch in the context of the next task to be run. */
|
||||
portSWITCH_CONTEXT();
|
||||
/* Switch in the context of the next task to be run. */
|
||||
portSWITCH_CONTEXT();
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
void vPortEndScheduler( void )
|
||||
{
|
||||
/* Jump back to the processor state prior to starting the
|
||||
* scheduler. This means we are not going to be using a
|
||||
* task stack frame so the task can be deleted. */
|
||||
longjmp( xJumpBuf, 1 );
|
||||
/* Jump back to the processor state prior to starting the
|
||||
scheduler. This means we are not going to be using a
|
||||
task stack frame so the task can be deleted. */
|
||||
longjmp( xJumpBuf, 1 );
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
static void prvExitFunction( void )
|
||||
{
|
||||
const uint16_t usTimerDisable = 0x0000;
|
||||
uint16_t usTimer0Control;
|
||||
const uint16_t usTimerDisable = 0x0000;
|
||||
uint16_t usTimer0Control;
|
||||
|
||||
/* Interrupts should be disabled here anyway - but no
|
||||
* harm in making sure. */
|
||||
portDISABLE_INTERRUPTS();
|
||||
/* Interrupts should be disabled here anyway - but no
|
||||
harm in making sure. */
|
||||
portDISABLE_INTERRUPTS();
|
||||
if( xSchedulerRunning == pdTRUE )
|
||||
{
|
||||
/* Put back the switch interrupt routines that was in place
|
||||
before the scheduler started. */
|
||||
_dos_setvect( portSWITCH_INT_NUMBER, pxOldSwitchISR );
|
||||
}
|
||||
|
||||
if( xSchedulerRunning == pdTRUE )
|
||||
{
|
||||
/* Put back the switch interrupt routines that was in place
|
||||
* before the scheduler started. */
|
||||
_dos_setvect( portSWITCH_INT_NUMBER, pxOldSwitchISR );
|
||||
}
|
||||
/* Disable the timer used for the tick to ensure the scheduler is
|
||||
not called before restoring interrupts. There was previously nothing
|
||||
on this timer so there is no old ISR to restore. */
|
||||
portOUTPUT_WORD( portTIMER_1_CONTROL_REGISTER, usTimerDisable );
|
||||
|
||||
/* Disable the timer used for the tick to ensure the scheduler is
|
||||
* not called before restoring interrupts. There was previously nothing
|
||||
* on this timer so there is no old ISR to restore. */
|
||||
portOUTPUT_WORD( portTIMER_1_CONTROL_REGISTER, usTimerDisable );
|
||||
|
||||
/* Restart the DOS tick. */
|
||||
usTimer0Control = portINPUT_WORD( portTIMER_0_CONTROL_REGISTER );
|
||||
usTimer0Control |= portTIMER_INTERRUPT_ENABLE;
|
||||
portOUTPUT_WORD( portTIMER_0_CONTROL_REGISTER, usTimer0Control );
|
||||
/* Restart the DOS tick. */
|
||||
usTimer0Control = portINPUT_WORD( portTIMER_0_CONTROL_REGISTER );
|
||||
usTimer0Control |= portTIMER_INTERRUPT_ENABLE;
|
||||
portOUTPUT_WORD( portTIMER_0_CONTROL_REGISTER, usTimer0Control );
|
||||
|
||||
|
||||
portENABLE_INTERRUPTS();
|
||||
portENABLE_INTERRUPTS();
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
static void prvSetTickFrequency( uint32_t ulTickRateHz )
|
||||
{
|
||||
const uint16_t usMaxCountRegister = 0xff5a;
|
||||
const uint16_t usTimerPriorityRegister = 0xff32;
|
||||
const uint16_t usTimerEnable = 0xC000;
|
||||
const uint16_t usRetrigger = 0x0001;
|
||||
const uint16_t usTimerHighPriority = 0x0000;
|
||||
uint16_t usTimer0Control;
|
||||
const uint16_t usMaxCountRegister = 0xff5a;
|
||||
const uint16_t usTimerPriorityRegister = 0xff32;
|
||||
const uint16_t usTimerEnable = 0xC000;
|
||||
const uint16_t usRetrigger = 0x0001;
|
||||
const uint16_t usTimerHighPriority = 0x0000;
|
||||
uint16_t usTimer0Control;
|
||||
|
||||
/* ( CPU frequency / 4 ) / clock 2 max count [inpw( 0xff62 ) = 7] */
|
||||
|
||||
const uint32_t ulClockFrequency = ( uint32_t ) 0x7f31a0UL;
|
||||
const uint32_t ulClockFrequency = ( uint32_t ) 0x7f31a0UL;
|
||||
|
||||
uint32_t ulTimerCount = ulClockFrequency / ulTickRateHz;
|
||||
uint32_t ulTimerCount = ulClockFrequency / ulTickRateHz;
|
||||
|
||||
portOUTPUT_WORD( portTIMER_1_CONTROL_REGISTER, usTimerEnable | portTIMER_INTERRUPT_ENABLE | usRetrigger );
|
||||
portOUTPUT_WORD( usMaxCountRegister, ( uint16_t ) ulTimerCount );
|
||||
portOUTPUT_WORD( usTimerPriorityRegister, usTimerHighPriority );
|
||||
portOUTPUT_WORD( portTIMER_1_CONTROL_REGISTER, usTimerEnable | portTIMER_INTERRUPT_ENABLE | usRetrigger );
|
||||
portOUTPUT_WORD( usMaxCountRegister, ( uint16_t ) ulTimerCount );
|
||||
portOUTPUT_WORD( usTimerPriorityRegister, usTimerHighPriority );
|
||||
|
||||
/* Stop the DOS tick - don't do this if you want to maintain a TOD clock. */
|
||||
usTimer0Control = portINPUT_WORD( portTIMER_0_CONTROL_REGISTER );
|
||||
usTimer0Control &= ~portTIMER_INTERRUPT_ENABLE;
|
||||
portOUTPUT_WORD( portTIMER_0_CONTROL_REGISTER, usTimer0Control );
|
||||
/* Stop the DOS tick - don't do this if you want to maintain a TOD clock. */
|
||||
usTimer0Control = portINPUT_WORD( portTIMER_0_CONTROL_REGISTER );
|
||||
usTimer0Control &= ~portTIMER_INTERRUPT_ENABLE;
|
||||
portOUTPUT_WORD( portTIMER_0_CONTROL_REGISTER, usTimer0Control );
|
||||
}
|
||||
|
||||
|
||||
/*lint +e950 */
|
||||
|
||||
|
|
|
@ -19,8 +19,8 @@
|
|||
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
* http://www.FreeRTOS.org
|
||||
* http://aws.amazon.com/freertos
|
||||
* https://www.FreeRTOS.org
|
||||
* https://github.com/FreeRTOS
|
||||
*
|
||||
* 1 tab == 4 spaces!
|
||||
*/
|
||||
|
@ -39,59 +39,59 @@
|
|||
*/
|
||||
|
||||
/* Type definitions. */
|
||||
#define portCHAR char
|
||||
#define portFLOAT float
|
||||
#define portDOUBLE long
|
||||
#define portLONG long
|
||||
#define portSHORT int
|
||||
#define portSTACK_TYPE uint16_t
|
||||
#define portBASE_TYPE portSHORT
|
||||
#define portCHAR char
|
||||
#define portFLOAT float
|
||||
#define portDOUBLE long
|
||||
#define portLONG long
|
||||
#define portSHORT int
|
||||
#define portSTACK_TYPE uint16_t
|
||||
#define portBASE_TYPE portSHORT
|
||||
|
||||
typedef portSTACK_TYPE StackType_t;
|
||||
typedef short BaseType_t;
|
||||
typedef unsigned short UBaseType_t;
|
||||
typedef portSTACK_TYPE StackType_t;
|
||||
typedef short BaseType_t;
|
||||
typedef unsigned short UBaseType_t;
|
||||
|
||||
#if ( configUSE_16_BIT_TICKS == 1 )
|
||||
typedef uint16_t TickType_t;
|
||||
#define portMAX_DELAY ( TickType_t ) 0xffff
|
||||
#if( configUSE_16_BIT_TICKS == 1 )
|
||||
typedef uint16_t TickType_t;
|
||||
#define portMAX_DELAY ( TickType_t ) 0xffff
|
||||
#else
|
||||
typedef uint32_t TickType_t;
|
||||
#define portMAX_DELAY ( TickType_t ) 0xffffffffUL
|
||||
typedef uint32_t TickType_t;
|
||||
#define portMAX_DELAY ( TickType_t ) 0xffffffffUL
|
||||
#endif
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* Critical section handling. */
|
||||
#define portENTER_CRITICAL() \
|
||||
__asm{ pushf } \
|
||||
__asm{ cli } \
|
||||
#define portENTER_CRITICAL() __asm{ pushf } \
|
||||
__asm{ cli } \
|
||||
|
||||
#define portEXIT_CRITICAL() __asm{ popf }
|
||||
#define portEXIT_CRITICAL() __asm{ popf }
|
||||
|
||||
#define portDISABLE_INTERRUPTS() __asm{ cli }
|
||||
#define portDISABLE_INTERRUPTS() __asm{ cli }
|
||||
|
||||
#define portENABLE_INTERRUPTS() __asm{ sti }
|
||||
#define portENABLE_INTERRUPTS() __asm{ sti }
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* Hardware specifics. */
|
||||
#define portNOP() __asm{ nop }
|
||||
#define portSTACK_GROWTH ( -1 )
|
||||
#define portSWITCH_INT_NUMBER 0x80
|
||||
#define portYIELD() __asm{ int portSWITCH_INT_NUMBER }
|
||||
#define portTICK_PERIOD_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )
|
||||
#define portBYTE_ALIGNMENT 2
|
||||
#define portINITIAL_SW ( ( portSTACK_TYPE ) 0x0202 ) /* Start the tasks with interrupts enabled. */
|
||||
#define portNOP() __asm{ nop }
|
||||
#define portSTACK_GROWTH ( -1 )
|
||||
#define portSWITCH_INT_NUMBER 0x80
|
||||
#define portYIELD() __asm{ int portSWITCH_INT_NUMBER }
|
||||
#define portTICK_PERIOD_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )
|
||||
#define portBYTE_ALIGNMENT 2
|
||||
#define portINITIAL_SW ( ( portSTACK_TYPE ) 0x0202 ) /* Start the tasks with interrupts enabled. */
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* Compiler specifics. */
|
||||
#define portINPUT_BYTE( xAddr ) inp( xAddr )
|
||||
#define portOUTPUT_BYTE( xAddr, ucValue ) outp( xAddr, ucValue )
|
||||
#define portINPUT_WORD( xAddr ) inpw( xAddr )
|
||||
#define portOUTPUT_WORD( xAddr, usValue ) outpw( xAddr, usValue )
|
||||
#define portINPUT_BYTE( xAddr ) inp( xAddr )
|
||||
#define portOUTPUT_BYTE( xAddr, ucValue ) outp( xAddr, ucValue )
|
||||
#define portINPUT_WORD( xAddr ) inpw( xAddr )
|
||||
#define portOUTPUT_WORD( xAddr, usValue ) outpw( xAddr, usValue )
|
||||
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* Task function macros as described on the FreeRTOS.org WEB site. */
|
||||
#define portTASK_FUNCTION_PROTO( vTaskFunction, vParameters ) void vTaskFunction( void * pvParameters )
|
||||
#define portTASK_FUNCTION( vTaskFunction, vParameters ) void vTaskFunction( void * pvParameters )
|
||||
#define portTASK_FUNCTION_PROTO( vTaskFunction, vParameters ) void vTaskFunction( void *pvParameters )
|
||||
#define portTASK_FUNCTION( vTaskFunction, vParameters ) void vTaskFunction( void *pvParameters )
|
||||
|
||||
#endif /* PORTMACRO_H */
|
||||
|
||||
|
|
|
@ -19,23 +19,23 @@
|
|||
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
* http://www.FreeRTOS.org
|
||||
* http://aws.amazon.com/freertos
|
||||
* https://www.FreeRTOS.org
|
||||
* https://github.com/FreeRTOS
|
||||
*
|
||||
* 1 tab == 4 spaces!
|
||||
*/
|
||||
|
||||
/*
|
||||
* Changes from V2.6.1
|
||||
*
|
||||
+ Replaced the sUsingPreemption variable with the configUSE_PREEMPTION
|
||||
+ macro to be consistent with the later ports.
|
||||
+
|
||||
+ Changes from V4.0.1
|
||||
+
|
||||
+ Add function prvSetTickFrequencyDefault() to set the DOS tick back to
|
||||
+ its proper value when the scheduler exits.
|
||||
*/
|
||||
Changes from V2.6.1
|
||||
|
||||
+ Replaced the sUsingPreemption variable with the configUSE_PREEMPTION
|
||||
macro to be consistent with the later ports.
|
||||
|
||||
Changes from V4.0.1
|
||||
|
||||
+ Add function prvSetTickFrequencyDefault() to set the DOS tick back to
|
||||
its proper value when the scheduler exits.
|
||||
*/
|
||||
|
||||
#include <stdlib.h>
|
||||
#include <dos.h>
|
||||
|
@ -46,13 +46,13 @@
|
|||
#include "portasm.h"
|
||||
|
||||
/*-----------------------------------------------------------
|
||||
* Implementation of functions defined in portable.h for the industrial
|
||||
* PC port.
|
||||
*----------------------------------------------------------*/
|
||||
* Implementation of functions defined in portable.h for the industrial
|
||||
* PC port.
|
||||
*----------------------------------------------------------*/
|
||||
|
||||
/*lint -e950 Non ANSI reserved words okay in this file only. */
|
||||
|
||||
#define portTIMER_INT_NUMBER 0x08
|
||||
#define portTIMER_INT_NUMBER 0x08
|
||||
|
||||
/* Setup hardware for required tick interrupt rate. */
|
||||
static void prvSetTickFrequency( uint32_t ulTickRateHz );
|
||||
|
@ -61,29 +61,27 @@ static void prvSetTickFrequency( uint32_t ulTickRateHz );
|
|||
static void prvExitFunction( void );
|
||||
|
||||
/* Either chain to the DOS tick (which itself clears the PIC) or clear the PIC
|
||||
* directly. We chain to the DOS tick as close as possible to the standard DOS
|
||||
* tick rate. */
|
||||
directly. We chain to the DOS tick as close as possible to the standard DOS
|
||||
tick rate. */
|
||||
static void prvPortResetPIC( void );
|
||||
|
||||
/* The ISR used depends on whether the preemptive or cooperative
|
||||
* scheduler is being used. */
|
||||
#if ( configUSE_PREEMPTION == 1 )
|
||||
|
||||
/* Tick service routine used by the scheduler when preemptive scheduling is
|
||||
* being used. */
|
||||
static void __interrupt __far prvPreemptiveTick( void );
|
||||
scheduler is being used. */
|
||||
#if( configUSE_PREEMPTION == 1 )
|
||||
/* Tick service routine used by the scheduler when preemptive scheduling is
|
||||
being used. */
|
||||
static void __interrupt __far prvPreemptiveTick( void );
|
||||
#else
|
||||
|
||||
/* Tick service routine used by the scheduler when cooperative scheduling is
|
||||
* being used. */
|
||||
static void __interrupt __far prvNonPreemptiveTick( void );
|
||||
/* Tick service routine used by the scheduler when cooperative scheduling is
|
||||
being used. */
|
||||
static void __interrupt __far prvNonPreemptiveTick( void );
|
||||
#endif
|
||||
|
||||
/* Trap routine used by taskYIELD() to manually cause a context switch. */
|
||||
static void __interrupt __far prvYieldProcessor( void );
|
||||
|
||||
/* Set the tick frequency back so the floppy drive works correctly when the
|
||||
* scheduler exits. */
|
||||
scheduler exits. */
|
||||
static void prvSetTickFrequencyDefault( void );
|
||||
|
||||
/*lint -e956 File scopes necessary here. */
|
||||
|
@ -92,13 +90,13 @@ static void prvSetTickFrequencyDefault( void );
|
|||
static int16_t sDOSTickCounter;
|
||||
|
||||
/* Set true when the vectors are set so the scheduler will service the tick. */
|
||||
static BaseType_t xSchedulerRunning = pdFALSE;
|
||||
static BaseType_t xSchedulerRunning = pdFALSE;
|
||||
|
||||
/* Points to the original routine installed on the vector we use for manual context switches. This is then used to restore the original routine during prvExitFunction(). */
|
||||
static void( __interrupt __far * pxOldSwitchISR )();
|
||||
static void ( __interrupt __far *pxOldSwitchISR )();
|
||||
|
||||
/* Points to the original routine installed on the vector we use to chain to the DOS tick. This is then used to restore the original routine during prvExitFunction(). */
|
||||
static void( __interrupt __far * pxOldSwitchISRPlus1 )();
|
||||
static void ( __interrupt __far *pxOldSwitchISRPlus1 )();
|
||||
|
||||
/* Used to restore the original DOS context when the scheduler is ended. */
|
||||
static jmp_buf xJumpBuf;
|
||||
|
@ -108,187 +106,183 @@ static jmp_buf xJumpBuf;
|
|||
/*-----------------------------------------------------------*/
|
||||
BaseType_t xPortStartScheduler( void )
|
||||
{
|
||||
pxISR pxOriginalTickISR;
|
||||
pxISR pxOriginalTickISR;
|
||||
|
||||
/* This is called with interrupts already disabled. */
|
||||
|
||||
/* This is called with interrupts already disabled. */
|
||||
/* Remember what was on the interrupts we are going to use
|
||||
so we can put them back later if required. */
|
||||
pxOldSwitchISR = _dos_getvect( portSWITCH_INT_NUMBER );
|
||||
pxOriginalTickISR = _dos_getvect( portTIMER_INT_NUMBER );
|
||||
pxOldSwitchISRPlus1 = _dos_getvect( portSWITCH_INT_NUMBER + 1 );
|
||||
|
||||
/* Remember what was on the interrupts we are going to use
|
||||
* so we can put them back later if required. */
|
||||
pxOldSwitchISR = _dos_getvect( portSWITCH_INT_NUMBER );
|
||||
pxOriginalTickISR = _dos_getvect( portTIMER_INT_NUMBER );
|
||||
pxOldSwitchISRPlus1 = _dos_getvect( portSWITCH_INT_NUMBER + 1 );
|
||||
prvSetTickFrequency( configTICK_RATE_HZ );
|
||||
|
||||
prvSetTickFrequency( configTICK_RATE_HZ );
|
||||
/* Put our manual switch (yield) function on a known
|
||||
vector. */
|
||||
_dos_setvect( portSWITCH_INT_NUMBER, prvYieldProcessor );
|
||||
|
||||
/* Put our manual switch (yield) function on a known
|
||||
* vector. */
|
||||
_dos_setvect( portSWITCH_INT_NUMBER, prvYieldProcessor );
|
||||
/* Put the old tick on a different interrupt number so we can
|
||||
call it when we want. */
|
||||
_dos_setvect( portSWITCH_INT_NUMBER + 1, pxOriginalTickISR );
|
||||
|
||||
/* Put the old tick on a different interrupt number so we can
|
||||
* call it when we want. */
|
||||
_dos_setvect( portSWITCH_INT_NUMBER + 1, pxOriginalTickISR );
|
||||
|
||||
/* The ISR used depends on whether the preemptive or cooperative
|
||||
* scheduler is being used. */
|
||||
#if ( configUSE_PREEMPTION == 1 )
|
||||
{
|
||||
/* Put our tick switch function on the timer interrupt. */
|
||||
_dos_setvect( portTIMER_INT_NUMBER, prvPreemptiveTick );
|
||||
}
|
||||
#else
|
||||
{
|
||||
/* We want the timer interrupt to just increment the tick count. */
|
||||
_dos_setvect( portTIMER_INT_NUMBER, prvNonPreemptiveTick );
|
||||
}
|
||||
/* The ISR used depends on whether the preemptive or cooperative
|
||||
scheduler is being used. */
|
||||
#if( configUSE_PREEMPTION == 1 )
|
||||
{
|
||||
/* Put our tick switch function on the timer interrupt. */
|
||||
_dos_setvect( portTIMER_INT_NUMBER, prvPreemptiveTick );
|
||||
}
|
||||
#else
|
||||
{
|
||||
/* We want the timer interrupt to just increment the tick count. */
|
||||
_dos_setvect( portTIMER_INT_NUMBER, prvNonPreemptiveTick );
|
||||
}
|
||||
#endif
|
||||
|
||||
/* Setup a counter that is used to call the DOS interrupt as close
|
||||
* to it's original frequency as can be achieved given our chosen tick
|
||||
* frequency. */
|
||||
sDOSTickCounter = portTICKS_PER_DOS_TICK;
|
||||
/* Setup a counter that is used to call the DOS interrupt as close
|
||||
to it's original frequency as can be achieved given our chosen tick
|
||||
frequency. */
|
||||
sDOSTickCounter = portTICKS_PER_DOS_TICK;
|
||||
|
||||
/* Clean up function if we want to return to DOS. */
|
||||
if( setjmp( xJumpBuf ) != 0 )
|
||||
{
|
||||
prvExitFunction();
|
||||
xSchedulerRunning = pdFALSE;
|
||||
}
|
||||
else
|
||||
{
|
||||
xSchedulerRunning = pdTRUE;
|
||||
/* Clean up function if we want to return to DOS. */
|
||||
if( setjmp( xJumpBuf ) != 0 )
|
||||
{
|
||||
prvExitFunction();
|
||||
xSchedulerRunning = pdFALSE;
|
||||
}
|
||||
else
|
||||
{
|
||||
xSchedulerRunning = pdTRUE;
|
||||
|
||||
/* Kick off the scheduler by setting up the context of the first task. */
|
||||
portFIRST_CONTEXT();
|
||||
}
|
||||
/* Kick off the scheduler by setting up the context of the first task. */
|
||||
portFIRST_CONTEXT();
|
||||
}
|
||||
|
||||
return xSchedulerRunning;
|
||||
return xSchedulerRunning;
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* The ISR used depends on whether the preemptive or cooperative
|
||||
* scheduler is being used. */
|
||||
#if ( configUSE_PREEMPTION == 1 )
|
||||
static void __interrupt __far prvPreemptiveTick( void )
|
||||
{
|
||||
/* Get the scheduler to update the task states following the tick. */
|
||||
if( xTaskIncrementTick() != pdFALSE )
|
||||
{
|
||||
/* Switch in the context of the next task to be run. */
|
||||
portSWITCH_CONTEXT();
|
||||
}
|
||||
scheduler is being used. */
|
||||
#if( configUSE_PREEMPTION == 1 )
|
||||
static void __interrupt __far prvPreemptiveTick( void )
|
||||
{
|
||||
/* Get the scheduler to update the task states following the tick. */
|
||||
if( xTaskIncrementTick() != pdFALSE )
|
||||
{
|
||||
/* Switch in the context of the next task to be run. */
|
||||
portSWITCH_CONTEXT();
|
||||
}
|
||||
|
||||
/* Reset the PIC ready for the next time. */
|
||||
prvPortResetPIC();
|
||||
}
|
||||
#else /* if ( configUSE_PREEMPTION == 1 ) */
|
||||
static void __interrupt __far prvNonPreemptiveTick( void )
|
||||
{
|
||||
/* Same as preemptive tick, but the cooperative scheduler is being used
|
||||
* so we don't have to switch in the context of the next task. */
|
||||
xTaskIncrementTick();
|
||||
prvPortResetPIC();
|
||||
}
|
||||
#endif /* if ( configUSE_PREEMPTION == 1 ) */
|
||||
/* Reset the PIC ready for the next time. */
|
||||
prvPortResetPIC();
|
||||
}
|
||||
#else
|
||||
static void __interrupt __far prvNonPreemptiveTick( void )
|
||||
{
|
||||
/* Same as preemptive tick, but the cooperative scheduler is being used
|
||||
so we don't have to switch in the context of the next task. */
|
||||
xTaskIncrementTick();
|
||||
prvPortResetPIC();
|
||||
}
|
||||
#endif
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
static void __interrupt __far prvYieldProcessor( void )
|
||||
{
|
||||
/* Switch in the context of the next task to be run. */
|
||||
portSWITCH_CONTEXT();
|
||||
/* Switch in the context of the next task to be run. */
|
||||
portSWITCH_CONTEXT();
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
static void prvPortResetPIC( void )
|
||||
{
|
||||
/* We are going to call the DOS tick interrupt at as close a
|
||||
* frequency to the normal DOS tick as possible. */
|
||||
/* We are going to call the DOS tick interrupt at as close a
|
||||
frequency to the normal DOS tick as possible. */
|
||||
|
||||
/* WE SHOULD NOT DO THIS IF YIELD WAS CALLED. */
|
||||
--sDOSTickCounter;
|
||||
|
||||
if( sDOSTickCounter <= 0 )
|
||||
{
|
||||
sDOSTickCounter = ( int16_t ) portTICKS_PER_DOS_TICK;
|
||||
__asm {
|
||||
int portSWITCH_INT_NUMBER + 1
|
||||
};
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Reset the PIC as the DOS tick is not being called to
|
||||
* do it. */
|
||||
__asm
|
||||
{
|
||||
mov al, 20H
|
||||
out 20H, al
|
||||
};
|
||||
}
|
||||
/* WE SHOULD NOT DO THIS IF YIELD WAS CALLED. */
|
||||
--sDOSTickCounter;
|
||||
if( sDOSTickCounter <= 0 )
|
||||
{
|
||||
sDOSTickCounter = ( int16_t ) portTICKS_PER_DOS_TICK;
|
||||
__asm{ int portSWITCH_INT_NUMBER + 1 };
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Reset the PIC as the DOS tick is not being called to
|
||||
do it. */
|
||||
__asm
|
||||
{
|
||||
mov al, 20H
|
||||
out 20H, al
|
||||
};
|
||||
}
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
void vPortEndScheduler( void )
|
||||
{
|
||||
/* Jump back to the processor state prior to starting the
|
||||
* scheduler. This means we are not going to be using a
|
||||
* task stack frame so the task can be deleted. */
|
||||
longjmp( xJumpBuf, 1 );
|
||||
/* Jump back to the processor state prior to starting the
|
||||
scheduler. This means we are not going to be using a
|
||||
task stack frame so the task can be deleted. */
|
||||
longjmp( xJumpBuf, 1 );
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
static void prvExitFunction( void )
|
||||
{
|
||||
void( __interrupt __far * pxOriginalTickISR )();
|
||||
void ( __interrupt __far *pxOriginalTickISR )();
|
||||
|
||||
/* Interrupts should be disabled here anyway - but no
|
||||
* harm in making sure. */
|
||||
portDISABLE_INTERRUPTS();
|
||||
/* Interrupts should be disabled here anyway - but no
|
||||
harm in making sure. */
|
||||
portDISABLE_INTERRUPTS();
|
||||
if( xSchedulerRunning == pdTRUE )
|
||||
{
|
||||
/* Set the DOS tick back onto the timer ticker. */
|
||||
pxOriginalTickISR = _dos_getvect( portSWITCH_INT_NUMBER + 1 );
|
||||
_dos_setvect( portTIMER_INT_NUMBER, pxOriginalTickISR );
|
||||
prvSetTickFrequencyDefault();
|
||||
|
||||
if( xSchedulerRunning == pdTRUE )
|
||||
{
|
||||
/* Set the DOS tick back onto the timer ticker. */
|
||||
pxOriginalTickISR = _dos_getvect( portSWITCH_INT_NUMBER + 1 );
|
||||
_dos_setvect( portTIMER_INT_NUMBER, pxOriginalTickISR );
|
||||
prvSetTickFrequencyDefault();
|
||||
|
||||
/* Put back the switch interrupt routines that was in place
|
||||
* before the scheduler started. */
|
||||
_dos_setvect( portSWITCH_INT_NUMBER, pxOldSwitchISR );
|
||||
_dos_setvect( portSWITCH_INT_NUMBER + 1, pxOldSwitchISRPlus1 );
|
||||
}
|
||||
|
||||
/* The tick timer is back how DOS wants it. We can re-enable
|
||||
* interrupts without the scheduler being called. */
|
||||
portENABLE_INTERRUPTS();
|
||||
/* Put back the switch interrupt routines that was in place
|
||||
before the scheduler started. */
|
||||
_dos_setvect( portSWITCH_INT_NUMBER, pxOldSwitchISR );
|
||||
_dos_setvect( portSWITCH_INT_NUMBER + 1, pxOldSwitchISRPlus1 );
|
||||
}
|
||||
/* The tick timer is back how DOS wants it. We can re-enable
|
||||
interrupts without the scheduler being called. */
|
||||
portENABLE_INTERRUPTS();
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
static void prvSetTickFrequency( uint32_t ulTickRateHz )
|
||||
{
|
||||
const uint16_t usPIT_MODE = ( uint16_t ) 0x43;
|
||||
const uint16_t usPIT0 = ( uint16_t ) 0x40;
|
||||
const uint32_t ulPIT_CONST = ( uint32_t ) 1193180UL;
|
||||
const uint16_t us8254_CTR0_MODE3 = ( uint16_t ) 0x36;
|
||||
uint32_t ulOutput;
|
||||
const uint16_t usPIT_MODE = ( uint16_t ) 0x43;
|
||||
const uint16_t usPIT0 = ( uint16_t ) 0x40;
|
||||
const uint32_t ulPIT_CONST = ( uint32_t ) 1193180UL;
|
||||
const uint16_t us8254_CTR0_MODE3 = ( uint16_t ) 0x36;
|
||||
uint32_t ulOutput;
|
||||
|
||||
/* Setup the 8245 to tick at the wanted frequency. */
|
||||
portOUTPUT_BYTE( usPIT_MODE, us8254_CTR0_MODE3 );
|
||||
ulOutput = ulPIT_CONST / ulTickRateHz;
|
||||
portOUTPUT_BYTE( usPIT0, ( uint16_t ) ( ulOutput & ( uint32_t ) 0xff ) );
|
||||
ulOutput >>= 8;
|
||||
portOUTPUT_BYTE( usPIT0, ( uint16_t ) ( ulOutput & ( uint32_t ) 0xff ) );
|
||||
/* Setup the 8245 to tick at the wanted frequency. */
|
||||
portOUTPUT_BYTE( usPIT_MODE, us8254_CTR0_MODE3 );
|
||||
ulOutput = ulPIT_CONST / ulTickRateHz;
|
||||
portOUTPUT_BYTE( usPIT0, ( uint16_t )( ulOutput & ( uint32_t ) 0xff ) );
|
||||
ulOutput >>= 8;
|
||||
portOUTPUT_BYTE( usPIT0, ( uint16_t ) ( ulOutput & ( uint32_t ) 0xff ) );
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
static void prvSetTickFrequencyDefault( void )
|
||||
{
|
||||
const uint16_t usPIT_MODE = ( uint16_t ) 0x43;
|
||||
const uint16_t usPIT0 = ( uint16_t ) 0x40;
|
||||
const uint16_t us8254_CTR0_MODE3 = ( uint16_t ) 0x36;
|
||||
const uint16_t usPIT_MODE = ( uint16_t ) 0x43;
|
||||
const uint16_t usPIT0 = ( uint16_t ) 0x40;
|
||||
const uint16_t us8254_CTR0_MODE3 = ( uint16_t ) 0x36;
|
||||
|
||||
portOUTPUT_BYTE( usPIT_MODE, us8254_CTR0_MODE3 );
|
||||
portOUTPUT_BYTE( usPIT0, 0 );
|
||||
portOUTPUT_BYTE( usPIT0, 0 );
|
||||
portOUTPUT_BYTE( usPIT_MODE, us8254_CTR0_MODE3 );
|
||||
portOUTPUT_BYTE( usPIT0,0 );
|
||||
portOUTPUT_BYTE( usPIT0,0 );
|
||||
}
|
||||
|
||||
|
||||
/*lint +e950 */
|
||||
|
||||
|
|
|
@ -19,8 +19,8 @@
|
|||
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
* http://www.FreeRTOS.org
|
||||
* http://aws.amazon.com/freertos
|
||||
* https://www.FreeRTOS.org
|
||||
* https://github.com/FreeRTOS
|
||||
*
|
||||
* 1 tab == 4 spaces!
|
||||
*/
|
||||
|
@ -39,59 +39,59 @@
|
|||
*/
|
||||
|
||||
/* Type definitions. */
|
||||
#define portCHAR char
|
||||
#define portFLOAT long
|
||||
#define portDOUBLE long
|
||||
#define portLONG long
|
||||
#define portSHORT int
|
||||
#define portSTACK_TYPE uint16_t
|
||||
#define portBASE_TYPE portSHORT
|
||||
#define portCHAR char
|
||||
#define portFLOAT long
|
||||
#define portDOUBLE long
|
||||
#define portLONG long
|
||||
#define portSHORT int
|
||||
#define portSTACK_TYPE uint16_t
|
||||
#define portBASE_TYPE portSHORT
|
||||
|
||||
typedef portSTACK_TYPE StackType_t;
|
||||
typedef short BaseType_t;
|
||||
typedef unsigned short UBaseType_t;
|
||||
typedef portSTACK_TYPE StackType_t;
|
||||
typedef short BaseType_t;
|
||||
typedef unsigned short UBaseType_t;
|
||||
|
||||
#if ( configUSE_16_BIT_TICKS == 1 )
|
||||
typedef uint16_t TickType_t;
|
||||
#define portMAX_DELAY ( TickType_t ) 0xffff
|
||||
#if( configUSE_16_BIT_TICKS == 1 )
|
||||
typedef uint16_t TickType_t;
|
||||
#define portMAX_DELAY ( TickType_t ) 0xffff
|
||||
#else
|
||||
typedef uint32_t TickType_t;
|
||||
#define portMAX_DELAY ( TickType_t ) 0xffffffffUL
|
||||
typedef uint32_t TickType_t;
|
||||
#define portMAX_DELAY ( TickType_t ) 0xffffffffUL
|
||||
#endif
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* Critical section management. */
|
||||
#define portENTER_CRITICAL() \
|
||||
__asm{ pushf } \
|
||||
__asm{ cli } \
|
||||
#define portENTER_CRITICAL() __asm{ pushf } \
|
||||
__asm{ cli } \
|
||||
|
||||
#define portEXIT_CRITICAL() __asm{ popf }
|
||||
#define portEXIT_CRITICAL() __asm{ popf }
|
||||
|
||||
#define portDISABLE_INTERRUPTS() __asm{ cli }
|
||||
#define portDISABLE_INTERRUPTS() __asm{ cli }
|
||||
|
||||
#define portENABLE_INTERRUPTS() __asm{ sti }
|
||||
#define portENABLE_INTERRUPTS() __asm{ sti }
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* Hardware specifics. */
|
||||
#define portNOP() __asm{ nop }
|
||||
#define portSTACK_GROWTH ( -1 )
|
||||
#define portSWITCH_INT_NUMBER 0x80
|
||||
#define portYIELD() __asm{ int portSWITCH_INT_NUMBER }
|
||||
#define portDOS_TICK_RATE ( 18.20648 )
|
||||
#define portTICK_PERIOD_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )
|
||||
#define portTICKS_PER_DOS_TICK ( ( uint16_t ) ( ( ( portDOUBLE ) configTICK_RATE_HZ / portDOS_TICK_RATE ) + 0.5 ) )
|
||||
#define portINITIAL_SW ( ( portSTACK_TYPE ) 0x0202 ) /* Start the tasks with interrupts enabled. */
|
||||
#define portBYTE_ALIGNMENT ( 2 )
|
||||
#define portNOP() __asm{ nop }
|
||||
#define portSTACK_GROWTH ( -1 )
|
||||
#define portSWITCH_INT_NUMBER 0x80
|
||||
#define portYIELD() __asm{ int portSWITCH_INT_NUMBER }
|
||||
#define portDOS_TICK_RATE ( 18.20648 )
|
||||
#define portTICK_PERIOD_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )
|
||||
#define portTICKS_PER_DOS_TICK ( ( uint16_t ) ( ( ( portDOUBLE ) configTICK_RATE_HZ / portDOS_TICK_RATE ) + 0.5 ) )
|
||||
#define portINITIAL_SW ( ( portSTACK_TYPE ) 0x0202 ) /* Start the tasks with interrupts enabled. */
|
||||
#define portBYTE_ALIGNMENT ( 2 )
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* Compiler specifics. */
|
||||
#define portINPUT_BYTE( xAddr ) inp( xAddr )
|
||||
#define portOUTPUT_BYTE( xAddr, ucValue ) outp( xAddr, ucValue )
|
||||
#define portINPUT_BYTE( xAddr ) inp( xAddr )
|
||||
#define portOUTPUT_BYTE( xAddr, ucValue ) outp( xAddr, ucValue )
|
||||
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* Task function macros as described on the FreeRTOS.org WEB site. */
|
||||
#define portTASK_FUNCTION_PROTO( vTaskFunction, pvParameters ) void vTaskFunction( void * pvParameters )
|
||||
#define portTASK_FUNCTION( vTaskFunction, pvParameters ) void vTaskFunction( void * pvParameters )
|
||||
#define portTASK_FUNCTION_PROTO( vTaskFunction, pvParameters ) void vTaskFunction( void *pvParameters )
|
||||
#define portTASK_FUNCTION( vTaskFunction, pvParameters ) void vTaskFunction( void *pvParameters )
|
||||
|
||||
#endif /* PORTMACRO_H */
|
||||
|
||||
|
|
|
@ -19,8 +19,8 @@
|
|||
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
* http://www.FreeRTOS.org
|
||||
* http://aws.amazon.com/freertos
|
||||
* https://www.FreeRTOS.org
|
||||
* https://github.com/FreeRTOS
|
||||
*
|
||||
* 1 tab == 4 spaces!
|
||||
*/
|
||||
|
@ -47,40 +47,41 @@ void portSWITCH_CONTEXT( void );
|
|||
void portFIRST_CONTEXT( void );
|
||||
|
||||
/* There are slightly different versions depending on whether you are building
|
||||
* to include debugger information. If debugger information is used then there
|
||||
* are a couple of extra bytes left of the ISR stack (presumably for use by the
|
||||
* debugger). The true stack pointer is then stored in the bp register. We add
|
||||
* 2 to the stack pointer to remove the extra bytes before we restore our context. */
|
||||
to include debugger information. If debugger information is used then there
|
||||
are a couple of extra bytes left of the ISR stack (presumably for use by the
|
||||
debugger). The true stack pointer is then stored in the bp register. We add
|
||||
2 to the stack pointer to remove the extra bytes before we restore our context. */
|
||||
|
||||
#define portSWITCH_CONTEXT() \
|
||||
asm { mov ax, seg pxCurrentTCB } \
|
||||
asm { mov ds, ax } \
|
||||
asm { les bx, pxCurrentTCB } /* Save the stack pointer into the TCB. */ \
|
||||
asm { mov es : 0x2[ bx ], ss } \
|
||||
asm { mov es:[ bx ], sp } \
|
||||
asm { call far ptr vTaskSwitchContext } /* Perform the switch. */ \
|
||||
asm { mov ax, seg pxCurrentTCB } /* Restore the stack pointer from the TCB. */ \
|
||||
asm { mov ds, ax } \
|
||||
asm { les bx, dword ptr pxCurrentTCB } \
|
||||
asm { mov ss, es:[ bx + 2 ] } \
|
||||
asm { mov sp, es:[ bx ] }
|
||||
#define portSWITCH_CONTEXT() \
|
||||
asm { mov ax, seg pxCurrentTCB } \
|
||||
asm { mov ds, ax } \
|
||||
asm { les bx, pxCurrentTCB } /* Save the stack pointer into the TCB. */ \
|
||||
asm { mov es:0x2[ bx ], ss } \
|
||||
asm { mov es:[ bx ], sp } \
|
||||
asm { call far ptr vTaskSwitchContext } /* Perform the switch. */ \
|
||||
asm { mov ax, seg pxCurrentTCB } /* Restore the stack pointer from the TCB. */ \
|
||||
asm { mov ds, ax } \
|
||||
asm { les bx, dword ptr pxCurrentTCB } \
|
||||
asm { mov ss, es:[ bx + 2 ] } \
|
||||
asm { mov sp, es:[ bx ] }
|
||||
|
||||
#define portFIRST_CONTEXT() \
|
||||
__asm { mov ax, seg pxCurrentTCB } \
|
||||
__asm { mov ds, ax } \
|
||||
__asm { les bx, dword ptr pxCurrentTCB } \
|
||||
__asm { mov ss, es:[ bx + 2 ] } \
|
||||
__asm { mov sp, es:[ bx ] } \
|
||||
__asm { pop bp } \
|
||||
__asm { pop di } \
|
||||
__asm { pop si } \
|
||||
__asm { pop ds } \
|
||||
__asm { pop es } \
|
||||
__asm { pop dx } \
|
||||
__asm { pop cx } \
|
||||
__asm { pop bx } \
|
||||
__asm { pop ax } \
|
||||
__asm { iret }
|
||||
#define portFIRST_CONTEXT() \
|
||||
__asm { mov ax, seg pxCurrentTCB } \
|
||||
__asm { mov ds, ax } \
|
||||
__asm { les bx, dword ptr pxCurrentTCB } \
|
||||
__asm { mov ss, es:[ bx + 2 ] } \
|
||||
__asm { mov sp, es:[ bx ] } \
|
||||
__asm { pop bp } \
|
||||
__asm { pop di } \
|
||||
__asm { pop si } \
|
||||
__asm { pop ds } \
|
||||
__asm { pop es } \
|
||||
__asm { pop dx } \
|
||||
__asm { pop cx } \
|
||||
__asm { pop bx } \
|
||||
__asm { pop ax } \
|
||||
__asm { iret }
|
||||
|
||||
|
||||
#endif /* ifndef PORT_ASM_H */
|
||||
#endif
|
||||
|
||||
|
|
|
@ -19,23 +19,23 @@
|
|||
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
* http://www.FreeRTOS.org
|
||||
* http://aws.amazon.com/freertos
|
||||
* https://www.FreeRTOS.org
|
||||
* https://github.com/FreeRTOS
|
||||
*
|
||||
* 1 tab == 4 spaces!
|
||||
*/
|
||||
|
||||
/*
|
||||
* Changes from V1.00:
|
||||
*
|
||||
+ pxPortInitialiseStack() now initialises the stack of new tasks to the
|
||||
+ same format used by the compiler. This allows the compiler generated
|
||||
+ interrupt mechanism to be used for context switches.
|
||||
+
|
||||
+ Changes from V2.6.1
|
||||
+
|
||||
+ Move usPortCheckFreeStackSpace() to tasks.c.
|
||||
*/
|
||||
Changes from V1.00:
|
||||
|
||||
+ pxPortInitialiseStack() now initialises the stack of new tasks to the
|
||||
same format used by the compiler. This allows the compiler generated
|
||||
interrupt mechanism to be used for context switches.
|
||||
|
||||
Changes from V2.6.1
|
||||
|
||||
+ Move usPortCheckFreeStackSpace() to tasks.c.
|
||||
*/
|
||||
|
||||
|
||||
#include <dos.h>
|
||||
|
@ -45,79 +45,76 @@
|
|||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* See header file for description. */
|
||||
StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
|
||||
TaskFunction_t pxCode,
|
||||
void * pvParameters )
|
||||
StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters )
|
||||
{
|
||||
StackType_t DS_Reg = 0;
|
||||
StackType_t DS_Reg = 0;
|
||||
|
||||
/* Place a few bytes of known values on the bottom of the stack.
|
||||
* This is just useful for debugging. */
|
||||
/* Place a few bytes of known values on the bottom of the stack.
|
||||
This is just useful for debugging. */
|
||||
|
||||
*pxTopOfStack = 0x1111;
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = 0x2222;
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = 0x3333;
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = 0x4444;
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = 0x5555;
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = 0x1111;
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = 0x2222;
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = 0x3333;
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = 0x4444;
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = 0x5555;
|
||||
pxTopOfStack--;
|
||||
|
||||
|
||||
/*lint -e950 -e611 -e923 Lint doesn't like this much - but nothing I can do about it. */
|
||||
/*lint -e950 -e611 -e923 Lint doesn't like this much - but nothing I can do about it. */
|
||||
|
||||
/* We are going to start the scheduler using a return from interrupt
|
||||
* instruction to load the program counter, so first there would be the
|
||||
* function call with parameters preamble. */
|
||||
/* We are going to start the scheduler using a return from interrupt
|
||||
instruction to load the program counter, so first there would be the
|
||||
function call with parameters preamble. */
|
||||
|
||||
*pxTopOfStack = FP_SEG( pvParameters );
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = FP_OFF( pvParameters );
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = FP_SEG( pxCode );
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = FP_OFF( pxCode );
|
||||
pxTopOfStack--;
|
||||
|
||||
*pxTopOfStack = FP_SEG( pvParameters );
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = FP_OFF( pvParameters );
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = FP_SEG( pxCode );
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = FP_OFF( pxCode );
|
||||
pxTopOfStack--;
|
||||
/* Next the status register and interrupt return address. */
|
||||
*pxTopOfStack = portINITIAL_SW;
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = FP_SEG( pxCode );
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = FP_OFF( pxCode );
|
||||
pxTopOfStack--;
|
||||
|
||||
/* Next the status register and interrupt return address. */
|
||||
*pxTopOfStack = portINITIAL_SW;
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = FP_SEG( pxCode );
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = FP_OFF( pxCode );
|
||||
pxTopOfStack--;
|
||||
/* The remaining registers would be pushed on the stack by our context
|
||||
switch function. These are loaded with values simply to make debugging
|
||||
easier. */
|
||||
*pxTopOfStack = ( StackType_t ) 0xAAAA; /* AX */
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( StackType_t ) 0xBBBB; /* BX */
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( StackType_t ) 0xCCCC; /* CX */
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( StackType_t ) 0xDDDD; /* DX */
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( StackType_t ) 0xEEEE; /* ES */
|
||||
pxTopOfStack--;
|
||||
|
||||
/* The remaining registers would be pushed on the stack by our context
|
||||
* switch function. These are loaded with values simply to make debugging
|
||||
* easier. */
|
||||
*pxTopOfStack = ( StackType_t ) 0xAAAA; /* AX */
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( StackType_t ) 0xBBBB; /* BX */
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( StackType_t ) 0xCCCC; /* CX */
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( StackType_t ) 0xDDDD; /* DX */
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( StackType_t ) 0xEEEE; /* ES */
|
||||
pxTopOfStack--;
|
||||
/* We need the true data segment. */
|
||||
__asm{ MOV DS_Reg, DS };
|
||||
|
||||
/* We need the true data segment. */
|
||||
__asm {
|
||||
MOV DS_Reg, DS
|
||||
};
|
||||
*pxTopOfStack = DS_Reg; /* DS */
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( StackType_t ) 0x0123; /* SI */
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( StackType_t ) 0xDDDD; /* DI */
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( StackType_t ) 0xBBBB; /* BP */
|
||||
|
||||
*pxTopOfStack = DS_Reg; /* DS */
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( StackType_t ) 0x0123; /* SI */
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( StackType_t ) 0xDDDD; /* DI */
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( StackType_t ) 0xBBBB; /* BP */
|
||||
/*lint +e950 +e611 +e923 */
|
||||
|
||||
/*lint +e950 +e611 +e923 */
|
||||
|
||||
return pxTopOfStack;
|
||||
return pxTopOfStack;
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
|
|
|
@ -19,14 +19,13 @@
|
|||
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
* http://www.FreeRTOS.org
|
||||
* http://aws.amazon.com/freertos
|
||||
* https://www.FreeRTOS.org
|
||||
* https://github.com/FreeRTOS
|
||||
*
|
||||
* 1 tab == 4 spaces!
|
||||
*/
|
||||
|
||||
/*-----------------------------------------------------------
|
||||
* Implementation of functions defined in portable.h for the ARM CM4F port.
|
||||
* Implementation of functions defined in portable.h for the ARM CM3 port.
|
||||
*----------------------------------------------------------*/
|
||||
|
||||
/* Scheduler includes. */
|
||||
|
@ -52,7 +51,7 @@
|
|||
#define portNVIC_SYSTICK_CTRL_REG ( *( ( volatile uint32_t * ) 0xe000e010 ) )
|
||||
#define portNVIC_SYSTICK_LOAD_REG ( *( ( volatile uint32_t * ) 0xe000e014 ) )
|
||||
#define portNVIC_SYSTICK_CURRENT_VALUE_REG ( *( ( volatile uint32_t * ) 0xe000e018 ) )
|
||||
#define portNVIC_SYSPRI2_REG ( *( ( volatile uint32_t * ) 0xe000ed20 ) )
|
||||
#define portNVIC_SHPR3_REG ( *( ( volatile uint32_t * ) 0xe000ed20 ) )
|
||||
/* ...then bits in the registers. */
|
||||
#define portNVIC_SYSTICK_INT_BIT ( 1UL << 1UL )
|
||||
#define portNVIC_SYSTICK_ENABLE_BIT ( 1UL << 0UL )
|
||||
|
@ -275,8 +274,8 @@ BaseType_t xPortStartScheduler( void )
|
|||
#endif /* conifgASSERT_DEFINED */
|
||||
|
||||
/* Make PendSV and SysTick the lowest priority interrupts. */
|
||||
portNVIC_SYSPRI2_REG |= portNVIC_PENDSV_PRI;
|
||||
portNVIC_SYSPRI2_REG |= portNVIC_SYSTICK_PRI;
|
||||
portNVIC_SHPR3_REG |= portNVIC_PENDSV_PRI;
|
||||
portNVIC_SHPR3_REG |= portNVIC_SYSTICK_PRI;
|
||||
|
||||
/* Start the timer that generates the tick ISR. Interrupts are disabled
|
||||
* here already. */
|
||||
|
@ -584,8 +583,8 @@ void vPortSetupTimerInterrupt( void )
|
|||
* interrupt entry is as fast and simple as possible.
|
||||
*
|
||||
* The following links provide detailed information:
|
||||
* http://www.freertos.org/RTOS-Cortex-M3-M4.html
|
||||
* http://www.freertos.org/FAQHelp.html */
|
||||
* https://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html
|
||||
* https://www.FreeRTOS.org/FAQHelp.html */
|
||||
configASSERT( ucCurrentPriority >= ucMaxSysCallPriority );
|
||||
}
|
||||
|
||||
|
|
|
@ -19,8 +19,8 @@
|
|||
; * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
; * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
; *
|
||||
; * http://www.FreeRTOS.org
|
||||
; * http://aws.amazon.com/freertos
|
||||
; * https://www.FreeRTOS.org
|
||||
; * https://github.com/FreeRTOS
|
||||
; *
|
||||
; * 1 tab == 4 spaces!
|
||||
; */
|
||||
|
|
|
@ -19,8 +19,8 @@
|
|||
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
* http://www.FreeRTOS.org
|
||||
* http://aws.amazon.com/freertos
|
||||
* https://www.FreeRTOS.org
|
||||
* https://github.com/FreeRTOS
|
||||
*
|
||||
* 1 tab == 4 spaces!
|
||||
*/
|
||||
|
|
|
@ -19,10 +19,9 @@
|
|||
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
* http://www.FreeRTOS.org
|
||||
* http://aws.amazon.com/freertos
|
||||
* https://www.FreeRTOS.org
|
||||
* https://github.com/FreeRTOS
|
||||
*
|
||||
* 1 tab == 4 spaces!
|
||||
*/
|
||||
|
||||
/*-----------------------------------------------------------
|
||||
|
@ -56,7 +55,7 @@
|
|||
#define portNVIC_SYSTICK_CTRL_REG ( *( ( volatile uint32_t * ) 0xe000e010 ) )
|
||||
#define portNVIC_SYSTICK_LOAD_REG ( *( ( volatile uint32_t * ) 0xe000e014 ) )
|
||||
#define portNVIC_SYSTICK_CURRENT_VALUE_REG ( *( ( volatile uint32_t * ) 0xe000e018 ) )
|
||||
#define portNVIC_SYSPRI2_REG ( *( ( volatile uint32_t * ) 0xe000ed20 ) )
|
||||
#define portNVIC_SHPR3_REG ( *( ( volatile uint32_t * ) 0xe000ed20 ) )
|
||||
/* ...then bits in the registers. */
|
||||
#define portNVIC_SYSTICK_INT_BIT ( 1UL << 1UL )
|
||||
#define portNVIC_SYSTICK_ENABLE_BIT ( 1UL << 0UL )
|
||||
|
@ -294,8 +293,8 @@ BaseType_t xPortStartScheduler( void )
|
|||
#endif /* conifgASSERT_DEFINED */
|
||||
|
||||
/* Make PendSV and SysTick the lowest priority interrupts. */
|
||||
portNVIC_SYSPRI2_REG |= portNVIC_PENDSV_PRI;
|
||||
portNVIC_SYSPRI2_REG |= portNVIC_SYSTICK_PRI;
|
||||
portNVIC_SHPR3_REG |= portNVIC_PENDSV_PRI;
|
||||
portNVIC_SHPR3_REG |= portNVIC_SYSTICK_PRI;
|
||||
|
||||
/* Start the timer that generates the tick ISR. Interrupts are disabled
|
||||
* here already. */
|
||||
|
@ -609,8 +608,8 @@ void vPortSetupTimerInterrupt( void )
|
|||
* interrupt entry is as fast and simple as possible.
|
||||
*
|
||||
* The following links provide detailed information:
|
||||
* http://www.freertos.org/RTOS-Cortex-M3-M4.html
|
||||
* http://www.freertos.org/FAQHelp.html */
|
||||
* https://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html
|
||||
* https://www.FreeRTOS.org/FAQHelp.html */
|
||||
configASSERT( ucCurrentPriority >= ucMaxSysCallPriority );
|
||||
}
|
||||
|
||||
|
|
|
@ -19,8 +19,8 @@
|
|||
; * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
; * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
; *
|
||||
; * http://www.FreeRTOS.org
|
||||
; * http://aws.amazon.com/freertos
|
||||
; * https://www.FreeRTOS.org
|
||||
; * https://github.com/FreeRTOS
|
||||
; *
|
||||
; * 1 tab == 4 spaces!
|
||||
; */
|
||||
|
|
|
@ -19,8 +19,8 @@
|
|||
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
* http://www.FreeRTOS.org
|
||||
* http://aws.amazon.com/freertos
|
||||
* https://www.FreeRTOS.org
|
||||
* https://github.com/FreeRTOS
|
||||
*
|
||||
* 1 tab == 4 spaces!
|
||||
*/
|
||||
|
|
|
@ -19,8 +19,8 @@
|
|||
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
* http://www.FreeRTOS.org
|
||||
* http://aws.amazon.com/freertos
|
||||
* https://www.FreeRTOS.org
|
||||
* https://github.com/FreeRTOS
|
||||
*
|
||||
* 1 tab == 4 spaces!
|
||||
*/
|
||||
|
@ -37,28 +37,28 @@ uint32_t ulCriticalNesting = 9999;
|
|||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* Registers required to configure the RTI. */
|
||||
#define portRTI_GCTRL_REG ( *( ( volatile uint32_t * ) 0xFFFFFC00 ) )
|
||||
#define portRTI_TBCTRL_REG ( *( ( volatile uint32_t * ) 0xFFFFFC04 ) )
|
||||
#define portRTI_COMPCTRL_REG ( *( ( volatile uint32_t * ) 0xFFFFFC0C ) )
|
||||
#define portRTI_CNT0_FRC0_REG ( *( ( volatile uint32_t * ) 0xFFFFFC10 ) )
|
||||
#define portRTI_CNT0_UC0_REG ( *( ( volatile uint32_t * ) 0xFFFFFC14 ) )
|
||||
#define portRTI_CNT0_CPUC0_REG ( *( ( volatile uint32_t * ) 0xFFFFFC18 ) )
|
||||
#define portRTI_CNT0_COMP0_REG ( *( ( volatile uint32_t * ) 0xFFFFFC50 ) )
|
||||
#define portRTI_CNT0_UDCP0_REG ( *( ( volatile uint32_t * ) 0xFFFFFC54 ) )
|
||||
#define portRTI_SETINTENA_REG ( *( ( volatile uint32_t * ) 0xFFFFFC80 ) )
|
||||
#define portRTI_CLEARINTENA_REG ( *( ( volatile uint32_t * ) 0xFFFFFC84 ) )
|
||||
#define portRTI_INTFLAG_REG ( *( ( volatile uint32_t * ) 0xFFFFFC88 ) )
|
||||
#define portRTI_GCTRL_REG ( * ( ( volatile uint32_t * ) 0xFFFFFC00 ) )
|
||||
#define portRTI_TBCTRL_REG ( * ( ( volatile uint32_t * ) 0xFFFFFC04 ) )
|
||||
#define portRTI_COMPCTRL_REG ( * ( ( volatile uint32_t * ) 0xFFFFFC0C ) )
|
||||
#define portRTI_CNT0_FRC0_REG ( * ( ( volatile uint32_t * ) 0xFFFFFC10 ) )
|
||||
#define portRTI_CNT0_UC0_REG ( * ( ( volatile uint32_t * ) 0xFFFFFC14 ) )
|
||||
#define portRTI_CNT0_CPUC0_REG ( * ( ( volatile uint32_t * ) 0xFFFFFC18 ) )
|
||||
#define portRTI_CNT0_COMP0_REG ( * ( ( volatile uint32_t * ) 0xFFFFFC50 ) )
|
||||
#define portRTI_CNT0_UDCP0_REG ( * ( ( volatile uint32_t * ) 0xFFFFFC54 ) )
|
||||
#define portRTI_SETINTENA_REG ( * ( ( volatile uint32_t * ) 0xFFFFFC80 ) )
|
||||
#define portRTI_CLEARINTENA_REG ( * ( ( volatile uint32_t * ) 0xFFFFFC84 ) )
|
||||
#define portRTI_INTFLAG_REG ( * ( ( volatile uint32_t * ) 0xFFFFFC88 ) )
|
||||
|
||||
|
||||
/* Constants required to set up the initial stack of each task. */
|
||||
#define portINITIAL_SPSR ( ( StackType_t ) 0x1F )
|
||||
#define portINITIAL_FPSCR ( ( StackType_t ) 0x00 )
|
||||
#define portINSTRUCTION_SIZE ( ( StackType_t ) 0x04 )
|
||||
#define portTHUMB_MODE_BIT ( ( StackType_t ) 0x20 )
|
||||
#define portINITIAL_SPSR ( ( StackType_t ) 0x1F )
|
||||
#define portINITIAL_FPSCR ( ( StackType_t ) 0x00 )
|
||||
#define portINSTRUCTION_SIZE ( ( StackType_t ) 0x04 )
|
||||
#define portTHUMB_MODE_BIT ( ( StackType_t ) 0x20 )
|
||||
|
||||
/* The number of words on the stack frame between the saved Top Of Stack and
|
||||
* R0 (in which the parameters are passed. */
|
||||
#define portSPACE_BETWEEN_TOS_AND_PARAMETERS ( 12 )
|
||||
R0 (in which the parameters are passed. */
|
||||
#define portSPACE_BETWEEN_TOS_AND_PARAMETERS ( 12 )
|
||||
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
|
@ -68,7 +68,7 @@ extern void vPortStartFirstTask( void );
|
|||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* Saved as part of the task context. Set to pdFALSE if the task does not
|
||||
* require an FPU context. */
|
||||
require an FPU context. */
|
||||
uint32_t ulTaskHasFPUContext = 0;
|
||||
|
||||
/*-----------------------------------------------------------*/
|
||||
|
@ -77,183 +77,181 @@ uint32_t ulTaskHasFPUContext = 0;
|
|||
/*
|
||||
* See header file for description.
|
||||
*/
|
||||
StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
|
||||
TaskFunction_t pxCode,
|
||||
void * pvParameters )
|
||||
StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters )
|
||||
{
|
||||
StackType_t * pxOriginalTOS;
|
||||
StackType_t *pxOriginalTOS;
|
||||
|
||||
pxOriginalTOS = pxTopOfStack;
|
||||
pxOriginalTOS = pxTopOfStack;
|
||||
|
||||
#if __TI_VFP_SUPPORT__
|
||||
{
|
||||
/* Ensure the stack is correctly aligned on exit. */
|
||||
pxTopOfStack--;
|
||||
}
|
||||
#endif
|
||||
#if __TI_VFP_SUPPORT__
|
||||
{
|
||||
/* Ensure the stack is correctly aligned on exit. */
|
||||
pxTopOfStack--;
|
||||
}
|
||||
#endif
|
||||
|
||||
/* Setup the initial stack of the task. The stack is set exactly as
|
||||
* expected by the portRESTORE_CONTEXT() macro. */
|
||||
/* Setup the initial stack of the task. The stack is set exactly as
|
||||
expected by the portRESTORE_CONTEXT() macro. */
|
||||
|
||||
/* First on the stack is the return address - which is the start of the as
|
||||
* the task has not executed yet. The offset is added to make the return
|
||||
* address appear as it would within an IRQ ISR. */
|
||||
*pxTopOfStack = ( StackType_t ) pxCode + portINSTRUCTION_SIZE;
|
||||
pxTopOfStack--;
|
||||
/* First on the stack is the return address - which is the start of the as
|
||||
the task has not executed yet. The offset is added to make the return
|
||||
address appear as it would within an IRQ ISR. */
|
||||
*pxTopOfStack = ( StackType_t ) pxCode + portINSTRUCTION_SIZE;
|
||||
pxTopOfStack--;
|
||||
|
||||
*pxTopOfStack = ( StackType_t ) 0x00000000; /* R14 */
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( StackType_t ) pxOriginalTOS; /* Stack used when task starts goes in R13. */
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( StackType_t ) 0x00000000; /* R14 */
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( StackType_t ) pxOriginalTOS; /* Stack used when task starts goes in R13. */
|
||||
pxTopOfStack--;
|
||||
|
||||
#ifdef portPRELOAD_TASK_REGISTERS
|
||||
{
|
||||
*pxTopOfStack = ( StackType_t ) 0x12121212; /* R12 */
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( StackType_t ) 0x11111111; /* R11 */
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( StackType_t ) 0x10101010; /* R10 */
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( StackType_t ) 0x09090909; /* R9 */
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( StackType_t ) 0x08080808; /* R8 */
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( StackType_t ) 0x07070707; /* R7 */
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( StackType_t ) 0x06060606; /* R6 */
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( StackType_t ) 0x05050505; /* R5 */
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( StackType_t ) 0x04040404; /* R4 */
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( StackType_t ) 0x03030303; /* R3 */
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( StackType_t ) 0x02020202; /* R2 */
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( StackType_t ) 0x01010101; /* R1 */
|
||||
pxTopOfStack--;
|
||||
}
|
||||
#else /* ifdef portPRELOAD_TASK_REGISTERS */
|
||||
{
|
||||
pxTopOfStack -= portSPACE_BETWEEN_TOS_AND_PARAMETERS;
|
||||
}
|
||||
#endif /* ifdef portPRELOAD_TASK_REGISTERS */
|
||||
#ifdef portPRELOAD_TASK_REGISTERS
|
||||
{
|
||||
*pxTopOfStack = ( StackType_t ) 0x12121212; /* R12 */
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( StackType_t ) 0x11111111; /* R11 */
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( StackType_t ) 0x10101010; /* R10 */
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( StackType_t ) 0x09090909; /* R9 */
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( StackType_t ) 0x08080808; /* R8 */
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( StackType_t ) 0x07070707; /* R7 */
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( StackType_t ) 0x06060606; /* R6 */
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( StackType_t ) 0x05050505; /* R5 */
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( StackType_t ) 0x04040404; /* R4 */
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( StackType_t ) 0x03030303; /* R3 */
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( StackType_t ) 0x02020202; /* R2 */
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( StackType_t ) 0x01010101; /* R1 */
|
||||
pxTopOfStack--;
|
||||
}
|
||||
#else
|
||||
{
|
||||
pxTopOfStack -= portSPACE_BETWEEN_TOS_AND_PARAMETERS;
|
||||
}
|
||||
#endif
|
||||
|
||||
/* Function parameters are passed in R0. */
|
||||
*pxTopOfStack = ( StackType_t ) pvParameters; /* R0 */
|
||||
pxTopOfStack--;
|
||||
/* Function parameters are passed in R0. */
|
||||
*pxTopOfStack = ( StackType_t ) pvParameters; /* R0 */
|
||||
pxTopOfStack--;
|
||||
|
||||
/* Set the status register for system mode, with interrupts enabled. */
|
||||
*pxTopOfStack = ( StackType_t ) ( ( _get_CPSR() & ~0xFF ) | portINITIAL_SPSR );
|
||||
/* Set the status register for system mode, with interrupts enabled. */
|
||||
*pxTopOfStack = ( StackType_t ) ( ( _get_CPSR() & ~0xFF ) | portINITIAL_SPSR );
|
||||
|
||||
if( ( ( uint32_t ) pxCode & 0x01UL ) != 0x00 )
|
||||
{
|
||||
/* The task will start in thumb mode. */
|
||||
*pxTopOfStack |= portTHUMB_MODE_BIT;
|
||||
}
|
||||
if( ( ( uint32_t ) pxCode & 0x01UL ) != 0x00 )
|
||||
{
|
||||
/* The task will start in thumb mode. */
|
||||
*pxTopOfStack |= portTHUMB_MODE_BIT;
|
||||
}
|
||||
|
||||
#ifdef __TI_VFP_SUPPORT__
|
||||
{
|
||||
pxTopOfStack--;
|
||||
#ifdef __TI_VFP_SUPPORT__
|
||||
{
|
||||
pxTopOfStack--;
|
||||
|
||||
/* The last thing on the stack is the tasks ulUsingFPU value, which by
|
||||
* default is set to indicate that the stack frame does not include FPU
|
||||
* registers. */
|
||||
*pxTopOfStack = pdFALSE;
|
||||
}
|
||||
#endif
|
||||
/* The last thing on the stack is the tasks ulUsingFPU value, which by
|
||||
default is set to indicate that the stack frame does not include FPU
|
||||
registers. */
|
||||
*pxTopOfStack = pdFALSE;
|
||||
}
|
||||
#endif
|
||||
|
||||
return pxTopOfStack;
|
||||
return pxTopOfStack;
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
static void prvSetupTimerInterrupt( void )
|
||||
static void prvSetupTimerInterrupt(void)
|
||||
{
|
||||
/* Disable timer 0. */
|
||||
portRTI_GCTRL_REG &= 0xFFFFFFFEUL;
|
||||
/* Disable timer 0. */
|
||||
portRTI_GCTRL_REG &= 0xFFFFFFFEUL;
|
||||
|
||||
/* Use the internal counter. */
|
||||
portRTI_TBCTRL_REG = 0x00000000U;
|
||||
/* Use the internal counter. */
|
||||
portRTI_TBCTRL_REG = 0x00000000U;
|
||||
|
||||
/* COMPSEL0 will use the RTIFRC0 counter. */
|
||||
portRTI_COMPCTRL_REG = 0x00000000U;
|
||||
/* COMPSEL0 will use the RTIFRC0 counter. */
|
||||
portRTI_COMPCTRL_REG = 0x00000000U;
|
||||
|
||||
/* Initialise the counter and the prescale counter registers. */
|
||||
portRTI_CNT0_UC0_REG = 0x00000000U;
|
||||
portRTI_CNT0_FRC0_REG = 0x00000000U;
|
||||
/* Initialise the counter and the prescale counter registers. */
|
||||
portRTI_CNT0_UC0_REG = 0x00000000U;
|
||||
portRTI_CNT0_FRC0_REG = 0x00000000U;
|
||||
|
||||
/* Set Prescalar for RTI clock. */
|
||||
portRTI_CNT0_CPUC0_REG = 0x00000001U;
|
||||
portRTI_CNT0_COMP0_REG = ( configCPU_CLOCK_HZ / 2 ) / configTICK_RATE_HZ;
|
||||
portRTI_CNT0_UDCP0_REG = ( configCPU_CLOCK_HZ / 2 ) / configTICK_RATE_HZ;
|
||||
/* Set Prescalar for RTI clock. */
|
||||
portRTI_CNT0_CPUC0_REG = 0x00000001U;
|
||||
portRTI_CNT0_COMP0_REG = ( configCPU_CLOCK_HZ / 2 ) / configTICK_RATE_HZ;
|
||||
portRTI_CNT0_UDCP0_REG = ( configCPU_CLOCK_HZ / 2 ) / configTICK_RATE_HZ;
|
||||
|
||||
/* Clear interrupts. */
|
||||
portRTI_INTFLAG_REG = 0x0007000FU;
|
||||
portRTI_CLEARINTENA_REG = 0x00070F0FU;
|
||||
/* Clear interrupts. */
|
||||
portRTI_INTFLAG_REG = 0x0007000FU;
|
||||
portRTI_CLEARINTENA_REG = 0x00070F0FU;
|
||||
|
||||
/* Enable the compare 0 interrupt. */
|
||||
portRTI_SETINTENA_REG = 0x00000001U;
|
||||
portRTI_GCTRL_REG |= 0x00000001U;
|
||||
/* Enable the compare 0 interrupt. */
|
||||
portRTI_SETINTENA_REG = 0x00000001U;
|
||||
portRTI_GCTRL_REG |= 0x00000001U;
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/*
|
||||
* See header file for description.
|
||||
*/
|
||||
BaseType_t xPortStartScheduler( void )
|
||||
BaseType_t xPortStartScheduler(void)
|
||||
{
|
||||
/* Start the timer that generates the tick ISR. */
|
||||
prvSetupTimerInterrupt();
|
||||
/* Start the timer that generates the tick ISR. */
|
||||
prvSetupTimerInterrupt();
|
||||
|
||||
/* Reset the critical section nesting count read to execute the first task. */
|
||||
ulCriticalNesting = 0;
|
||||
/* Reset the critical section nesting count read to execute the first task. */
|
||||
ulCriticalNesting = 0;
|
||||
|
||||
/* Start the first task. This is done from portASM.asm as ARM mode must be
|
||||
* used. */
|
||||
vPortStartFirstTask();
|
||||
/* Start the first task. This is done from portASM.asm as ARM mode must be
|
||||
used. */
|
||||
vPortStartFirstTask();
|
||||
|
||||
/* Should not get here! */
|
||||
return pdFAIL;
|
||||
/* Should not get here! */
|
||||
return pdFAIL;
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/*
|
||||
* See header file for description.
|
||||
*/
|
||||
void vPortEndScheduler( void )
|
||||
void vPortEndScheduler(void)
|
||||
{
|
||||
/* Not implemented in ports where there is nothing to return to.
|
||||
* Artificially force an assert. */
|
||||
configASSERT( ulCriticalNesting == 1000UL );
|
||||
/* Not implemented in ports where there is nothing to return to.
|
||||
Artificially force an assert. */
|
||||
configASSERT( ulCriticalNesting == 1000UL );
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
#if configUSE_PREEMPTION == 0
|
||||
|
||||
/* The cooperative scheduler requires a normal IRQ service routine to
|
||||
* simply increment the system tick. */
|
||||
__interrupt void vPortNonPreemptiveTick( void )
|
||||
{
|
||||
/* clear clock interrupt flag */
|
||||
portRTI_INTFLAG_REG = 0x00000001;
|
||||
/* The cooperative scheduler requires a normal IRQ service routine to
|
||||
* simply increment the system tick. */
|
||||
__interrupt void vPortNonPreemptiveTick( void )
|
||||
{
|
||||
/* clear clock interrupt flag */
|
||||
portRTI_INTFLAG_REG = 0x00000001;
|
||||
|
||||
/* Increment the tick count - this may make a delaying task ready
|
||||
* to run - but a context switch is not performed. */
|
||||
xTaskIncrementTick();
|
||||
}
|
||||
/* Increment the tick count - this may make a delaying task ready
|
||||
to run - but a context switch is not performed. */
|
||||
xTaskIncrementTick();
|
||||
}
|
||||
|
||||
#else /* if configUSE_PREEMPTION == 0 */
|
||||
#else
|
||||
|
||||
/*
|
||||
**************************************************************************
|
||||
* The preemptive scheduler ISR is written in assembler and can be found
|
||||
* in the portASM.asm file. This will only get used if portUSE_PREEMPTION
|
||||
* is set to 1 in portmacro.h
|
||||
**************************************************************************
|
||||
*/
|
||||
void vPortPreemptiveTick( void );
|
||||
/*
|
||||
**************************************************************************
|
||||
* The preemptive scheduler ISR is written in assembler and can be found
|
||||
* in the portASM.asm file. This will only get used if portUSE_PREEMPTION
|
||||
* is set to 1 in portmacro.h
|
||||
**************************************************************************
|
||||
*/
|
||||
void vPortPreemptiveTick( void );
|
||||
|
||||
#endif /* if configUSE_PREEMPTION == 0 */
|
||||
#endif
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
|
||||
|
@ -262,13 +260,13 @@ void vPortEndScheduler( void )
|
|||
*/
|
||||
void vPortEnterCritical( void )
|
||||
{
|
||||
/* Disable interrupts as per portDISABLE_INTERRUPTS(); */
|
||||
portDISABLE_INTERRUPTS();
|
||||
/* Disable interrupts as per portDISABLE_INTERRUPTS(); */
|
||||
portDISABLE_INTERRUPTS();
|
||||
|
||||
/* Now interrupts are disabled ulCriticalNesting can be accessed
|
||||
* directly. Increment ulCriticalNesting to keep a count of how many times
|
||||
* portENTER_CRITICAL() has been called. */
|
||||
ulCriticalNesting++;
|
||||
/* Now interrupts are disabled ulCriticalNesting can be accessed
|
||||
directly. Increment ulCriticalNesting to keep a count of how many times
|
||||
portENTER_CRITICAL() has been called. */
|
||||
ulCriticalNesting++;
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
|
@ -278,36 +276,37 @@ void vPortEnterCritical( void )
|
|||
*/
|
||||
void vPortExitCritical( void )
|
||||
{
|
||||
if( ulCriticalNesting > 0 )
|
||||
{
|
||||
/* Decrement the nesting count as we are leaving a critical section. */
|
||||
ulCriticalNesting--;
|
||||
if( ulCriticalNesting > 0 )
|
||||
{
|
||||
/* Decrement the nesting count as we are leaving a critical section. */
|
||||
ulCriticalNesting--;
|
||||
|
||||
/* If the nesting level has reached zero then interrupts should be
|
||||
* re-enabled. */
|
||||
if( ulCriticalNesting == 0 )
|
||||
{
|
||||
/* Enable interrupts as per portENABLE_INTERRUPTS(). */
|
||||
portENABLE_INTERRUPTS();
|
||||
}
|
||||
}
|
||||
/* If the nesting level has reached zero then interrupts should be
|
||||
re-enabled. */
|
||||
if( ulCriticalNesting == 0 )
|
||||
{
|
||||
/* Enable interrupts as per portENABLE_INTERRUPTS(). */
|
||||
portENABLE_INTERRUPTS();
|
||||
}
|
||||
}
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
#if __TI_VFP_SUPPORT__
|
||||
|
||||
void vPortTaskUsesFPU( void )
|
||||
{
|
||||
extern void vPortInitialiseFPSCR( void );
|
||||
void vPortTaskUsesFPU( void )
|
||||
{
|
||||
extern void vPortInitialiseFPSCR( void );
|
||||
|
||||
/* A task is registering the fact that it needs an FPU context. Set the
|
||||
* FPU flag (saved as part of the task context. */
|
||||
ulTaskHasFPUContext = pdTRUE;
|
||||
/* A task is registering the fact that it needs an FPU context. Set the
|
||||
FPU flag (saved as part of the task context. */
|
||||
ulTaskHasFPUContext = pdTRUE;
|
||||
|
||||
/* Initialise the floating point status register. */
|
||||
vPortInitialiseFPSCR();
|
||||
}
|
||||
/* Initialise the floating point status register. */
|
||||
vPortInitialiseFPSCR();
|
||||
}
|
||||
|
||||
#endif /* __TI_VFP_SUPPORT__ */
|
||||
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
|
|
|
@ -19,8 +19,8 @@
|
|||
; * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
; * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
; *
|
||||
; * http://www.FreeRTOS.org
|
||||
; * http://aws.amazon.com/freertos
|
||||
; * https://www.FreeRTOS.org
|
||||
; * https://github.com/FreeRTOS
|
||||
; *
|
||||
; * 1 tab == 4 spaces!
|
||||
; */
|
||||
|
|
|
@ -19,8 +19,8 @@
|
|||
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
* http://www.FreeRTOS.org
|
||||
* http://aws.amazon.com/freertos
|
||||
* https://www.FreeRTOS.org
|
||||
* https://github.com/FreeRTOS
|
||||
*
|
||||
* 1 tab == 4 spaces!
|
||||
*/
|
||||
|
@ -39,78 +39,79 @@
|
|||
*/
|
||||
|
||||
/* Type definitions. */
|
||||
#define portCHAR char
|
||||
#define portFLOAT float
|
||||
#define portDOUBLE double
|
||||
#define portLONG long
|
||||
#define portSHORT short
|
||||
#define portSTACK_TYPE uint32_t
|
||||
#define portBASE_TYPE long
|
||||
#define portCHAR char
|
||||
#define portFLOAT float
|
||||
#define portDOUBLE double
|
||||
#define portLONG long
|
||||
#define portSHORT short
|
||||
#define portSTACK_TYPE uint32_t
|
||||
#define portBASE_TYPE long
|
||||
|
||||
typedef portSTACK_TYPE StackType_t;
|
||||
typedef long BaseType_t;
|
||||
typedef unsigned long UBaseType_t;
|
||||
typedef portSTACK_TYPE StackType_t;
|
||||
typedef long BaseType_t;
|
||||
typedef unsigned long UBaseType_t;
|
||||
|
||||
#if ( configUSE_16_BIT_TICKS == 1 )
|
||||
typedef uint16_t TickType_t;
|
||||
#define portMAX_DELAY ( TickType_t ) 0xFFFF
|
||||
#if (configUSE_16_BIT_TICKS == 1)
|
||||
typedef uint16_t TickType_t;
|
||||
#define portMAX_DELAY (TickType_t) 0xFFFF
|
||||
#else
|
||||
typedef uint32_t TickType_t;
|
||||
#define portMAX_DELAY ( TickType_t ) 0xFFFFFFFFF
|
||||
typedef uint32_t TickType_t;
|
||||
#define portMAX_DELAY (TickType_t) 0xFFFFFFFFF
|
||||
|
||||
/* 32-bit tick type on a 32-bit architecture, so reads of the tick count do
|
||||
* not need to be guarded with a critical section. */
|
||||
#define portTICK_TYPE_IS_ATOMIC 1
|
||||
/* 32-bit tick type on a 32-bit architecture, so reads of the tick count do
|
||||
not need to be guarded with a critical section. */
|
||||
#define portTICK_TYPE_IS_ATOMIC 1
|
||||
#endif
|
||||
|
||||
|
||||
/* Architecture specifics. */
|
||||
#define portSTACK_GROWTH ( -1 )
|
||||
#define portTICK_PERIOD_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )
|
||||
#define portBYTE_ALIGNMENT 8
|
||||
#define portSTACK_GROWTH (-1)
|
||||
#define portTICK_PERIOD_MS ((TickType_t) 1000 / configTICK_RATE_HZ)
|
||||
#define portBYTE_ALIGNMENT 8
|
||||
|
||||
/* Critical section handling. */
|
||||
extern void vPortEnterCritical( void );
|
||||
extern void vPortExitCritical( void );
|
||||
#define portENTER_CRITICAL() vPortEnterCritical()
|
||||
#define portEXIT_CRITICAL() vPortExitCritical()
|
||||
#define portDISABLE_INTERRUPTS() asm ( " CPSID I" )
|
||||
#define portENABLE_INTERRUPTS() asm ( " CPSIE I" )
|
||||
extern void vPortEnterCritical(void);
|
||||
extern void vPortExitCritical(void);
|
||||
#define portENTER_CRITICAL() vPortEnterCritical()
|
||||
#define portEXIT_CRITICAL() vPortExitCritical()
|
||||
#define portDISABLE_INTERRUPTS() asm( " CPSID I" )
|
||||
#define portENABLE_INTERRUPTS() asm( " CPSIE I" )
|
||||
|
||||
/* Scheduler utilities. */
|
||||
#pragma SWI_ALIAS( vPortYield, 0 )
|
||||
extern void vPortYield( void );
|
||||
#define portYIELD() vPortYield()
|
||||
#define portSYS_SSIR1_REG ( *( ( volatile uint32_t * ) 0xFFFFFFB0 ) )
|
||||
#define portSYS_SSIR1_SSKEY ( 0x7500UL )
|
||||
#define portYIELD_WITHIN_API() { portSYS_SSIR1_REG = portSYS_SSIR1_SSKEY; asm ( " DSB " ); asm ( " ISB " ); }
|
||||
#define portYIELD_FROM_ISR( x ) if( x != pdFALSE ) { portSYS_SSIR1_REG = portSYS_SSIR1_SSKEY; ( void ) portSYS_SSIR1_REG; }
|
||||
#define portYIELD() vPortYield()
|
||||
#define portSYS_SSIR1_REG ( * ( ( volatile uint32_t * ) 0xFFFFFFB0 ) )
|
||||
#define portSYS_SSIR1_SSKEY ( 0x7500UL )
|
||||
#define portYIELD_WITHIN_API() { portSYS_SSIR1_REG = portSYS_SSIR1_SSKEY; asm( " DSB " ); asm( " ISB " ); }
|
||||
#define portYIELD_FROM_ISR( x ) if( x != pdFALSE ){ portSYS_SSIR1_REG = portSYS_SSIR1_SSKEY; ( void ) portSYS_SSIR1_REG; }
|
||||
|
||||
#ifndef configUSE_PORT_OPTIMISED_TASK_SELECTION
|
||||
#define configUSE_PORT_OPTIMISED_TASK_SELECTION 1
|
||||
#define configUSE_PORT_OPTIMISED_TASK_SELECTION 1
|
||||
#endif
|
||||
|
||||
/* Architecture specific optimisations. */
|
||||
#if configUSE_PORT_OPTIMISED_TASK_SELECTION == 1
|
||||
|
||||
/* Check the configuration. */
|
||||
#if ( configMAX_PRIORITIES > 32 )
|
||||
#error configUSE_PORT_OPTIMISED_TASK_SELECTION can only be set to 1 when configMAX_PRIORITIES is less than or equal to 32. It is very rare that a system requires more than 10 to 15 difference priorities as tasks that share a priority will time slice.
|
||||
#endif
|
||||
/* Check the configuration. */
|
||||
#if( configMAX_PRIORITIES > 32 )
|
||||
#error configUSE_PORT_OPTIMISED_TASK_SELECTION can only be set to 1 when configMAX_PRIORITIES is less than or equal to 32. It is very rare that a system requires more than 10 to 15 difference priorities as tasks that share a priority will time slice.
|
||||
#endif
|
||||
|
||||
/* Store/clear the ready priorities in a bit map. */
|
||||
#define portRECORD_READY_PRIORITY( uxPriority, uxReadyPriorities ) ( uxReadyPriorities ) |= ( 1UL << ( uxPriority ) )
|
||||
#define portRESET_READY_PRIORITY( uxPriority, uxReadyPriorities ) ( uxReadyPriorities ) &= ~( 1UL << ( uxPriority ) )
|
||||
/* Store/clear the ready priorities in a bit map. */
|
||||
#define portRECORD_READY_PRIORITY( uxPriority, uxReadyPriorities ) ( uxReadyPriorities ) |= ( 1UL << ( uxPriority ) )
|
||||
#define portRESET_READY_PRIORITY( uxPriority, uxReadyPriorities ) ( uxReadyPriorities ) &= ~( 1UL << ( uxPriority ) )
|
||||
|
||||
/*-----------------------------------------------------------*/
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
#define portGET_HIGHEST_PRIORITY( uxTopPriority, uxReadyPriorities ) uxTopPriority = ( 31 - __clz( ( uxReadyPriorities ) ) )
|
||||
#define portGET_HIGHEST_PRIORITY( uxTopPriority, uxReadyPriorities ) uxTopPriority = ( 31 - __clz( ( uxReadyPriorities ) ) )
|
||||
|
||||
#endif /* configUSE_PORT_OPTIMISED_TASK_SELECTION */
|
||||
|
||||
|
||||
/* Task function macros as described on the FreeRTOS.org WEB site. */
|
||||
#define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void * pvParameters )
|
||||
#define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void * pvParameters )
|
||||
#define portTASK_FUNCTION(vFunction, pvParameters) void vFunction(void *pvParameters)
|
||||
#define portTASK_FUNCTION_PROTO(vFunction, pvParameters) void vFunction(void *pvParameters)
|
||||
|
||||
#endif /* __PORTMACRO_H__ */
|
||||
|
||||
|
|
|
@ -1,48 +1,53 @@
|
|||
; /*
|
||||
* ; * FreeRTOS Kernel V10.3.1
|
||||
* ; * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
|
||||
* ; *
|
||||
* ; * Permission is hereby granted, free of charge, to any person obtaining a copy of
|
||||
* ; * this software and associated documentation files (the "Software"), to deal in
|
||||
* ; * the Software without restriction, including without limitation the rights to
|
||||
* ; * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
|
||||
* ; * the Software, and to permit persons to whom the Software is furnished to do so,
|
||||
* ; * subject to the following conditions:
|
||||
* ; *
|
||||
* ; * The above copyright notice and this permission notice shall be included in all
|
||||
* ; * copies or substantial portions of the Software.
|
||||
* ; *
|
||||
* ; * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* ; * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
|
||||
* ; * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
|
||||
* ; * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
|
||||
* ; * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
* ; * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
* ; *
|
||||
* ; * http://www.FreeRTOS.org
|
||||
* ; * http://aws.amazon.com/freertos
|
||||
* ; *
|
||||
* ; * 1 tab == 4 spaces!
|
||||
* ; */
|
||||
;/*
|
||||
; * FreeRTOS Kernel V10.3.1
|
||||
; * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
|
||||
; *
|
||||
; * Permission is hereby granted, free of charge, to any person obtaining a copy of
|
||||
; * this software and associated documentation files (the "Software"), to deal in
|
||||
; * the Software without restriction, including without limitation the rights to
|
||||
; * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
|
||||
; * the Software, and to permit persons to whom the Software is furnished to do so,
|
||||
; * subject to the following conditions:
|
||||
; *
|
||||
; * The above copyright notice and this permission notice shall be included in all
|
||||
; * copies or substantial portions of the Software.
|
||||
; *
|
||||
; * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
; * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
|
||||
; * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
|
||||
; * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
|
||||
; * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
; * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
; *
|
||||
; * https://www.FreeRTOS.org
|
||||
; * https://github.com/FreeRTOS
|
||||
; *
|
||||
; * 1 tab == 4 spaces!
|
||||
; */
|
||||
|
||||
.if $DEFINED( __LARGE_DATA_MODEL__ )
|
||||
.define "pushm.a", pushm_x
|
||||
.define "popm.a", popm_x
|
||||
.define "push.a", push_x
|
||||
.define "pop.a", pop_x
|
||||
.define "mov.a", mov_x
|
||||
.else
|
||||
.define "pushm.w", pushm_x
|
||||
.define "popm.w", popm_x
|
||||
.define "push.w", push_x
|
||||
.define "pop.w", pop_x
|
||||
.define "mov.w", mov_x
|
||||
.endif
|
||||
|
||||
.if $DEFINED( __LARGE_CODE_MODEL__ )
|
||||
.define "calla", call_x
|
||||
.define "reta", ret_x
|
||||
.else
|
||||
.define "call", call_x
|
||||
.define "ret", ret_x
|
||||
.endif
|
||||
|
||||
|
||||
|
||||
|
||||
.if $DEFINED( __LARGE_DATA_MODEL__ )
|
||||
.define "pushm.a", pushm_x
|
||||
.define "popm.a", popm_x
|
||||
.define "push.a", push_x
|
||||
.define "pop.a", pop_x
|
||||
.define "mov.a", mov_x
|
||||
.else
|
||||
.define "pushm.w", pushm_x
|
||||
.define "popm.w", popm_x
|
||||
.define "push.w", push_x
|
||||
.define "pop.w", pop_x
|
||||
.define "mov.w", mov_x
|
||||
.endif
|
||||
|
||||
.if $DEFINED( __LARGE_CODE_MODEL__ )
|
||||
.define "calla", call_x
|
||||
.define "reta", ret_x
|
||||
.else
|
||||
.define "call", call_x
|
||||
.define "ret", ret_x
|
||||
.endif
|
||||
|
|
|
@ -19,8 +19,8 @@
|
|||
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
* http://www.FreeRTOS.org
|
||||
* http://aws.amazon.com/freertos
|
||||
* https://www.FreeRTOS.org
|
||||
* https://github.com/FreeRTOS
|
||||
*
|
||||
* 1 tab == 4 spaces!
|
||||
*/
|
||||
|
@ -30,28 +30,28 @@
|
|||
#include "task.h"
|
||||
|
||||
/*-----------------------------------------------------------
|
||||
* Implementation of functions defined in portable.h for the MSP430X port.
|
||||
*----------------------------------------------------------*/
|
||||
* Implementation of functions defined in portable.h for the MSP430X port.
|
||||
*----------------------------------------------------------*/
|
||||
|
||||
/* Constants required for hardware setup. The tick ISR runs off the ACLK,
|
||||
* not the MCLK. */
|
||||
#define portACLK_FREQUENCY_HZ ( ( TickType_t ) 32768 )
|
||||
#define portINITIAL_CRITICAL_NESTING ( ( uint16_t ) 10 )
|
||||
#define portFLAGS_INT_ENABLED ( ( StackType_t ) 0x08 )
|
||||
not the MCLK. */
|
||||
#define portACLK_FREQUENCY_HZ ( ( TickType_t ) 32768 )
|
||||
#define portINITIAL_CRITICAL_NESTING ( ( uint16_t ) 10 )
|
||||
#define portFLAGS_INT_ENABLED ( ( StackType_t ) 0x08 )
|
||||
|
||||
/* We require the address of the pxCurrentTCB variable, but don't want to know
|
||||
* any details of its type. */
|
||||
any details of its type. */
|
||||
typedef void TCB_t;
|
||||
extern volatile TCB_t * volatile pxCurrentTCB;
|
||||
|
||||
/* Each task maintains a count of the critical section nesting depth. Each
|
||||
* time a critical section is entered the count is incremented. Each time a
|
||||
* critical section is exited the count is decremented - with interrupts only
|
||||
* being re-enabled if the count is zero.
|
||||
*
|
||||
* usCriticalNesting will get set to zero when the scheduler starts, but must
|
||||
* not be initialised to zero as this will cause problems during the startup
|
||||
* sequence. */
|
||||
time a critical section is entered the count is incremented. Each time a
|
||||
critical section is exited the count is decremented - with interrupts only
|
||||
being re-enabled if the count is zero.
|
||||
|
||||
usCriticalNesting will get set to zero when the scheduler starts, but must
|
||||
not be initialised to zero as this will cause problems during the startup
|
||||
sequence. */
|
||||
volatile uint16_t usCriticalNesting = portINITIAL_CRITICAL_NESTING;
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
|
@ -69,96 +69,94 @@ void vPortSetupTimerInterrupt( void );
|
|||
*
|
||||
* See the header file portable.h.
|
||||
*/
|
||||
StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
|
||||
TaskFunction_t pxCode,
|
||||
void * pvParameters )
|
||||
StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters )
|
||||
{
|
||||
uint16_t * pusTopOfStack;
|
||||
uint32_t * pulTopOfStack, ulTemp;
|
||||
uint16_t *pusTopOfStack;
|
||||
uint32_t *pulTopOfStack, ulTemp;
|
||||
|
||||
/*
|
||||
* Place a few bytes of known values on the bottom of the stack.
|
||||
* This is just useful for debugging and can be included if required.
|
||||
*
|
||||
* pxTopOfStack = ( StackType_t ) 0x1111;
|
||||
* pxTopOfStack--;
|
||||
* pxTopOfStack = ( StackType_t ) 0x2222;
|
||||
* pxTopOfStack--;
|
||||
* pxTopOfStack = ( StackType_t ) 0x3333;
|
||||
* pxTopOfStack--;
|
||||
*/
|
||||
/*
|
||||
Place a few bytes of known values on the bottom of the stack.
|
||||
This is just useful for debugging and can be included if required.
|
||||
|
||||
/* Data types are need either 16 bits or 32 bits depending on the data
|
||||
* and code model used. */
|
||||
if( sizeof( pxCode ) == sizeof( uint16_t ) )
|
||||
{
|
||||
pusTopOfStack = ( uint16_t * ) pxTopOfStack;
|
||||
ulTemp = ( uint32_t ) pxCode;
|
||||
*pusTopOfStack = ( uint16_t ) ulTemp;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Make room for a 20 bit value stored as a 32 bit value. */
|
||||
pusTopOfStack = ( uint16_t * ) pxTopOfStack;
|
||||
pusTopOfStack--;
|
||||
pulTopOfStack = ( uint32_t * ) pusTopOfStack;
|
||||
*pulTopOfStack = ( uint32_t ) pxCode;
|
||||
}
|
||||
*pxTopOfStack = ( StackType_t ) 0x1111;
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( StackType_t ) 0x2222;
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( StackType_t ) 0x3333;
|
||||
pxTopOfStack--;
|
||||
*/
|
||||
|
||||
pusTopOfStack--;
|
||||
*pusTopOfStack = portFLAGS_INT_ENABLED;
|
||||
pusTopOfStack -= ( sizeof( StackType_t ) / 2 );
|
||||
/* Data types are need either 16 bits or 32 bits depending on the data
|
||||
and code model used. */
|
||||
if( sizeof( pxCode ) == sizeof( uint16_t ) )
|
||||
{
|
||||
pusTopOfStack = ( uint16_t * ) pxTopOfStack;
|
||||
ulTemp = ( uint32_t ) pxCode;
|
||||
*pusTopOfStack = ( uint16_t ) ulTemp;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Make room for a 20 bit value stored as a 32 bit value. */
|
||||
pusTopOfStack = ( uint16_t * ) pxTopOfStack;
|
||||
pusTopOfStack--;
|
||||
pulTopOfStack = ( uint32_t * ) pusTopOfStack;
|
||||
*pulTopOfStack = ( uint32_t ) pxCode;
|
||||
}
|
||||
|
||||
/* From here on the size of stacked items depends on the memory model. */
|
||||
pxTopOfStack = ( StackType_t * ) pusTopOfStack;
|
||||
pusTopOfStack--;
|
||||
*pusTopOfStack = portFLAGS_INT_ENABLED;
|
||||
pusTopOfStack -= ( sizeof( StackType_t ) / 2 );
|
||||
|
||||
/* From here on the size of stacked items depends on the memory model. */
|
||||
pxTopOfStack = ( StackType_t * ) pusTopOfStack;
|
||||
|
||||
/* Next the general purpose registers. */
|
||||
#ifdef PRELOAD_REGISTER_VALUES
|
||||
*pxTopOfStack = ( StackType_t ) 0xffff;
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( StackType_t ) 0xeeee;
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( StackType_t ) 0xdddd;
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( StackType_t ) pvParameters;
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( StackType_t ) 0xbbbb;
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( StackType_t ) 0xaaaa;
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( StackType_t ) 0x9999;
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( StackType_t ) 0x8888;
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( StackType_t ) 0x5555;
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( StackType_t ) 0x6666;
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( StackType_t ) 0x5555;
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( StackType_t ) 0x4444;
|
||||
pxTopOfStack--;
|
||||
#else /* ifdef PRELOAD_REGISTER_VALUES */
|
||||
pxTopOfStack -= 3;
|
||||
*pxTopOfStack = ( StackType_t ) pvParameters;
|
||||
pxTopOfStack -= 9;
|
||||
#endif /* ifdef PRELOAD_REGISTER_VALUES */
|
||||
/* Next the general purpose registers. */
|
||||
#ifdef PRELOAD_REGISTER_VALUES
|
||||
*pxTopOfStack = ( StackType_t ) 0xffff;
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( StackType_t ) 0xeeee;
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( StackType_t ) 0xdddd;
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( StackType_t ) pvParameters;
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( StackType_t ) 0xbbbb;
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( StackType_t ) 0xaaaa;
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( StackType_t ) 0x9999;
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( StackType_t ) 0x8888;
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( StackType_t ) 0x5555;
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( StackType_t ) 0x6666;
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( StackType_t ) 0x5555;
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( StackType_t ) 0x4444;
|
||||
pxTopOfStack--;
|
||||
#else
|
||||
pxTopOfStack -= 3;
|
||||
*pxTopOfStack = ( StackType_t ) pvParameters;
|
||||
pxTopOfStack -= 9;
|
||||
#endif
|
||||
|
||||
/* A variable is used to keep track of the critical section nesting.
|
||||
* This variable has to be stored as part of the task context and is
|
||||
* initially set to zero. */
|
||||
*pxTopOfStack = ( StackType_t ) portNO_CRITICAL_SECTION_NESTING;
|
||||
/* A variable is used to keep track of the critical section nesting.
|
||||
This variable has to be stored as part of the task context and is
|
||||
initially set to zero. */
|
||||
*pxTopOfStack = ( StackType_t ) portNO_CRITICAL_SECTION_NESTING;
|
||||
|
||||
/* Return a pointer to the top of the stack we have generated so this can
|
||||
* be stored in the task control block for the task. */
|
||||
return pxTopOfStack;
|
||||
/* Return a pointer to the top of the stack we have generated so this can
|
||||
be stored in the task control block for the task. */
|
||||
return pxTopOfStack;
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
void vPortEndScheduler( void )
|
||||
{
|
||||
/* It is unlikely that the MSP430 port will get stopped. If required simply
|
||||
* disable the tick interrupt here. */
|
||||
/* It is unlikely that the MSP430 port will get stopped. If required simply
|
||||
disable the tick interrupt here. */
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
|
@ -167,21 +165,23 @@ void vPortEndScheduler( void )
|
|||
*/
|
||||
void vPortSetupTimerInterrupt( void )
|
||||
{
|
||||
vApplicationSetupTimerInterrupt();
|
||||
vApplicationSetupTimerInterrupt();
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
#pragma vector=configTICK_VECTOR
|
||||
interrupt void vTickISREntry( void )
|
||||
{
|
||||
extern void vPortTickISR( void );
|
||||
extern void vPortTickISR( void );
|
||||
|
||||
__bic_SR_register_on_exit( SCG1 + SCG0 + OSCOFF + CPUOFF );
|
||||
#if configUSE_PREEMPTION == 1
|
||||
extern void vPortPreemptiveTickISR( void );
|
||||
vPortPreemptiveTickISR();
|
||||
#else
|
||||
extern void vPortCooperativeTickISR( void );
|
||||
vPortCooperativeTickISR();
|
||||
#endif
|
||||
__bic_SR_register_on_exit( SCG1 + SCG0 + OSCOFF + CPUOFF );
|
||||
#if configUSE_PREEMPTION == 1
|
||||
extern void vPortPreemptiveTickISR( void );
|
||||
vPortPreemptiveTickISR();
|
||||
#else
|
||||
extern void vPortCooperativeTickISR( void );
|
||||
vPortCooperativeTickISR();
|
||||
#endif
|
||||
}
|
||||
|
||||
|
||||
|
|
|
@ -19,8 +19,8 @@
|
|||
; * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
; * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
; *
|
||||
; * http://www.FreeRTOS.org
|
||||
; * http://aws.amazon.com/freertos
|
||||
; * https://www.FreeRTOS.org
|
||||
; * https://github.com/FreeRTOS
|
||||
; *
|
||||
; * 1 tab == 4 spaces!
|
||||
; */
|
||||
|
|
|
@ -19,8 +19,8 @@
|
|||
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
* http://www.FreeRTOS.org
|
||||
* http://aws.amazon.com/freertos
|
||||
* https://www.FreeRTOS.org
|
||||
* https://github.com/FreeRTOS
|
||||
*
|
||||
* 1 tab == 4 spaces!
|
||||
*/
|
||||
|
@ -42,72 +42,72 @@
|
|||
#include "msp430.h"
|
||||
|
||||
/* Type definitions. */
|
||||
#define portCHAR char
|
||||
#define portFLOAT float
|
||||
#define portDOUBLE double
|
||||
#define portLONG long
|
||||
#define portSHORT int
|
||||
#define portBASE_TYPE portSHORT
|
||||
#define portCHAR char
|
||||
#define portFLOAT float
|
||||
#define portDOUBLE double
|
||||
#define portLONG long
|
||||
#define portSHORT int
|
||||
#define portBASE_TYPE portSHORT
|
||||
|
||||
/* The stack type changes depending on the data model. */
|
||||
#ifdef __LARGE_DATA_MODEL__
|
||||
#define portSTACK_TYPE uint32_t
|
||||
#define portSTACK_TYPE uint32_t
|
||||
#else
|
||||
#define portSTACK_TYPE uint16_t
|
||||
#define portPOINTER_SIZE_TYPE uint16_t
|
||||
#define portSTACK_TYPE uint16_t
|
||||
#define portPOINTER_SIZE_TYPE uint16_t
|
||||
#endif
|
||||
|
||||
typedef portSTACK_TYPE StackType_t;
|
||||
typedef short BaseType_t;
|
||||
typedef unsigned short UBaseType_t;
|
||||
typedef portSTACK_TYPE StackType_t;
|
||||
typedef short BaseType_t;
|
||||
typedef unsigned short UBaseType_t;
|
||||
|
||||
#if ( configUSE_16_BIT_TICKS == 1 )
|
||||
typedef uint16_t TickType_t;
|
||||
#define portMAX_DELAY ( TickType_t ) 0xffff
|
||||
#if( configUSE_16_BIT_TICKS == 1 )
|
||||
typedef uint16_t TickType_t;
|
||||
#define portMAX_DELAY ( TickType_t ) 0xffff
|
||||
#else
|
||||
typedef uint32_t TickType_t;
|
||||
#define portMAX_DELAY ( TickType_t ) 0xffffffffUL
|
||||
typedef uint32_t TickType_t;
|
||||
#define portMAX_DELAY ( TickType_t ) 0xffffffffUL
|
||||
#endif
|
||||
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* Interrupt control macros. */
|
||||
#define portDISABLE_INTERRUPTS() _disable_interrupt(); _nop()
|
||||
#define portENABLE_INTERRUPTS() _enable_interrupt(); _nop()
|
||||
#define portDISABLE_INTERRUPTS() _disable_interrupt(); _nop()
|
||||
#define portENABLE_INTERRUPTS() _enable_interrupt(); _nop()
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* Critical section control macros. */
|
||||
#define portNO_CRITICAL_SECTION_NESTING ( ( uint16_t ) 0 )
|
||||
#define portNO_CRITICAL_SECTION_NESTING ( ( uint16_t ) 0 )
|
||||
|
||||
#define portENTER_CRITICAL() \
|
||||
{ \
|
||||
extern volatile uint16_t usCriticalNesting; \
|
||||
\
|
||||
portDISABLE_INTERRUPTS(); \
|
||||
\
|
||||
/* Now interrupts are disabled usCriticalNesting can be accessed */ \
|
||||
/* directly. Increment ulCriticalNesting to keep a count of how many */ \
|
||||
/* times portENTER_CRITICAL() has been called. */ \
|
||||
usCriticalNesting++; \
|
||||
}
|
||||
#define portENTER_CRITICAL() \
|
||||
{ \
|
||||
extern volatile uint16_t usCriticalNesting; \
|
||||
\
|
||||
portDISABLE_INTERRUPTS(); \
|
||||
\
|
||||
/* Now interrupts are disabled usCriticalNesting can be accessed */ \
|
||||
/* directly. Increment ulCriticalNesting to keep a count of how many */ \
|
||||
/* times portENTER_CRITICAL() has been called. */ \
|
||||
usCriticalNesting++; \
|
||||
}
|
||||
|
||||
#define portEXIT_CRITICAL() \
|
||||
{ \
|
||||
extern volatile uint16_t usCriticalNesting; \
|
||||
\
|
||||
if( usCriticalNesting > portNO_CRITICAL_SECTION_NESTING ) \
|
||||
{ \
|
||||
/* Decrement the nesting count as we are leaving a critical section. */ \
|
||||
usCriticalNesting--; \
|
||||
\
|
||||
/* If the nesting level has reached zero then interrupts should be */ \
|
||||
/* re-enabled. */ \
|
||||
if( usCriticalNesting == portNO_CRITICAL_SECTION_NESTING ) \
|
||||
{ \
|
||||
portENABLE_INTERRUPTS(); \
|
||||
} \
|
||||
} \
|
||||
}
|
||||
#define portEXIT_CRITICAL() \
|
||||
{ \
|
||||
extern volatile uint16_t usCriticalNesting; \
|
||||
\
|
||||
if( usCriticalNesting > portNO_CRITICAL_SECTION_NESTING ) \
|
||||
{ \
|
||||
/* Decrement the nesting count as we are leaving a critical section. */ \
|
||||
usCriticalNesting--; \
|
||||
\
|
||||
/* If the nesting level has reached zero then interrupts should be */ \
|
||||
/* re-enabled. */ \
|
||||
if( usCriticalNesting == portNO_CRITICAL_SECTION_NESTING ) \
|
||||
{ \
|
||||
portENABLE_INTERRUPTS(); \
|
||||
} \
|
||||
} \
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* Task utilities. */
|
||||
|
@ -116,27 +116,28 @@ typedef unsigned short UBaseType_t;
|
|||
* Manual context switch called by portYIELD or taskYIELD.
|
||||
*/
|
||||
extern void vPortYield( void );
|
||||
#define portYIELD() vPortYield()
|
||||
#define portYIELD() vPortYield()
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* Hardware specifics. */
|
||||
#define portBYTE_ALIGNMENT 2
|
||||
#define portSTACK_GROWTH ( -1 )
|
||||
#define portTICK_PERIOD_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )
|
||||
#define portNOP() __no_operation()
|
||||
#define portBYTE_ALIGNMENT 2
|
||||
#define portSTACK_GROWTH ( -1 )
|
||||
#define portTICK_PERIOD_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )
|
||||
#define portNOP() __no_operation()
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* Task function macros as described on the FreeRTOS.org WEB site. */
|
||||
#define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void * pvParameters )
|
||||
#define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void * pvParameters )
|
||||
#define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void *pvParameters )
|
||||
#define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void *pvParameters )
|
||||
|
||||
extern void vTaskSwitchContext( void );
|
||||
#define portYIELD_FROM_ISR( x ) if( x ) vPortYield()
|
||||
#define portYIELD_FROM_ISR( x ) if( x ) vPortYield()
|
||||
|
||||
void vApplicationSetupTimerInterrupt( void );
|
||||
|
||||
/* sizeof( int ) != sizeof( long ) so a full printf() library is required if
|
||||
* run time stats information is to be displayed. */
|
||||
run time stats information is to be displayed. */
|
||||
#define portLU_PRINTF_SPECIFIER_REQUIRED
|
||||
|
||||
#endif /* PORTMACRO_H */
|
||||
|
||||
|
|
|
@ -19,8 +19,8 @@
|
|||
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
* http://www.FreeRTOS.org
|
||||
* http://aws.amazon.com/freertos
|
||||
* https://www.FreeRTOS.org
|
||||
* https://github.com/FreeRTOS
|
||||
*
|
||||
* 1 tab == 4 spaces!
|
||||
*/
|
||||
|
@ -30,158 +30,154 @@
|
|||
#include "task.h"
|
||||
|
||||
|
||||
#define portINITIAL_FORMAT_VECTOR ( ( StackType_t ) 0x4000 )
|
||||
#define portINITIAL_FORMAT_VECTOR ( ( StackType_t ) 0x4000 )
|
||||
|
||||
/* Supervisor mode set. */
|
||||
#define portINITIAL_STATUS_REGISTER ( ( StackType_t ) 0x2000 )
|
||||
#define portINITIAL_STATUS_REGISTER ( ( StackType_t ) 0x2000)
|
||||
|
||||
/* The clock prescale into the timer peripheral. */
|
||||
#define portPRESCALE_VALUE ( ( uint8_t ) 10 )
|
||||
#define portPRESCALE_VALUE ( ( uint8_t ) 10 )
|
||||
|
||||
/* The clock frequency into the RTC. */
|
||||
#define portRTC_CLOCK_HZ ( ( uint32_t ) 1000 )
|
||||
#define portRTC_CLOCK_HZ ( ( uint32_t ) 1000 )
|
||||
|
||||
asm void interrupt VectorNumber_VL1swi vPortYieldISR( void );
|
||||
static void prvSetupTimerInterrupt( void );
|
||||
|
||||
/* Used to keep track of the number of nested calls to taskENTER_CRITICAL(). This
|
||||
* will be set to 0 prior to the first task being started. */
|
||||
will be set to 0 prior to the first task being started. */
|
||||
static uint32_t ulCriticalNesting = 0x9999UL;
|
||||
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
|
||||
TaskFunction_t pxCode,
|
||||
void * pvParameters )
|
||||
StackType_t *pxPortInitialiseStack( StackType_t * pxTopOfStack, TaskFunction_t pxCode, void *pvParameters )
|
||||
{
|
||||
uint32_t ulOriginalA5;
|
||||
|
||||
__asm {
|
||||
MOVE.L A5, ulOriginalA5
|
||||
};
|
||||
uint32_t ulOriginalA5;
|
||||
|
||||
__asm{ MOVE.L A5, ulOriginalA5 };
|
||||
|
||||
|
||||
*pxTopOfStack = ( StackType_t ) 0xDEADBEEF;
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = (StackType_t) 0xDEADBEEF;
|
||||
pxTopOfStack--;
|
||||
|
||||
/* Exception stack frame starts with the return address. */
|
||||
*pxTopOfStack = ( StackType_t ) pxCode;
|
||||
pxTopOfStack--;
|
||||
/* Exception stack frame starts with the return address. */
|
||||
*pxTopOfStack = ( StackType_t ) pxCode;
|
||||
pxTopOfStack--;
|
||||
|
||||
*pxTopOfStack = ( portINITIAL_FORMAT_VECTOR << 16UL ) | ( portINITIAL_STATUS_REGISTER );
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( portINITIAL_FORMAT_VECTOR << 16UL ) | ( portINITIAL_STATUS_REGISTER );
|
||||
pxTopOfStack--;
|
||||
|
||||
*pxTopOfStack = ( StackType_t ) 0x0; /*FP*/
|
||||
pxTopOfStack -= 14; /* A5 to D0. */
|
||||
*pxTopOfStack = ( StackType_t ) 0x0; /*FP*/
|
||||
pxTopOfStack -= 14; /* A5 to D0. */
|
||||
|
||||
/* Parameter in A0. */
|
||||
*( pxTopOfStack + 8 ) = ( StackType_t ) pvParameters;
|
||||
/* Parameter in A0. */
|
||||
*( pxTopOfStack + 8 ) = ( StackType_t ) pvParameters;
|
||||
|
||||
/* A5 must be maintained as it is resurved by the compiler. */
|
||||
*( pxTopOfStack + 13 ) = ulOriginalA5;
|
||||
/* A5 must be maintained as it is resurved by the compiler. */
|
||||
*( pxTopOfStack + 13 ) = ulOriginalA5;
|
||||
|
||||
return pxTopOfStack;
|
||||
return pxTopOfStack;
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
BaseType_t xPortStartScheduler( void )
|
||||
{
|
||||
extern void vPortStartFirstTask( void );
|
||||
extern void vPortStartFirstTask( void );
|
||||
|
||||
ulCriticalNesting = 0UL;
|
||||
ulCriticalNesting = 0UL;
|
||||
|
||||
/* Configure a timer to generate the tick interrupt. */
|
||||
prvSetupTimerInterrupt();
|
||||
/* Configure a timer to generate the tick interrupt. */
|
||||
prvSetupTimerInterrupt();
|
||||
|
||||
/* Start the first task executing. */
|
||||
vPortStartFirstTask();
|
||||
/* Start the first task executing. */
|
||||
vPortStartFirstTask();
|
||||
|
||||
return pdFALSE;
|
||||
return pdFALSE;
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
static void prvSetupTimerInterrupt( void )
|
||||
{
|
||||
/* Prescale by 1 - ie no prescale. */
|
||||
RTCSC |= 8;
|
||||
|
||||
/* Compare match value. */
|
||||
RTCMOD = portRTC_CLOCK_HZ / configTICK_RATE_HZ;
|
||||
|
||||
/* Enable the RTC to generate interrupts - interrupts are already disabled
|
||||
* when this code executes. */
|
||||
RTCSC_RTIE = 1;
|
||||
{
|
||||
/* Prescale by 1 - ie no prescale. */
|
||||
RTCSC |= 8;
|
||||
|
||||
/* Compare match value. */
|
||||
RTCMOD = portRTC_CLOCK_HZ / configTICK_RATE_HZ;
|
||||
|
||||
/* Enable the RTC to generate interrupts - interrupts are already disabled
|
||||
when this code executes. */
|
||||
RTCSC_RTIE = 1;
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
void vPortEndScheduler( void )
|
||||
{
|
||||
/* Not implemented as there is nothing to return to. */
|
||||
/* Not implemented as there is nothing to return to. */
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
void vPortEnterCritical( void )
|
||||
{
|
||||
if( ulCriticalNesting == 0UL )
|
||||
{
|
||||
/* Guard against context switches being pended simultaneously with a
|
||||
* critical section being entered. */
|
||||
do
|
||||
{
|
||||
portDISABLE_INTERRUPTS();
|
||||
if( ulCriticalNesting == 0UL )
|
||||
{
|
||||
/* Guard against context switches being pended simultaneously with a
|
||||
critical section being entered. */
|
||||
do
|
||||
{
|
||||
portDISABLE_INTERRUPTS();
|
||||
if( INTC_FRC == 0UL )
|
||||
{
|
||||
break;
|
||||
}
|
||||
|
||||
if( INTC_FRC == 0UL )
|
||||
{
|
||||
break;
|
||||
}
|
||||
portENABLE_INTERRUPTS();
|
||||
|
||||
portENABLE_INTERRUPTS();
|
||||
} while( 1 );
|
||||
}
|
||||
|
||||
ulCriticalNesting++;
|
||||
} while( 1 );
|
||||
}
|
||||
ulCriticalNesting++;
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
void vPortExitCritical( void )
|
||||
{
|
||||
ulCriticalNesting--;
|
||||
|
||||
if( ulCriticalNesting == 0 )
|
||||
{
|
||||
portENABLE_INTERRUPTS();
|
||||
}
|
||||
ulCriticalNesting--;
|
||||
if( ulCriticalNesting == 0 )
|
||||
{
|
||||
portENABLE_INTERRUPTS();
|
||||
}
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
void vPortYieldHandler( void )
|
||||
{
|
||||
uint32_t ulSavedInterruptMask;
|
||||
uint32_t ulSavedInterruptMask;
|
||||
|
||||
ulSavedInterruptMask = portSET_INTERRUPT_MASK_FROM_ISR();
|
||||
{
|
||||
/* Note this will clear all forced interrupts - this is done for speed. */
|
||||
INTC_CFRC = 0x3E;
|
||||
vTaskSwitchContext();
|
||||
}
|
||||
portCLEAR_INTERRUPT_MASK_FROM_ISR( ulSavedInterruptMask );
|
||||
ulSavedInterruptMask = portSET_INTERRUPT_MASK_FROM_ISR();
|
||||
{
|
||||
/* Note this will clear all forced interrupts - this is done for speed. */
|
||||
INTC_CFRC = 0x3E;
|
||||
vTaskSwitchContext();
|
||||
}
|
||||
portCLEAR_INTERRUPT_MASK_FROM_ISR( ulSavedInterruptMask );
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
void interrupt VectorNumber_Vrtc vPortTickISR( void )
|
||||
{
|
||||
uint32_t ulSavedInterruptMask;
|
||||
uint32_t ulSavedInterruptMask;
|
||||
|
||||
/* Clear the interrupt. */
|
||||
RTCSC |= RTCSC_RTIF_MASK;
|
||||
/* Clear the interrupt. */
|
||||
RTCSC |= RTCSC_RTIF_MASK;
|
||||
|
||||
/* Increment the RTOS tick. */
|
||||
ulSavedInterruptMask = portSET_INTERRUPT_MASK_FROM_ISR();
|
||||
{
|
||||
if( xTaskIncrementTick() != pdFALSE )
|
||||
{
|
||||
taskYIELD();
|
||||
}
|
||||
}
|
||||
portCLEAR_INTERRUPT_MASK_FROM_ISR( ulSavedInterruptMask );
|
||||
/* Increment the RTOS tick. */
|
||||
ulSavedInterruptMask = portSET_INTERRUPT_MASK_FROM_ISR();
|
||||
{
|
||||
if( xTaskIncrementTick() != pdFALSE )
|
||||
{
|
||||
taskYIELD();
|
||||
}
|
||||
}
|
||||
portCLEAR_INTERRUPT_MASK_FROM_ISR( ulSavedInterruptMask );
|
||||
}
|
||||
|
||||
|
|
|
@ -19,8 +19,8 @@
|
|||
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
* http://www.FreeRTOS.org
|
||||
* http://aws.amazon.com/freertos
|
||||
* https://www.FreeRTOS.org
|
||||
* https://github.com/FreeRTOS
|
||||
*
|
||||
* 1 tab == 4 spaces!
|
||||
*/
|
||||
|
|
|
@ -19,18 +19,18 @@
|
|||
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
* http://www.FreeRTOS.org
|
||||
* http://aws.amazon.com/freertos
|
||||
* https://www.FreeRTOS.org
|
||||
* https://github.com/FreeRTOS
|
||||
*
|
||||
* 1 tab == 4 spaces!
|
||||
*/
|
||||
|
||||
#ifndef PORTMACRO_H
|
||||
#define PORTMACRO_H
|
||||
#define PORTMACRO_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/*-----------------------------------------------------------
|
||||
* Port specific definitions.
|
||||
|
@ -43,73 +43,73 @@
|
|||
*/
|
||||
|
||||
/* Type definitions. */
|
||||
#define portCHAR char
|
||||
#define portFLOAT float
|
||||
#define portDOUBLE double
|
||||
#define portLONG long
|
||||
#define portSHORT short
|
||||
#define portSTACK_TYPE uint32_t
|
||||
#define portBASE_TYPE long
|
||||
#define portCHAR char
|
||||
#define portFLOAT float
|
||||
#define portDOUBLE double
|
||||
#define portLONG long
|
||||
#define portSHORT short
|
||||
#define portSTACK_TYPE uint32_t
|
||||
#define portBASE_TYPE long
|
||||
|
||||
typedef portSTACK_TYPE StackType_t;
|
||||
typedef long BaseType_t;
|
||||
typedef unsigned long UBaseType_t;
|
||||
typedef portSTACK_TYPE StackType_t;
|
||||
typedef long BaseType_t;
|
||||
typedef unsigned long UBaseType_t;
|
||||
|
||||
|
||||
#if ( configUSE_16_BIT_TICKS == 1 )
|
||||
typedef uint16_t TickType_t;
|
||||
#define portMAX_DELAY ( TickType_t ) 0xffff
|
||||
#else
|
||||
typedef uint32_t TickType_t;
|
||||
#define portMAX_DELAY ( TickType_t ) 0xffffffffUL
|
||||
#endif
|
||||
#if( configUSE_16_BIT_TICKS == 1 )
|
||||
typedef uint16_t TickType_t;
|
||||
#define portMAX_DELAY ( TickType_t ) 0xffff
|
||||
#else
|
||||
typedef uint32_t TickType_t;
|
||||
#define portMAX_DELAY ( TickType_t ) 0xffffffffUL
|
||||
#endif
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* Hardware specifics. */
|
||||
#define portBYTE_ALIGNMENT 4
|
||||
#define portSTACK_GROWTH -1
|
||||
#define portTICK_PERIOD_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )
|
||||
#define portBYTE_ALIGNMENT 4
|
||||
#define portSTACK_GROWTH -1
|
||||
#define portTICK_PERIOD_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
uint32_t ulPortSetIPL( uint32_t );
|
||||
#define portDISABLE_INTERRUPTS() ulPortSetIPL( configMAX_SYSCALL_INTERRUPT_PRIORITY )
|
||||
#define portENABLE_INTERRUPTS() ulPortSetIPL( 0 )
|
||||
uint32_t ulPortSetIPL( uint32_t );
|
||||
#define portDISABLE_INTERRUPTS() ulPortSetIPL( configMAX_SYSCALL_INTERRUPT_PRIORITY )
|
||||
#define portENABLE_INTERRUPTS() ulPortSetIPL( 0 )
|
||||
|
||||
|
||||
extern void vPortEnterCritical( void );
|
||||
extern void vPortExitCritical( void );
|
||||
#define portENTER_CRITICAL() vPortEnterCritical()
|
||||
#define portEXIT_CRITICAL() vPortExitCritical()
|
||||
extern void vPortEnterCritical( void );
|
||||
extern void vPortExitCritical( void );
|
||||
#define portENTER_CRITICAL() vPortEnterCritical()
|
||||
#define portEXIT_CRITICAL() vPortExitCritical()
|
||||
|
||||
extern UBaseType_t uxPortSetInterruptMaskFromISR( void );
|
||||
extern void vPortClearInterruptMaskFromISR( UBaseType_t );
|
||||
#define portSET_INTERRUPT_MASK_FROM_ISR() ulPortSetIPL( configMAX_SYSCALL_INTERRUPT_PRIORITY )
|
||||
#define portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedStatusRegister ) ulPortSetIPL( uxSavedStatusRegister )
|
||||
extern UBaseType_t uxPortSetInterruptMaskFromISR( void );
|
||||
extern void vPortClearInterruptMaskFromISR( UBaseType_t );
|
||||
#define portSET_INTERRUPT_MASK_FROM_ISR() ulPortSetIPL( configMAX_SYSCALL_INTERRUPT_PRIORITY )
|
||||
#define portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedStatusRegister ) ulPortSetIPL( uxSavedStatusRegister )
|
||||
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* Task utilities. */
|
||||
#define portNOP() asm volatile ( "nop" )
|
||||
#define portNOP() asm volatile ( "nop" )
|
||||
|
||||
/* Context switches are requested using the force register. */
|
||||
#define portYIELD() INTC_SFRC = 0x3E; portNOP(); portNOP(); portNOP(); portNOP(); portNOP()
|
||||
#define portYIELD() INTC_SFRC = 0x3E; portNOP(); portNOP(); portNOP(); portNOP(); portNOP()
|
||||
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* Task function macros as described on the FreeRTOS.org WEB site. */
|
||||
#define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void * pvParameters ) __attribute__( ( noreturn ) )
|
||||
#define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void * pvParameters )
|
||||
#define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void *pvParameters ) __attribute__((noreturn))
|
||||
#define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void *pvParameters )
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
#define portEND_SWITCHING_ISR( xSwitchRequired ) \
|
||||
if( xSwitchRequired != pdFALSE ) \
|
||||
{ \
|
||||
portYIELD(); \
|
||||
}
|
||||
#define portEND_SWITCHING_ISR( xSwitchRequired ) if( xSwitchRequired != pdFALSE ) \
|
||||
{ \
|
||||
portYIELD(); \
|
||||
}
|
||||
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* PORTMACRO_H */
|
||||
|
||||
|
|
|
@ -19,8 +19,8 @@
|
|||
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
* http://www.FreeRTOS.org
|
||||
* http://aws.amazon.com/freertos
|
||||
* https://www.FreeRTOS.org
|
||||
* https://github.com/FreeRTOS
|
||||
*
|
||||
* 1 tab == 4 spaces!
|
||||
*/
|
||||
|
@ -30,52 +30,50 @@
|
|||
#include "task.h"
|
||||
|
||||
|
||||
#define portINITIAL_FORMAT_VECTOR ( ( StackType_t ) 0x4000 )
|
||||
#define portINITIAL_FORMAT_VECTOR ( ( StackType_t ) 0x4000 )
|
||||
|
||||
/* Supervisor mode set. */
|
||||
#define portINITIAL_STATUS_REGISTER ( ( StackType_t ) 0x2000 )
|
||||
#define portINITIAL_STATUS_REGISTER ( ( StackType_t ) 0x2000)
|
||||
|
||||
/* Used to keep track of the number of nested calls to taskENTER_CRITICAL(). This
|
||||
* will be set to 0 prior to the first task being started. */
|
||||
will be set to 0 prior to the first task being started. */
|
||||
static uint32_t ulCriticalNesting = 0x9999UL;
|
||||
|
||||
|
||||
#define portSAVE_CONTEXT() \
|
||||
lea.l( -60, % sp ), % sp; \
|
||||
movem.l % d0 - % fp, ( % sp ); \
|
||||
move.l pxCurrentTCB, % a0; \
|
||||
move.l % sp, ( % a0 );
|
||||
#define portSAVE_CONTEXT() \
|
||||
lea.l (-60, %sp), %sp; \
|
||||
movem.l %d0-%fp, (%sp); \
|
||||
move.l pxCurrentTCB, %a0; \
|
||||
move.l %sp, (%a0);
|
||||
|
||||
#define portRESTORE_CONTEXT() \
|
||||
move.l pxCurrentTCB, % a0; \
|
||||
move.l( % a0 ), % sp; \
|
||||
movem.l( % sp ), % d0 - % fp; \
|
||||
lea.l % sp@( 60 ), % sp; \
|
||||
rte
|
||||
#define portRESTORE_CONTEXT() \
|
||||
move.l pxCurrentTCB, %a0; \
|
||||
move.l (%a0), %sp; \
|
||||
movem.l (%sp), %d0-%fp; \
|
||||
lea.l %sp@(60), %sp; \
|
||||
rte
|
||||
|
||||
|
||||
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
|
||||
TaskFunction_t pxCode,
|
||||
void * pvParameters )
|
||||
StackType_t *pxPortInitialiseStack( StackType_t * pxTopOfStack, TaskFunction_t pxCode, void *pvParameters )
|
||||
{
|
||||
*pxTopOfStack = ( StackType_t ) pvParameters;
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( StackType_t ) pvParameters;
|
||||
pxTopOfStack--;
|
||||
|
||||
*pxTopOfStack = ( StackType_t ) 0xDEADBEEF;
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = (StackType_t) 0xDEADBEEF;
|
||||
pxTopOfStack--;
|
||||
|
||||
/* Exception stack frame starts with the return address. */
|
||||
*pxTopOfStack = ( StackType_t ) pxCode;
|
||||
pxTopOfStack--;
|
||||
/* Exception stack frame starts with the return address. */
|
||||
*pxTopOfStack = ( StackType_t ) pxCode;
|
||||
pxTopOfStack--;
|
||||
|
||||
*pxTopOfStack = ( portINITIAL_FORMAT_VECTOR << 16UL ) | ( portINITIAL_STATUS_REGISTER );
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( portINITIAL_FORMAT_VECTOR << 16UL ) | ( portINITIAL_STATUS_REGISTER );
|
||||
pxTopOfStack--;
|
||||
|
||||
*pxTopOfStack = ( StackType_t ) 0x0; /*FP*/
|
||||
pxTopOfStack -= 14; /* A5 to D0. */
|
||||
*pxTopOfStack = ( StackType_t ) 0x0; /*FP*/
|
||||
pxTopOfStack -= 14; /* A5 to D0. */
|
||||
|
||||
return pxTopOfStack;
|
||||
}
|
||||
|
@ -83,68 +81,67 @@ StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
|
|||
|
||||
BaseType_t xPortStartScheduler( void )
|
||||
{
|
||||
extern void vPortStartFirstTask( void );
|
||||
extern void vPortStartFirstTask( void );
|
||||
|
||||
ulCriticalNesting = 0UL;
|
||||
ulCriticalNesting = 0UL;
|
||||
|
||||
/* Configure the interrupts used by this port. */
|
||||
vApplicationSetupInterrupts();
|
||||
/* Configure the interrupts used by this port. */
|
||||
vApplicationSetupInterrupts();
|
||||
|
||||
/* Start the first task executing. */
|
||||
vPortStartFirstTask();
|
||||
/* Start the first task executing. */
|
||||
vPortStartFirstTask();
|
||||
|
||||
return pdFALSE;
|
||||
return pdFALSE;
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
void vPortEndScheduler( void )
|
||||
{
|
||||
/* Not implemented as there is nothing to return to. */
|
||||
/* Not implemented as there is nothing to return to. */
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
void vPortEnterCritical( void )
|
||||
{
|
||||
if( ulCriticalNesting == 0UL )
|
||||
{
|
||||
/* Guard against context switches being pended simultaneously with a
|
||||
* critical section being entered. */
|
||||
do
|
||||
{
|
||||
portDISABLE_INTERRUPTS();
|
||||
if( ulCriticalNesting == 0UL )
|
||||
{
|
||||
/* Guard against context switches being pended simultaneously with a
|
||||
critical section being entered. */
|
||||
do
|
||||
{
|
||||
portDISABLE_INTERRUPTS();
|
||||
if( MCF_INTC0_INTFRCH == 0UL )
|
||||
{
|
||||
break;
|
||||
}
|
||||
|
||||
if( MCF_INTC0_INTFRCH == 0UL )
|
||||
{
|
||||
break;
|
||||
}
|
||||
portENABLE_INTERRUPTS();
|
||||
|
||||
portENABLE_INTERRUPTS();
|
||||
} while( 1 );
|
||||
}
|
||||
|
||||
ulCriticalNesting++;
|
||||
} while( 1 );
|
||||
}
|
||||
ulCriticalNesting++;
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
void vPortExitCritical( void )
|
||||
{
|
||||
ulCriticalNesting--;
|
||||
|
||||
if( ulCriticalNesting == 0 )
|
||||
{
|
||||
portENABLE_INTERRUPTS();
|
||||
}
|
||||
ulCriticalNesting--;
|
||||
if( ulCriticalNesting == 0 )
|
||||
{
|
||||
portENABLE_INTERRUPTS();
|
||||
}
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
void vPortYieldHandler( void )
|
||||
{
|
||||
uint32_t ulSavedInterruptMask;
|
||||
uint32_t ulSavedInterruptMask;
|
||||
|
||||
ulSavedInterruptMask = portSET_INTERRUPT_MASK_FROM_ISR();
|
||||
/* Note this will clear all forced interrupts - this is done for speed. */
|
||||
MCF_INTC0_INTFRCL = 0;
|
||||
vTaskSwitchContext();
|
||||
portCLEAR_INTERRUPT_MASK_FROM_ISR( ulSavedInterruptMask );
|
||||
ulSavedInterruptMask = portSET_INTERRUPT_MASK_FROM_ISR();
|
||||
/* Note this will clear all forced interrupts - this is done for speed. */
|
||||
MCF_INTC0_INTFRCL = 0;
|
||||
vTaskSwitchContext();
|
||||
portCLEAR_INTERRUPT_MASK_FROM_ISR( ulSavedInterruptMask );
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
|
|
|
@ -19,8 +19,8 @@
|
|||
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
* http://www.FreeRTOS.org
|
||||
* http://aws.amazon.com/freertos
|
||||
* https://www.FreeRTOS.org
|
||||
* https://github.com/FreeRTOS
|
||||
*
|
||||
* 1 tab == 4 spaces!
|
||||
*/
|
||||
|
|
|
@ -19,18 +19,18 @@
|
|||
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
* http://www.FreeRTOS.org
|
||||
* http://aws.amazon.com/freertos
|
||||
* https://www.FreeRTOS.org
|
||||
* https://github.com/FreeRTOS
|
||||
*
|
||||
* 1 tab == 4 spaces!
|
||||
*/
|
||||
|
||||
#ifndef PORTMACRO_H
|
||||
#define PORTMACRO_H
|
||||
#define PORTMACRO_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/*-----------------------------------------------------------
|
||||
* Port specific definitions.
|
||||
|
@ -43,72 +43,72 @@
|
|||
*/
|
||||
|
||||
/* Type definitions. */
|
||||
#define portCHAR char
|
||||
#define portFLOAT float
|
||||
#define portDOUBLE double
|
||||
#define portLONG long
|
||||
#define portSHORT short
|
||||
#define portSTACK_TYPE uint32_t
|
||||
#define portBASE_TYPE long
|
||||
#define portCHAR char
|
||||
#define portFLOAT float
|
||||
#define portDOUBLE double
|
||||
#define portLONG long
|
||||
#define portSHORT short
|
||||
#define portSTACK_TYPE uint32_t
|
||||
#define portBASE_TYPE long
|
||||
|
||||
typedef portSTACK_TYPE StackType_t;
|
||||
typedef long BaseType_t;
|
||||
typedef unsigned long UBaseType_t;
|
||||
typedef portSTACK_TYPE StackType_t;
|
||||
typedef long BaseType_t;
|
||||
typedef unsigned long UBaseType_t;
|
||||
|
||||
#if ( configUSE_16_BIT_TICKS == 1 )
|
||||
typedef uint16_t TickType_t;
|
||||
#define portMAX_DELAY ( TickType_t ) 0xffff
|
||||
#else
|
||||
typedef uint32_t TickType_t;
|
||||
#define portMAX_DELAY ( TickType_t ) 0xffffffffUL
|
||||
#endif
|
||||
#if( configUSE_16_BIT_TICKS == 1 )
|
||||
typedef uint16_t TickType_t;
|
||||
#define portMAX_DELAY ( TickType_t ) 0xffff
|
||||
#else
|
||||
typedef uint32_t TickType_t;
|
||||
#define portMAX_DELAY ( TickType_t ) 0xffffffffUL
|
||||
#endif
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* Hardware specifics. */
|
||||
#define portBYTE_ALIGNMENT 4
|
||||
#define portSTACK_GROWTH -1
|
||||
#define portTICK_PERIOD_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )
|
||||
#define portBYTE_ALIGNMENT 4
|
||||
#define portSTACK_GROWTH -1
|
||||
#define portTICK_PERIOD_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )
|
||||
/*-----------------------------------------------------------*/
|
||||
uint32_t ulPortSetIPL( uint32_t );
|
||||
#define portDISABLE_INTERRUPTS() ulPortSetIPL( configMAX_SYSCALL_INTERRUPT_PRIORITY )
|
||||
#define portENABLE_INTERRUPTS() ulPortSetIPL( 0 )
|
||||
uint32_t ulPortSetIPL( uint32_t );
|
||||
#define portDISABLE_INTERRUPTS() ulPortSetIPL( configMAX_SYSCALL_INTERRUPT_PRIORITY )
|
||||
#define portENABLE_INTERRUPTS() ulPortSetIPL( 0 )
|
||||
|
||||
|
||||
extern void vPortEnterCritical( void );
|
||||
extern void vPortExitCritical( void );
|
||||
#define portENTER_CRITICAL() vPortEnterCritical()
|
||||
#define portEXIT_CRITICAL() vPortExitCritical()
|
||||
extern void vPortEnterCritical( void );
|
||||
extern void vPortExitCritical( void );
|
||||
#define portENTER_CRITICAL() vPortEnterCritical()
|
||||
#define portEXIT_CRITICAL() vPortExitCritical()
|
||||
|
||||
extern UBaseType_t uxPortSetInterruptMaskFromISR( void );
|
||||
extern void vPortClearInterruptMaskFromISR( UBaseType_t );
|
||||
#define portSET_INTERRUPT_MASK_FROM_ISR() ulPortSetIPL( configMAX_SYSCALL_INTERRUPT_PRIORITY )
|
||||
#define portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedStatusRegister ) ulPortSetIPL( uxSavedStatusRegister )
|
||||
extern UBaseType_t uxPortSetInterruptMaskFromISR( void );
|
||||
extern void vPortClearInterruptMaskFromISR( UBaseType_t );
|
||||
#define portSET_INTERRUPT_MASK_FROM_ISR() ulPortSetIPL( configMAX_SYSCALL_INTERRUPT_PRIORITY )
|
||||
#define portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedStatusRegister ) ulPortSetIPL( uxSavedStatusRegister )
|
||||
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* Task utilities. */
|
||||
|
||||
#define portNOP() asm volatile ( "nop" )
|
||||
#define portNOP() asm volatile ( "nop" )
|
||||
|
||||
/* Note this will overwrite all other bits in the force register, it is done this way for speed. */
|
||||
#define portYIELD() MCF_INTC0_INTFRCL = ( 1UL << configYIELD_INTERRUPT_VECTOR ); portNOP(); portNOP() /* -32 as we are using the high word of the 64bit mask. */
|
||||
#define portYIELD() MCF_INTC0_INTFRCL = ( 1UL << configYIELD_INTERRUPT_VECTOR ); portNOP(); portNOP() /* -32 as we are using the high word of the 64bit mask. */
|
||||
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* Task function macros as described on the FreeRTOS.org WEB site. */
|
||||
#define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void * pvParameters ) __attribute__( ( noreturn ) )
|
||||
#define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void * pvParameters )
|
||||
#define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void *pvParameters ) __attribute__((noreturn))
|
||||
#define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void *pvParameters )
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
#define portEND_SWITCHING_ISR( xSwitchRequired ) \
|
||||
if( xSwitchRequired != pdFALSE ) \
|
||||
{ \
|
||||
portYIELD(); \
|
||||
}
|
||||
#define portEND_SWITCHING_ISR( xSwitchRequired ) if( xSwitchRequired != pdFALSE ) \
|
||||
{ \
|
||||
portYIELD(); \
|
||||
}
|
||||
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* PORTMACRO_H */
|
||||
|
||||
|
|
|
@ -19,8 +19,8 @@
|
|||
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
* http://www.FreeRTOS.org
|
||||
* http://aws.amazon.com/freertos
|
||||
* https://www.FreeRTOS.org
|
||||
* https://github.com/FreeRTOS
|
||||
*
|
||||
* 1 tab == 4 spaces!
|
||||
*/
|
||||
|
@ -31,139 +31,137 @@
|
|||
|
||||
|
||||
/*-----------------------------------------------------------
|
||||
* Implementation of functions defined in portable.h for the HCS12 port.
|
||||
*----------------------------------------------------------*/
|
||||
* Implementation of functions defined in portable.h for the HCS12 port.
|
||||
*----------------------------------------------------------*/
|
||||
|
||||
|
||||
/*
|
||||
* Configure a timer to generate the RTOS tick at the frequency specified
|
||||
* Configure a timer to generate the RTOS tick at the frequency specified
|
||||
* within FreeRTOSConfig.h.
|
||||
*/
|
||||
static void prvSetupTimerInterrupt( void );
|
||||
|
||||
/* Interrupt service routines have to be in non-banked memory - as does the
|
||||
* scheduler startup function. */
|
||||
scheduler startup function. */
|
||||
#pragma CODE_SEG __NEAR_SEG NON_BANKED
|
||||
|
||||
/* Manual context switch function. This is the SWI ISR. */
|
||||
void interrupt vPortYield( void );
|
||||
/* Manual context switch function. This is the SWI ISR. */
|
||||
void interrupt vPortYield( void );
|
||||
|
||||
/* Tick context switch function. This is the timer ISR. */
|
||||
void interrupt vPortTickInterrupt( void );
|
||||
|
||||
/* Simply called by xPortStartScheduler(). xPortStartScheduler() does not
|
||||
* start the scheduler directly because the header file containing the
|
||||
* xPortStartScheduler() prototype is part of the common kernel code, and
|
||||
* therefore cannot use the CODE_SEG pragma. */
|
||||
static BaseType_t xBankedStartScheduler( void );
|
||||
/* Tick context switch function. This is the timer ISR. */
|
||||
void interrupt vPortTickInterrupt( void );
|
||||
|
||||
/* Simply called by xPortStartScheduler(). xPortStartScheduler() does not
|
||||
start the scheduler directly because the header file containing the
|
||||
xPortStartScheduler() prototype is part of the common kernel code, and
|
||||
therefore cannot use the CODE_SEG pragma. */
|
||||
static BaseType_t xBankedStartScheduler( void );
|
||||
|
||||
#pragma CODE_SEG DEFAULT
|
||||
|
||||
/* Calls to portENTER_CRITICAL() can be nested. When they are nested the
|
||||
* critical section should not be left (i.e. interrupts should not be re-enabled)
|
||||
* until the nesting depth reaches 0. This variable simply tracks the nesting
|
||||
* depth. Each task maintains it's own critical nesting depth variable so
|
||||
* uxCriticalNesting is saved and restored from the task stack during a context
|
||||
* switch. */
|
||||
/* Calls to portENTER_CRITICAL() can be nested. When they are nested the
|
||||
critical section should not be left (i.e. interrupts should not be re-enabled)
|
||||
until the nesting depth reaches 0. This variable simply tracks the nesting
|
||||
depth. Each task maintains it's own critical nesting depth variable so
|
||||
uxCriticalNesting is saved and restored from the task stack during a context
|
||||
switch. */
|
||||
volatile UBaseType_t uxCriticalNesting = 0xff;
|
||||
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/*
|
||||
* See header file for description.
|
||||
/*
|
||||
* See header file for description.
|
||||
*/
|
||||
StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
|
||||
TaskFunction_t pxCode,
|
||||
void * pvParameters )
|
||||
StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters )
|
||||
{
|
||||
/*
|
||||
* Place a few bytes of known values on the bottom of the stack.
|
||||
* This can be uncommented to provide useful stack markers when debugging.
|
||||
*
|
||||
* pxTopOfStack = ( StackType_t ) 0x11;
|
||||
* pxTopOfStack--;
|
||||
* pxTopOfStack = ( StackType_t ) 0x22;
|
||||
* pxTopOfStack--;
|
||||
* pxTopOfStack = ( StackType_t ) 0x33;
|
||||
* pxTopOfStack--;
|
||||
*/
|
||||
/*
|
||||
Place a few bytes of known values on the bottom of the stack.
|
||||
This can be uncommented to provide useful stack markers when debugging.
|
||||
|
||||
*pxTopOfStack = ( StackType_t ) 0x11;
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( StackType_t ) 0x22;
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( StackType_t ) 0x33;
|
||||
pxTopOfStack--;
|
||||
*/
|
||||
|
||||
|
||||
|
||||
/* Setup the initial stack of the task. The stack is set exactly as
|
||||
* expected by the portRESTORE_CONTEXT() macro. In this case the stack as
|
||||
* expected by the HCS12 RTI instruction. */
|
||||
/* Setup the initial stack of the task. The stack is set exactly as
|
||||
expected by the portRESTORE_CONTEXT() macro. In this case the stack as
|
||||
expected by the HCS12 RTI instruction. */
|
||||
|
||||
|
||||
/* The address of the task function is placed in the stack byte at a time. */
|
||||
*pxTopOfStack = ( StackType_t ) *( ( ( StackType_t * ) ( &pxCode ) ) + 1 );
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( StackType_t ) *( ( ( StackType_t * ) ( &pxCode ) ) + 0 );
|
||||
pxTopOfStack--;
|
||||
/* The address of the task function is placed in the stack byte at a time. */
|
||||
*pxTopOfStack = ( StackType_t ) *( ((StackType_t *) (&pxCode) ) + 1 );
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( StackType_t ) *( ((StackType_t *) (&pxCode) ) + 0 );
|
||||
pxTopOfStack--;
|
||||
|
||||
/* Next are all the registers that form part of the task context. */
|
||||
/* Next are all the registers that form part of the task context. */
|
||||
|
||||
/* Y register */
|
||||
*pxTopOfStack = ( StackType_t ) 0xff;
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( StackType_t ) 0xee;
|
||||
pxTopOfStack--;
|
||||
/* Y register */
|
||||
*pxTopOfStack = ( StackType_t ) 0xff;
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( StackType_t ) 0xee;
|
||||
pxTopOfStack--;
|
||||
|
||||
/* X register */
|
||||
*pxTopOfStack = ( StackType_t ) 0xdd;
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( StackType_t ) 0xcc;
|
||||
pxTopOfStack--;
|
||||
/* X register */
|
||||
*pxTopOfStack = ( StackType_t ) 0xdd;
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( StackType_t ) 0xcc;
|
||||
pxTopOfStack--;
|
||||
|
||||
/* A register contains parameter high byte. */
|
||||
*pxTopOfStack = ( StackType_t ) *( ((StackType_t *) (&pvParameters) ) + 0 );
|
||||
pxTopOfStack--;
|
||||
|
||||
/* A register contains parameter high byte. */
|
||||
*pxTopOfStack = ( StackType_t ) *( ( ( StackType_t * ) ( &pvParameters ) ) + 0 );
|
||||
pxTopOfStack--;
|
||||
/* B register contains parameter low byte. */
|
||||
*pxTopOfStack = ( StackType_t ) *( ((StackType_t *) (&pvParameters) ) + 1 );
|
||||
pxTopOfStack--;
|
||||
|
||||
/* B register contains parameter low byte. */
|
||||
*pxTopOfStack = ( StackType_t ) *( ( ( StackType_t * ) ( &pvParameters ) ) + 1 );
|
||||
pxTopOfStack--;
|
||||
/* CCR: Note that when the task starts interrupts will be enabled since
|
||||
"I" bit of CCR is cleared */
|
||||
*pxTopOfStack = ( StackType_t ) 0x00;
|
||||
pxTopOfStack--;
|
||||
|
||||
#ifdef BANKED_MODEL
|
||||
/* The page of the task. */
|
||||
*pxTopOfStack = ( StackType_t ) ( ( int ) pxCode );
|
||||
pxTopOfStack--;
|
||||
#endif
|
||||
|
||||
/* Finally the critical nesting depth is initialised with 0 (not within
|
||||
a critical section). */
|
||||
*pxTopOfStack = ( StackType_t ) 0x00;
|
||||
|
||||
/* CCR: Note that when the task starts interrupts will be enabled since
|
||||
* "I" bit of CCR is cleared */
|
||||
*pxTopOfStack = ( StackType_t ) 0x00;
|
||||
pxTopOfStack--;
|
||||
|
||||
#ifdef BANKED_MODEL
|
||||
/* The page of the task. */
|
||||
*pxTopOfStack = ( StackType_t ) ( ( int ) pxCode );
|
||||
pxTopOfStack--;
|
||||
#endif
|
||||
|
||||
/* Finally the critical nesting depth is initialised with 0 (not within
|
||||
* a critical section). */
|
||||
*pxTopOfStack = ( StackType_t ) 0x00;
|
||||
|
||||
return pxTopOfStack;
|
||||
return pxTopOfStack;
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
void vPortEndScheduler( void )
|
||||
{
|
||||
/* It is unlikely that the HCS12 port will get stopped. */
|
||||
/* It is unlikely that the HCS12 port will get stopped. */
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
static void prvSetupTimerInterrupt( void )
|
||||
{
|
||||
TickTimer_SetFreqHz( configTICK_RATE_HZ );
|
||||
TickTimer_Enable();
|
||||
TickTimer_SetFreqHz( configTICK_RATE_HZ );
|
||||
TickTimer_Enable();
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
BaseType_t xPortStartScheduler( void )
|
||||
{
|
||||
/* xPortStartScheduler() does not start the scheduler directly because
|
||||
* the header file containing the xPortStartScheduler() prototype is part
|
||||
* of the common kernel code, and therefore cannot use the CODE_SEG pragma.
|
||||
* Instead it simply calls the locally defined xBankedStartScheduler() -
|
||||
* which does use the CODE_SEG pragma. */
|
||||
/* xPortStartScheduler() does not start the scheduler directly because
|
||||
the header file containing the xPortStartScheduler() prototype is part
|
||||
of the common kernel code, and therefore cannot use the CODE_SEG pragma.
|
||||
Instead it simply calls the locally defined xBankedStartScheduler() -
|
||||
which does use the CODE_SEG pragma. */
|
||||
|
||||
return xBankedStartScheduler();
|
||||
return xBankedStartScheduler();
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
|
@ -171,18 +169,18 @@ BaseType_t xPortStartScheduler( void )
|
|||
|
||||
static BaseType_t xBankedStartScheduler( void )
|
||||
{
|
||||
/* Configure the timer that will generate the RTOS tick. Interrupts are
|
||||
* disabled when this function is called. */
|
||||
prvSetupTimerInterrupt();
|
||||
/* Configure the timer that will generate the RTOS tick. Interrupts are
|
||||
disabled when this function is called. */
|
||||
prvSetupTimerInterrupt();
|
||||
|
||||
/* Restore the context of the first task. */
|
||||
portRESTORE_CONTEXT();
|
||||
/* Restore the context of the first task. */
|
||||
portRESTORE_CONTEXT();
|
||||
|
||||
/* Simulate the end of an interrupt to start the scheduler off. */
|
||||
__asm( "rti" );
|
||||
/* Simulate the end of an interrupt to start the scheduler off. */
|
||||
__asm( "rti" );
|
||||
|
||||
/* Should not get here! */
|
||||
return pdFALSE;
|
||||
/* Should not get here! */
|
||||
return pdFALSE;
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
|
@ -196,42 +194,44 @@ static BaseType_t xBankedStartScheduler( void )
|
|||
*/
|
||||
void interrupt vPortYield( void )
|
||||
{
|
||||
portSAVE_CONTEXT();
|
||||
vTaskSwitchContext();
|
||||
portRESTORE_CONTEXT();
|
||||
portSAVE_CONTEXT();
|
||||
vTaskSwitchContext();
|
||||
portRESTORE_CONTEXT();
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/*
|
||||
* RTOS tick interrupt service routine. If the cooperative scheduler is
|
||||
* being used then this simply increments the tick count. If the
|
||||
* RTOS tick interrupt service routine. If the cooperative scheduler is
|
||||
* being used then this simply increments the tick count. If the
|
||||
* preemptive scheduler is being used a context switch can occur.
|
||||
*/
|
||||
void interrupt vPortTickInterrupt( void )
|
||||
{
|
||||
#if configUSE_PREEMPTION == 1
|
||||
{
|
||||
/* A context switch might happen so save the context. */
|
||||
portSAVE_CONTEXT();
|
||||
#if configUSE_PREEMPTION == 1
|
||||
{
|
||||
/* A context switch might happen so save the context. */
|
||||
portSAVE_CONTEXT();
|
||||
|
||||
/* Increment the tick ... */
|
||||
if( xTaskIncrementTick() != pdFALSE )
|
||||
{
|
||||
vTaskSwitchContext();
|
||||
}
|
||||
/* Increment the tick ... */
|
||||
if( xTaskIncrementTick() != pdFALSE )
|
||||
{
|
||||
vTaskSwitchContext();
|
||||
}
|
||||
|
||||
TFLG1 = 1;
|
||||
TFLG1 = 1;
|
||||
|
||||
/* Restore the context of a task - which may be a different task
|
||||
* to that interrupted. */
|
||||
portRESTORE_CONTEXT();
|
||||
}
|
||||
#else /* if configUSE_PREEMPTION == 1 */
|
||||
{
|
||||
xTaskIncrementTick();
|
||||
TFLG1 = 1;
|
||||
}
|
||||
#endif /* if configUSE_PREEMPTION == 1 */
|
||||
/* Restore the context of a task - which may be a different task
|
||||
to that interrupted. */
|
||||
portRESTORE_CONTEXT();
|
||||
}
|
||||
#else
|
||||
{
|
||||
xTaskIncrementTick();
|
||||
TFLG1 = 1;
|
||||
}
|
||||
#endif
|
||||
}
|
||||
|
||||
#pragma CODE_SEG DEFAULT
|
||||
|
||||
|
||||
|
|
|
@ -19,8 +19,8 @@
|
|||
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
* http://www.FreeRTOS.org
|
||||
* http://aws.amazon.com/freertos
|
||||
* https://www.FreeRTOS.org
|
||||
* https://github.com/FreeRTOS
|
||||
*
|
||||
* 1 tab == 4 spaces!
|
||||
*/
|
||||
|
@ -40,38 +40,38 @@
|
|||
*/
|
||||
|
||||
/* Type definitions. */
|
||||
#define portCHAR char
|
||||
#define portFLOAT float
|
||||
#define portDOUBLE double
|
||||
#define portLONG long
|
||||
#define portSHORT short
|
||||
#define portSTACK_TYPE uint8_t
|
||||
#define portBASE_TYPE char
|
||||
#define portCHAR char
|
||||
#define portFLOAT float
|
||||
#define portDOUBLE double
|
||||
#define portLONG long
|
||||
#define portSHORT short
|
||||
#define portSTACK_TYPE uint8_t
|
||||
#define portBASE_TYPE char
|
||||
|
||||
typedef portSTACK_TYPE StackType_t;
|
||||
typedef signed char BaseType_t;
|
||||
typedef unsigned char UBaseType_t;
|
||||
typedef portSTACK_TYPE StackType_t;
|
||||
typedef signed char BaseType_t;
|
||||
typedef unsigned char UBaseType_t;
|
||||
|
||||
#if ( configUSE_16_BIT_TICKS == 1 )
|
||||
typedef uint16_t TickType_t;
|
||||
#define portMAX_DELAY ( TickType_t ) 0xffff
|
||||
#if( configUSE_16_BIT_TICKS == 1 )
|
||||
typedef uint16_t TickType_t;
|
||||
#define portMAX_DELAY ( TickType_t ) 0xffff
|
||||
#else
|
||||
typedef uint32_t TickType_t;
|
||||
#define portMAX_DELAY ( TickType_t ) 0xffffffffUL
|
||||
typedef uint32_t TickType_t;
|
||||
#define portMAX_DELAY ( TickType_t ) 0xffffffffUL
|
||||
#endif
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* Hardware specifics. */
|
||||
#define portBYTE_ALIGNMENT 1
|
||||
#define portSTACK_GROWTH ( -1 )
|
||||
#define portTICK_PERIOD_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )
|
||||
#define portYIELD() __asm( "swi" );
|
||||
#define portNOP() __asm( "nop" );
|
||||
#define portBYTE_ALIGNMENT 1
|
||||
#define portSTACK_GROWTH ( -1 )
|
||||
#define portTICK_PERIOD_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )
|
||||
#define portYIELD() __asm( "swi" );
|
||||
#define portNOP() __asm( "nop" );
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* Critical section handling. */
|
||||
#define portENABLE_INTERRUPTS() __asm( "cli" )
|
||||
#define portDISABLE_INTERRUPTS() __asm( "sei" )
|
||||
#define portENABLE_INTERRUPTS() __asm( "cli" )
|
||||
#define portDISABLE_INTERRUPTS() __asm( "sei" )
|
||||
|
||||
/*
|
||||
* Disable interrupts before incrementing the count of critical section nesting.
|
||||
|
@ -79,29 +79,29 @@ typedef unsigned char UBaseType_t;
|
|||
* re-enabled. Once interrupts are disabled the nesting count can be accessed
|
||||
* directly. Each task maintains its own nesting count.
|
||||
*/
|
||||
#define portENTER_CRITICAL() \
|
||||
{ \
|
||||
extern volatile UBaseType_t uxCriticalNesting; \
|
||||
\
|
||||
portDISABLE_INTERRUPTS(); \
|
||||
uxCriticalNesting++; \
|
||||
}
|
||||
#define portENTER_CRITICAL() \
|
||||
{ \
|
||||
extern volatile UBaseType_t uxCriticalNesting; \
|
||||
\
|
||||
portDISABLE_INTERRUPTS(); \
|
||||
uxCriticalNesting++; \
|
||||
}
|
||||
|
||||
/*
|
||||
* Interrupts are disabled so we can access the nesting count directly. If the
|
||||
* nesting is found to be 0 (no nesting) then we are leaving the critical
|
||||
* section and interrupts can be re-enabled.
|
||||
*/
|
||||
#define portEXIT_CRITICAL() \
|
||||
{ \
|
||||
extern volatile UBaseType_t uxCriticalNesting; \
|
||||
\
|
||||
uxCriticalNesting--; \
|
||||
if( uxCriticalNesting == 0 ) \
|
||||
{ \
|
||||
portENABLE_INTERRUPTS(); \
|
||||
} \
|
||||
}
|
||||
#define portEXIT_CRITICAL() \
|
||||
{ \
|
||||
extern volatile UBaseType_t uxCriticalNesting; \
|
||||
\
|
||||
uxCriticalNesting--; \
|
||||
if( uxCriticalNesting == 0 ) \
|
||||
{ \
|
||||
portENABLE_INTERRUPTS(); \
|
||||
} \
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* Task utilities. */
|
||||
|
@ -117,71 +117,70 @@ typedef unsigned char UBaseType_t;
|
|||
*/
|
||||
|
||||
#ifdef BANKED_MODEL
|
||||
/*
|
||||
* Load the stack pointer for the task, then pull the critical nesting
|
||||
* count and PPAGE register from the stack. The remains of the
|
||||
* context are restored by the RTI instruction.
|
||||
*/
|
||||
#define portRESTORE_CONTEXT() \
|
||||
{ \
|
||||
extern volatile void * pxCurrentTCB; \
|
||||
extern volatile UBaseType_t uxCriticalNesting; \
|
||||
\
|
||||
__asm( "ldx pxCurrentTCB" ); \
|
||||
__asm( "lds 0, x" ); \
|
||||
__asm( "pula" ); \
|
||||
__asm( "staa uxCriticalNesting" ); \
|
||||
__asm( "pula" ); \
|
||||
__asm( "staa 0x30" ); /* 0x30 = PPAGE */ \
|
||||
}
|
||||
|
||||
/*
|
||||
* Load the stack pointer for the task, then pull the critical nesting
|
||||
* count and PPAGE register from the stack. The remains of the
|
||||
* context are restored by the RTI instruction.
|
||||
*/
|
||||
#define portRESTORE_CONTEXT() \
|
||||
{ \
|
||||
extern volatile void * pxCurrentTCB; \
|
||||
extern volatile UBaseType_t uxCriticalNesting; \
|
||||
\
|
||||
__asm( "ldx pxCurrentTCB" ); \
|
||||
__asm( "lds 0, x" ); \
|
||||
__asm( "pula" ); \
|
||||
__asm( "staa uxCriticalNesting" ); \
|
||||
__asm( "pula" ); \
|
||||
__asm( "staa 0x30" ); /* 0x30 = PPAGE */ \
|
||||
}
|
||||
/*
|
||||
* By the time this macro is called the processor has already stacked the
|
||||
* registers. Simply stack the nesting count and PPAGE value, then save
|
||||
* the task stack pointer.
|
||||
*/
|
||||
#define portSAVE_CONTEXT() \
|
||||
{ \
|
||||
extern volatile void * pxCurrentTCB; \
|
||||
extern volatile UBaseType_t uxCriticalNesting; \
|
||||
\
|
||||
__asm( "ldaa 0x30" ); /* 0x30 = PPAGE */ \
|
||||
__asm( "psha" ); \
|
||||
__asm( "ldaa uxCriticalNesting" ); \
|
||||
__asm( "psha" ); \
|
||||
__asm( "ldx pxCurrentTCB" ); \
|
||||
__asm( "sts 0, x" ); \
|
||||
}
|
||||
#else
|
||||
|
||||
/*
|
||||
* By the time this macro is called the processor has already stacked the
|
||||
* registers. Simply stack the nesting count and PPAGE value, then save
|
||||
* the task stack pointer.
|
||||
*/
|
||||
#define portSAVE_CONTEXT() \
|
||||
{ \
|
||||
extern volatile void * pxCurrentTCB; \
|
||||
extern volatile UBaseType_t uxCriticalNesting; \
|
||||
\
|
||||
__asm( "ldaa 0x30" ); /* 0x30 = PPAGE */ \
|
||||
__asm( "psha" ); \
|
||||
__asm( "ldaa uxCriticalNesting" ); \
|
||||
__asm( "psha" ); \
|
||||
__asm( "ldx pxCurrentTCB" ); \
|
||||
__asm( "sts 0, x" ); \
|
||||
}
|
||||
#else /* ifdef BANKED_MODEL */
|
||||
/*
|
||||
* These macros are as per the BANKED versions above, but without saving
|
||||
* and restoring the PPAGE register.
|
||||
*/
|
||||
|
||||
/*
|
||||
* These macros are as per the BANKED versions above, but without saving
|
||||
* and restoring the PPAGE register.
|
||||
*/
|
||||
#define portRESTORE_CONTEXT() \
|
||||
{ \
|
||||
extern volatile void * pxCurrentTCB; \
|
||||
extern volatile UBaseType_t uxCriticalNesting; \
|
||||
\
|
||||
__asm( "ldx pxCurrentTCB" ); \
|
||||
__asm( "lds 0, x" ); \
|
||||
__asm( "pula" ); \
|
||||
__asm( "staa uxCriticalNesting" ); \
|
||||
}
|
||||
|
||||
#define portRESTORE_CONTEXT() \
|
||||
{ \
|
||||
extern volatile void * pxCurrentTCB; \
|
||||
extern volatile UBaseType_t uxCriticalNesting; \
|
||||
\
|
||||
__asm( "ldx pxCurrentTCB" ); \
|
||||
__asm( "lds 0, x" ); \
|
||||
__asm( "pula" ); \
|
||||
__asm( "staa uxCriticalNesting" ); \
|
||||
}
|
||||
|
||||
#define portSAVE_CONTEXT() \
|
||||
{ \
|
||||
extern volatile void * pxCurrentTCB; \
|
||||
extern volatile UBaseType_t uxCriticalNesting; \
|
||||
\
|
||||
__asm( "ldaa uxCriticalNesting" ); \
|
||||
__asm( "psha" ); \
|
||||
__asm( "ldx pxCurrentTCB" ); \
|
||||
__asm( "sts 0, x" ); \
|
||||
}
|
||||
#endif /* ifdef BANKED_MODEL */
|
||||
#define portSAVE_CONTEXT() \
|
||||
{ \
|
||||
extern volatile void * pxCurrentTCB; \
|
||||
extern volatile UBaseType_t uxCriticalNesting; \
|
||||
\
|
||||
__asm( "ldaa uxCriticalNesting" ); \
|
||||
__asm( "psha" ); \
|
||||
__asm( "ldx pxCurrentTCB" ); \
|
||||
__asm( "sts 0, x" ); \
|
||||
}
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Utility macro to call macros above in correct order in order to perform a
|
||||
|
@ -189,14 +188,15 @@ typedef unsigned char UBaseType_t;
|
|||
* the ISR does not use any local (stack) variables. If the ISR uses stack
|
||||
* variables portYIELD() should be used in it's place.
|
||||
*/
|
||||
#define portTASK_SWITCH_FROM_ISR() \
|
||||
portSAVE_CONTEXT(); \
|
||||
vTaskSwitchContext(); \
|
||||
portRESTORE_CONTEXT();
|
||||
#define portTASK_SWITCH_FROM_ISR() \
|
||||
portSAVE_CONTEXT(); \
|
||||
vTaskSwitchContext(); \
|
||||
portRESTORE_CONTEXT();
|
||||
|
||||
|
||||
/* Task function macros as described on the FreeRTOS.org WEB site. */
|
||||
#define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void * pvParameters )
|
||||
#define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void * pvParameters )
|
||||
#define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void *pvParameters )
|
||||
#define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void *pvParameters )
|
||||
|
||||
#endif /* PORTMACRO_H */
|
||||
|
||||
|
|
|
@ -19,10 +19,9 @@
|
|||
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
* http://www.FreeRTOS.org
|
||||
* http://aws.amazon.com/freertos
|
||||
* https://www.FreeRTOS.org
|
||||
* https://github.com/FreeRTOS
|
||||
*
|
||||
* 1 tab == 4 spaces!
|
||||
*/
|
||||
|
||||
/*
|
||||
|
@ -68,7 +67,7 @@ BaseType_t xPortRaisePrivilege( void ) /* FREERTOS_SYSTEM_CALL */
|
|||
xRunningPrivileged = portIS_PRIVILEGED();
|
||||
|
||||
/* If the processor is not already privileged, raise privilege. */
|
||||
if( xRunningPrivileged != pdTRUE )
|
||||
if( xRunningPrivileged == pdFALSE )
|
||||
{
|
||||
portRAISE_PRIVILEGE();
|
||||
}
|
||||
|
@ -79,7 +78,7 @@ BaseType_t xPortRaisePrivilege( void ) /* FREERTOS_SYSTEM_CALL */
|
|||
|
||||
void vPortResetPrivilege( BaseType_t xRunningPrivileged )
|
||||
{
|
||||
if( xRunningPrivileged != pdTRUE )
|
||||
if( xRunningPrivileged == pdFALSE )
|
||||
{
|
||||
portRESET_PRIVILEGE();
|
||||
}
|
||||
|
@ -958,33 +957,6 @@ void MPU_vQueueDelete( QueueHandle_t xQueue ) /* FREERTOS_SYSTEM_CALL */
|
|||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
#if ( configSUPPORT_DYNAMIC_ALLOCATION == 1 )
|
||||
void * MPU_pvPortMalloc( size_t xSize ) /* FREERTOS_SYSTEM_CALL */
|
||||
{
|
||||
void * pvReturn;
|
||||
BaseType_t xRunningPrivileged = xPortRaisePrivilege();
|
||||
|
||||
pvReturn = pvPortMalloc( xSize );
|
||||
|
||||
vPortResetPrivilege( xRunningPrivileged );
|
||||
|
||||
return pvReturn;
|
||||
}
|
||||
#endif /* configSUPPORT_DYNAMIC_ALLOCATION */
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
#if ( configSUPPORT_DYNAMIC_ALLOCATION == 1 )
|
||||
void MPU_vPortFree( void * pv ) /* FREERTOS_SYSTEM_CALL */
|
||||
{
|
||||
BaseType_t xRunningPrivileged = xPortRaisePrivilege();
|
||||
|
||||
vPortFree( pv );
|
||||
|
||||
vPortResetPrivilege( xRunningPrivileged );
|
||||
}
|
||||
#endif /* configSUPPORT_DYNAMIC_ALLOCATION */
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
#if ( configSUPPORT_DYNAMIC_ALLOCATION == 1 )
|
||||
void MPU_vPortInitialiseBlocks( void ) /* FREERTOS_SYSTEM_CALL */
|
||||
{
|
||||
|
|
|
@ -19,21 +19,21 @@
|
|||
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
* http://www.FreeRTOS.org
|
||||
* http://aws.amazon.com/freertos
|
||||
* https://www.FreeRTOS.org
|
||||
* https://github.com/FreeRTOS
|
||||
*
|
||||
* 1 tab == 4 spaces!
|
||||
*/
|
||||
|
||||
|
||||
/*-----------------------------------------------------------
|
||||
* Implementation of functions defined in portable.h for the Atmel AT91R40008
|
||||
* port.
|
||||
*
|
||||
* Components that can be compiled to either ARM or THUMB mode are
|
||||
* contained in this file. The ISR routines, which can only be compiled
|
||||
* to ARM mode are contained in portISR.c.
|
||||
*----------------------------------------------------------*/
|
||||
* Implementation of functions defined in portable.h for the Atmel AT91R40008
|
||||
* port.
|
||||
*
|
||||
* Components that can be compiled to either ARM or THUMB mode are
|
||||
* contained in this file. The ISR routines, which can only be compiled
|
||||
* to ARM mode are contained in portISR.c.
|
||||
*----------------------------------------------------------*/
|
||||
|
||||
/* Standard includes. */
|
||||
#include <stdlib.h>
|
||||
|
@ -49,126 +49,124 @@
|
|||
#include "tc.h"
|
||||
|
||||
/* Constants required to setup the task context. */
|
||||
#define portINITIAL_SPSR ( ( StackType_t ) 0x1f ) /* System mode, ARM mode, interrupts enabled. */
|
||||
#define portTHUMB_MODE_BIT ( ( StackType_t ) 0x20 )
|
||||
#define portINSTRUCTION_SIZE ( ( StackType_t ) 4 )
|
||||
#define portNO_CRITICAL_SECTION_NESTING ( ( StackType_t ) 0 )
|
||||
#define portTICK_PRIORITY_6 ( 6 )
|
||||
#define portINITIAL_SPSR ( ( StackType_t ) 0x1f ) /* System mode, ARM mode, interrupts enabled. */
|
||||
#define portTHUMB_MODE_BIT ( ( StackType_t ) 0x20 )
|
||||
#define portINSTRUCTION_SIZE ( ( StackType_t ) 4 )
|
||||
#define portNO_CRITICAL_SECTION_NESTING ( ( StackType_t ) 0 )
|
||||
#define portTICK_PRIORITY_6 ( 6 )
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* Setup the timer to generate the tick interrupts. */
|
||||
static void prvSetupTimerInterrupt( void );
|
||||
|
||||
/*
|
||||
* The scheduler can only be started from ARM mode, so
|
||||
* vPortISRStartFirstSTask() is defined in portISR.c.
|
||||
/*
|
||||
* The scheduler can only be started from ARM mode, so
|
||||
* vPortISRStartFirstSTask() is defined in portISR.c.
|
||||
*/
|
||||
extern void vPortISRStartFirstTask( void );
|
||||
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/*
|
||||
* Initialise the stack of a task to look exactly as if a call to
|
||||
/*
|
||||
* Initialise the stack of a task to look exactly as if a call to
|
||||
* portSAVE_CONTEXT had been called.
|
||||
*
|
||||
* See header file for description.
|
||||
* See header file for description.
|
||||
*/
|
||||
StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
|
||||
TaskFunction_t pxCode,
|
||||
void * pvParameters )
|
||||
StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters )
|
||||
{
|
||||
StackType_t * pxOriginalTOS;
|
||||
StackType_t *pxOriginalTOS;
|
||||
|
||||
pxOriginalTOS = pxTopOfStack;
|
||||
pxOriginalTOS = pxTopOfStack;
|
||||
|
||||
/* To ensure asserts in tasks.c don't fail, although in this case the assert
|
||||
is not really required. */
|
||||
pxTopOfStack--;
|
||||
|
||||
/* To ensure asserts in tasks.c don't fail, although in this case the assert
|
||||
* is not really required. */
|
||||
pxTopOfStack--;
|
||||
/* Setup the initial stack of the task. The stack is set exactly as
|
||||
expected by the portRESTORE_CONTEXT() macro. */
|
||||
|
||||
/* Setup the initial stack of the task. The stack is set exactly as
|
||||
* expected by the portRESTORE_CONTEXT() macro. */
|
||||
/* First on the stack is the return address - which in this case is the
|
||||
start of the task. The offset is added to make the return address appear
|
||||
as it would within an IRQ ISR. */
|
||||
*pxTopOfStack = ( StackType_t ) pxCode + portINSTRUCTION_SIZE;
|
||||
pxTopOfStack--;
|
||||
|
||||
/* First on the stack is the return address - which in this case is the
|
||||
* start of the task. The offset is added to make the return address appear
|
||||
* as it would within an IRQ ISR. */
|
||||
*pxTopOfStack = ( StackType_t ) pxCode + portINSTRUCTION_SIZE;
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( StackType_t ) 0xaaaaaaaa; /* R14 */
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( StackType_t ) pxOriginalTOS; /* Stack used when task starts goes in R13. */
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( StackType_t ) 0x12121212; /* R12 */
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( StackType_t ) 0x11111111; /* R11 */
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( StackType_t ) 0x10101010; /* R10 */
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( StackType_t ) 0x09090909; /* R9 */
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( StackType_t ) 0x08080808; /* R8 */
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( StackType_t ) 0x07070707; /* R7 */
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( StackType_t ) 0x06060606; /* R6 */
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( StackType_t ) 0x05050505; /* R5 */
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( StackType_t ) 0x04040404; /* R4 */
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( StackType_t ) 0x03030303; /* R3 */
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( StackType_t ) 0x02020202; /* R2 */
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( StackType_t ) 0x01010101; /* R1 */
|
||||
pxTopOfStack--;
|
||||
|
||||
*pxTopOfStack = ( StackType_t ) 0xaaaaaaaa; /* R14 */
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( StackType_t ) pxOriginalTOS; /* Stack used when task starts goes in R13. */
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( StackType_t ) 0x12121212; /* R12 */
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( StackType_t ) 0x11111111; /* R11 */
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( StackType_t ) 0x10101010; /* R10 */
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( StackType_t ) 0x09090909; /* R9 */
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( StackType_t ) 0x08080808; /* R8 */
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( StackType_t ) 0x07070707; /* R7 */
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( StackType_t ) 0x06060606; /* R6 */
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( StackType_t ) 0x05050505; /* R5 */
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( StackType_t ) 0x04040404; /* R4 */
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( StackType_t ) 0x03030303; /* R3 */
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( StackType_t ) 0x02020202; /* R2 */
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( StackType_t ) 0x01010101; /* R1 */
|
||||
pxTopOfStack--;
|
||||
/* When the task starts is will expect to find the function parameter in
|
||||
R0. */
|
||||
*pxTopOfStack = ( StackType_t ) pvParameters; /* R0 */
|
||||
pxTopOfStack--;
|
||||
|
||||
/* When the task starts is will expect to find the function parameter in
|
||||
* R0. */
|
||||
*pxTopOfStack = ( StackType_t ) pvParameters; /* R0 */
|
||||
pxTopOfStack--;
|
||||
/* The last thing onto the stack is the status register, which is set for
|
||||
system mode, with interrupts enabled. */
|
||||
*pxTopOfStack = ( StackType_t ) portINITIAL_SPSR;
|
||||
|
||||
/* The last thing onto the stack is the status register, which is set for
|
||||
* system mode, with interrupts enabled. */
|
||||
*pxTopOfStack = ( StackType_t ) portINITIAL_SPSR;
|
||||
#ifdef THUMB_INTERWORK
|
||||
{
|
||||
/* We want the task to start in thumb mode. */
|
||||
*pxTopOfStack |= portTHUMB_MODE_BIT;
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef THUMB_INTERWORK
|
||||
{
|
||||
/* We want the task to start in thumb mode. */
|
||||
*pxTopOfStack |= portTHUMB_MODE_BIT;
|
||||
}
|
||||
#endif
|
||||
pxTopOfStack--;
|
||||
|
||||
pxTopOfStack--;
|
||||
/* Some optimisation levels use the stack differently to others. This
|
||||
means the interrupt flags cannot always be stored on the stack and will
|
||||
instead be stored in a variable, which is then saved as part of the
|
||||
tasks context. */
|
||||
*pxTopOfStack = portNO_CRITICAL_SECTION_NESTING;
|
||||
|
||||
/* Some optimisation levels use the stack differently to others. This
|
||||
* means the interrupt flags cannot always be stored on the stack and will
|
||||
* instead be stored in a variable, which is then saved as part of the
|
||||
* tasks context. */
|
||||
*pxTopOfStack = portNO_CRITICAL_SECTION_NESTING;
|
||||
|
||||
return pxTopOfStack;
|
||||
return pxTopOfStack;
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
BaseType_t xPortStartScheduler( void )
|
||||
{
|
||||
/* Start the timer that generates the tick ISR. Interrupts are disabled
|
||||
* here already. */
|
||||
prvSetupTimerInterrupt();
|
||||
/* Start the timer that generates the tick ISR. Interrupts are disabled
|
||||
here already. */
|
||||
prvSetupTimerInterrupt();
|
||||
|
||||
/* Start the first task. */
|
||||
vPortISRStartFirstTask();
|
||||
/* Start the first task. */
|
||||
vPortISRStartFirstTask();
|
||||
|
||||
/* Should not get here! */
|
||||
return 0;
|
||||
/* Should not get here! */
|
||||
return 0;
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
void vPortEndScheduler( void )
|
||||
{
|
||||
/* It is unlikely that the ARM port will require this function as there
|
||||
* is nothing to return to. */
|
||||
/* It is unlikely that the ARM port will require this function as there
|
||||
is nothing to return to. */
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
|
@ -177,63 +175,64 @@ void vPortEndScheduler( void )
|
|||
*/
|
||||
static void prvSetupTimerInterrupt( void )
|
||||
{
|
||||
volatile uint32_t ulDummy;
|
||||
volatile uint32_t ulDummy;
|
||||
|
||||
/* Enable clock to the tick timer... */
|
||||
AT91C_BASE_PS->PS_PCER = portTIMER_CLK_ENABLE_BIT;
|
||||
/* Enable clock to the tick timer... */
|
||||
AT91C_BASE_PS->PS_PCER = portTIMER_CLK_ENABLE_BIT;
|
||||
|
||||
/* Stop the tick timer... */
|
||||
portTIMER_REG_BASE_PTR->TC_CCR = TC_CLKDIS;
|
||||
/* Stop the tick timer... */
|
||||
portTIMER_REG_BASE_PTR->TC_CCR = TC_CLKDIS;
|
||||
|
||||
/* Start with tick timer interrupts disabled... */
|
||||
portTIMER_REG_BASE_PTR->TC_IDR = 0xFFFFFFFF;
|
||||
/* Start with tick timer interrupts disabled... */
|
||||
portTIMER_REG_BASE_PTR->TC_IDR = 0xFFFFFFFF;
|
||||
|
||||
/* Clear any pending tick timer interrupts... */
|
||||
ulDummy = portTIMER_REG_BASE_PTR->TC_SR;
|
||||
/* Clear any pending tick timer interrupts... */
|
||||
ulDummy = portTIMER_REG_BASE_PTR->TC_SR;
|
||||
|
||||
/* Store interrupt handler function address in tick timer vector register...
|
||||
* The ISR installed depends on whether the preemptive or cooperative
|
||||
* scheduler is being used. */
|
||||
#if configUSE_PREEMPTION == 1
|
||||
{
|
||||
extern void( vPreemptiveTick )( void );
|
||||
AT91C_BASE_AIC->AIC_SVR[ portTIMER_AIC_CHANNEL ] = ( uint32_t ) vPreemptiveTick;
|
||||
}
|
||||
#else // else use cooperative scheduler
|
||||
{
|
||||
extern void( vNonPreemptiveTick )( void );
|
||||
AT91C_BASE_AIC->AIC_SVR[ portTIMER_AIC_CHANNEL ] = ( uint32_t ) vNonPreemptiveTick;
|
||||
}
|
||||
#endif
|
||||
/* Store interrupt handler function address in tick timer vector register...
|
||||
The ISR installed depends on whether the preemptive or cooperative
|
||||
scheduler is being used. */
|
||||
#if configUSE_PREEMPTION == 1
|
||||
{
|
||||
extern void ( vPreemptiveTick )( void );
|
||||
AT91C_BASE_AIC->AIC_SVR[portTIMER_AIC_CHANNEL] = ( uint32_t ) vPreemptiveTick;
|
||||
}
|
||||
#else // else use cooperative scheduler
|
||||
{
|
||||
extern void ( vNonPreemptiveTick )( void );
|
||||
AT91C_BASE_AIC->AIC_SVR[portTIMER_AIC_CHANNEL] = ( uint32_t ) vNonPreemptiveTick;
|
||||
}
|
||||
#endif
|
||||
|
||||
/* Tick timer interrupt level-sensitive, priority 6... */
|
||||
AT91C_BASE_AIC->AIC_SMR[ portTIMER_AIC_CHANNEL ] = AIC_SRCTYPE_INT_LEVEL_SENSITIVE | portTICK_PRIORITY_6;
|
||||
/* Tick timer interrupt level-sensitive, priority 6... */
|
||||
AT91C_BASE_AIC->AIC_SMR[ portTIMER_AIC_CHANNEL ] = AIC_SRCTYPE_INT_LEVEL_SENSITIVE | portTICK_PRIORITY_6;
|
||||
|
||||
/* Enable the tick timer interrupt...
|
||||
*
|
||||
* First at timer level */
|
||||
portTIMER_REG_BASE_PTR->TC_IER = TC_CPCS;
|
||||
/* Enable the tick timer interrupt...
|
||||
|
||||
/* Then at the AIC level. */
|
||||
AT91C_BASE_AIC->AIC_IECR = ( 1 << portTIMER_AIC_CHANNEL );
|
||||
First at timer level */
|
||||
portTIMER_REG_BASE_PTR->TC_IER = TC_CPCS;
|
||||
|
||||
/* Calculate timer compare value to achieve the desired tick rate... */
|
||||
if( ( configCPU_CLOCK_HZ / ( configTICK_RATE_HZ * 2 ) ) <= 0xFFFF )
|
||||
{
|
||||
/* The tick rate is fast enough for us to use the faster timer input
|
||||
* clock (main clock / 2). */
|
||||
portTIMER_REG_BASE_PTR->TC_CMR = TC_WAVE | TC_CLKS_MCK2 | TC_BURST_NONE | TC_CPCTRG;
|
||||
portTIMER_REG_BASE_PTR->TC_RC = configCPU_CLOCK_HZ / ( configTICK_RATE_HZ * 2 );
|
||||
}
|
||||
else
|
||||
{
|
||||
/* We must use a slower timer input clock (main clock / 8) because the
|
||||
* tick rate is too slow for the faster input clock. */
|
||||
portTIMER_REG_BASE_PTR->TC_CMR = TC_WAVE | TC_CLKS_MCK8 | TC_BURST_NONE | TC_CPCTRG;
|
||||
portTIMER_REG_BASE_PTR->TC_RC = configCPU_CLOCK_HZ / ( configTICK_RATE_HZ * 8 );
|
||||
}
|
||||
/* Then at the AIC level. */
|
||||
AT91C_BASE_AIC->AIC_IECR = (1 << portTIMER_AIC_CHANNEL);
|
||||
|
||||
/* Start tick timer... */
|
||||
portTIMER_REG_BASE_PTR->TC_CCR = TC_SWTRG | TC_CLKEN;
|
||||
/* Calculate timer compare value to achieve the desired tick rate... */
|
||||
if( (configCPU_CLOCK_HZ / (configTICK_RATE_HZ * 2) ) <= 0xFFFF )
|
||||
{
|
||||
/* The tick rate is fast enough for us to use the faster timer input
|
||||
clock (main clock / 2). */
|
||||
portTIMER_REG_BASE_PTR->TC_CMR = TC_WAVE | TC_CLKS_MCK2 | TC_BURST_NONE | TC_CPCTRG;
|
||||
portTIMER_REG_BASE_PTR->TC_RC = configCPU_CLOCK_HZ / (configTICK_RATE_HZ * 2);
|
||||
}
|
||||
else
|
||||
{
|
||||
/* We must use a slower timer input clock (main clock / 8) because the
|
||||
tick rate is too slow for the faster input clock. */
|
||||
portTIMER_REG_BASE_PTR->TC_CMR = TC_WAVE | TC_CLKS_MCK8 | TC_BURST_NONE | TC_CPCTRG;
|
||||
portTIMER_REG_BASE_PTR->TC_RC = configCPU_CLOCK_HZ / (configTICK_RATE_HZ * 8);
|
||||
}
|
||||
|
||||
/* Start tick timer... */
|
||||
portTIMER_REG_BASE_PTR->TC_CCR = TC_SWTRG | TC_CLKEN;
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
|
|
|
@ -19,25 +19,25 @@
|
|||
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
* http://www.FreeRTOS.org
|
||||
* http://aws.amazon.com/freertos
|
||||
* https://www.FreeRTOS.org
|
||||
* https://github.com/FreeRTOS
|
||||
*
|
||||
* 1 tab == 4 spaces!
|
||||
*/
|
||||
|
||||
|
||||
/*-----------------------------------------------------------
|
||||
* Components that can be compiled to either ARM or THUMB mode are
|
||||
* contained in port.c The ISR routines, which can only be compiled
|
||||
* to ARM mode, are contained in this file.
|
||||
*----------------------------------------------------------*/
|
||||
* Components that can be compiled to either ARM or THUMB mode are
|
||||
* contained in port.c The ISR routines, which can only be compiled
|
||||
* to ARM mode, are contained in this file.
|
||||
*----------------------------------------------------------*/
|
||||
|
||||
/*
|
||||
* Changes from V3.2.4
|
||||
*
|
||||
+ The assembler statements are now included in a single asm block rather
|
||||
+ than each line having its own asm block.
|
||||
*/
|
||||
Changes from V3.2.4
|
||||
|
||||
+ The assembler statements are now included in a single asm block rather
|
||||
than each line having its own asm block.
|
||||
*/
|
||||
|
||||
|
||||
/* Scheduler includes. */
|
||||
|
@ -45,18 +45,18 @@
|
|||
#include "task.h"
|
||||
|
||||
/* Constants required to handle interrupts. */
|
||||
#define portCLEAR_AIC_INTERRUPT ( ( uint32_t ) 0 )
|
||||
#define portCLEAR_AIC_INTERRUPT ( ( uint32_t ) 0 )
|
||||
|
||||
/* Constants required to handle critical sections. */
|
||||
#define portNO_CRITICAL_NESTING ( ( uint32_t ) 0 )
|
||||
#define portNO_CRITICAL_NESTING ( ( uint32_t ) 0 )
|
||||
volatile uint32_t ulCriticalNesting = 9999UL;
|
||||
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* ISR to handle manual context switches (from a call to taskYIELD()). */
|
||||
void vPortYieldProcessor( void ) __attribute__( ( interrupt( "SWI" ), naked ) );
|
||||
void vPortYieldProcessor( void ) __attribute__((interrupt("SWI"), naked));
|
||||
|
||||
/*
|
||||
/*
|
||||
* The scheduler can only be started from ARM mode, hence the inclusion of this
|
||||
* function here.
|
||||
*/
|
||||
|
@ -65,93 +65,93 @@ void vPortISRStartFirstTask( void );
|
|||
|
||||
void vPortISRStartFirstTask( void )
|
||||
{
|
||||
/* Simply start the scheduler. This is included here as it can only be
|
||||
* called from ARM mode. */
|
||||
portRESTORE_CONTEXT();
|
||||
/* Simply start the scheduler. This is included here as it can only be
|
||||
called from ARM mode. */
|
||||
portRESTORE_CONTEXT();
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/*
|
||||
* Called by portYIELD() or taskYIELD() to manually force a context switch.
|
||||
*
|
||||
* When a context switch is performed from the task level the saved task
|
||||
* When a context switch is performed from the task level the saved task
|
||||
* context is made to look as if it occurred from within the tick ISR. This
|
||||
* way the same restore context function can be used when restoring the context
|
||||
* saved from the ISR or that saved from a call to vPortYieldProcessor.
|
||||
*/
|
||||
void vPortYieldProcessor( void )
|
||||
{
|
||||
/* Within an IRQ ISR the link register has an offset from the true return
|
||||
* address, but an SWI ISR does not. Add the offset manually so the same
|
||||
* ISR return code can be used in both cases. */
|
||||
asm volatile ( "ADD LR, LR, #4");
|
||||
/* Within an IRQ ISR the link register has an offset from the true return
|
||||
address, but an SWI ISR does not. Add the offset manually so the same
|
||||
ISR return code can be used in both cases. */
|
||||
asm volatile ( "ADD LR, LR, #4" );
|
||||
|
||||
/* Perform the context switch. First save the context of the current task. */
|
||||
portSAVE_CONTEXT();
|
||||
/* Perform the context switch. First save the context of the current task. */
|
||||
portSAVE_CONTEXT();
|
||||
|
||||
/* Find the highest priority task that is ready to run. */
|
||||
vTaskSwitchContext();
|
||||
/* Find the highest priority task that is ready to run. */
|
||||
vTaskSwitchContext();
|
||||
|
||||
/* Restore the context of the new task. */
|
||||
portRESTORE_CONTEXT();
|
||||
/* Restore the context of the new task. */
|
||||
portRESTORE_CONTEXT();
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/*
|
||||
/*
|
||||
* The ISR used for the scheduler tick depends on whether the cooperative or
|
||||
* the preemptive scheduler is being used.
|
||||
*/
|
||||
|
||||
#if configUSE_PREEMPTION == 0
|
||||
|
||||
/* The cooperative scheduler requires a normal IRQ service routine to
|
||||
* simply increment the system tick. */
|
||||
void vNonPreemptiveTick( void ) __attribute__( ( interrupt( "IRQ" ) ) );
|
||||
void vNonPreemptiveTick( void )
|
||||
{
|
||||
static volatile uint32_t ulDummy;
|
||||
/* The cooperative scheduler requires a normal IRQ service routine to
|
||||
simply increment the system tick. */
|
||||
void vNonPreemptiveTick( void ) __attribute__ ((interrupt ("IRQ")));
|
||||
void vNonPreemptiveTick( void )
|
||||
{
|
||||
static volatile uint32_t ulDummy;
|
||||
|
||||
/* Clear tick timer interrupt indication. */
|
||||
ulDummy = portTIMER_REG_BASE_PTR->TC_SR;
|
||||
/* Clear tick timer interrupt indication. */
|
||||
ulDummy = portTIMER_REG_BASE_PTR->TC_SR;
|
||||
|
||||
xTaskIncrementTick();
|
||||
xTaskIncrementTick();
|
||||
|
||||
/* Acknowledge the interrupt at AIC level... */
|
||||
AT91C_BASE_AIC->AIC_EOICR = portCLEAR_AIC_INTERRUPT;
|
||||
}
|
||||
/* Acknowledge the interrupt at AIC level... */
|
||||
AT91C_BASE_AIC->AIC_EOICR = portCLEAR_AIC_INTERRUPT;
|
||||
}
|
||||
|
||||
#else /* else preemption is turned on */
|
||||
#else /* else preemption is turned on */
|
||||
|
||||
/* The preemptive scheduler is defined as "naked" as the full context is
|
||||
* saved on entry as part of the context switch. */
|
||||
void vPreemptiveTick( void ) __attribute__( ( naked ) );
|
||||
void vPreemptiveTick( void )
|
||||
{
|
||||
/* Save the context of the interrupted task. */
|
||||
portSAVE_CONTEXT();
|
||||
/* The preemptive scheduler is defined as "naked" as the full context is
|
||||
saved on entry as part of the context switch. */
|
||||
void vPreemptiveTick( void ) __attribute__((naked));
|
||||
void vPreemptiveTick( void )
|
||||
{
|
||||
/* Save the context of the interrupted task. */
|
||||
portSAVE_CONTEXT();
|
||||
|
||||
/* WARNING - Do not use local (stack) variables here. Use globals
|
||||
* if you must! */
|
||||
static volatile uint32_t ulDummy;
|
||||
/* WARNING - Do not use local (stack) variables here. Use globals
|
||||
if you must! */
|
||||
static volatile uint32_t ulDummy;
|
||||
|
||||
/* Clear tick timer interrupt indication. */
|
||||
ulDummy = portTIMER_REG_BASE_PTR->TC_SR;
|
||||
/* Clear tick timer interrupt indication. */
|
||||
ulDummy = portTIMER_REG_BASE_PTR->TC_SR;
|
||||
|
||||
/* Increment the RTOS tick count, then look for the highest priority
|
||||
* task that is ready to run. */
|
||||
if( xTaskIncrementTick() != pdFALSE )
|
||||
{
|
||||
vTaskSwitchContext();
|
||||
}
|
||||
/* Increment the RTOS tick count, then look for the highest priority
|
||||
task that is ready to run. */
|
||||
if( xTaskIncrementTick() != pdFALSE )
|
||||
{
|
||||
vTaskSwitchContext();
|
||||
}
|
||||
|
||||
/* Acknowledge the interrupt at AIC level... */
|
||||
AT91C_BASE_AIC->AIC_EOICR = portCLEAR_AIC_INTERRUPT;
|
||||
/* Acknowledge the interrupt at AIC level... */
|
||||
AT91C_BASE_AIC->AIC_EOICR = portCLEAR_AIC_INTERRUPT;
|
||||
|
||||
/* Restore the context of the new task. */
|
||||
portRESTORE_CONTEXT();
|
||||
}
|
||||
/* Restore the context of the new task. */
|
||||
portRESTORE_CONTEXT();
|
||||
}
|
||||
|
||||
#endif /* if configUSE_PREEMPTION == 0 */
|
||||
#endif
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/*
|
||||
|
@ -162,71 +162,72 @@ void vPortYieldProcessor( void )
|
|||
*/
|
||||
#ifdef THUMB_INTERWORK
|
||||
|
||||
void vPortDisableInterruptsFromThumb( void ) __attribute__( ( naked ) );
|
||||
void vPortEnableInterruptsFromThumb( void ) __attribute__( ( naked ) );
|
||||
void vPortDisableInterruptsFromThumb( void ) __attribute__ ((naked));
|
||||
void vPortEnableInterruptsFromThumb( void ) __attribute__ ((naked));
|
||||
|
||||
void vPortDisableInterruptsFromThumb( void )
|
||||
{
|
||||
asm volatile (
|
||||
"STMDB SP!, {R0} \n\t"/* Push R0. */
|
||||
"MRS R0, CPSR \n\t"/* Get CPSR. */
|
||||
"ORR R0, R0, #0xC0 \n\t"/* Disable IRQ, FIQ. */
|
||||
"MSR CPSR, R0 \n\t"/* Write back modified value. */
|
||||
"LDMIA SP!, {R0} \n\t"/* Pop R0. */
|
||||
"BX R14"); /* Return back to thumb. */
|
||||
}
|
||||
|
||||
void vPortEnableInterruptsFromThumb( void )
|
||||
{
|
||||
asm volatile (
|
||||
"STMDB SP!, {R0} \n\t"/* Push R0. */
|
||||
"MRS R0, CPSR \n\t"/* Get CPSR. */
|
||||
"BIC R0, R0, #0xC0 \n\t"/* Enable IRQ, FIQ. */
|
||||
"MSR CPSR, R0 \n\t"/* Write back modified value. */
|
||||
"LDMIA SP!, {R0} \n\t"/* Pop R0. */
|
||||
"BX R14"); /* Return back to thumb. */
|
||||
}
|
||||
void vPortDisableInterruptsFromThumb( void )
|
||||
{
|
||||
asm volatile (
|
||||
"STMDB SP!, {R0} \n\t" /* Push R0. */
|
||||
"MRS R0, CPSR \n\t" /* Get CPSR. */
|
||||
"ORR R0, R0, #0xC0 \n\t" /* Disable IRQ, FIQ. */
|
||||
"MSR CPSR, R0 \n\t" /* Write back modified value. */
|
||||
"LDMIA SP!, {R0} \n\t" /* Pop R0. */
|
||||
"BX R14" ); /* Return back to thumb. */
|
||||
}
|
||||
|
||||
void vPortEnableInterruptsFromThumb( void )
|
||||
{
|
||||
asm volatile (
|
||||
"STMDB SP!, {R0} \n\t" /* Push R0. */
|
||||
"MRS R0, CPSR \n\t" /* Get CPSR. */
|
||||
"BIC R0, R0, #0xC0 \n\t" /* Enable IRQ, FIQ. */
|
||||
"MSR CPSR, R0 \n\t" /* Write back modified value. */
|
||||
"LDMIA SP!, {R0} \n\t" /* Pop R0. */
|
||||
"BX R14" ); /* Return back to thumb. */
|
||||
}
|
||||
|
||||
#endif /* THUMB_INTERWORK */
|
||||
|
||||
/* The code generated by the GCC compiler uses the stack in different ways at
|
||||
* different optimisation levels. The interrupt flags can therefore not always
|
||||
* be saved to the stack. Instead the critical section nesting level is stored
|
||||
* in a variable, which is then saved as part of the stack context. */
|
||||
different optimisation levels. The interrupt flags can therefore not always
|
||||
be saved to the stack. Instead the critical section nesting level is stored
|
||||
in a variable, which is then saved as part of the stack context. */
|
||||
void vPortEnterCritical( void )
|
||||
{
|
||||
/* Disable interrupts as per portDISABLE_INTERRUPTS(); */
|
||||
asm volatile (
|
||||
"STMDB SP!, {R0} \n\t"/* Push R0. */
|
||||
"MRS R0, CPSR \n\t"/* Get CPSR. */
|
||||
"ORR R0, R0, #0xC0 \n\t"/* Disable IRQ, FIQ. */
|
||||
"MSR CPSR, R0 \n\t"/* Write back modified value. */
|
||||
"LDMIA SP!, {R0}"); /* Pop R0. */
|
||||
/* Disable interrupts as per portDISABLE_INTERRUPTS(); */
|
||||
asm volatile (
|
||||
"STMDB SP!, {R0} \n\t" /* Push R0. */
|
||||
"MRS R0, CPSR \n\t" /* Get CPSR. */
|
||||
"ORR R0, R0, #0xC0 \n\t" /* Disable IRQ, FIQ. */
|
||||
"MSR CPSR, R0 \n\t" /* Write back modified value. */
|
||||
"LDMIA SP!, {R0}" ); /* Pop R0. */
|
||||
|
||||
/* Now interrupts are disabled ulCriticalNesting can be accessed
|
||||
* directly. Increment ulCriticalNesting to keep a count of how many times
|
||||
* portENTER_CRITICAL() has been called. */
|
||||
ulCriticalNesting++;
|
||||
/* Now interrupts are disabled ulCriticalNesting can be accessed
|
||||
directly. Increment ulCriticalNesting to keep a count of how many times
|
||||
portENTER_CRITICAL() has been called. */
|
||||
ulCriticalNesting++;
|
||||
}
|
||||
|
||||
void vPortExitCritical( void )
|
||||
{
|
||||
if( ulCriticalNesting > portNO_CRITICAL_NESTING )
|
||||
{
|
||||
/* Decrement the nesting count as we are leaving a critical section. */
|
||||
ulCriticalNesting--;
|
||||
if( ulCriticalNesting > portNO_CRITICAL_NESTING )
|
||||
{
|
||||
/* Decrement the nesting count as we are leaving a critical section. */
|
||||
ulCriticalNesting--;
|
||||
|
||||
/* If the nesting level has reached zero then interrupts should be
|
||||
* re-enabled. */
|
||||
if( ulCriticalNesting == portNO_CRITICAL_NESTING )
|
||||
{
|
||||
/* Enable interrupts as per portEXIT_CRITICAL(). */
|
||||
asm volatile (
|
||||
"STMDB SP!, {R0} \n\t"/* Push R0. */
|
||||
"MRS R0, CPSR \n\t"/* Get CPSR. */
|
||||
"BIC R0, R0, #0xC0 \n\t"/* Enable IRQ, FIQ. */
|
||||
"MSR CPSR, R0 \n\t"/* Write back modified value. */
|
||||
"LDMIA SP!, {R0}"); /* Pop R0. */
|
||||
}
|
||||
}
|
||||
/* If the nesting level has reached zero then interrupts should be
|
||||
re-enabled. */
|
||||
if( ulCriticalNesting == portNO_CRITICAL_NESTING )
|
||||
{
|
||||
/* Enable interrupts as per portEXIT_CRITICAL(). */
|
||||
asm volatile (
|
||||
"STMDB SP!, {R0} \n\t" /* Push R0. */
|
||||
"MRS R0, CPSR \n\t" /* Get CPSR. */
|
||||
"BIC R0, R0, #0xC0 \n\t" /* Enable IRQ, FIQ. */
|
||||
"MSR CPSR, R0 \n\t" /* Write back modified value. */
|
||||
"LDMIA SP!, {R0}" ); /* Pop R0. */
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
|
|
|
@ -19,41 +19,41 @@
|
|||
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
* http://www.FreeRTOS.org
|
||||
* http://aws.amazon.com/freertos
|
||||
* https://www.FreeRTOS.org
|
||||
* https://github.com/FreeRTOS
|
||||
*
|
||||
* 1 tab == 4 spaces!
|
||||
*/
|
||||
|
||||
/*
|
||||
* Changes from V3.2.3
|
||||
*
|
||||
+ Modified portENTER_SWITCHING_ISR() to allow use with GCC V4.0.1.
|
||||
+
|
||||
+ Changes from V3.2.4
|
||||
+
|
||||
+ Removed the use of the %0 parameter within the assembler macros and
|
||||
+ replaced them with hard coded registers. This will ensure the
|
||||
+ assembler does not select the link register as the temp register as
|
||||
+ was occasionally happening previously.
|
||||
+
|
||||
+ The assembler statements are now included in a single asm block rather
|
||||
+ than each line having its own asm block.
|
||||
+
|
||||
+ Changes from V4.5.0
|
||||
+
|
||||
+ Removed the portENTER_SWITCHING_ISR() and portEXIT_SWITCHING_ISR() macros
|
||||
+ and replaced them with portYIELD_FROM_ISR() macro. Application code
|
||||
+ should now make use of the portSAVE_CONTEXT() and portRESTORE_CONTEXT()
|
||||
+ macros as per the V4.5.1 demo code.
|
||||
*/
|
||||
Changes from V3.2.3
|
||||
|
||||
+ Modified portENTER_SWITCHING_ISR() to allow use with GCC V4.0.1.
|
||||
|
||||
Changes from V3.2.4
|
||||
|
||||
+ Removed the use of the %0 parameter within the assembler macros and
|
||||
replaced them with hard coded registers. This will ensure the
|
||||
assembler does not select the link register as the temp register as
|
||||
was occasionally happening previously.
|
||||
|
||||
+ The assembler statements are now included in a single asm block rather
|
||||
than each line having its own asm block.
|
||||
|
||||
Changes from V4.5.0
|
||||
|
||||
+ Removed the portENTER_SWITCHING_ISR() and portEXIT_SWITCHING_ISR() macros
|
||||
and replaced them with portYIELD_FROM_ISR() macro. Application code
|
||||
should now make use of the portSAVE_CONTEXT() and portRESTORE_CONTEXT()
|
||||
macros as per the V4.5.1 demo code.
|
||||
*/
|
||||
|
||||
#ifndef PORTMACRO_H
|
||||
#define PORTMACRO_H
|
||||
#define PORTMACRO_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/*-----------------------------------------------------------
|
||||
* Port specific definitions.
|
||||
|
@ -66,42 +66,42 @@
|
|||
*/
|
||||
|
||||
/* Type definitions. */
|
||||
#define portCHAR char
|
||||
#define portFLOAT float
|
||||
#define portDOUBLE double
|
||||
#define portLONG long
|
||||
#define portSHORT short
|
||||
#define portSTACK_TYPE uint32_t
|
||||
#define portBASE_TYPE long
|
||||
#define portCHAR char
|
||||
#define portFLOAT float
|
||||
#define portDOUBLE double
|
||||
#define portLONG long
|
||||
#define portSHORT short
|
||||
#define portSTACK_TYPE uint32_t
|
||||
#define portBASE_TYPE long
|
||||
|
||||
typedef portSTACK_TYPE StackType_t;
|
||||
typedef long BaseType_t;
|
||||
typedef unsigned long UBaseType_t;
|
||||
typedef portSTACK_TYPE StackType_t;
|
||||
typedef long BaseType_t;
|
||||
typedef unsigned long UBaseType_t;
|
||||
|
||||
#if ( configUSE_16_BIT_TICKS == 1 )
|
||||
typedef uint16_t TickType_t;
|
||||
#define portMAX_DELAY ( TickType_t ) 0xffff
|
||||
#else
|
||||
typedef uint32_t TickType_t;
|
||||
#define portMAX_DELAY ( TickType_t ) 0xffffffffUL
|
||||
#endif
|
||||
#if( configUSE_16_BIT_TICKS == 1 )
|
||||
typedef uint16_t TickType_t;
|
||||
#define portMAX_DELAY ( TickType_t ) 0xffff
|
||||
#else
|
||||
typedef uint32_t TickType_t;
|
||||
#define portMAX_DELAY ( TickType_t ) 0xffffffffUL
|
||||
#endif
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* Hardware specifics. */
|
||||
#define portSTACK_GROWTH ( -1 )
|
||||
#define portTICK_PERIOD_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )
|
||||
#define portBYTE_ALIGNMENT 8
|
||||
#define portYIELD() asm volatile ( "SWI 0" )
|
||||
#define portNOP() asm volatile ( "NOP" )
|
||||
#define portSTACK_GROWTH ( -1 )
|
||||
#define portTICK_PERIOD_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )
|
||||
#define portBYTE_ALIGNMENT 8
|
||||
#define portYIELD() asm volatile ( "SWI 0" )
|
||||
#define portNOP() asm volatile ( "NOP" )
|
||||
|
||||
/*
|
||||
* These define the timer to use for generating the tick interrupt.
|
||||
* They are put in this file so they can be shared between "port.c"
|
||||
* and "portisr.c".
|
||||
*/
|
||||
#define portTIMER_REG_BASE_PTR AT91C_BASE_TC0
|
||||
#define portTIMER_CLK_ENABLE_BIT AT91C_PS_TC0
|
||||
#define portTIMER_AIC_CHANNEL ( ( uint32_t ) 4 )
|
||||
#define portTIMER_REG_BASE_PTR AT91C_BASE_TC0
|
||||
#define portTIMER_CLK_ENABLE_BIT AT91C_PS_TC0
|
||||
#define portTIMER_AIC_CHANNEL ( ( uint32_t ) 4 )
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* Task utilities. */
|
||||
|
@ -113,90 +113,90 @@
|
|||
* THUMB mode code will result in a compile time error.
|
||||
*/
|
||||
|
||||
#define portRESTORE_CONTEXT() \
|
||||
{ \
|
||||
extern volatile void * volatile pxCurrentTCB; \
|
||||
extern volatile uint32_t ulCriticalNesting; \
|
||||
\
|
||||
/* Set the LR to the task stack. */ \
|
||||
asm volatile ( \
|
||||
"LDR R0, =pxCurrentTCB \n\t"\
|
||||
"LDR R0, [R0] \n\t"\
|
||||
"LDR LR, [R0] \n\t"\
|
||||
\
|
||||
/* The critical nesting depth is the first item on the stack. */ \
|
||||
/* Load it into the ulCriticalNesting variable. */ \
|
||||
"LDR R0, =ulCriticalNesting \n\t"\
|
||||
"LDMFD LR!, {R1} \n\t"\
|
||||
"STR R1, [R0] \n\t"\
|
||||
\
|
||||
/* Get the SPSR from the stack. */ \
|
||||
"LDMFD LR!, {R0} \n\t"\
|
||||
"MSR SPSR, R0 \n\t"\
|
||||
\
|
||||
/* Restore all system mode registers for the task. */ \
|
||||
"LDMFD LR, {R0-R14}^ \n\t"\
|
||||
"NOP \n\t"\
|
||||
\
|
||||
/* Restore the return address. */ \
|
||||
"LDR LR, [LR, #+60] \n\t"\
|
||||
\
|
||||
/* And return - correcting the offset in the LR to obtain the */ \
|
||||
/* correct address. */ \
|
||||
"SUBS PC, LR, #4 \n\t"\
|
||||
); \
|
||||
( void ) ulCriticalNesting; \
|
||||
( void ) pxCurrentTCB; \
|
||||
}
|
||||
#define portRESTORE_CONTEXT() \
|
||||
{ \
|
||||
extern volatile void * volatile pxCurrentTCB; \
|
||||
extern volatile uint32_t ulCriticalNesting; \
|
||||
\
|
||||
/* Set the LR to the task stack. */ \
|
||||
asm volatile ( \
|
||||
"LDR R0, =pxCurrentTCB \n\t" \
|
||||
"LDR R0, [R0] \n\t" \
|
||||
"LDR LR, [R0] \n\t" \
|
||||
\
|
||||
/* The critical nesting depth is the first item on the stack. */ \
|
||||
/* Load it into the ulCriticalNesting variable. */ \
|
||||
"LDR R0, =ulCriticalNesting \n\t" \
|
||||
"LDMFD LR!, {R1} \n\t" \
|
||||
"STR R1, [R0] \n\t" \
|
||||
\
|
||||
/* Get the SPSR from the stack. */ \
|
||||
"LDMFD LR!, {R0} \n\t" \
|
||||
"MSR SPSR, R0 \n\t" \
|
||||
\
|
||||
/* Restore all system mode registers for the task. */ \
|
||||
"LDMFD LR, {R0-R14}^ \n\t" \
|
||||
"NOP \n\t" \
|
||||
\
|
||||
/* Restore the return address. */ \
|
||||
"LDR LR, [LR, #+60] \n\t" \
|
||||
\
|
||||
/* And return - correcting the offset in the LR to obtain the */ \
|
||||
/* correct address. */ \
|
||||
"SUBS PC, LR, #4 \n\t" \
|
||||
); \
|
||||
( void ) ulCriticalNesting; \
|
||||
( void ) pxCurrentTCB; \
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
#define portSAVE_CONTEXT() \
|
||||
{ \
|
||||
extern volatile void * volatile pxCurrentTCB; \
|
||||
extern volatile uint32_t ulCriticalNesting; \
|
||||
\
|
||||
/* Push R0 as we are going to use the register. */ \
|
||||
asm volatile ( \
|
||||
"STMDB SP!, {R0} \n\t"\
|
||||
\
|
||||
/* Set R0 to point to the task stack pointer. */ \
|
||||
"STMDB SP,{SP}^ \n\t"\
|
||||
"NOP \n\t"\
|
||||
"SUB SP, SP, #4 \n\t"\
|
||||
"LDMIA SP!,{R0} \n\t"\
|
||||
\
|
||||
/* Push the return address onto the stack. */ \
|
||||
"STMDB R0!, {LR} \n\t"\
|
||||
\
|
||||
/* Now we have saved LR we can use it instead of R0. */ \
|
||||
"MOV LR, R0 \n\t"\
|
||||
\
|
||||
/* Pop R0 so we can save it onto the system mode stack. */ \
|
||||
"LDMIA SP!, {R0} \n\t"\
|
||||
\
|
||||
/* Push all the system mode registers onto the task stack. */ \
|
||||
"STMDB LR,{R0-LR}^ \n\t"\
|
||||
"NOP \n\t"\
|
||||
"SUB LR, LR, #60 \n\t"\
|
||||
\
|
||||
/* Push the SPSR onto the task stack. */ \
|
||||
"MRS R0, SPSR \n\t"\
|
||||
"STMDB LR!, {R0} \n\t"\
|
||||
\
|
||||
"LDR R0, =ulCriticalNesting \n\t"\
|
||||
"LDR R0, [R0] \n\t"\
|
||||
"STMDB LR!, {R0} \n\t"\
|
||||
\
|
||||
/* Store the new top of stack for the task. */ \
|
||||
"LDR R0, =pxCurrentTCB \n\t"\
|
||||
"LDR R0, [R0] \n\t"\
|
||||
"STR LR, [R0] \n\t"\
|
||||
); \
|
||||
( void ) ulCriticalNesting; \
|
||||
( void ) pxCurrentTCB; \
|
||||
}
|
||||
#define portSAVE_CONTEXT() \
|
||||
{ \
|
||||
extern volatile void * volatile pxCurrentTCB; \
|
||||
extern volatile uint32_t ulCriticalNesting; \
|
||||
\
|
||||
/* Push R0 as we are going to use the register. */ \
|
||||
asm volatile ( \
|
||||
"STMDB SP!, {R0} \n\t" \
|
||||
\
|
||||
/* Set R0 to point to the task stack pointer. */ \
|
||||
"STMDB SP,{SP}^ \n\t" \
|
||||
"NOP \n\t" \
|
||||
"SUB SP, SP, #4 \n\t" \
|
||||
"LDMIA SP!,{R0} \n\t" \
|
||||
\
|
||||
/* Push the return address onto the stack. */ \
|
||||
"STMDB R0!, {LR} \n\t" \
|
||||
\
|
||||
/* Now we have saved LR we can use it instead of R0. */ \
|
||||
"MOV LR, R0 \n\t" \
|
||||
\
|
||||
/* Pop R0 so we can save it onto the system mode stack. */ \
|
||||
"LDMIA SP!, {R0} \n\t" \
|
||||
\
|
||||
/* Push all the system mode registers onto the task stack. */ \
|
||||
"STMDB LR,{R0-LR}^ \n\t" \
|
||||
"NOP \n\t" \
|
||||
"SUB LR, LR, #60 \n\t" \
|
||||
\
|
||||
/* Push the SPSR onto the task stack. */ \
|
||||
"MRS R0, SPSR \n\t" \
|
||||
"STMDB LR!, {R0} \n\t" \
|
||||
\
|
||||
"LDR R0, =ulCriticalNesting \n\t" \
|
||||
"LDR R0, [R0] \n\t" \
|
||||
"STMDB LR!, {R0} \n\t" \
|
||||
\
|
||||
/* Store the new top of stack for the task. */ \
|
||||
"LDR R0, =pxCurrentTCB \n\t" \
|
||||
"LDR R0, [R0] \n\t" \
|
||||
"STR LR, [R0] \n\t" \
|
||||
); \
|
||||
( void ) ulCriticalNesting; \
|
||||
( void ) pxCurrentTCB; \
|
||||
}
|
||||
|
||||
#define portYIELD_FROM_ISR() vTaskSwitchContext()
|
||||
#define portYIELD_FROM_ISR() vTaskSwitchContext()
|
||||
|
||||
/* Critical section handling. */
|
||||
|
||||
|
@ -207,48 +207,49 @@
|
|||
* defined then the utilities are defined as macros here - as per other ports.
|
||||
*/
|
||||
|
||||
#ifdef THUMB_INTERWORK
|
||||
#ifdef THUMB_INTERWORK
|
||||
|
||||
extern void vPortDisableInterruptsFromThumb( void ) __attribute__( ( naked ) );
|
||||
extern void vPortEnableInterruptsFromThumb( void ) __attribute__( ( naked ) );
|
||||
extern void vPortDisableInterruptsFromThumb( void ) __attribute__ ((naked));
|
||||
extern void vPortEnableInterruptsFromThumb( void ) __attribute__ ((naked));
|
||||
|
||||
#define portDISABLE_INTERRUPTS() vPortDisableInterruptsFromThumb()
|
||||
#define portENABLE_INTERRUPTS() vPortEnableInterruptsFromThumb()
|
||||
#define portDISABLE_INTERRUPTS() vPortDisableInterruptsFromThumb()
|
||||
#define portENABLE_INTERRUPTS() vPortEnableInterruptsFromThumb()
|
||||
|
||||
#else
|
||||
#else
|
||||
|
||||
#define portDISABLE_INTERRUPTS() \
|
||||
asm volatile ( \
|
||||
"STMDB SP!, {R0} \n\t"/* Push R0. */\
|
||||
"MRS R0, CPSR \n\t"/* Get CPSR. */\
|
||||
"ORR R0, R0, #0xC0 \n\t"/* Disable IRQ, FIQ. */\
|
||||
"MSR CPSR, R0 \n\t"/* Write back modified value. */\
|
||||
"LDMIA SP!, {R0} ") /* Pop R0. */
|
||||
#define portDISABLE_INTERRUPTS() \
|
||||
asm volatile ( \
|
||||
"STMDB SP!, {R0} \n\t" /* Push R0. */ \
|
||||
"MRS R0, CPSR \n\t" /* Get CPSR. */ \
|
||||
"ORR R0, R0, #0xC0 \n\t" /* Disable IRQ, FIQ. */ \
|
||||
"MSR CPSR, R0 \n\t" /* Write back modified value. */ \
|
||||
"LDMIA SP!, {R0} " ) /* Pop R0. */
|
||||
|
||||
#define portENABLE_INTERRUPTS() \
|
||||
asm volatile ( \
|
||||
"STMDB SP!, {R0} \n\t"/* Push R0. */\
|
||||
"MRS R0, CPSR \n\t"/* Get CPSR. */\
|
||||
"BIC R0, R0, #0xC0 \n\t"/* Enable IRQ, FIQ. */\
|
||||
"MSR CPSR, R0 \n\t"/* Write back modified value. */\
|
||||
"LDMIA SP!, {R0} ") /* Pop R0. */
|
||||
#define portENABLE_INTERRUPTS() \
|
||||
asm volatile ( \
|
||||
"STMDB SP!, {R0} \n\t" /* Push R0. */ \
|
||||
"MRS R0, CPSR \n\t" /* Get CPSR. */ \
|
||||
"BIC R0, R0, #0xC0 \n\t" /* Enable IRQ, FIQ. */ \
|
||||
"MSR CPSR, R0 \n\t" /* Write back modified value. */ \
|
||||
"LDMIA SP!, {R0} " ) /* Pop R0. */
|
||||
|
||||
#endif /* THUMB_INTERWORK */
|
||||
#endif /* THUMB_INTERWORK */
|
||||
|
||||
extern void vPortEnterCritical( void );
|
||||
extern void vPortExitCritical( void );
|
||||
extern void vPortEnterCritical( void );
|
||||
extern void vPortExitCritical( void );
|
||||
|
||||
#define portENTER_CRITICAL() vPortEnterCritical();
|
||||
#define portEXIT_CRITICAL() vPortExitCritical();
|
||||
#define portENTER_CRITICAL() vPortEnterCritical();
|
||||
#define portEXIT_CRITICAL() vPortExitCritical();
|
||||
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* Task function macros as described on the FreeRTOS.org WEB site. */
|
||||
#define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void * pvParameters )
|
||||
#define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void * pvParameters )
|
||||
#define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void *pvParameters )
|
||||
#define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void *pvParameters )
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* PORTMACRO_H */
|
||||
|
||||
|
|
File diff suppressed because it is too large
Load diff
File diff suppressed because it is too large
Load diff
|
@ -1,50 +1,51 @@
|
|||
/** ---------------------------------------------------------------------------- */
|
||||
/** ATMEL Microcontroller Software Support - ROUSSET - */
|
||||
/** ---------------------------------------------------------------------------- */
|
||||
/** DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR */
|
||||
/** IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF */
|
||||
/** MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE */
|
||||
/** DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, */
|
||||
/** INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT */
|
||||
/** LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, */
|
||||
/** OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF */
|
||||
/** LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING */
|
||||
/** NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */
|
||||
/** EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */
|
||||
/** ---------------------------------------------------------------------------- */
|
||||
/** File Name : lib_AT91SAM7X256.h */
|
||||
/** Object : AT91SAM7X256 inlined functions */
|
||||
/** Generated : AT91 SW Application Group 05/20/2005 (16:22:29) */
|
||||
/** */
|
||||
/** CVS Reference : /lib_dbgu.h/1.1/Fri Jan 31 12:18:40 2003// */
|
||||
/** CVS Reference : /lib_pmc_SAM7X.h/1.1/Tue Feb 1 08:32:10 2005// */
|
||||
/** CVS Reference : /lib_VREG_6085B.h/1.1/Tue Feb 1 16:20:47 2005// */
|
||||
/** CVS Reference : /lib_rstc_6098A.h/1.1/Wed Oct 6 10:39:20 2004// */
|
||||
/** CVS Reference : /lib_ssc.h/1.4/Fri Jan 31 12:19:20 2003// */
|
||||
/** CVS Reference : /lib_wdtc_6080A.h/1.1/Wed Oct 6 10:38:30 2004// */
|
||||
/** CVS Reference : /lib_usart.h/1.5/Thu Nov 21 16:01:54 2002// */
|
||||
/** CVS Reference : /lib_spi2.h/1.1/Mon Aug 25 14:23:52 2003// */
|
||||
/** CVS Reference : /lib_pitc_6079A.h/1.2/Tue Nov 9 14:43:56 2004// */
|
||||
/** CVS Reference : /lib_aic_6075b.h/1.1/Fri May 20 14:01:19 2005// */
|
||||
/** CVS Reference : /lib_aes_6149a.h/1.1/Mon Jan 17 07:43:09 2005// */
|
||||
/** CVS Reference : /lib_twi.h/1.3/Mon Jul 19 14:27:58 2004// */
|
||||
/** CVS Reference : /lib_adc.h/1.6/Fri Oct 17 09:12:38 2003// */
|
||||
/** CVS Reference : /lib_rttc_6081A.h/1.1/Wed Oct 6 10:39:38 2004// */
|
||||
/** CVS Reference : /lib_udp.h/1.4/Wed Feb 16 08:39:34 2005// */
|
||||
/** CVS Reference : /lib_des3_6150a.h/1.1/Mon Jan 17 09:19:19 2005// */
|
||||
/** CVS Reference : /lib_tc_1753b.h/1.1/Fri Jan 31 12:20:02 2003// */
|
||||
/** CVS Reference : /lib_MC_SAM7X.h/1.1/Thu Mar 25 15:19:14 2004// */
|
||||
/** CVS Reference : /lib_pio.h/1.3/Fri Jan 31 12:18:56 2003// */
|
||||
/** CVS Reference : /lib_can_AT91.h/1.4/Fri Oct 17 09:12:50 2003// */
|
||||
/** CVS Reference : /lib_PWM_SAM.h/1.3/Thu Jan 22 10:10:50 2004// */
|
||||
/** CVS Reference : /lib_pdc.h/1.2/Tue Jul 2 13:29:40 2002// */
|
||||
/** ---------------------------------------------------------------------------- */
|
||||
//* ----------------------------------------------------------------------------
|
||||
//* ATMEL Microcontroller Software Support - ROUSSET -
|
||||
//* ----------------------------------------------------------------------------
|
||||
//* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
|
||||
//* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
//* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||
//* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
//* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
||||
//* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
|
||||
//* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
|
||||
//* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
|
||||
//* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
|
||||
//* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
//* ----------------------------------------------------------------------------
|
||||
//* File Name : lib_AT91SAM7X256.h
|
||||
//* Object : AT91SAM7X256 inlined functions
|
||||
//* Generated : AT91 SW Application Group 05/20/2005 (16:22:29)
|
||||
//*
|
||||
//* CVS Reference : /lib_dbgu.h/1.1/Fri Jan 31 12:18:40 2003//
|
||||
//* CVS Reference : /lib_pmc_SAM7X.h/1.1/Tue Feb 1 08:32:10 2005//
|
||||
//* CVS Reference : /lib_VREG_6085B.h/1.1/Tue Feb 1 16:20:47 2005//
|
||||
//* CVS Reference : /lib_rstc_6098A.h/1.1/Wed Oct 6 10:39:20 2004//
|
||||
//* CVS Reference : /lib_ssc.h/1.4/Fri Jan 31 12:19:20 2003//
|
||||
//* CVS Reference : /lib_wdtc_6080A.h/1.1/Wed Oct 6 10:38:30 2004//
|
||||
//* CVS Reference : /lib_usart.h/1.5/Thu Nov 21 16:01:54 2002//
|
||||
//* CVS Reference : /lib_spi2.h/1.1/Mon Aug 25 14:23:52 2003//
|
||||
//* CVS Reference : /lib_pitc_6079A.h/1.2/Tue Nov 9 14:43:56 2004//
|
||||
//* CVS Reference : /lib_aic_6075b.h/1.1/Fri May 20 14:01:19 2005//
|
||||
//* CVS Reference : /lib_aes_6149a.h/1.1/Mon Jan 17 07:43:09 2005//
|
||||
//* CVS Reference : /lib_twi.h/1.3/Mon Jul 19 14:27:58 2004//
|
||||
//* CVS Reference : /lib_adc.h/1.6/Fri Oct 17 09:12:38 2003//
|
||||
//* CVS Reference : /lib_rttc_6081A.h/1.1/Wed Oct 6 10:39:38 2004//
|
||||
//* CVS Reference : /lib_udp.h/1.4/Wed Feb 16 08:39:34 2005//
|
||||
//* CVS Reference : /lib_des3_6150a.h/1.1/Mon Jan 17 09:19:19 2005//
|
||||
//* CVS Reference : /lib_tc_1753b.h/1.1/Fri Jan 31 12:20:02 2003//
|
||||
//* CVS Reference : /lib_MC_SAM7X.h/1.1/Thu Mar 25 15:19:14 2004//
|
||||
//* CVS Reference : /lib_pio.h/1.3/Fri Jan 31 12:18:56 2003//
|
||||
//* CVS Reference : /lib_can_AT91.h/1.4/Fri Oct 17 09:12:50 2003//
|
||||
//* CVS Reference : /lib_PWM_SAM.h/1.3/Thu Jan 22 10:10:50 2004//
|
||||
//* CVS Reference : /lib_pdc.h/1.2/Tue Jul 2 13:29:40 2002//
|
||||
//* ----------------------------------------------------------------------------
|
||||
|
||||
|
||||
#include "AT91SAM7X256.h"
|
||||
|
||||
|
||||
/**---------------------------------------------------------------------------- */
|
||||
/** \fn AT91F_AIC_ConfigureIt */
|
||||
/** \brief Interrupt Handler Initialization */
|
||||
/**---------------------------------------------------------------------------- */
|
||||
//*----------------------------------------------------------------------------
|
||||
//* \fn AT91F_AIC_ConfigureIt
|
||||
//* \brief Interrupt Handler Initialization
|
||||
//*----------------------------------------------------------------------------
|
||||
|
||||
|
|
File diff suppressed because it is too large
Load diff
|
@ -19,20 +19,20 @@
|
|||
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
* http://www.FreeRTOS.org
|
||||
* http://aws.amazon.com/freertos
|
||||
* https://www.FreeRTOS.org
|
||||
* https://github.com/FreeRTOS
|
||||
*
|
||||
* 1 tab == 4 spaces!
|
||||
*/
|
||||
|
||||
|
||||
/*-----------------------------------------------------------
|
||||
* Implementation of functions defined in portable.h for the ARM7 port.
|
||||
*
|
||||
* Components that can be compiled to either ARM or THUMB mode are
|
||||
* contained in this file. The ISR routines, which can only be compiled
|
||||
* to ARM mode are contained in portISR.c.
|
||||
*----------------------------------------------------------*/
|
||||
* Implementation of functions defined in portable.h for the ARM7 port.
|
||||
*
|
||||
* Components that can be compiled to either ARM or THUMB mode are
|
||||
* contained in this file. The ISR routines, which can only be compiled
|
||||
* to ARM mode are contained in portISR.c.
|
||||
*----------------------------------------------------------*/
|
||||
|
||||
/* Standard includes. */
|
||||
#include <stdlib.h>
|
||||
|
@ -45,139 +45,137 @@
|
|||
#include "AT91SAM7X256.h"
|
||||
|
||||
/* Constants required to setup the task context. */
|
||||
#define portINITIAL_SPSR ( ( StackType_t ) 0x1f ) /* System mode, ARM mode, interrupts enabled. */
|
||||
#define portTHUMB_MODE_BIT ( ( StackType_t ) 0x20 )
|
||||
#define portINSTRUCTION_SIZE ( ( StackType_t ) 4 )
|
||||
#define portNO_CRITICAL_SECTION_NESTING ( ( StackType_t ) 0 )
|
||||
#define portINITIAL_SPSR ( ( StackType_t ) 0x1f ) /* System mode, ARM mode, interrupts enabled. */
|
||||
#define portTHUMB_MODE_BIT ( ( StackType_t ) 0x20 )
|
||||
#define portINSTRUCTION_SIZE ( ( StackType_t ) 4 )
|
||||
#define portNO_CRITICAL_SECTION_NESTING ( ( StackType_t ) 0 )
|
||||
|
||||
/* Constants required to setup the tick ISR. */
|
||||
#define portENABLE_TIMER ( ( uint8_t ) 0x01 )
|
||||
#define portPRESCALE_VALUE 0x00
|
||||
#define portINTERRUPT_ON_MATCH ( ( uint32_t ) 0x01 )
|
||||
#define portRESET_COUNT_ON_MATCH ( ( uint32_t ) 0x02 )
|
||||
#define portENABLE_TIMER ( ( uint8_t ) 0x01 )
|
||||
#define portPRESCALE_VALUE 0x00
|
||||
#define portINTERRUPT_ON_MATCH ( ( uint32_t ) 0x01 )
|
||||
#define portRESET_COUNT_ON_MATCH ( ( uint32_t ) 0x02 )
|
||||
|
||||
/* Constants required to setup the PIT. */
|
||||
#define portPIT_CLOCK_DIVISOR ( ( uint32_t ) 16 )
|
||||
#define portPIT_COUNTER_VALUE ( ( ( configCPU_CLOCK_HZ / portPIT_CLOCK_DIVISOR ) / 1000UL ) * portTICK_PERIOD_MS )
|
||||
#define portPIT_CLOCK_DIVISOR ( ( uint32_t ) 16 )
|
||||
#define portPIT_COUNTER_VALUE ( ( ( configCPU_CLOCK_HZ / portPIT_CLOCK_DIVISOR ) / 1000UL ) * portTICK_PERIOD_MS )
|
||||
|
||||
#define portINT_LEVEL_SENSITIVE 0
|
||||
#define portPIT_ENABLE ( ( uint16_t ) 0x1 << 24 )
|
||||
#define portPIT_INT_ENABLE ( ( uint16_t ) 0x1 << 25 )
|
||||
#define portINT_LEVEL_SENSITIVE 0
|
||||
#define portPIT_ENABLE ( ( uint16_t ) 0x1 << 24 )
|
||||
#define portPIT_INT_ENABLE ( ( uint16_t ) 0x1 << 25 )
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* Setup the timer to generate the tick interrupts. */
|
||||
static void prvSetupTimerInterrupt( void );
|
||||
|
||||
/*
|
||||
* The scheduler can only be started from ARM mode, so
|
||||
* vPortISRStartFirstSTask() is defined in portISR.c.
|
||||
/*
|
||||
* The scheduler can only be started from ARM mode, so
|
||||
* vPortISRStartFirstSTask() is defined in portISR.c.
|
||||
*/
|
||||
extern void vPortISRStartFirstTask( void );
|
||||
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/*
|
||||
* Initialise the stack of a task to look exactly as if a call to
|
||||
/*
|
||||
* Initialise the stack of a task to look exactly as if a call to
|
||||
* portSAVE_CONTEXT had been called.
|
||||
*
|
||||
* See header file for description.
|
||||
* See header file for description.
|
||||
*/
|
||||
StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
|
||||
TaskFunction_t pxCode,
|
||||
void * pvParameters )
|
||||
StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters )
|
||||
{
|
||||
StackType_t * pxOriginalTOS;
|
||||
StackType_t *pxOriginalTOS;
|
||||
|
||||
pxOriginalTOS = pxTopOfStack;
|
||||
pxOriginalTOS = pxTopOfStack;
|
||||
|
||||
/* To ensure asserts in tasks.c don't fail, although in this case the assert
|
||||
* is not really required. */
|
||||
pxTopOfStack--;
|
||||
/* To ensure asserts in tasks.c don't fail, although in this case the assert
|
||||
is not really required. */
|
||||
pxTopOfStack--;
|
||||
|
||||
/* Setup the initial stack of the task. The stack is set exactly as
|
||||
* expected by the portRESTORE_CONTEXT() macro. */
|
||||
/* Setup the initial stack of the task. The stack is set exactly as
|
||||
expected by the portRESTORE_CONTEXT() macro. */
|
||||
|
||||
/* First on the stack is the return address - which in this case is the
|
||||
* start of the task. The offset is added to make the return address appear
|
||||
* as it would within an IRQ ISR. */
|
||||
*pxTopOfStack = ( StackType_t ) pxCode + portINSTRUCTION_SIZE;
|
||||
pxTopOfStack--;
|
||||
/* First on the stack is the return address - which in this case is the
|
||||
start of the task. The offset is added to make the return address appear
|
||||
as it would within an IRQ ISR. */
|
||||
*pxTopOfStack = ( StackType_t ) pxCode + portINSTRUCTION_SIZE;
|
||||
pxTopOfStack--;
|
||||
|
||||
*pxTopOfStack = ( StackType_t ) 0x00000000; /* R14 */
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( StackType_t ) pxOriginalTOS; /* Stack used when task starts goes in R13. */
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( StackType_t ) 0x12121212; /* R12 */
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( StackType_t ) 0x11111111; /* R11 */
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( StackType_t ) 0x10101010; /* R10 */
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( StackType_t ) 0x09090909; /* R9 */
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( StackType_t ) 0x08080808; /* R8 */
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( StackType_t ) 0x07070707; /* R7 */
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( StackType_t ) 0x06060606; /* R6 */
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( StackType_t ) 0x05050505; /* R5 */
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( StackType_t ) 0x04040404; /* R4 */
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( StackType_t ) 0x03030303; /* R3 */
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( StackType_t ) 0x02020202; /* R2 */
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( StackType_t ) 0x01010101; /* R1 */
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( StackType_t ) 0x00000000; /* R14 */
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( StackType_t ) pxOriginalTOS; /* Stack used when task starts goes in R13. */
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( StackType_t ) 0x12121212; /* R12 */
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( StackType_t ) 0x11111111; /* R11 */
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( StackType_t ) 0x10101010; /* R10 */
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( StackType_t ) 0x09090909; /* R9 */
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( StackType_t ) 0x08080808; /* R8 */
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( StackType_t ) 0x07070707; /* R7 */
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( StackType_t ) 0x06060606; /* R6 */
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( StackType_t ) 0x05050505; /* R5 */
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( StackType_t ) 0x04040404; /* R4 */
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( StackType_t ) 0x03030303; /* R3 */
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( StackType_t ) 0x02020202; /* R2 */
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( StackType_t ) 0x01010101; /* R1 */
|
||||
pxTopOfStack--;
|
||||
|
||||
/* When the task starts is will expect to find the function parameter in
|
||||
* R0. */
|
||||
*pxTopOfStack = ( StackType_t ) pvParameters; /* R0 */
|
||||
pxTopOfStack--;
|
||||
/* When the task starts is will expect to find the function parameter in
|
||||
R0. */
|
||||
*pxTopOfStack = ( StackType_t ) pvParameters; /* R0 */
|
||||
pxTopOfStack--;
|
||||
|
||||
/* The last thing onto the stack is the status register, which is set for
|
||||
* system mode, with interrupts enabled. */
|
||||
*pxTopOfStack = ( StackType_t ) portINITIAL_SPSR;
|
||||
/* The last thing onto the stack is the status register, which is set for
|
||||
system mode, with interrupts enabled. */
|
||||
*pxTopOfStack = ( StackType_t ) portINITIAL_SPSR;
|
||||
|
||||
#ifdef THUMB_INTERWORK
|
||||
{
|
||||
/* We want the task to start in thumb mode. */
|
||||
*pxTopOfStack |= portTHUMB_MODE_BIT;
|
||||
}
|
||||
#endif
|
||||
#ifdef THUMB_INTERWORK
|
||||
{
|
||||
/* We want the task to start in thumb mode. */
|
||||
*pxTopOfStack |= portTHUMB_MODE_BIT;
|
||||
}
|
||||
#endif
|
||||
|
||||
pxTopOfStack--;
|
||||
pxTopOfStack--;
|
||||
|
||||
/* Some optimisation levels use the stack differently to others. This
|
||||
* means the interrupt flags cannot always be stored on the stack and will
|
||||
* instead be stored in a variable, which is then saved as part of the
|
||||
* tasks context. */
|
||||
*pxTopOfStack = portNO_CRITICAL_SECTION_NESTING;
|
||||
/* Some optimisation levels use the stack differently to others. This
|
||||
means the interrupt flags cannot always be stored on the stack and will
|
||||
instead be stored in a variable, which is then saved as part of the
|
||||
tasks context. */
|
||||
*pxTopOfStack = portNO_CRITICAL_SECTION_NESTING;
|
||||
|
||||
return pxTopOfStack;
|
||||
return pxTopOfStack;
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
BaseType_t xPortStartScheduler( void )
|
||||
{
|
||||
/* Start the timer that generates the tick ISR. Interrupts are disabled
|
||||
* here already. */
|
||||
prvSetupTimerInterrupt();
|
||||
/* Start the timer that generates the tick ISR. Interrupts are disabled
|
||||
here already. */
|
||||
prvSetupTimerInterrupt();
|
||||
|
||||
/* Start the first task. */
|
||||
vPortISRStartFirstTask();
|
||||
/* Start the first task. */
|
||||
vPortISRStartFirstTask();
|
||||
|
||||
/* Should not get here! */
|
||||
return 0;
|
||||
/* Should not get here! */
|
||||
return 0;
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
void vPortEndScheduler( void )
|
||||
{
|
||||
/* It is unlikely that the ARM port will require this function as there
|
||||
* is nothing to return to. */
|
||||
/* It is unlikely that the ARM port will require this function as there
|
||||
is nothing to return to. */
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
|
@ -186,23 +184,30 @@ void vPortEndScheduler( void )
|
|||
*/
|
||||
static void prvSetupTimerInterrupt( void )
|
||||
{
|
||||
AT91PS_PITC pxPIT = AT91C_BASE_PITC;
|
||||
AT91PS_PITC pxPIT = AT91C_BASE_PITC;
|
||||
|
||||
/* Setup the AIC for PIT interrupts. The interrupt routine chosen depends
|
||||
* on whether the preemptive or cooperative scheduler is being used. */
|
||||
#if configUSE_PREEMPTION == 0
|
||||
extern void( vNonPreemptiveTick ) ( void );
|
||||
AT91F_AIC_ConfigureIt( AT91C_ID_SYS, AT91C_AIC_PRIOR_HIGHEST, portINT_LEVEL_SENSITIVE, ( void ( * )( void ) )vNonPreemptiveTick );
|
||||
#else
|
||||
extern void( vPreemptiveTick )( void );
|
||||
AT91F_AIC_ConfigureIt( AT91C_ID_SYS, AT91C_AIC_PRIOR_HIGHEST, portINT_LEVEL_SENSITIVE, ( void ( * )( void ) )vPreemptiveTick );
|
||||
#endif
|
||||
/* Setup the AIC for PIT interrupts. The interrupt routine chosen depends
|
||||
on whether the preemptive or cooperative scheduler is being used. */
|
||||
#if configUSE_PREEMPTION == 0
|
||||
|
||||
/* Configure the PIT period. */
|
||||
pxPIT->PITC_PIMR = portPIT_ENABLE | portPIT_INT_ENABLE | portPIT_COUNTER_VALUE;
|
||||
extern void ( vNonPreemptiveTick ) ( void );
|
||||
AT91F_AIC_ConfigureIt( AT91C_ID_SYS, AT91C_AIC_PRIOR_HIGHEST, portINT_LEVEL_SENSITIVE, ( void (*)(void) ) vNonPreemptiveTick );
|
||||
|
||||
/* Enable the interrupt. Global interrupts are disables at this point so
|
||||
* this is safe. */
|
||||
#else
|
||||
|
||||
extern void ( vPreemptiveTick )( void );
|
||||
AT91F_AIC_ConfigureIt( AT91C_ID_SYS, AT91C_AIC_PRIOR_HIGHEST, portINT_LEVEL_SENSITIVE, ( void (*)(void) ) vPreemptiveTick );
|
||||
|
||||
#endif
|
||||
|
||||
/* Configure the PIT period. */
|
||||
pxPIT->PITC_PIMR = portPIT_ENABLE | portPIT_INT_ENABLE | portPIT_COUNTER_VALUE;
|
||||
|
||||
/* Enable the interrupt. Global interrupts are disables at this point so
|
||||
this is safe. */
|
||||
AT91C_BASE_AIC->AIC_IECR = 0x1 << AT91C_ID_SYS;
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
|
||||
|
||||
|
|
|
@ -19,25 +19,25 @@
|
|||
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
* http://www.FreeRTOS.org
|
||||
* http://aws.amazon.com/freertos
|
||||
* https://www.FreeRTOS.org
|
||||
* https://github.com/FreeRTOS
|
||||
*
|
||||
* 1 tab == 4 spaces!
|
||||
*/
|
||||
|
||||
|
||||
/*-----------------------------------------------------------
|
||||
* Components that can be compiled to either ARM or THUMB mode are
|
||||
* contained in port.c The ISR routines, which can only be compiled
|
||||
* to ARM mode, are contained in this file.
|
||||
*----------------------------------------------------------*/
|
||||
* Components that can be compiled to either ARM or THUMB mode are
|
||||
* contained in port.c The ISR routines, which can only be compiled
|
||||
* to ARM mode, are contained in this file.
|
||||
*----------------------------------------------------------*/
|
||||
|
||||
/*
|
||||
* Changes from V3.2.4
|
||||
*
|
||||
+ The assembler statements are now included in a single asm block rather
|
||||
+ than each line having its own asm block.
|
||||
*/
|
||||
Changes from V3.2.4
|
||||
|
||||
+ The assembler statements are now included in a single asm block rather
|
||||
than each line having its own asm block.
|
||||
*/
|
||||
|
||||
/* Scheduler includes. */
|
||||
#include "FreeRTOS.h"
|
||||
|
@ -46,17 +46,17 @@
|
|||
#include "AT91SAM7X256.h"
|
||||
|
||||
/* Constants required to handle interrupts. */
|
||||
#define portTIMER_MATCH_ISR_BIT ( ( uint8_t ) 0x01 )
|
||||
#define portCLEAR_VIC_INTERRUPT ( ( uint32_t ) 0 )
|
||||
#define portTIMER_MATCH_ISR_BIT ( ( uint8_t ) 0x01 )
|
||||
#define portCLEAR_VIC_INTERRUPT ( ( uint32_t ) 0 )
|
||||
|
||||
/* Constants required to handle critical sections. */
|
||||
#define portNO_CRITICAL_NESTING ( ( uint32_t ) 0 )
|
||||
#define portNO_CRITICAL_NESTING ( ( uint32_t ) 0 )
|
||||
volatile uint32_t ulCriticalNesting = 9999UL;
|
||||
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* ISR to handle manual context switches (from a call to taskYIELD()). */
|
||||
void vPortYieldProcessor( void ) __attribute__( ( interrupt( "SWI" ), naked ) );
|
||||
void vPortYieldProcessor( void ) __attribute__((interrupt("SWI"), naked));
|
||||
|
||||
/*
|
||||
* The scheduler can only be started from ARM mode, hence the inclusion of this
|
||||
|
@ -67,9 +67,9 @@ void vPortISRStartFirstTask( void );
|
|||
|
||||
void vPortISRStartFirstTask( void )
|
||||
{
|
||||
/* Simply start the scheduler. This is included here as it can only be
|
||||
* called from ARM mode. */
|
||||
portRESTORE_CONTEXT();
|
||||
/* Simply start the scheduler. This is included here as it can only be
|
||||
called from ARM mode. */
|
||||
portRESTORE_CONTEXT();
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
|
@ -83,19 +83,19 @@ void vPortISRStartFirstTask( void )
|
|||
*/
|
||||
void vPortYieldProcessor( void )
|
||||
{
|
||||
/* Within an IRQ ISR the link register has an offset from the true return
|
||||
* address, but an SWI ISR does not. Add the offset manually so the same
|
||||
* ISR return code can be used in both cases. */
|
||||
__asm volatile ( "ADD LR, LR, #4");
|
||||
/* Within an IRQ ISR the link register has an offset from the true return
|
||||
address, but an SWI ISR does not. Add the offset manually so the same
|
||||
ISR return code can be used in both cases. */
|
||||
__asm volatile ( "ADD LR, LR, #4" );
|
||||
|
||||
/* Perform the context switch. First save the context of the current task. */
|
||||
portSAVE_CONTEXT();
|
||||
/* Perform the context switch. First save the context of the current task. */
|
||||
portSAVE_CONTEXT();
|
||||
|
||||
/* Find the highest priority task that is ready to run. */
|
||||
vTaskSwitchContext();
|
||||
/* Find the highest priority task that is ready to run. */
|
||||
vTaskSwitchContext();
|
||||
|
||||
/* Restore the context of the new task. */
|
||||
portRESTORE_CONTEXT();
|
||||
/* Restore the context of the new task. */
|
||||
portRESTORE_CONTEXT();
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
|
@ -106,49 +106,49 @@ void vPortYieldProcessor( void )
|
|||
|
||||
#if configUSE_PREEMPTION == 0
|
||||
|
||||
/* The cooperative scheduler requires a normal IRQ service routine to
|
||||
* simply increment the system tick. */
|
||||
void vNonPreemptiveTick( void ) __attribute__( ( interrupt( "IRQ" ) ) );
|
||||
void vNonPreemptiveTick( void )
|
||||
{
|
||||
uint32_t ulDummy;
|
||||
/* The cooperative scheduler requires a normal IRQ service routine to
|
||||
simply increment the system tick. */
|
||||
void vNonPreemptiveTick( void ) __attribute__ ((interrupt ("IRQ")));
|
||||
void vNonPreemptiveTick( void )
|
||||
{
|
||||
uint32_t ulDummy;
|
||||
|
||||
/* Increment the tick count - which may wake some tasks but as the
|
||||
* preemptive scheduler is not being used any woken task is not given
|
||||
* processor time no matter what its priority. */
|
||||
xTaskIncrementTick();
|
||||
/* Increment the tick count - which may wake some tasks but as the
|
||||
preemptive scheduler is not being used any woken task is not given
|
||||
processor time no matter what its priority. */
|
||||
xTaskIncrementTick();
|
||||
|
||||
/* Clear the PIT interrupt. */
|
||||
ulDummy = AT91C_BASE_PITC->PITC_PIVR;
|
||||
/* Clear the PIT interrupt. */
|
||||
ulDummy = AT91C_BASE_PITC->PITC_PIVR;
|
||||
|
||||
/* End the interrupt in the AIC. */
|
||||
AT91C_BASE_AIC->AIC_EOICR = ulDummy;
|
||||
}
|
||||
/* End the interrupt in the AIC. */
|
||||
AT91C_BASE_AIC->AIC_EOICR = ulDummy;
|
||||
}
|
||||
|
||||
#else /* if configUSE_PREEMPTION == 0 */
|
||||
#else
|
||||
|
||||
/* The preemptive scheduler is defined as "naked" as the full context is
|
||||
* saved on entry as part of the context switch. */
|
||||
void vPreemptiveTick( void ) __attribute__( ( naked ) );
|
||||
void vPreemptiveTick( void )
|
||||
{
|
||||
/* Save the context of the current task. */
|
||||
portSAVE_CONTEXT();
|
||||
/* The preemptive scheduler is defined as "naked" as the full context is
|
||||
saved on entry as part of the context switch. */
|
||||
void vPreemptiveTick( void ) __attribute__((naked));
|
||||
void vPreemptiveTick( void )
|
||||
{
|
||||
/* Save the context of the current task. */
|
||||
portSAVE_CONTEXT();
|
||||
|
||||
/* Increment the tick count - this may wake a task. */
|
||||
if( xTaskIncrementTick() != pdFALSE )
|
||||
{
|
||||
/* Find the highest priority task that is ready to run. */
|
||||
vTaskSwitchContext();
|
||||
}
|
||||
/* Increment the tick count - this may wake a task. */
|
||||
if( xTaskIncrementTick() != pdFALSE )
|
||||
{
|
||||
/* Find the highest priority task that is ready to run. */
|
||||
vTaskSwitchContext();
|
||||
}
|
||||
|
||||
/* End the interrupt in the AIC. */
|
||||
AT91C_BASE_AIC->AIC_EOICR = AT91C_BASE_PITC->PITC_PIVR;
|
||||
/* End the interrupt in the AIC. */
|
||||
AT91C_BASE_AIC->AIC_EOICR = AT91C_BASE_PITC->PITC_PIVR;
|
||||
|
||||
portRESTORE_CONTEXT();
|
||||
}
|
||||
portRESTORE_CONTEXT();
|
||||
}
|
||||
|
||||
#endif /* if configUSE_PREEMPTION == 0 */
|
||||
#endif
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/*
|
||||
|
@ -157,70 +157,71 @@ void vPortYieldProcessor( void )
|
|||
* ensure a switch to ARM mode. When THUMB_INTERWORK is not defined then
|
||||
* the utilities are defined as macros in portmacro.h - as per other ports.
|
||||
*/
|
||||
void vPortDisableInterruptsFromThumb( void ) __attribute__( ( naked ) );
|
||||
void vPortEnableInterruptsFromThumb( void ) __attribute__( ( naked ) );
|
||||
void vPortDisableInterruptsFromThumb( void ) __attribute__ ((naked));
|
||||
void vPortEnableInterruptsFromThumb( void ) __attribute__ ((naked));
|
||||
|
||||
void vPortDisableInterruptsFromThumb( void )
|
||||
{
|
||||
__asm volatile (
|
||||
"STMDB SP!, {R0} \n\t"/* Push R0. */
|
||||
"MRS R0, CPSR \n\t"/* Get CPSR. */
|
||||
"ORR R0, R0, #0xC0 \n\t"/* Disable IRQ, FIQ. */
|
||||
"MSR CPSR, R0 \n\t"/* Write back modified value. */
|
||||
"LDMIA SP!, {R0} \n\t"/* Pop R0. */
|
||||
"BX R14"); /* Return back to thumb. */
|
||||
__asm volatile (
|
||||
"STMDB SP!, {R0} \n\t" /* Push R0. */
|
||||
"MRS R0, CPSR \n\t" /* Get CPSR. */
|
||||
"ORR R0, R0, #0xC0 \n\t" /* Disable IRQ, FIQ. */
|
||||
"MSR CPSR, R0 \n\t" /* Write back modified value. */
|
||||
"LDMIA SP!, {R0} \n\t" /* Pop R0. */
|
||||
"BX R14" ); /* Return back to thumb. */
|
||||
}
|
||||
|
||||
void vPortEnableInterruptsFromThumb( void )
|
||||
{
|
||||
__asm volatile (
|
||||
"STMDB SP!, {R0} \n\t"/* Push R0. */
|
||||
"MRS R0, CPSR \n\t"/* Get CPSR. */
|
||||
"BIC R0, R0, #0xC0 \n\t"/* Enable IRQ, FIQ. */
|
||||
"MSR CPSR, R0 \n\t"/* Write back modified value. */
|
||||
"LDMIA SP!, {R0} \n\t"/* Pop R0. */
|
||||
"BX R14"); /* Return back to thumb. */
|
||||
__asm volatile (
|
||||
"STMDB SP!, {R0} \n\t" /* Push R0. */
|
||||
"MRS R0, CPSR \n\t" /* Get CPSR. */
|
||||
"BIC R0, R0, #0xC0 \n\t" /* Enable IRQ, FIQ. */
|
||||
"MSR CPSR, R0 \n\t" /* Write back modified value. */
|
||||
"LDMIA SP!, {R0} \n\t" /* Pop R0. */
|
||||
"BX R14" ); /* Return back to thumb. */
|
||||
}
|
||||
|
||||
|
||||
/* The code generated by the GCC compiler uses the stack in different ways at
|
||||
* different optimisation levels. The interrupt flags can therefore not always
|
||||
* be saved to the stack. Instead the critical section nesting level is stored
|
||||
* in a variable, which is then saved as part of the stack context. */
|
||||
different optimisation levels. The interrupt flags can therefore not always
|
||||
be saved to the stack. Instead the critical section nesting level is stored
|
||||
in a variable, which is then saved as part of the stack context. */
|
||||
void vPortEnterCritical( void )
|
||||
{
|
||||
/* Disable interrupts as per portDISABLE_INTERRUPTS(); */
|
||||
__asm volatile (
|
||||
"STMDB SP!, {R0} \n\t"/* Push R0. */
|
||||
"MRS R0, CPSR \n\t"/* Get CPSR. */
|
||||
"ORR R0, R0, #0xC0 \n\t"/* Disable IRQ, FIQ. */
|
||||
"MSR CPSR, R0 \n\t"/* Write back modified value. */
|
||||
"LDMIA SP!, {R0}"); /* Pop R0. */
|
||||
/* Disable interrupts as per portDISABLE_INTERRUPTS(); */
|
||||
__asm volatile (
|
||||
"STMDB SP!, {R0} \n\t" /* Push R0. */
|
||||
"MRS R0, CPSR \n\t" /* Get CPSR. */
|
||||
"ORR R0, R0, #0xC0 \n\t" /* Disable IRQ, FIQ. */
|
||||
"MSR CPSR, R0 \n\t" /* Write back modified value. */
|
||||
"LDMIA SP!, {R0}" ); /* Pop R0. */
|
||||
|
||||
/* Now interrupts are disabled ulCriticalNesting can be accessed
|
||||
* directly. Increment ulCriticalNesting to keep a count of how many times
|
||||
* portENTER_CRITICAL() has been called. */
|
||||
ulCriticalNesting++;
|
||||
/* Now interrupts are disabled ulCriticalNesting can be accessed
|
||||
directly. Increment ulCriticalNesting to keep a count of how many times
|
||||
portENTER_CRITICAL() has been called. */
|
||||
ulCriticalNesting++;
|
||||
}
|
||||
|
||||
void vPortExitCritical( void )
|
||||
{
|
||||
if( ulCriticalNesting > portNO_CRITICAL_NESTING )
|
||||
{
|
||||
/* Decrement the nesting count as we are leaving a critical section. */
|
||||
ulCriticalNesting--;
|
||||
if( ulCriticalNesting > portNO_CRITICAL_NESTING )
|
||||
{
|
||||
/* Decrement the nesting count as we are leaving a critical section. */
|
||||
ulCriticalNesting--;
|
||||
|
||||
/* If the nesting level has reached zero then interrupts should be
|
||||
* re-enabled. */
|
||||
if( ulCriticalNesting == portNO_CRITICAL_NESTING )
|
||||
{
|
||||
/* Enable interrupts as per portEXIT_CRITICAL(). */
|
||||
__asm volatile (
|
||||
"STMDB SP!, {R0} \n\t"/* Push R0. */
|
||||
"MRS R0, CPSR \n\t"/* Get CPSR. */
|
||||
"BIC R0, R0, #0xC0 \n\t"/* Enable IRQ, FIQ. */
|
||||
"MSR CPSR, R0 \n\t"/* Write back modified value. */
|
||||
"LDMIA SP!, {R0}"); /* Pop R0. */
|
||||
}
|
||||
}
|
||||
/* If the nesting level has reached zero then interrupts should be
|
||||
re-enabled. */
|
||||
if( ulCriticalNesting == portNO_CRITICAL_NESTING )
|
||||
{
|
||||
/* Enable interrupts as per portEXIT_CRITICAL(). */
|
||||
__asm volatile (
|
||||
"STMDB SP!, {R0} \n\t" /* Push R0. */
|
||||
"MRS R0, CPSR \n\t" /* Get CPSR. */
|
||||
"BIC R0, R0, #0xC0 \n\t" /* Enable IRQ, FIQ. */
|
||||
"MSR CPSR, R0 \n\t" /* Write back modified value. */
|
||||
"LDMIA SP!, {R0}" ); /* Pop R0. */
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
|
|
|
@ -19,41 +19,41 @@
|
|||
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
* http://www.FreeRTOS.org
|
||||
* http://aws.amazon.com/freertos
|
||||
* https://www.FreeRTOS.org
|
||||
* https://github.com/FreeRTOS
|
||||
*
|
||||
* 1 tab == 4 spaces!
|
||||
*/
|
||||
|
||||
/*
|
||||
* Changes from V3.2.3
|
||||
*
|
||||
+ Modified portENTER_SWITCHING_ISR() to allow use with GCC V4.0.1.
|
||||
+
|
||||
+ Changes from V3.2.4
|
||||
+
|
||||
+ Removed the use of the %0 parameter within the assembler macros and
|
||||
+ replaced them with hard coded registers. This will ensure the
|
||||
+ assembler does not select the link register as the temp register as
|
||||
+ was occasionally happening previously.
|
||||
+
|
||||
+ The assembler statements are now included in a single asm block rather
|
||||
+ than each line having its own asm block.
|
||||
+
|
||||
+ Changes from V4.5.0
|
||||
+
|
||||
+ Removed the portENTER_SWITCHING_ISR() and portEXIT_SWITCHING_ISR() macros
|
||||
+ and replaced them with portYIELD_FROM_ISR() macro. Application code
|
||||
+ should now make use of the portSAVE_CONTEXT() and portRESTORE_CONTEXT()
|
||||
+ macros as per the V4.5.1 demo code.
|
||||
*/
|
||||
Changes from V3.2.3
|
||||
|
||||
+ Modified portENTER_SWITCHING_ISR() to allow use with GCC V4.0.1.
|
||||
|
||||
Changes from V3.2.4
|
||||
|
||||
+ Removed the use of the %0 parameter within the assembler macros and
|
||||
replaced them with hard coded registers. This will ensure the
|
||||
assembler does not select the link register as the temp register as
|
||||
was occasionally happening previously.
|
||||
|
||||
+ The assembler statements are now included in a single asm block rather
|
||||
than each line having its own asm block.
|
||||
|
||||
Changes from V4.5.0
|
||||
|
||||
+ Removed the portENTER_SWITCHING_ISR() and portEXIT_SWITCHING_ISR() macros
|
||||
and replaced them with portYIELD_FROM_ISR() macro. Application code
|
||||
should now make use of the portSAVE_CONTEXT() and portRESTORE_CONTEXT()
|
||||
macros as per the V4.5.1 demo code.
|
||||
*/
|
||||
|
||||
#ifndef PORTMACRO_H
|
||||
#define PORTMACRO_H
|
||||
#define PORTMACRO_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/*-----------------------------------------------------------
|
||||
* Port specific definitions.
|
||||
|
@ -66,32 +66,32 @@
|
|||
*/
|
||||
|
||||
/* Type definitions. */
|
||||
#define portCHAR char
|
||||
#define portFLOAT float
|
||||
#define portDOUBLE double
|
||||
#define portLONG long
|
||||
#define portSHORT short
|
||||
#define portSTACK_TYPE uint32_t
|
||||
#define portBASE_TYPE portLONG
|
||||
#define portCHAR char
|
||||
#define portFLOAT float
|
||||
#define portDOUBLE double
|
||||
#define portLONG long
|
||||
#define portSHORT short
|
||||
#define portSTACK_TYPE uint32_t
|
||||
#define portBASE_TYPE portLONG
|
||||
|
||||
typedef portSTACK_TYPE StackType_t;
|
||||
typedef long BaseType_t;
|
||||
typedef unsigned long UBaseType_t;
|
||||
typedef portSTACK_TYPE StackType_t;
|
||||
typedef long BaseType_t;
|
||||
typedef unsigned long UBaseType_t;
|
||||
|
||||
#if ( configUSE_16_BIT_TICKS == 1 )
|
||||
typedef uint16_t TickType_t;
|
||||
#define portMAX_DELAY ( TickType_t ) 0xffff
|
||||
#else
|
||||
typedef uint32_t TickType_t;
|
||||
#define portMAX_DELAY ( TickType_t ) 0xffffffffUL
|
||||
#endif
|
||||
#if( configUSE_16_BIT_TICKS == 1 )
|
||||
typedef uint16_t TickType_t;
|
||||
#define portMAX_DELAY ( TickType_t ) 0xffff
|
||||
#else
|
||||
typedef uint32_t TickType_t;
|
||||
#define portMAX_DELAY ( TickType_t ) 0xffffffffUL
|
||||
#endif
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* Architecture specifics. */
|
||||
#define portSTACK_GROWTH ( -1 )
|
||||
#define portTICK_PERIOD_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )
|
||||
#define portBYTE_ALIGNMENT 8
|
||||
#define portNOP() __asm volatile ( "NOP" );
|
||||
#define portSTACK_GROWTH ( -1 )
|
||||
#define portTICK_PERIOD_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )
|
||||
#define portBYTE_ALIGNMENT 8
|
||||
#define portNOP() __asm volatile ( "NOP" );
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
|
||||
|
@ -104,92 +104,92 @@
|
|||
* THUMB mode code will result in a compile time error.
|
||||
*/
|
||||
|
||||
#define portRESTORE_CONTEXT() \
|
||||
{ \
|
||||
extern volatile void * volatile pxCurrentTCB; \
|
||||
extern volatile uint32_t ulCriticalNesting; \
|
||||
\
|
||||
/* Set the LR to the task stack. */ \
|
||||
__asm volatile ( \
|
||||
"LDR R0, =pxCurrentTCB \n\t"\
|
||||
"LDR R0, [R0] \n\t"\
|
||||
"LDR LR, [R0] \n\t"\
|
||||
\
|
||||
/* The critical nesting depth is the first item on the stack. */ \
|
||||
/* Load it into the ulCriticalNesting variable. */ \
|
||||
"LDR R0, =ulCriticalNesting \n\t"\
|
||||
"LDMFD LR!, {R1} \n\t"\
|
||||
"STR R1, [R0] \n\t"\
|
||||
\
|
||||
/* Get the SPSR from the stack. */ \
|
||||
"LDMFD LR!, {R0} \n\t"\
|
||||
"MSR SPSR, R0 \n\t"\
|
||||
\
|
||||
/* Restore all system mode registers for the task. */ \
|
||||
"LDMFD LR, {R0-R14}^ \n\t"\
|
||||
"NOP \n\t"\
|
||||
\
|
||||
/* Restore the return address. */ \
|
||||
"LDR LR, [LR, #+60] \n\t"\
|
||||
\
|
||||
/* And return - correcting the offset in the LR to obtain the */ \
|
||||
/* correct address. */ \
|
||||
"SUBS PC, LR, #4 \n\t"\
|
||||
); \
|
||||
( void ) ulCriticalNesting; \
|
||||
( void ) pxCurrentTCB; \
|
||||
}
|
||||
#define portRESTORE_CONTEXT() \
|
||||
{ \
|
||||
extern volatile void * volatile pxCurrentTCB; \
|
||||
extern volatile uint32_t ulCriticalNesting; \
|
||||
\
|
||||
/* Set the LR to the task stack. */ \
|
||||
__asm volatile ( \
|
||||
"LDR R0, =pxCurrentTCB \n\t" \
|
||||
"LDR R0, [R0] \n\t" \
|
||||
"LDR LR, [R0] \n\t" \
|
||||
\
|
||||
/* The critical nesting depth is the first item on the stack. */ \
|
||||
/* Load it into the ulCriticalNesting variable. */ \
|
||||
"LDR R0, =ulCriticalNesting \n\t" \
|
||||
"LDMFD LR!, {R1} \n\t" \
|
||||
"STR R1, [R0] \n\t" \
|
||||
\
|
||||
/* Get the SPSR from the stack. */ \
|
||||
"LDMFD LR!, {R0} \n\t" \
|
||||
"MSR SPSR, R0 \n\t" \
|
||||
\
|
||||
/* Restore all system mode registers for the task. */ \
|
||||
"LDMFD LR, {R0-R14}^ \n\t" \
|
||||
"NOP \n\t" \
|
||||
\
|
||||
/* Restore the return address. */ \
|
||||
"LDR LR, [LR, #+60] \n\t" \
|
||||
\
|
||||
/* And return - correcting the offset in the LR to obtain the */ \
|
||||
/* correct address. */ \
|
||||
"SUBS PC, LR, #4 \n\t" \
|
||||
); \
|
||||
( void ) ulCriticalNesting; \
|
||||
( void ) pxCurrentTCB; \
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
#define portSAVE_CONTEXT() \
|
||||
{ \
|
||||
extern volatile void * volatile pxCurrentTCB; \
|
||||
extern volatile uint32_t ulCriticalNesting; \
|
||||
\
|
||||
/* Push R0 as we are going to use the register. */ \
|
||||
__asm volatile ( \
|
||||
"STMDB SP!, {R0} \n\t"\
|
||||
\
|
||||
/* Set R0 to point to the task stack pointer. */ \
|
||||
"STMDB SP,{SP}^ \n\t"\
|
||||
"NOP \n\t"\
|
||||
"SUB SP, SP, #4 \n\t"\
|
||||
"LDMIA SP!,{R0} \n\t"\
|
||||
\
|
||||
/* Push the return address onto the stack. */ \
|
||||
"STMDB R0!, {LR} \n\t"\
|
||||
\
|
||||
/* Now we have saved LR we can use it instead of R0. */ \
|
||||
"MOV LR, R0 \n\t"\
|
||||
\
|
||||
/* Pop R0 so we can save it onto the system mode stack. */ \
|
||||
"LDMIA SP!, {R0} \n\t"\
|
||||
\
|
||||
/* Push all the system mode registers onto the task stack. */ \
|
||||
"STMDB LR,{R0-LR}^ \n\t"\
|
||||
"NOP \n\t"\
|
||||
"SUB LR, LR, #60 \n\t"\
|
||||
\
|
||||
/* Push the SPSR onto the task stack. */ \
|
||||
"MRS R0, SPSR \n\t"\
|
||||
"STMDB LR!, {R0} \n\t"\
|
||||
\
|
||||
"LDR R0, =ulCriticalNesting \n\t"\
|
||||
"LDR R0, [R0] \n\t"\
|
||||
"STMDB LR!, {R0} \n\t"\
|
||||
\
|
||||
/* Store the new top of stack for the task. */ \
|
||||
"LDR R0, =pxCurrentTCB \n\t"\
|
||||
"LDR R0, [R0] \n\t"\
|
||||
"STR LR, [R0] \n\t"\
|
||||
); \
|
||||
( void ) ulCriticalNesting; \
|
||||
( void ) pxCurrentTCB; \
|
||||
}
|
||||
#define portSAVE_CONTEXT() \
|
||||
{ \
|
||||
extern volatile void * volatile pxCurrentTCB; \
|
||||
extern volatile uint32_t ulCriticalNesting; \
|
||||
\
|
||||
/* Push R0 as we are going to use the register. */ \
|
||||
__asm volatile ( \
|
||||
"STMDB SP!, {R0} \n\t" \
|
||||
\
|
||||
/* Set R0 to point to the task stack pointer. */ \
|
||||
"STMDB SP,{SP}^ \n\t" \
|
||||
"NOP \n\t" \
|
||||
"SUB SP, SP, #4 \n\t" \
|
||||
"LDMIA SP!,{R0} \n\t" \
|
||||
\
|
||||
/* Push the return address onto the stack. */ \
|
||||
"STMDB R0!, {LR} \n\t" \
|
||||
\
|
||||
/* Now we have saved LR we can use it instead of R0. */ \
|
||||
"MOV LR, R0 \n\t" \
|
||||
\
|
||||
/* Pop R0 so we can save it onto the system mode stack. */ \
|
||||
"LDMIA SP!, {R0} \n\t" \
|
||||
\
|
||||
/* Push all the system mode registers onto the task stack. */ \
|
||||
"STMDB LR,{R0-LR}^ \n\t" \
|
||||
"NOP \n\t" \
|
||||
"SUB LR, LR, #60 \n\t" \
|
||||
\
|
||||
/* Push the SPSR onto the task stack. */ \
|
||||
"MRS R0, SPSR \n\t" \
|
||||
"STMDB LR!, {R0} \n\t" \
|
||||
\
|
||||
"LDR R0, =ulCriticalNesting \n\t" \
|
||||
"LDR R0, [R0] \n\t" \
|
||||
"STMDB LR!, {R0} \n\t" \
|
||||
\
|
||||
/* Store the new top of stack for the task. */ \
|
||||
"LDR R0, =pxCurrentTCB \n\t" \
|
||||
"LDR R0, [R0] \n\t" \
|
||||
"STR LR, [R0] \n\t" \
|
||||
); \
|
||||
( void ) ulCriticalNesting; \
|
||||
( void ) pxCurrentTCB; \
|
||||
}
|
||||
|
||||
|
||||
#define portYIELD_FROM_ISR() vTaskSwitchContext()
|
||||
#define portYIELD() __asm volatile ( "SWI 0" )
|
||||
#define portYIELD_FROM_ISR() vTaskSwitchContext()
|
||||
#define portYIELD() __asm volatile ( "SWI 0" )
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
|
||||
|
@ -202,47 +202,48 @@
|
|||
* defined then the utilities are defined as macros here - as per other ports.
|
||||
*/
|
||||
|
||||
#ifdef THUMB_INTERWORK
|
||||
#ifdef THUMB_INTERWORK
|
||||
|
||||
extern void vPortDisableInterruptsFromThumb( void ) __attribute__( ( naked ) );
|
||||
extern void vPortEnableInterruptsFromThumb( void ) __attribute__( ( naked ) );
|
||||
extern void vPortDisableInterruptsFromThumb( void ) __attribute__ ((naked));
|
||||
extern void vPortEnableInterruptsFromThumb( void ) __attribute__ ((naked));
|
||||
|
||||
#define portDISABLE_INTERRUPTS() vPortDisableInterruptsFromThumb()
|
||||
#define portENABLE_INTERRUPTS() vPortEnableInterruptsFromThumb()
|
||||
#define portDISABLE_INTERRUPTS() vPortDisableInterruptsFromThumb()
|
||||
#define portENABLE_INTERRUPTS() vPortEnableInterruptsFromThumb()
|
||||
|
||||
#else
|
||||
#else
|
||||
|
||||
#define portDISABLE_INTERRUPTS() \
|
||||
__asm volatile ( \
|
||||
"STMDB SP!, {R0} \n\t"/* Push R0. */\
|
||||
"MRS R0, CPSR \n\t"/* Get CPSR. */\
|
||||
"ORR R0, R0, #0xC0 \n\t"/* Disable IRQ, FIQ. */\
|
||||
"MSR CPSR, R0 \n\t"/* Write back modified value. */\
|
||||
"LDMIA SP!, {R0} ") /* Pop R0. */
|
||||
#define portDISABLE_INTERRUPTS() \
|
||||
__asm volatile ( \
|
||||
"STMDB SP!, {R0} \n\t" /* Push R0. */ \
|
||||
"MRS R0, CPSR \n\t" /* Get CPSR. */ \
|
||||
"ORR R0, R0, #0xC0 \n\t" /* Disable IRQ, FIQ. */ \
|
||||
"MSR CPSR, R0 \n\t" /* Write back modified value. */ \
|
||||
"LDMIA SP!, {R0} " ) /* Pop R0. */
|
||||
|
||||
#define portENABLE_INTERRUPTS() \
|
||||
__asm volatile ( \
|
||||
"STMDB SP!, {R0} \n\t"/* Push R0. */\
|
||||
"MRS R0, CPSR \n\t"/* Get CPSR. */\
|
||||
"BIC R0, R0, #0xC0 \n\t"/* Enable IRQ, FIQ. */\
|
||||
"MSR CPSR, R0 \n\t"/* Write back modified value. */\
|
||||
"LDMIA SP!, {R0} ") /* Pop R0. */
|
||||
#define portENABLE_INTERRUPTS() \
|
||||
__asm volatile ( \
|
||||
"STMDB SP!, {R0} \n\t" /* Push R0. */ \
|
||||
"MRS R0, CPSR \n\t" /* Get CPSR. */ \
|
||||
"BIC R0, R0, #0xC0 \n\t" /* Enable IRQ, FIQ. */ \
|
||||
"MSR CPSR, R0 \n\t" /* Write back modified value. */ \
|
||||
"LDMIA SP!, {R0} " ) /* Pop R0. */
|
||||
|
||||
#endif /* THUMB_INTERWORK */
|
||||
#endif /* THUMB_INTERWORK */
|
||||
|
||||
extern void vPortEnterCritical( void );
|
||||
extern void vPortExitCritical( void );
|
||||
extern void vPortEnterCritical( void );
|
||||
extern void vPortExitCritical( void );
|
||||
|
||||
#define portENTER_CRITICAL() vPortEnterCritical();
|
||||
#define portEXIT_CRITICAL() vPortExitCritical();
|
||||
#define portENTER_CRITICAL() vPortEnterCritical();
|
||||
#define portEXIT_CRITICAL() vPortExitCritical();
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* Task function macros as described on the FreeRTOS.org WEB site. */
|
||||
#define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void * pvParameters )
|
||||
#define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void * pvParameters )
|
||||
#define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void *pvParameters )
|
||||
#define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void *pvParameters )
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* PORTMACRO_H */
|
||||
|
||||
|
|
|
@ -19,20 +19,20 @@
|
|||
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
* http://www.FreeRTOS.org
|
||||
* http://aws.amazon.com/freertos
|
||||
* https://www.FreeRTOS.org
|
||||
* https://github.com/FreeRTOS
|
||||
*
|
||||
* 1 tab == 4 spaces!
|
||||
*/
|
||||
|
||||
|
||||
/*-----------------------------------------------------------
|
||||
* Implementation of functions defined in portable.h for the ARM7 port.
|
||||
*
|
||||
* Components that can be compiled to either ARM or THUMB mode are
|
||||
* contained in this file. The ISR routines, which can only be compiled
|
||||
* to ARM mode are contained in portISR.c.
|
||||
*----------------------------------------------------------*/
|
||||
* Implementation of functions defined in portable.h for the ARM7 port.
|
||||
*
|
||||
* Components that can be compiled to either ARM or THUMB mode are
|
||||
* contained in this file. The ISR routines, which can only be compiled
|
||||
* to ARM mode are contained in portISR.c.
|
||||
*----------------------------------------------------------*/
|
||||
|
||||
|
||||
/* Standard includes. */
|
||||
|
@ -43,136 +43,134 @@
|
|||
#include "task.h"
|
||||
|
||||
/* Constants required to setup the task context. */
|
||||
#define portINITIAL_SPSR ( ( StackType_t ) 0x1f ) /* System mode, ARM mode, interrupts enabled. */
|
||||
#define portTHUMB_MODE_BIT ( ( StackType_t ) 0x20 )
|
||||
#define portINSTRUCTION_SIZE ( ( StackType_t ) 4 )
|
||||
#define portNO_CRITICAL_SECTION_NESTING ( ( StackType_t ) 0 )
|
||||
#define portINITIAL_SPSR ( ( StackType_t ) 0x1f ) /* System mode, ARM mode, interrupts enabled. */
|
||||
#define portTHUMB_MODE_BIT ( ( StackType_t ) 0x20 )
|
||||
#define portINSTRUCTION_SIZE ( ( StackType_t ) 4 )
|
||||
#define portNO_CRITICAL_SECTION_NESTING ( ( StackType_t ) 0 )
|
||||
|
||||
/* Constants required to setup the tick ISR. */
|
||||
#define portENABLE_TIMER ( ( uint8_t ) 0x01 )
|
||||
#define portPRESCALE_VALUE 0x00
|
||||
#define portINTERRUPT_ON_MATCH ( ( uint32_t ) 0x01 )
|
||||
#define portRESET_COUNT_ON_MATCH ( ( uint32_t ) 0x02 )
|
||||
#define portENABLE_TIMER ( ( uint8_t ) 0x01 )
|
||||
#define portPRESCALE_VALUE 0x00
|
||||
#define portINTERRUPT_ON_MATCH ( ( uint32_t ) 0x01 )
|
||||
#define portRESET_COUNT_ON_MATCH ( ( uint32_t ) 0x02 )
|
||||
|
||||
/* Constants required to setup the VIC for the tick ISR. */
|
||||
#define portTIMER_VIC_CHANNEL ( ( uint32_t ) 0x0004 )
|
||||
#define portTIMER_VIC_CHANNEL_BIT ( ( uint32_t ) 0x0010 )
|
||||
#define portTIMER_VIC_ENABLE ( ( uint32_t ) 0x0020 )
|
||||
#define portTIMER_VIC_CHANNEL ( ( uint32_t ) 0x0004 )
|
||||
#define portTIMER_VIC_CHANNEL_BIT ( ( uint32_t ) 0x0010 )
|
||||
#define portTIMER_VIC_ENABLE ( ( uint32_t ) 0x0020 )
|
||||
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* Setup the timer to generate the tick interrupts. */
|
||||
static void prvSetupTimerInterrupt( void );
|
||||
|
||||
/*
|
||||
* The scheduler can only be started from ARM mode, so
|
||||
* vPortISRStartFirstSTask() is defined in portISR.c.
|
||||
/*
|
||||
* The scheduler can only be started from ARM mode, so
|
||||
* vPortISRStartFirstSTask() is defined in portISR.c.
|
||||
*/
|
||||
extern void vPortISRStartFirstTask( void );
|
||||
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/*
|
||||
* Initialise the stack of a task to look exactly as if a call to
|
||||
/*
|
||||
* Initialise the stack of a task to look exactly as if a call to
|
||||
* portSAVE_CONTEXT had been called.
|
||||
*
|
||||
* See header file for description.
|
||||
* See header file for description.
|
||||
*/
|
||||
StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
|
||||
TaskFunction_t pxCode,
|
||||
void * pvParameters )
|
||||
StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters )
|
||||
{
|
||||
StackType_t * pxOriginalTOS;
|
||||
StackType_t *pxOriginalTOS;
|
||||
|
||||
pxOriginalTOS = pxTopOfStack;
|
||||
pxOriginalTOS = pxTopOfStack;
|
||||
|
||||
/* To ensure asserts in tasks.c don't fail, although in this case the assert
|
||||
* is not really required. */
|
||||
pxTopOfStack--;
|
||||
/* To ensure asserts in tasks.c don't fail, although in this case the assert
|
||||
is not really required. */
|
||||
pxTopOfStack--;
|
||||
|
||||
/* Setup the initial stack of the task. The stack is set exactly as
|
||||
* expected by the portRESTORE_CONTEXT() macro. */
|
||||
/* Setup the initial stack of the task. The stack is set exactly as
|
||||
expected by the portRESTORE_CONTEXT() macro. */
|
||||
|
||||
/* First on the stack is the return address - which in this case is the
|
||||
* start of the task. The offset is added to make the return address appear
|
||||
* as it would within an IRQ ISR. */
|
||||
*pxTopOfStack = ( StackType_t ) pxCode + portINSTRUCTION_SIZE;
|
||||
pxTopOfStack--;
|
||||
/* First on the stack is the return address - which in this case is the
|
||||
start of the task. The offset is added to make the return address appear
|
||||
as it would within an IRQ ISR. */
|
||||
*pxTopOfStack = ( StackType_t ) pxCode + portINSTRUCTION_SIZE;
|
||||
pxTopOfStack--;
|
||||
|
||||
*pxTopOfStack = ( StackType_t ) 0xaaaaaaaa; /* R14 */
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( StackType_t ) pxOriginalTOS; /* Stack used when task starts goes in R13. */
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( StackType_t ) 0x12121212; /* R12 */
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( StackType_t ) 0x11111111; /* R11 */
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( StackType_t ) 0x10101010; /* R10 */
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( StackType_t ) 0x09090909; /* R9 */
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( StackType_t ) 0x08080808; /* R8 */
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( StackType_t ) 0x07070707; /* R7 */
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( StackType_t ) 0x06060606; /* R6 */
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( StackType_t ) 0x05050505; /* R5 */
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( StackType_t ) 0x04040404; /* R4 */
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( StackType_t ) 0x03030303; /* R3 */
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( StackType_t ) 0x02020202; /* R2 */
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( StackType_t ) 0x01010101; /* R1 */
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( StackType_t ) 0xaaaaaaaa; /* R14 */
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( StackType_t ) pxOriginalTOS; /* Stack used when task starts goes in R13. */
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( StackType_t ) 0x12121212; /* R12 */
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( StackType_t ) 0x11111111; /* R11 */
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( StackType_t ) 0x10101010; /* R10 */
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( StackType_t ) 0x09090909; /* R9 */
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( StackType_t ) 0x08080808; /* R8 */
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( StackType_t ) 0x07070707; /* R7 */
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( StackType_t ) 0x06060606; /* R6 */
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( StackType_t ) 0x05050505; /* R5 */
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( StackType_t ) 0x04040404; /* R4 */
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( StackType_t ) 0x03030303; /* R3 */
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( StackType_t ) 0x02020202; /* R2 */
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( StackType_t ) 0x01010101; /* R1 */
|
||||
pxTopOfStack--;
|
||||
|
||||
/* When the task starts is will expect to find the function parameter in
|
||||
* R0. */
|
||||
*pxTopOfStack = ( StackType_t ) pvParameters; /* R0 */
|
||||
pxTopOfStack--;
|
||||
/* When the task starts is will expect to find the function parameter in
|
||||
R0. */
|
||||
*pxTopOfStack = ( StackType_t ) pvParameters; /* R0 */
|
||||
pxTopOfStack--;
|
||||
|
||||
/* The last thing onto the stack is the status register, which is set for
|
||||
* system mode, with interrupts enabled. */
|
||||
*pxTopOfStack = ( StackType_t ) portINITIAL_SPSR;
|
||||
/* The last thing onto the stack is the status register, which is set for
|
||||
system mode, with interrupts enabled. */
|
||||
*pxTopOfStack = ( StackType_t ) portINITIAL_SPSR;
|
||||
|
||||
if( ( ( uint32_t ) pxCode & 0x01UL ) != 0x00 )
|
||||
{
|
||||
/* We want the task to start in thumb mode. */
|
||||
*pxTopOfStack |= portTHUMB_MODE_BIT;
|
||||
}
|
||||
if( ( ( uint32_t ) pxCode & 0x01UL ) != 0x00 )
|
||||
{
|
||||
/* We want the task to start in thumb mode. */
|
||||
*pxTopOfStack |= portTHUMB_MODE_BIT;
|
||||
}
|
||||
|
||||
pxTopOfStack--;
|
||||
pxTopOfStack--;
|
||||
|
||||
/* Some optimisation levels use the stack differently to others. This
|
||||
* means the interrupt flags cannot always be stored on the stack and will
|
||||
* instead be stored in a variable, which is then saved as part of the
|
||||
* tasks context. */
|
||||
*pxTopOfStack = portNO_CRITICAL_SECTION_NESTING;
|
||||
/* Some optimisation levels use the stack differently to others. This
|
||||
means the interrupt flags cannot always be stored on the stack and will
|
||||
instead be stored in a variable, which is then saved as part of the
|
||||
tasks context. */
|
||||
*pxTopOfStack = portNO_CRITICAL_SECTION_NESTING;
|
||||
|
||||
return pxTopOfStack;
|
||||
return pxTopOfStack;
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
BaseType_t xPortStartScheduler( void )
|
||||
{
|
||||
/* Start the timer that generates the tick ISR. Interrupts are disabled
|
||||
* here already. */
|
||||
prvSetupTimerInterrupt();
|
||||
/* Start the timer that generates the tick ISR. Interrupts are disabled
|
||||
here already. */
|
||||
prvSetupTimerInterrupt();
|
||||
|
||||
/* Start the first task. */
|
||||
vPortISRStartFirstTask();
|
||||
/* Start the first task. */
|
||||
vPortISRStartFirstTask();
|
||||
|
||||
/* Should not get here! */
|
||||
return 0;
|
||||
/* Should not get here! */
|
||||
return 0;
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
void vPortEndScheduler( void )
|
||||
{
|
||||
/* It is unlikely that the ARM port will require this function as there
|
||||
* is nothing to return to. */
|
||||
/* It is unlikely that the ARM port will require this function as there
|
||||
is nothing to return to. */
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
|
@ -181,41 +179,43 @@ void vPortEndScheduler( void )
|
|||
*/
|
||||
static void prvSetupTimerInterrupt( void )
|
||||
{
|
||||
uint32_t ulCompareMatch;
|
||||
uint32_t ulCompareMatch;
|
||||
extern void ( vTickISR )( void );
|
||||
|
||||
extern void( vTickISR )( void );
|
||||
/* A 1ms tick does not require the use of the timer prescale. This is
|
||||
defaulted to zero but can be used if necessary. */
|
||||
T0_PR = portPRESCALE_VALUE;
|
||||
|
||||
/* A 1ms tick does not require the use of the timer prescale. This is
|
||||
* defaulted to zero but can be used if necessary. */
|
||||
T0_PR = portPRESCALE_VALUE;
|
||||
/* Calculate the match value required for our wanted tick rate. */
|
||||
ulCompareMatch = configCPU_CLOCK_HZ / configTICK_RATE_HZ;
|
||||
|
||||
/* Calculate the match value required for our wanted tick rate. */
|
||||
ulCompareMatch = configCPU_CLOCK_HZ / configTICK_RATE_HZ;
|
||||
/* Protect against divide by zero. Using an if() statement still results
|
||||
in a warning - hence the #if. */
|
||||
#if portPRESCALE_VALUE != 0
|
||||
{
|
||||
ulCompareMatch /= ( portPRESCALE_VALUE + 1 );
|
||||
}
|
||||
#endif
|
||||
T0_MR0 = ulCompareMatch;
|
||||
|
||||
/* Protect against divide by zero. Using an if() statement still results
|
||||
* in a warning - hence the #if. */
|
||||
#if portPRESCALE_VALUE != 0
|
||||
{
|
||||
ulCompareMatch /= ( portPRESCALE_VALUE + 1 );
|
||||
}
|
||||
#endif
|
||||
T0_MR0 = ulCompareMatch;
|
||||
/* Generate tick with timer 0 compare match. */
|
||||
T0_MCR = portRESET_COUNT_ON_MATCH | portINTERRUPT_ON_MATCH;
|
||||
|
||||
/* Generate tick with timer 0 compare match. */
|
||||
T0_MCR = portRESET_COUNT_ON_MATCH | portINTERRUPT_ON_MATCH;
|
||||
/* Setup the VIC for the timer. */
|
||||
VICIntSelect &= ~( portTIMER_VIC_CHANNEL_BIT );
|
||||
VICIntEnable |= portTIMER_VIC_CHANNEL_BIT;
|
||||
|
||||
/* The ISR installed depends on whether the preemptive or cooperative
|
||||
scheduler is being used. */
|
||||
|
||||
/* Setup the VIC for the timer. */
|
||||
VICIntSelect &= ~( portTIMER_VIC_CHANNEL_BIT );
|
||||
VICIntEnable |= portTIMER_VIC_CHANNEL_BIT;
|
||||
VICVectAddr0 = ( int32_t ) vTickISR;
|
||||
VICVectCntl0 = portTIMER_VIC_CHANNEL | portTIMER_VIC_ENABLE;
|
||||
|
||||
/* The ISR installed depends on whether the preemptive or cooperative
|
||||
* scheduler is being used. */
|
||||
|
||||
VICVectAddr0 = ( int32_t ) vTickISR;
|
||||
VICVectCntl0 = portTIMER_VIC_CHANNEL | portTIMER_VIC_ENABLE;
|
||||
|
||||
/* Start the timer - interrupts are disabled when this function is called
|
||||
* so it is okay to do this here. */
|
||||
T0_TCR = portENABLE_TIMER;
|
||||
/* Start the timer - interrupts are disabled when this function is called
|
||||
so it is okay to do this here. */
|
||||
T0_TCR = portENABLE_TIMER;
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
|
||||
|
||||
|
|
|
@ -19,53 +19,53 @@
|
|||
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
* http://www.FreeRTOS.org
|
||||
* http://aws.amazon.com/freertos
|
||||
* https://www.FreeRTOS.org
|
||||
* https://github.com/FreeRTOS
|
||||
*
|
||||
* 1 tab == 4 spaces!
|
||||
*/
|
||||
|
||||
|
||||
/*-----------------------------------------------------------
|
||||
* Components that can be compiled to either ARM or THUMB mode are
|
||||
* contained in port.c The ISR routines, which can only be compiled
|
||||
* to ARM mode, are contained in this file.
|
||||
*----------------------------------------------------------*/
|
||||
* Components that can be compiled to either ARM or THUMB mode are
|
||||
* contained in port.c The ISR routines, which can only be compiled
|
||||
* to ARM mode, are contained in this file.
|
||||
*----------------------------------------------------------*/
|
||||
|
||||
/*
|
||||
* Changes from V2.5.2
|
||||
*
|
||||
+ The critical section management functions have been changed. These no
|
||||
+ longer modify the stack and are safe to use at all optimisation levels.
|
||||
+ The functions are now also the same for both ARM and THUMB modes.
|
||||
+
|
||||
+ Changes from V2.6.0
|
||||
+
|
||||
+ Removed the 'static' from the definition of vNonPreemptiveTick() to
|
||||
+ allow the demo to link when using the cooperative scheduler.
|
||||
+
|
||||
+ Changes from V3.2.4
|
||||
+
|
||||
+ The assembler statements are now included in a single asm block rather
|
||||
+ than each line having its own asm block.
|
||||
*/
|
||||
Changes from V2.5.2
|
||||
|
||||
+ The critical section management functions have been changed. These no
|
||||
longer modify the stack and are safe to use at all optimisation levels.
|
||||
The functions are now also the same for both ARM and THUMB modes.
|
||||
|
||||
Changes from V2.6.0
|
||||
|
||||
+ Removed the 'static' from the definition of vNonPreemptiveTick() to
|
||||
allow the demo to link when using the cooperative scheduler.
|
||||
|
||||
Changes from V3.2.4
|
||||
|
||||
+ The assembler statements are now included in a single asm block rather
|
||||
than each line having its own asm block.
|
||||
*/
|
||||
|
||||
|
||||
/* Scheduler includes. */
|
||||
#include "FreeRTOS.h"
|
||||
|
||||
/* Constants required to handle interrupts. */
|
||||
#define portTIMER_MATCH_ISR_BIT ( ( uint8_t ) 0x01 )
|
||||
#define portCLEAR_VIC_INTERRUPT ( ( uint32_t ) 0 )
|
||||
#define portTIMER_MATCH_ISR_BIT ( ( uint8_t ) 0x01 )
|
||||
#define portCLEAR_VIC_INTERRUPT ( ( uint32_t ) 0 )
|
||||
|
||||
/* Constants required to handle critical sections. */
|
||||
#define portNO_CRITICAL_NESTING ( ( uint32_t ) 0 )
|
||||
#define portNO_CRITICAL_NESTING ( ( uint32_t ) 0 )
|
||||
volatile uint32_t ulCriticalNesting = 9999UL;
|
||||
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* ISR to handle manual context switches (from a call to taskYIELD()). */
|
||||
void vPortYieldProcessor( void ) __attribute__( ( interrupt( "SWI" ), naked ) );
|
||||
void vPortYieldProcessor( void ) __attribute__((interrupt("SWI"), naked));
|
||||
|
||||
/*
|
||||
* The scheduler can only be started from ARM mode, hence the inclusion of this
|
||||
|
@ -76,9 +76,9 @@ void vPortISRStartFirstTask( void );
|
|||
|
||||
void vPortISRStartFirstTask( void )
|
||||
{
|
||||
/* Simply start the scheduler. This is included here as it can only be
|
||||
* called from ARM mode. */
|
||||
portRESTORE_CONTEXT();
|
||||
/* Simply start the scheduler. This is included here as it can only be
|
||||
called from ARM mode. */
|
||||
portRESTORE_CONTEXT();
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
|
@ -92,48 +92,48 @@ void vPortISRStartFirstTask( void )
|
|||
*/
|
||||
void vPortYieldProcessor( void )
|
||||
{
|
||||
/* Within an IRQ ISR the link register has an offset from the true return
|
||||
* address, but an SWI ISR does not. Add the offset manually so the same
|
||||
* ISR return code can be used in both cases. */
|
||||
__asm volatile ( "ADD LR, LR, #4");
|
||||
/* Within an IRQ ISR the link register has an offset from the true return
|
||||
address, but an SWI ISR does not. Add the offset manually so the same
|
||||
ISR return code can be used in both cases. */
|
||||
__asm volatile ( "ADD LR, LR, #4" );
|
||||
|
||||
/* Perform the context switch. First save the context of the current task. */
|
||||
portSAVE_CONTEXT();
|
||||
/* Perform the context switch. First save the context of the current task. */
|
||||
portSAVE_CONTEXT();
|
||||
|
||||
/* Find the highest priority task that is ready to run. */
|
||||
__asm volatile ( "bl vTaskSwitchContext" );
|
||||
/* Find the highest priority task that is ready to run. */
|
||||
__asm volatile ( "bl vTaskSwitchContext" );
|
||||
|
||||
/* Restore the context of the new task. */
|
||||
portRESTORE_CONTEXT();
|
||||
/* Restore the context of the new task. */
|
||||
portRESTORE_CONTEXT();
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/*
|
||||
* The ISR used for the scheduler tick.
|
||||
*/
|
||||
void vTickISR( void ) __attribute__( ( naked ) );
|
||||
void vTickISR( void ) __attribute__((naked));
|
||||
void vTickISR( void )
|
||||
{
|
||||
/* Save the context of the interrupted task. */
|
||||
portSAVE_CONTEXT();
|
||||
/* Save the context of the interrupted task. */
|
||||
portSAVE_CONTEXT();
|
||||
|
||||
/* Increment the RTOS tick count, then look for the highest priority
|
||||
* task that is ready to run. */
|
||||
__asm volatile
|
||||
(
|
||||
" bl xTaskIncrementTick \t\n"\
|
||||
" cmp r0, #0 \t\n"\
|
||||
" beq SkipContextSwitch \t\n"\
|
||||
" bl vTaskSwitchContext \t\n"\
|
||||
"SkipContextSwitch: \t\n"
|
||||
);
|
||||
/* Increment the RTOS tick count, then look for the highest priority
|
||||
task that is ready to run. */
|
||||
__asm volatile
|
||||
(
|
||||
" bl xTaskIncrementTick \t\n" \
|
||||
" cmp r0, #0 \t\n" \
|
||||
" beq SkipContextSwitch \t\n" \
|
||||
" bl vTaskSwitchContext \t\n" \
|
||||
"SkipContextSwitch: \t\n"
|
||||
);
|
||||
|
||||
/* Ready for the next interrupt. */
|
||||
T0_IR = portTIMER_MATCH_ISR_BIT;
|
||||
VICVectAddr = portCLEAR_VIC_INTERRUPT;
|
||||
/* Ready for the next interrupt. */
|
||||
T0_IR = portTIMER_MATCH_ISR_BIT;
|
||||
VICVectAddr = portCLEAR_VIC_INTERRUPT;
|
||||
|
||||
/* Restore the context of the new task. */
|
||||
portRESTORE_CONTEXT();
|
||||
/* Restore the context of the new task. */
|
||||
portRESTORE_CONTEXT();
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
|
@ -145,71 +145,71 @@ void vTickISR( void )
|
|||
*/
|
||||
#ifdef THUMB_INTERWORK
|
||||
|
||||
void vPortDisableInterruptsFromThumb( void ) __attribute__( ( naked ) );
|
||||
void vPortEnableInterruptsFromThumb( void ) __attribute__( ( naked ) );
|
||||
void vPortDisableInterruptsFromThumb( void ) __attribute__ ((naked));
|
||||
void vPortEnableInterruptsFromThumb( void ) __attribute__ ((naked));
|
||||
|
||||
void vPortDisableInterruptsFromThumb( void )
|
||||
{
|
||||
__asm volatile (
|
||||
"STMDB SP!, {R0} \n\t"/* Push R0. */
|
||||
"MRS R0, CPSR \n\t"/* Get CPSR. */
|
||||
"ORR R0, R0, #0xC0 \n\t"/* Disable IRQ, FIQ. */
|
||||
"MSR CPSR, R0 \n\t"/* Write back modified value. */
|
||||
"LDMIA SP!, {R0} \n\t"/* Pop R0. */
|
||||
"BX R14"); /* Return back to thumb. */
|
||||
}
|
||||
void vPortDisableInterruptsFromThumb( void )
|
||||
{
|
||||
__asm volatile (
|
||||
"STMDB SP!, {R0} \n\t" /* Push R0. */
|
||||
"MRS R0, CPSR \n\t" /* Get CPSR. */
|
||||
"ORR R0, R0, #0xC0 \n\t" /* Disable IRQ, FIQ. */
|
||||
"MSR CPSR, R0 \n\t" /* Write back modified value. */
|
||||
"LDMIA SP!, {R0} \n\t" /* Pop R0. */
|
||||
"BX R14" ); /* Return back to thumb. */
|
||||
}
|
||||
|
||||
void vPortEnableInterruptsFromThumb( void )
|
||||
{
|
||||
__asm volatile (
|
||||
"STMDB SP!, {R0} \n\t"/* Push R0. */
|
||||
"MRS R0, CPSR \n\t"/* Get CPSR. */
|
||||
"BIC R0, R0, #0xC0 \n\t"/* Enable IRQ, FIQ. */
|
||||
"MSR CPSR, R0 \n\t"/* Write back modified value. */
|
||||
"LDMIA SP!, {R0} \n\t"/* Pop R0. */
|
||||
"BX R14"); /* Return back to thumb. */
|
||||
}
|
||||
void vPortEnableInterruptsFromThumb( void )
|
||||
{
|
||||
__asm volatile (
|
||||
"STMDB SP!, {R0} \n\t" /* Push R0. */
|
||||
"MRS R0, CPSR \n\t" /* Get CPSR. */
|
||||
"BIC R0, R0, #0xC0 \n\t" /* Enable IRQ, FIQ. */
|
||||
"MSR CPSR, R0 \n\t" /* Write back modified value. */
|
||||
"LDMIA SP!, {R0} \n\t" /* Pop R0. */
|
||||
"BX R14" ); /* Return back to thumb. */
|
||||
}
|
||||
|
||||
#endif /* THUMB_INTERWORK */
|
||||
|
||||
/* The code generated by the GCC compiler uses the stack in different ways at
|
||||
* different optimisation levels. The interrupt flags can therefore not always
|
||||
* be saved to the stack. Instead the critical section nesting level is stored
|
||||
* in a variable, which is then saved as part of the stack context. */
|
||||
different optimisation levels. The interrupt flags can therefore not always
|
||||
be saved to the stack. Instead the critical section nesting level is stored
|
||||
in a variable, which is then saved as part of the stack context. */
|
||||
void vPortEnterCritical( void )
|
||||
{
|
||||
/* Disable interrupts as per portDISABLE_INTERRUPTS(); */
|
||||
__asm volatile (
|
||||
"STMDB SP!, {R0} \n\t"/* Push R0. */
|
||||
"MRS R0, CPSR \n\t"/* Get CPSR. */
|
||||
"ORR R0, R0, #0xC0 \n\t"/* Disable IRQ, FIQ. */
|
||||
"MSR CPSR, R0 \n\t"/* Write back modified value. */
|
||||
"LDMIA SP!, {R0}"); /* Pop R0. */
|
||||
/* Disable interrupts as per portDISABLE_INTERRUPTS(); */
|
||||
__asm volatile (
|
||||
"STMDB SP!, {R0} \n\t" /* Push R0. */
|
||||
"MRS R0, CPSR \n\t" /* Get CPSR. */
|
||||
"ORR R0, R0, #0xC0 \n\t" /* Disable IRQ, FIQ. */
|
||||
"MSR CPSR, R0 \n\t" /* Write back modified value. */
|
||||
"LDMIA SP!, {R0}" ); /* Pop R0. */
|
||||
|
||||
/* Now interrupts are disabled ulCriticalNesting can be accessed
|
||||
* directly. Increment ulCriticalNesting to keep a count of how many times
|
||||
* portENTER_CRITICAL() has been called. */
|
||||
ulCriticalNesting++;
|
||||
/* Now interrupts are disabled ulCriticalNesting can be accessed
|
||||
directly. Increment ulCriticalNesting to keep a count of how many times
|
||||
portENTER_CRITICAL() has been called. */
|
||||
ulCriticalNesting++;
|
||||
}
|
||||
|
||||
void vPortExitCritical( void )
|
||||
{
|
||||
if( ulCriticalNesting > portNO_CRITICAL_NESTING )
|
||||
{
|
||||
/* Decrement the nesting count as we are leaving a critical section. */
|
||||
ulCriticalNesting--;
|
||||
if( ulCriticalNesting > portNO_CRITICAL_NESTING )
|
||||
{
|
||||
/* Decrement the nesting count as we are leaving a critical section. */
|
||||
ulCriticalNesting--;
|
||||
|
||||
/* If the nesting level has reached zero then interrupts should be
|
||||
* re-enabled. */
|
||||
if( ulCriticalNesting == portNO_CRITICAL_NESTING )
|
||||
{
|
||||
/* Enable interrupts as per portEXIT_CRITICAL(). */
|
||||
__asm volatile (
|
||||
"STMDB SP!, {R0} \n\t"/* Push R0. */
|
||||
"MRS R0, CPSR \n\t"/* Get CPSR. */
|
||||
"BIC R0, R0, #0xC0 \n\t"/* Enable IRQ, FIQ. */
|
||||
"MSR CPSR, R0 \n\t"/* Write back modified value. */
|
||||
"LDMIA SP!, {R0}"); /* Pop R0. */
|
||||
}
|
||||
}
|
||||
/* If the nesting level has reached zero then interrupts should be
|
||||
re-enabled. */
|
||||
if( ulCriticalNesting == portNO_CRITICAL_NESTING )
|
||||
{
|
||||
/* Enable interrupts as per portEXIT_CRITICAL(). */
|
||||
__asm volatile (
|
||||
"STMDB SP!, {R0} \n\t" /* Push R0. */
|
||||
"MRS R0, CPSR \n\t" /* Get CPSR. */
|
||||
"BIC R0, R0, #0xC0 \n\t" /* Enable IRQ, FIQ. */
|
||||
"MSR CPSR, R0 \n\t" /* Write back modified value. */
|
||||
"LDMIA SP!, {R0}" ); /* Pop R0. */
|
||||
}
|
||||
}
|
||||
}
|
||||
|
|
Some files were not shown because too many files have changed in this diff Show more
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Add table
Add a link
Reference in a new issue