diff --git a/include/task.h b/include/task.h index 9c4deb7db..f3e0d496b 100644 --- a/include/task.h +++ b/include/task.h @@ -65,9 +65,9 @@ #define tskMPU_REGION_EXECUTE_NEVER ( 1U << 2U ) #define tskMPU_REGION_NORMAL_MEMORY ( 1U << 3U ) #define tskMPU_REGION_DEVICE_MEMORY ( 1U << 4U ) -#if ( portHAS_ARMV8_1_M_EXTENSION == 1 ) +#if ( portARMV8M_MINOR_VERSION >= 1 ) #define tskMPU_REGION_PRIVILEGED_EXECUTE_NEVER ( 1U << 5U ) -#endif /* portHAS_ARMV8_1_M_EXTENSION == 1 */ +#endif /* portARMV8M_MINOR_VERSION >= 1 */ /* MPU region permissions stored in MPU settings to * authorize access requests. */ diff --git a/portable/ARMv8M/non_secure/port.c b/portable/ARMv8M/non_secure/port.c index 66274474f..c9b596d12 100644 --- a/portable/ARMv8M/non_secure/port.c +++ b/portable/ARMv8M/non_secure/port.c @@ -225,10 +225,11 @@ typedef void ( * portISR_t )( void ); #define portMPU_RLAR_REGION_ENABLE ( 1UL ) -#if (portHAS_ARMV8_1_M_EXTENSION == 1) - /* Enable Privileged eXecute Never MPU attribute for the selected memory region. */ +#if ( portARMV8M_MINOR_VERSION >= 1 ) + /* Enable Privileged eXecute Never MPU attribute for the selected memory + * region. */ #define portMPU_RLAR_PRIVILEGED_EXECUTE_NEVER ( 1UL << 4UL ) -#endif /* portHAS_ARMV8_1_M_EXTENSION == 1 */ +#endif /* portARMV8M_MINOR_VERSION >= 1 */ /* Enable privileged access to unmapped region. */ #define portMPU_PRIV_BACKGROUND_ENABLE_BIT ( 1UL << 2UL ) @@ -236,7 +237,7 @@ typedef void ( * portISR_t )( void ); /* Enable MPU. */ #define portMPU_ENABLE_BIT ( 1UL << 0UL ) -/* Expected value of the portMPU_TYPE register. */ +/* Expected value of the portMPU_TYPE register. */ #define portEXPECTED_MPU_TYPE_VALUE ( configTOTAL_MPU_REGIONS << 8UL ) /* Extract first address of the MPU region as encoded in the @@ -1886,12 +1887,14 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */ ( portMPU_RLAR_REGION_ENABLE ); /* PXN. */ - #if (portHAS_ARMV8_1_M_EXTENSION == 1) + #if ( portARMV8M_MINOR_VERSION >= 1 ) + { if( ( xRegions[ lIndex ].ulParameters & tskMPU_REGION_PRIVILEGED_EXECUTE_NEVER ) != 0 ) { xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRLAR |= ( portMPU_RLAR_PRIVILEGED_EXECUTE_NEVER ); } - #endif /* portHAS_ARMV8_1_M_EXTENSION == 1 */ + } + #endif /* portARMV8M_MINOR_VERSION >= 1 */ /* Normal memory/ Device memory. */ if( ( xRegions[ lIndex ].ulParameters & tskMPU_REGION_DEVICE_MEMORY ) != 0 ) diff --git a/portable/ARMv8M/non_secure/portable/GCC/ARM_CM23/portmacro.h b/portable/ARMv8M/non_secure/portable/GCC/ARM_CM23/portmacro.h index 487d2b56c..a7f9db767 100644 --- a/portable/ARMv8M/non_secure/portable/GCC/ARM_CM23/portmacro.h +++ b/portable/ARMv8M/non_secure/portable/GCC/ARM_CM23/portmacro.h @@ -50,7 +50,7 @@ */ #define portARCH_NAME "Cortex-M23" #define portHAS_ARMV8M_MAIN_EXTENSION 0 -#define portHAS_ARMV8_1_M_EXTENSION 0 +#define portARMV8M_MINOR_VERSION 0 #define portDONT_DISCARD __attribute__( ( used ) ) /*-----------------------------------------------------------*/ diff --git a/portable/ARMv8M/non_secure/portable/GCC/ARM_CM23_NTZ/portmacro.h b/portable/ARMv8M/non_secure/portable/GCC/ARM_CM23_NTZ/portmacro.h index 487d2b56c..a7f9db767 100644 --- a/portable/ARMv8M/non_secure/portable/GCC/ARM_CM23_NTZ/portmacro.h +++ b/portable/ARMv8M/non_secure/portable/GCC/ARM_CM23_NTZ/portmacro.h @@ -50,7 +50,7 @@ */ #define portARCH_NAME "Cortex-M23" #define portHAS_ARMV8M_MAIN_EXTENSION 0 -#define portHAS_ARMV8_1_M_EXTENSION 0 +#define portARMV8M_MINOR_VERSION 0 #define portDONT_DISCARD __attribute__( ( used ) ) /*-----------------------------------------------------------*/ diff --git a/portable/ARMv8M/non_secure/portable/GCC/ARM_CM33/portmacro.h b/portable/ARMv8M/non_secure/portable/GCC/ARM_CM33/portmacro.h index c423c3eac..0fc61f23c 100644 --- a/portable/ARMv8M/non_secure/portable/GCC/ARM_CM33/portmacro.h +++ b/portable/ARMv8M/non_secure/portable/GCC/ARM_CM33/portmacro.h @@ -50,7 +50,7 @@ */ #define portARCH_NAME "Cortex-M33" #define portHAS_ARMV8M_MAIN_EXTENSION 1 -#define portHAS_ARMV8_1_M_EXTENSION 0 +#define portARMV8M_MINOR_VERSION 0 #define portDONT_DISCARD __attribute__( ( used ) ) /*-----------------------------------------------------------*/ diff --git a/portable/ARMv8M/non_secure/portable/GCC/ARM_CM33_NTZ/portmacro.h b/portable/ARMv8M/non_secure/portable/GCC/ARM_CM33_NTZ/portmacro.h index c423c3eac..0fc61f23c 100644 --- a/portable/ARMv8M/non_secure/portable/GCC/ARM_CM33_NTZ/portmacro.h +++ b/portable/ARMv8M/non_secure/portable/GCC/ARM_CM33_NTZ/portmacro.h @@ -50,7 +50,7 @@ */ #define portARCH_NAME "Cortex-M33" #define portHAS_ARMV8M_MAIN_EXTENSION 1 -#define portHAS_ARMV8_1_M_EXTENSION 0 +#define portARMV8M_MINOR_VERSION 0 #define portDONT_DISCARD __attribute__( ( used ) ) /*-----------------------------------------------------------*/ diff --git a/portable/ARMv8M/non_secure/portable/GCC/ARM_CM35P/portmacro.h b/portable/ARMv8M/non_secure/portable/GCC/ARM_CM35P/portmacro.h index 3b001e4c8..4db6e6d4a 100644 --- a/portable/ARMv8M/non_secure/portable/GCC/ARM_CM35P/portmacro.h +++ b/portable/ARMv8M/non_secure/portable/GCC/ARM_CM35P/portmacro.h @@ -50,7 +50,7 @@ */ #define portARCH_NAME "Cortex-M35P" #define portHAS_ARMV8M_MAIN_EXTENSION 1 -#define portHAS_ARMV8_1_M_EXTENSION 0 +#define portARMV8M_MINOR_VERSION 0 #define portDONT_DISCARD __attribute__( ( used ) ) /*-----------------------------------------------------------*/ diff --git a/portable/ARMv8M/non_secure/portable/GCC/ARM_CM55/portmacro.h b/portable/ARMv8M/non_secure/portable/GCC/ARM_CM55/portmacro.h index 40831c218..c6a179c52 100644 --- a/portable/ARMv8M/non_secure/portable/GCC/ARM_CM55/portmacro.h +++ b/portable/ARMv8M/non_secure/portable/GCC/ARM_CM55/portmacro.h @@ -55,7 +55,7 @@ */ #define portARCH_NAME "Cortex-M55" #define portHAS_ARMV8M_MAIN_EXTENSION 1 -#define portHAS_ARMV8_1_M_EXTENSION 1 +#define portARMV8M_MINOR_VERSION 1 #define portDONT_DISCARD __attribute__( ( used ) ) /*-----------------------------------------------------------*/ diff --git a/portable/ARMv8M/non_secure/portable/GCC/ARM_CM85/portmacro.h b/portable/ARMv8M/non_secure/portable/GCC/ARM_CM85/portmacro.h index 55004a4ea..7e14f2696 100644 --- a/portable/ARMv8M/non_secure/portable/GCC/ARM_CM85/portmacro.h +++ b/portable/ARMv8M/non_secure/portable/GCC/ARM_CM85/portmacro.h @@ -55,7 +55,7 @@ */ #define portARCH_NAME "Cortex-M85" #define portHAS_ARMV8M_MAIN_EXTENSION 1 -#define portHAS_ARMV8_1_M_EXTENSION 1 +#define portARMV8M_MINOR_VERSION 1 #define portDONT_DISCARD __attribute__( ( used ) ) /*-----------------------------------------------------------*/ diff --git a/portable/ARMv8M/non_secure/portable/IAR/ARM_CM23/portmacro.h b/portable/ARMv8M/non_secure/portable/IAR/ARM_CM23/portmacro.h index 82d5b5421..9dfcc9132 100644 --- a/portable/ARMv8M/non_secure/portable/IAR/ARM_CM23/portmacro.h +++ b/portable/ARMv8M/non_secure/portable/IAR/ARM_CM23/portmacro.h @@ -50,7 +50,7 @@ */ #define portARCH_NAME "Cortex-M23" #define portHAS_ARMV8M_MAIN_EXTENSION 0 -#define portHAS_ARMV8_1_M_EXTENSION 0 +#define portARMV8M_MINOR_VERSION 0 #define portDONT_DISCARD __root /*-----------------------------------------------------------*/ diff --git a/portable/ARMv8M/non_secure/portable/IAR/ARM_CM23_NTZ/portmacro.h b/portable/ARMv8M/non_secure/portable/IAR/ARM_CM23_NTZ/portmacro.h index 82d5b5421..9dfcc9132 100644 --- a/portable/ARMv8M/non_secure/portable/IAR/ARM_CM23_NTZ/portmacro.h +++ b/portable/ARMv8M/non_secure/portable/IAR/ARM_CM23_NTZ/portmacro.h @@ -50,7 +50,7 @@ */ #define portARCH_NAME "Cortex-M23" #define portHAS_ARMV8M_MAIN_EXTENSION 0 -#define portHAS_ARMV8_1_M_EXTENSION 0 +#define portARMV8M_MINOR_VERSION 0 #define portDONT_DISCARD __root /*-----------------------------------------------------------*/ diff --git a/portable/ARMv8M/non_secure/portable/IAR/ARM_CM33/portmacro.h b/portable/ARMv8M/non_secure/portable/IAR/ARM_CM33/portmacro.h index 26fe594a0..a2a301f00 100644 --- a/portable/ARMv8M/non_secure/portable/IAR/ARM_CM33/portmacro.h +++ b/portable/ARMv8M/non_secure/portable/IAR/ARM_CM33/portmacro.h @@ -50,7 +50,7 @@ */ #define portARCH_NAME "Cortex-M33" #define portHAS_ARMV8M_MAIN_EXTENSION 1 -#define portHAS_ARMV8_1_M_EXTENSION 0 +#define portARMV8M_MINOR_VERSION 0 #define portDONT_DISCARD __root /*-----------------------------------------------------------*/ diff --git a/portable/ARMv8M/non_secure/portable/IAR/ARM_CM33_NTZ/portmacro.h b/portable/ARMv8M/non_secure/portable/IAR/ARM_CM33_NTZ/portmacro.h index f0493abc4..f0d5f2b9c 100644 --- a/portable/ARMv8M/non_secure/portable/IAR/ARM_CM33_NTZ/portmacro.h +++ b/portable/ARMv8M/non_secure/portable/IAR/ARM_CM33_NTZ/portmacro.h @@ -50,7 +50,7 @@ */ #define portARCH_NAME "Cortex-M33" #define portHAS_ARMV8M_MAIN_EXTENSION 1 -#define portHAS_ARMV8_1_M_EXTENSION 0 +#define portARMV8M_MINOR_VERSION 0 #define portDONT_DISCARD __root /*-----------------------------------------------------------*/ diff --git a/portable/ARMv8M/non_secure/portable/IAR/ARM_CM35P/portmacro.h b/portable/ARMv8M/non_secure/portable/IAR/ARM_CM35P/portmacro.h index 97cccc6f0..633da3a6d 100644 --- a/portable/ARMv8M/non_secure/portable/IAR/ARM_CM35P/portmacro.h +++ b/portable/ARMv8M/non_secure/portable/IAR/ARM_CM35P/portmacro.h @@ -50,7 +50,7 @@ */ #define portARCH_NAME "Cortex-M35P" #define portHAS_ARMV8M_MAIN_EXTENSION 1 -#define portHAS_ARMV8_1_M_EXTENSION 0 +#define portARMV8M_MINOR_VERSION 0 #define portDONT_DISCARD __root /*-----------------------------------------------------------*/ diff --git a/portable/ARMv8M/non_secure/portable/IAR/ARM_CM55/portmacro.h b/portable/ARMv8M/non_secure/portable/IAR/ARM_CM55/portmacro.h index 98b0c5194..95b179413 100644 --- a/portable/ARMv8M/non_secure/portable/IAR/ARM_CM55/portmacro.h +++ b/portable/ARMv8M/non_secure/portable/IAR/ARM_CM55/portmacro.h @@ -55,7 +55,7 @@ */ #define portARCH_NAME "Cortex-M55" #define portHAS_ARMV8M_MAIN_EXTENSION 1 -#define portHAS_ARMV8_1_M_EXTENSION 1 +#define portARMV8M_MINOR_VERSION 1 #define portDONT_DISCARD __root /*-----------------------------------------------------------*/ diff --git a/portable/ARMv8M/non_secure/portable/IAR/ARM_CM85/portmacro.h b/portable/ARMv8M/non_secure/portable/IAR/ARM_CM85/portmacro.h index 963f01f65..efde68dc2 100644 --- a/portable/ARMv8M/non_secure/portable/IAR/ARM_CM85/portmacro.h +++ b/portable/ARMv8M/non_secure/portable/IAR/ARM_CM85/portmacro.h @@ -55,7 +55,7 @@ */ #define portARCH_NAME "Cortex-M85" #define portHAS_ARMV8M_MAIN_EXTENSION 1 -#define portHAS_ARMV8_1_M_EXTENSION 1 +#define portARMV8M_MINOR_VERSION 1 #define portDONT_DISCARD __root /*-----------------------------------------------------------*/ diff --git a/portable/GCC/ARM_CM23/non_secure/port.c b/portable/GCC/ARM_CM23/non_secure/port.c index 66274474f..c9b596d12 100644 --- a/portable/GCC/ARM_CM23/non_secure/port.c +++ b/portable/GCC/ARM_CM23/non_secure/port.c @@ -225,10 +225,11 @@ typedef void ( * portISR_t )( void ); #define portMPU_RLAR_REGION_ENABLE ( 1UL ) -#if (portHAS_ARMV8_1_M_EXTENSION == 1) - /* Enable Privileged eXecute Never MPU attribute for the selected memory region. */ +#if ( portARMV8M_MINOR_VERSION >= 1 ) + /* Enable Privileged eXecute Never MPU attribute for the selected memory + * region. */ #define portMPU_RLAR_PRIVILEGED_EXECUTE_NEVER ( 1UL << 4UL ) -#endif /* portHAS_ARMV8_1_M_EXTENSION == 1 */ +#endif /* portARMV8M_MINOR_VERSION >= 1 */ /* Enable privileged access to unmapped region. */ #define portMPU_PRIV_BACKGROUND_ENABLE_BIT ( 1UL << 2UL ) @@ -236,7 +237,7 @@ typedef void ( * portISR_t )( void ); /* Enable MPU. */ #define portMPU_ENABLE_BIT ( 1UL << 0UL ) -/* Expected value of the portMPU_TYPE register. */ +/* Expected value of the portMPU_TYPE register. */ #define portEXPECTED_MPU_TYPE_VALUE ( configTOTAL_MPU_REGIONS << 8UL ) /* Extract first address of the MPU region as encoded in the @@ -1886,12 +1887,14 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */ ( portMPU_RLAR_REGION_ENABLE ); /* PXN. */ - #if (portHAS_ARMV8_1_M_EXTENSION == 1) + #if ( portARMV8M_MINOR_VERSION >= 1 ) + { if( ( xRegions[ lIndex ].ulParameters & tskMPU_REGION_PRIVILEGED_EXECUTE_NEVER ) != 0 ) { xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRLAR |= ( portMPU_RLAR_PRIVILEGED_EXECUTE_NEVER ); } - #endif /* portHAS_ARMV8_1_M_EXTENSION == 1 */ + } + #endif /* portARMV8M_MINOR_VERSION >= 1 */ /* Normal memory/ Device memory. */ if( ( xRegions[ lIndex ].ulParameters & tskMPU_REGION_DEVICE_MEMORY ) != 0 ) diff --git a/portable/GCC/ARM_CM23/non_secure/portmacro.h b/portable/GCC/ARM_CM23/non_secure/portmacro.h index 487d2b56c..a7f9db767 100644 --- a/portable/GCC/ARM_CM23/non_secure/portmacro.h +++ b/portable/GCC/ARM_CM23/non_secure/portmacro.h @@ -50,7 +50,7 @@ */ #define portARCH_NAME "Cortex-M23" #define portHAS_ARMV8M_MAIN_EXTENSION 0 -#define portHAS_ARMV8_1_M_EXTENSION 0 +#define portARMV8M_MINOR_VERSION 0 #define portDONT_DISCARD __attribute__( ( used ) ) /*-----------------------------------------------------------*/ diff --git a/portable/GCC/ARM_CM23_NTZ/non_secure/port.c b/portable/GCC/ARM_CM23_NTZ/non_secure/port.c index 66274474f..c9b596d12 100644 --- a/portable/GCC/ARM_CM23_NTZ/non_secure/port.c +++ b/portable/GCC/ARM_CM23_NTZ/non_secure/port.c @@ -225,10 +225,11 @@ typedef void ( * portISR_t )( void ); #define portMPU_RLAR_REGION_ENABLE ( 1UL ) -#if (portHAS_ARMV8_1_M_EXTENSION == 1) - /* Enable Privileged eXecute Never MPU attribute for the selected memory region. */ +#if ( portARMV8M_MINOR_VERSION >= 1 ) + /* Enable Privileged eXecute Never MPU attribute for the selected memory + * region. */ #define portMPU_RLAR_PRIVILEGED_EXECUTE_NEVER ( 1UL << 4UL ) -#endif /* portHAS_ARMV8_1_M_EXTENSION == 1 */ +#endif /* portARMV8M_MINOR_VERSION >= 1 */ /* Enable privileged access to unmapped region. */ #define portMPU_PRIV_BACKGROUND_ENABLE_BIT ( 1UL << 2UL ) @@ -236,7 +237,7 @@ typedef void ( * portISR_t )( void ); /* Enable MPU. */ #define portMPU_ENABLE_BIT ( 1UL << 0UL ) -/* Expected value of the portMPU_TYPE register. */ +/* Expected value of the portMPU_TYPE register. */ #define portEXPECTED_MPU_TYPE_VALUE ( configTOTAL_MPU_REGIONS << 8UL ) /* Extract first address of the MPU region as encoded in the @@ -1886,12 +1887,14 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */ ( portMPU_RLAR_REGION_ENABLE ); /* PXN. */ - #if (portHAS_ARMV8_1_M_EXTENSION == 1) + #if ( portARMV8M_MINOR_VERSION >= 1 ) + { if( ( xRegions[ lIndex ].ulParameters & tskMPU_REGION_PRIVILEGED_EXECUTE_NEVER ) != 0 ) { xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRLAR |= ( portMPU_RLAR_PRIVILEGED_EXECUTE_NEVER ); } - #endif /* portHAS_ARMV8_1_M_EXTENSION == 1 */ + } + #endif /* portARMV8M_MINOR_VERSION >= 1 */ /* Normal memory/ Device memory. */ if( ( xRegions[ lIndex ].ulParameters & tskMPU_REGION_DEVICE_MEMORY ) != 0 ) diff --git a/portable/GCC/ARM_CM23_NTZ/non_secure/portmacro.h b/portable/GCC/ARM_CM23_NTZ/non_secure/portmacro.h index 487d2b56c..a7f9db767 100644 --- a/portable/GCC/ARM_CM23_NTZ/non_secure/portmacro.h +++ b/portable/GCC/ARM_CM23_NTZ/non_secure/portmacro.h @@ -50,7 +50,7 @@ */ #define portARCH_NAME "Cortex-M23" #define portHAS_ARMV8M_MAIN_EXTENSION 0 -#define portHAS_ARMV8_1_M_EXTENSION 0 +#define portARMV8M_MINOR_VERSION 0 #define portDONT_DISCARD __attribute__( ( used ) ) /*-----------------------------------------------------------*/ diff --git a/portable/GCC/ARM_CM33/non_secure/port.c b/portable/GCC/ARM_CM33/non_secure/port.c index 66274474f..c9b596d12 100644 --- a/portable/GCC/ARM_CM33/non_secure/port.c +++ b/portable/GCC/ARM_CM33/non_secure/port.c @@ -225,10 +225,11 @@ typedef void ( * portISR_t )( void ); #define portMPU_RLAR_REGION_ENABLE ( 1UL ) -#if (portHAS_ARMV8_1_M_EXTENSION == 1) - /* Enable Privileged eXecute Never MPU attribute for the selected memory region. */ +#if ( portARMV8M_MINOR_VERSION >= 1 ) + /* Enable Privileged eXecute Never MPU attribute for the selected memory + * region. */ #define portMPU_RLAR_PRIVILEGED_EXECUTE_NEVER ( 1UL << 4UL ) -#endif /* portHAS_ARMV8_1_M_EXTENSION == 1 */ +#endif /* portARMV8M_MINOR_VERSION >= 1 */ /* Enable privileged access to unmapped region. */ #define portMPU_PRIV_BACKGROUND_ENABLE_BIT ( 1UL << 2UL ) @@ -236,7 +237,7 @@ typedef void ( * portISR_t )( void ); /* Enable MPU. */ #define portMPU_ENABLE_BIT ( 1UL << 0UL ) -/* Expected value of the portMPU_TYPE register. */ +/* Expected value of the portMPU_TYPE register. */ #define portEXPECTED_MPU_TYPE_VALUE ( configTOTAL_MPU_REGIONS << 8UL ) /* Extract first address of the MPU region as encoded in the @@ -1886,12 +1887,14 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */ ( portMPU_RLAR_REGION_ENABLE ); /* PXN. */ - #if (portHAS_ARMV8_1_M_EXTENSION == 1) + #if ( portARMV8M_MINOR_VERSION >= 1 ) + { if( ( xRegions[ lIndex ].ulParameters & tskMPU_REGION_PRIVILEGED_EXECUTE_NEVER ) != 0 ) { xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRLAR |= ( portMPU_RLAR_PRIVILEGED_EXECUTE_NEVER ); } - #endif /* portHAS_ARMV8_1_M_EXTENSION == 1 */ + } + #endif /* portARMV8M_MINOR_VERSION >= 1 */ /* Normal memory/ Device memory. */ if( ( xRegions[ lIndex ].ulParameters & tskMPU_REGION_DEVICE_MEMORY ) != 0 ) diff --git a/portable/GCC/ARM_CM33/non_secure/portmacro.h b/portable/GCC/ARM_CM33/non_secure/portmacro.h index c423c3eac..0fc61f23c 100644 --- a/portable/GCC/ARM_CM33/non_secure/portmacro.h +++ b/portable/GCC/ARM_CM33/non_secure/portmacro.h @@ -50,7 +50,7 @@ */ #define portARCH_NAME "Cortex-M33" #define portHAS_ARMV8M_MAIN_EXTENSION 1 -#define portHAS_ARMV8_1_M_EXTENSION 0 +#define portARMV8M_MINOR_VERSION 0 #define portDONT_DISCARD __attribute__( ( used ) ) /*-----------------------------------------------------------*/ diff --git a/portable/GCC/ARM_CM33_NTZ/non_secure/port.c b/portable/GCC/ARM_CM33_NTZ/non_secure/port.c index 66274474f..c9b596d12 100644 --- a/portable/GCC/ARM_CM33_NTZ/non_secure/port.c +++ b/portable/GCC/ARM_CM33_NTZ/non_secure/port.c @@ -225,10 +225,11 @@ typedef void ( * portISR_t )( void ); #define portMPU_RLAR_REGION_ENABLE ( 1UL ) -#if (portHAS_ARMV8_1_M_EXTENSION == 1) - /* Enable Privileged eXecute Never MPU attribute for the selected memory region. */ +#if ( portARMV8M_MINOR_VERSION >= 1 ) + /* Enable Privileged eXecute Never MPU attribute for the selected memory + * region. */ #define portMPU_RLAR_PRIVILEGED_EXECUTE_NEVER ( 1UL << 4UL ) -#endif /* portHAS_ARMV8_1_M_EXTENSION == 1 */ +#endif /* portARMV8M_MINOR_VERSION >= 1 */ /* Enable privileged access to unmapped region. */ #define portMPU_PRIV_BACKGROUND_ENABLE_BIT ( 1UL << 2UL ) @@ -236,7 +237,7 @@ typedef void ( * portISR_t )( void ); /* Enable MPU. */ #define portMPU_ENABLE_BIT ( 1UL << 0UL ) -/* Expected value of the portMPU_TYPE register. */ +/* Expected value of the portMPU_TYPE register. */ #define portEXPECTED_MPU_TYPE_VALUE ( configTOTAL_MPU_REGIONS << 8UL ) /* Extract first address of the MPU region as encoded in the @@ -1886,12 +1887,14 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */ ( portMPU_RLAR_REGION_ENABLE ); /* PXN. */ - #if (portHAS_ARMV8_1_M_EXTENSION == 1) + #if ( portARMV8M_MINOR_VERSION >= 1 ) + { if( ( xRegions[ lIndex ].ulParameters & tskMPU_REGION_PRIVILEGED_EXECUTE_NEVER ) != 0 ) { xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRLAR |= ( portMPU_RLAR_PRIVILEGED_EXECUTE_NEVER ); } - #endif /* portHAS_ARMV8_1_M_EXTENSION == 1 */ + } + #endif /* portARMV8M_MINOR_VERSION >= 1 */ /* Normal memory/ Device memory. */ if( ( xRegions[ lIndex ].ulParameters & tskMPU_REGION_DEVICE_MEMORY ) != 0 ) diff --git a/portable/GCC/ARM_CM33_NTZ/non_secure/portmacro.h b/portable/GCC/ARM_CM33_NTZ/non_secure/portmacro.h index c423c3eac..0fc61f23c 100644 --- a/portable/GCC/ARM_CM33_NTZ/non_secure/portmacro.h +++ b/portable/GCC/ARM_CM33_NTZ/non_secure/portmacro.h @@ -50,7 +50,7 @@ */ #define portARCH_NAME "Cortex-M33" #define portHAS_ARMV8M_MAIN_EXTENSION 1 -#define portHAS_ARMV8_1_M_EXTENSION 0 +#define portARMV8M_MINOR_VERSION 0 #define portDONT_DISCARD __attribute__( ( used ) ) /*-----------------------------------------------------------*/ diff --git a/portable/GCC/ARM_CM35P/non_secure/port.c b/portable/GCC/ARM_CM35P/non_secure/port.c index 66274474f..c9b596d12 100644 --- a/portable/GCC/ARM_CM35P/non_secure/port.c +++ b/portable/GCC/ARM_CM35P/non_secure/port.c @@ -225,10 +225,11 @@ typedef void ( * portISR_t )( void ); #define portMPU_RLAR_REGION_ENABLE ( 1UL ) -#if (portHAS_ARMV8_1_M_EXTENSION == 1) - /* Enable Privileged eXecute Never MPU attribute for the selected memory region. */ +#if ( portARMV8M_MINOR_VERSION >= 1 ) + /* Enable Privileged eXecute Never MPU attribute for the selected memory + * region. */ #define portMPU_RLAR_PRIVILEGED_EXECUTE_NEVER ( 1UL << 4UL ) -#endif /* portHAS_ARMV8_1_M_EXTENSION == 1 */ +#endif /* portARMV8M_MINOR_VERSION >= 1 */ /* Enable privileged access to unmapped region. */ #define portMPU_PRIV_BACKGROUND_ENABLE_BIT ( 1UL << 2UL ) @@ -236,7 +237,7 @@ typedef void ( * portISR_t )( void ); /* Enable MPU. */ #define portMPU_ENABLE_BIT ( 1UL << 0UL ) -/* Expected value of the portMPU_TYPE register. */ +/* Expected value of the portMPU_TYPE register. */ #define portEXPECTED_MPU_TYPE_VALUE ( configTOTAL_MPU_REGIONS << 8UL ) /* Extract first address of the MPU region as encoded in the @@ -1886,12 +1887,14 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */ ( portMPU_RLAR_REGION_ENABLE ); /* PXN. */ - #if (portHAS_ARMV8_1_M_EXTENSION == 1) + #if ( portARMV8M_MINOR_VERSION >= 1 ) + { if( ( xRegions[ lIndex ].ulParameters & tskMPU_REGION_PRIVILEGED_EXECUTE_NEVER ) != 0 ) { xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRLAR |= ( portMPU_RLAR_PRIVILEGED_EXECUTE_NEVER ); } - #endif /* portHAS_ARMV8_1_M_EXTENSION == 1 */ + } + #endif /* portARMV8M_MINOR_VERSION >= 1 */ /* Normal memory/ Device memory. */ if( ( xRegions[ lIndex ].ulParameters & tskMPU_REGION_DEVICE_MEMORY ) != 0 ) diff --git a/portable/GCC/ARM_CM35P/non_secure/portmacro.h b/portable/GCC/ARM_CM35P/non_secure/portmacro.h index 3b001e4c8..4db6e6d4a 100644 --- a/portable/GCC/ARM_CM35P/non_secure/portmacro.h +++ b/portable/GCC/ARM_CM35P/non_secure/portmacro.h @@ -50,7 +50,7 @@ */ #define portARCH_NAME "Cortex-M35P" #define portHAS_ARMV8M_MAIN_EXTENSION 1 -#define portHAS_ARMV8_1_M_EXTENSION 0 +#define portARMV8M_MINOR_VERSION 0 #define portDONT_DISCARD __attribute__( ( used ) ) /*-----------------------------------------------------------*/ diff --git a/portable/GCC/ARM_CM35P_NTZ/non_secure/port.c b/portable/GCC/ARM_CM35P_NTZ/non_secure/port.c index 66274474f..c9b596d12 100644 --- a/portable/GCC/ARM_CM35P_NTZ/non_secure/port.c +++ b/portable/GCC/ARM_CM35P_NTZ/non_secure/port.c @@ -225,10 +225,11 @@ typedef void ( * portISR_t )( void ); #define portMPU_RLAR_REGION_ENABLE ( 1UL ) -#if (portHAS_ARMV8_1_M_EXTENSION == 1) - /* Enable Privileged eXecute Never MPU attribute for the selected memory region. */ +#if ( portARMV8M_MINOR_VERSION >= 1 ) + /* Enable Privileged eXecute Never MPU attribute for the selected memory + * region. */ #define portMPU_RLAR_PRIVILEGED_EXECUTE_NEVER ( 1UL << 4UL ) -#endif /* portHAS_ARMV8_1_M_EXTENSION == 1 */ +#endif /* portARMV8M_MINOR_VERSION >= 1 */ /* Enable privileged access to unmapped region. */ #define portMPU_PRIV_BACKGROUND_ENABLE_BIT ( 1UL << 2UL ) @@ -236,7 +237,7 @@ typedef void ( * portISR_t )( void ); /* Enable MPU. */ #define portMPU_ENABLE_BIT ( 1UL << 0UL ) -/* Expected value of the portMPU_TYPE register. */ +/* Expected value of the portMPU_TYPE register. */ #define portEXPECTED_MPU_TYPE_VALUE ( configTOTAL_MPU_REGIONS << 8UL ) /* Extract first address of the MPU region as encoded in the @@ -1886,12 +1887,14 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */ ( portMPU_RLAR_REGION_ENABLE ); /* PXN. */ - #if (portHAS_ARMV8_1_M_EXTENSION == 1) + #if ( portARMV8M_MINOR_VERSION >= 1 ) + { if( ( xRegions[ lIndex ].ulParameters & tskMPU_REGION_PRIVILEGED_EXECUTE_NEVER ) != 0 ) { xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRLAR |= ( portMPU_RLAR_PRIVILEGED_EXECUTE_NEVER ); } - #endif /* portHAS_ARMV8_1_M_EXTENSION == 1 */ + } + #endif /* portARMV8M_MINOR_VERSION >= 1 */ /* Normal memory/ Device memory. */ if( ( xRegions[ lIndex ].ulParameters & tskMPU_REGION_DEVICE_MEMORY ) != 0 ) diff --git a/portable/GCC/ARM_CM35P_NTZ/non_secure/portmacro.h b/portable/GCC/ARM_CM35P_NTZ/non_secure/portmacro.h index 3b001e4c8..4db6e6d4a 100644 --- a/portable/GCC/ARM_CM35P_NTZ/non_secure/portmacro.h +++ b/portable/GCC/ARM_CM35P_NTZ/non_secure/portmacro.h @@ -50,7 +50,7 @@ */ #define portARCH_NAME "Cortex-M35P" #define portHAS_ARMV8M_MAIN_EXTENSION 1 -#define portHAS_ARMV8_1_M_EXTENSION 0 +#define portARMV8M_MINOR_VERSION 0 #define portDONT_DISCARD __attribute__( ( used ) ) /*-----------------------------------------------------------*/ diff --git a/portable/GCC/ARM_CM55/non_secure/port.c b/portable/GCC/ARM_CM55/non_secure/port.c index 66274474f..c9b596d12 100644 --- a/portable/GCC/ARM_CM55/non_secure/port.c +++ b/portable/GCC/ARM_CM55/non_secure/port.c @@ -225,10 +225,11 @@ typedef void ( * portISR_t )( void ); #define portMPU_RLAR_REGION_ENABLE ( 1UL ) -#if (portHAS_ARMV8_1_M_EXTENSION == 1) - /* Enable Privileged eXecute Never MPU attribute for the selected memory region. */ +#if ( portARMV8M_MINOR_VERSION >= 1 ) + /* Enable Privileged eXecute Never MPU attribute for the selected memory + * region. */ #define portMPU_RLAR_PRIVILEGED_EXECUTE_NEVER ( 1UL << 4UL ) -#endif /* portHAS_ARMV8_1_M_EXTENSION == 1 */ +#endif /* portARMV8M_MINOR_VERSION >= 1 */ /* Enable privileged access to unmapped region. */ #define portMPU_PRIV_BACKGROUND_ENABLE_BIT ( 1UL << 2UL ) @@ -236,7 +237,7 @@ typedef void ( * portISR_t )( void ); /* Enable MPU. */ #define portMPU_ENABLE_BIT ( 1UL << 0UL ) -/* Expected value of the portMPU_TYPE register. */ +/* Expected value of the portMPU_TYPE register. */ #define portEXPECTED_MPU_TYPE_VALUE ( configTOTAL_MPU_REGIONS << 8UL ) /* Extract first address of the MPU region as encoded in the @@ -1886,12 +1887,14 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */ ( portMPU_RLAR_REGION_ENABLE ); /* PXN. */ - #if (portHAS_ARMV8_1_M_EXTENSION == 1) + #if ( portARMV8M_MINOR_VERSION >= 1 ) + { if( ( xRegions[ lIndex ].ulParameters & tskMPU_REGION_PRIVILEGED_EXECUTE_NEVER ) != 0 ) { xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRLAR |= ( portMPU_RLAR_PRIVILEGED_EXECUTE_NEVER ); } - #endif /* portHAS_ARMV8_1_M_EXTENSION == 1 */ + } + #endif /* portARMV8M_MINOR_VERSION >= 1 */ /* Normal memory/ Device memory. */ if( ( xRegions[ lIndex ].ulParameters & tskMPU_REGION_DEVICE_MEMORY ) != 0 ) diff --git a/portable/GCC/ARM_CM55/non_secure/portmacro.h b/portable/GCC/ARM_CM55/non_secure/portmacro.h index 40831c218..c6a179c52 100644 --- a/portable/GCC/ARM_CM55/non_secure/portmacro.h +++ b/portable/GCC/ARM_CM55/non_secure/portmacro.h @@ -55,7 +55,7 @@ */ #define portARCH_NAME "Cortex-M55" #define portHAS_ARMV8M_MAIN_EXTENSION 1 -#define portHAS_ARMV8_1_M_EXTENSION 1 +#define portARMV8M_MINOR_VERSION 1 #define portDONT_DISCARD __attribute__( ( used ) ) /*-----------------------------------------------------------*/ diff --git a/portable/GCC/ARM_CM55_NTZ/non_secure/port.c b/portable/GCC/ARM_CM55_NTZ/non_secure/port.c index 66274474f..c9b596d12 100644 --- a/portable/GCC/ARM_CM55_NTZ/non_secure/port.c +++ b/portable/GCC/ARM_CM55_NTZ/non_secure/port.c @@ -225,10 +225,11 @@ typedef void ( * portISR_t )( void ); #define portMPU_RLAR_REGION_ENABLE ( 1UL ) -#if (portHAS_ARMV8_1_M_EXTENSION == 1) - /* Enable Privileged eXecute Never MPU attribute for the selected memory region. */ +#if ( portARMV8M_MINOR_VERSION >= 1 ) + /* Enable Privileged eXecute Never MPU attribute for the selected memory + * region. */ #define portMPU_RLAR_PRIVILEGED_EXECUTE_NEVER ( 1UL << 4UL ) -#endif /* portHAS_ARMV8_1_M_EXTENSION == 1 */ +#endif /* portARMV8M_MINOR_VERSION >= 1 */ /* Enable privileged access to unmapped region. */ #define portMPU_PRIV_BACKGROUND_ENABLE_BIT ( 1UL << 2UL ) @@ -236,7 +237,7 @@ typedef void ( * portISR_t )( void ); /* Enable MPU. */ #define portMPU_ENABLE_BIT ( 1UL << 0UL ) -/* Expected value of the portMPU_TYPE register. */ +/* Expected value of the portMPU_TYPE register. */ #define portEXPECTED_MPU_TYPE_VALUE ( configTOTAL_MPU_REGIONS << 8UL ) /* Extract first address of the MPU region as encoded in the @@ -1886,12 +1887,14 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */ ( portMPU_RLAR_REGION_ENABLE ); /* PXN. */ - #if (portHAS_ARMV8_1_M_EXTENSION == 1) + #if ( portARMV8M_MINOR_VERSION >= 1 ) + { if( ( xRegions[ lIndex ].ulParameters & tskMPU_REGION_PRIVILEGED_EXECUTE_NEVER ) != 0 ) { xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRLAR |= ( portMPU_RLAR_PRIVILEGED_EXECUTE_NEVER ); } - #endif /* portHAS_ARMV8_1_M_EXTENSION == 1 */ + } + #endif /* portARMV8M_MINOR_VERSION >= 1 */ /* Normal memory/ Device memory. */ if( ( xRegions[ lIndex ].ulParameters & tskMPU_REGION_DEVICE_MEMORY ) != 0 ) diff --git a/portable/GCC/ARM_CM55_NTZ/non_secure/portmacro.h b/portable/GCC/ARM_CM55_NTZ/non_secure/portmacro.h index 40831c218..c6a179c52 100644 --- a/portable/GCC/ARM_CM55_NTZ/non_secure/portmacro.h +++ b/portable/GCC/ARM_CM55_NTZ/non_secure/portmacro.h @@ -55,7 +55,7 @@ */ #define portARCH_NAME "Cortex-M55" #define portHAS_ARMV8M_MAIN_EXTENSION 1 -#define portHAS_ARMV8_1_M_EXTENSION 1 +#define portARMV8M_MINOR_VERSION 1 #define portDONT_DISCARD __attribute__( ( used ) ) /*-----------------------------------------------------------*/ diff --git a/portable/GCC/ARM_CM85/non_secure/port.c b/portable/GCC/ARM_CM85/non_secure/port.c index 66274474f..c9b596d12 100644 --- a/portable/GCC/ARM_CM85/non_secure/port.c +++ b/portable/GCC/ARM_CM85/non_secure/port.c @@ -225,10 +225,11 @@ typedef void ( * portISR_t )( void ); #define portMPU_RLAR_REGION_ENABLE ( 1UL ) -#if (portHAS_ARMV8_1_M_EXTENSION == 1) - /* Enable Privileged eXecute Never MPU attribute for the selected memory region. */ +#if ( portARMV8M_MINOR_VERSION >= 1 ) + /* Enable Privileged eXecute Never MPU attribute for the selected memory + * region. */ #define portMPU_RLAR_PRIVILEGED_EXECUTE_NEVER ( 1UL << 4UL ) -#endif /* portHAS_ARMV8_1_M_EXTENSION == 1 */ +#endif /* portARMV8M_MINOR_VERSION >= 1 */ /* Enable privileged access to unmapped region. */ #define portMPU_PRIV_BACKGROUND_ENABLE_BIT ( 1UL << 2UL ) @@ -236,7 +237,7 @@ typedef void ( * portISR_t )( void ); /* Enable MPU. */ #define portMPU_ENABLE_BIT ( 1UL << 0UL ) -/* Expected value of the portMPU_TYPE register. */ +/* Expected value of the portMPU_TYPE register. */ #define portEXPECTED_MPU_TYPE_VALUE ( configTOTAL_MPU_REGIONS << 8UL ) /* Extract first address of the MPU region as encoded in the @@ -1886,12 +1887,14 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */ ( portMPU_RLAR_REGION_ENABLE ); /* PXN. */ - #if (portHAS_ARMV8_1_M_EXTENSION == 1) + #if ( portARMV8M_MINOR_VERSION >= 1 ) + { if( ( xRegions[ lIndex ].ulParameters & tskMPU_REGION_PRIVILEGED_EXECUTE_NEVER ) != 0 ) { xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRLAR |= ( portMPU_RLAR_PRIVILEGED_EXECUTE_NEVER ); } - #endif /* portHAS_ARMV8_1_M_EXTENSION == 1 */ + } + #endif /* portARMV8M_MINOR_VERSION >= 1 */ /* Normal memory/ Device memory. */ if( ( xRegions[ lIndex ].ulParameters & tskMPU_REGION_DEVICE_MEMORY ) != 0 ) diff --git a/portable/GCC/ARM_CM85/non_secure/portmacro.h b/portable/GCC/ARM_CM85/non_secure/portmacro.h index 55004a4ea..7e14f2696 100644 --- a/portable/GCC/ARM_CM85/non_secure/portmacro.h +++ b/portable/GCC/ARM_CM85/non_secure/portmacro.h @@ -55,7 +55,7 @@ */ #define portARCH_NAME "Cortex-M85" #define portHAS_ARMV8M_MAIN_EXTENSION 1 -#define portHAS_ARMV8_1_M_EXTENSION 1 +#define portARMV8M_MINOR_VERSION 1 #define portDONT_DISCARD __attribute__( ( used ) ) /*-----------------------------------------------------------*/ diff --git a/portable/GCC/ARM_CM85_NTZ/non_secure/port.c b/portable/GCC/ARM_CM85_NTZ/non_secure/port.c index 66274474f..c9b596d12 100644 --- a/portable/GCC/ARM_CM85_NTZ/non_secure/port.c +++ b/portable/GCC/ARM_CM85_NTZ/non_secure/port.c @@ -225,10 +225,11 @@ typedef void ( * portISR_t )( void ); #define portMPU_RLAR_REGION_ENABLE ( 1UL ) -#if (portHAS_ARMV8_1_M_EXTENSION == 1) - /* Enable Privileged eXecute Never MPU attribute for the selected memory region. */ +#if ( portARMV8M_MINOR_VERSION >= 1 ) + /* Enable Privileged eXecute Never MPU attribute for the selected memory + * region. */ #define portMPU_RLAR_PRIVILEGED_EXECUTE_NEVER ( 1UL << 4UL ) -#endif /* portHAS_ARMV8_1_M_EXTENSION == 1 */ +#endif /* portARMV8M_MINOR_VERSION >= 1 */ /* Enable privileged access to unmapped region. */ #define portMPU_PRIV_BACKGROUND_ENABLE_BIT ( 1UL << 2UL ) @@ -236,7 +237,7 @@ typedef void ( * portISR_t )( void ); /* Enable MPU. */ #define portMPU_ENABLE_BIT ( 1UL << 0UL ) -/* Expected value of the portMPU_TYPE register. */ +/* Expected value of the portMPU_TYPE register. */ #define portEXPECTED_MPU_TYPE_VALUE ( configTOTAL_MPU_REGIONS << 8UL ) /* Extract first address of the MPU region as encoded in the @@ -1886,12 +1887,14 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */ ( portMPU_RLAR_REGION_ENABLE ); /* PXN. */ - #if (portHAS_ARMV8_1_M_EXTENSION == 1) + #if ( portARMV8M_MINOR_VERSION >= 1 ) + { if( ( xRegions[ lIndex ].ulParameters & tskMPU_REGION_PRIVILEGED_EXECUTE_NEVER ) != 0 ) { xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRLAR |= ( portMPU_RLAR_PRIVILEGED_EXECUTE_NEVER ); } - #endif /* portHAS_ARMV8_1_M_EXTENSION == 1 */ + } + #endif /* portARMV8M_MINOR_VERSION >= 1 */ /* Normal memory/ Device memory. */ if( ( xRegions[ lIndex ].ulParameters & tskMPU_REGION_DEVICE_MEMORY ) != 0 ) diff --git a/portable/GCC/ARM_CM85_NTZ/non_secure/portmacro.h b/portable/GCC/ARM_CM85_NTZ/non_secure/portmacro.h index 55004a4ea..7e14f2696 100644 --- a/portable/GCC/ARM_CM85_NTZ/non_secure/portmacro.h +++ b/portable/GCC/ARM_CM85_NTZ/non_secure/portmacro.h @@ -55,7 +55,7 @@ */ #define portARCH_NAME "Cortex-M85" #define portHAS_ARMV8M_MAIN_EXTENSION 1 -#define portHAS_ARMV8_1_M_EXTENSION 1 +#define portARMV8M_MINOR_VERSION 1 #define portDONT_DISCARD __attribute__( ( used ) ) /*-----------------------------------------------------------*/ diff --git a/portable/IAR/ARM_CM23/non_secure/port.c b/portable/IAR/ARM_CM23/non_secure/port.c index 66274474f..c9b596d12 100644 --- a/portable/IAR/ARM_CM23/non_secure/port.c +++ b/portable/IAR/ARM_CM23/non_secure/port.c @@ -225,10 +225,11 @@ typedef void ( * portISR_t )( void ); #define portMPU_RLAR_REGION_ENABLE ( 1UL ) -#if (portHAS_ARMV8_1_M_EXTENSION == 1) - /* Enable Privileged eXecute Never MPU attribute for the selected memory region. */ +#if ( portARMV8M_MINOR_VERSION >= 1 ) + /* Enable Privileged eXecute Never MPU attribute for the selected memory + * region. */ #define portMPU_RLAR_PRIVILEGED_EXECUTE_NEVER ( 1UL << 4UL ) -#endif /* portHAS_ARMV8_1_M_EXTENSION == 1 */ +#endif /* portARMV8M_MINOR_VERSION >= 1 */ /* Enable privileged access to unmapped region. */ #define portMPU_PRIV_BACKGROUND_ENABLE_BIT ( 1UL << 2UL ) @@ -236,7 +237,7 @@ typedef void ( * portISR_t )( void ); /* Enable MPU. */ #define portMPU_ENABLE_BIT ( 1UL << 0UL ) -/* Expected value of the portMPU_TYPE register. */ +/* Expected value of the portMPU_TYPE register. */ #define portEXPECTED_MPU_TYPE_VALUE ( configTOTAL_MPU_REGIONS << 8UL ) /* Extract first address of the MPU region as encoded in the @@ -1886,12 +1887,14 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */ ( portMPU_RLAR_REGION_ENABLE ); /* PXN. */ - #if (portHAS_ARMV8_1_M_EXTENSION == 1) + #if ( portARMV8M_MINOR_VERSION >= 1 ) + { if( ( xRegions[ lIndex ].ulParameters & tskMPU_REGION_PRIVILEGED_EXECUTE_NEVER ) != 0 ) { xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRLAR |= ( portMPU_RLAR_PRIVILEGED_EXECUTE_NEVER ); } - #endif /* portHAS_ARMV8_1_M_EXTENSION == 1 */ + } + #endif /* portARMV8M_MINOR_VERSION >= 1 */ /* Normal memory/ Device memory. */ if( ( xRegions[ lIndex ].ulParameters & tskMPU_REGION_DEVICE_MEMORY ) != 0 ) diff --git a/portable/IAR/ARM_CM23/non_secure/portmacro.h b/portable/IAR/ARM_CM23/non_secure/portmacro.h index 82d5b5421..9dfcc9132 100644 --- a/portable/IAR/ARM_CM23/non_secure/portmacro.h +++ b/portable/IAR/ARM_CM23/non_secure/portmacro.h @@ -50,7 +50,7 @@ */ #define portARCH_NAME "Cortex-M23" #define portHAS_ARMV8M_MAIN_EXTENSION 0 -#define portHAS_ARMV8_1_M_EXTENSION 0 +#define portARMV8M_MINOR_VERSION 0 #define portDONT_DISCARD __root /*-----------------------------------------------------------*/ diff --git a/portable/IAR/ARM_CM23_NTZ/non_secure/port.c b/portable/IAR/ARM_CM23_NTZ/non_secure/port.c index 66274474f..c9b596d12 100644 --- a/portable/IAR/ARM_CM23_NTZ/non_secure/port.c +++ b/portable/IAR/ARM_CM23_NTZ/non_secure/port.c @@ -225,10 +225,11 @@ typedef void ( * portISR_t )( void ); #define portMPU_RLAR_REGION_ENABLE ( 1UL ) -#if (portHAS_ARMV8_1_M_EXTENSION == 1) - /* Enable Privileged eXecute Never MPU attribute for the selected memory region. */ +#if ( portARMV8M_MINOR_VERSION >= 1 ) + /* Enable Privileged eXecute Never MPU attribute for the selected memory + * region. */ #define portMPU_RLAR_PRIVILEGED_EXECUTE_NEVER ( 1UL << 4UL ) -#endif /* portHAS_ARMV8_1_M_EXTENSION == 1 */ +#endif /* portARMV8M_MINOR_VERSION >= 1 */ /* Enable privileged access to unmapped region. */ #define portMPU_PRIV_BACKGROUND_ENABLE_BIT ( 1UL << 2UL ) @@ -236,7 +237,7 @@ typedef void ( * portISR_t )( void ); /* Enable MPU. */ #define portMPU_ENABLE_BIT ( 1UL << 0UL ) -/* Expected value of the portMPU_TYPE register. */ +/* Expected value of the portMPU_TYPE register. */ #define portEXPECTED_MPU_TYPE_VALUE ( configTOTAL_MPU_REGIONS << 8UL ) /* Extract first address of the MPU region as encoded in the @@ -1886,12 +1887,14 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */ ( portMPU_RLAR_REGION_ENABLE ); /* PXN. */ - #if (portHAS_ARMV8_1_M_EXTENSION == 1) + #if ( portARMV8M_MINOR_VERSION >= 1 ) + { if( ( xRegions[ lIndex ].ulParameters & tskMPU_REGION_PRIVILEGED_EXECUTE_NEVER ) != 0 ) { xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRLAR |= ( portMPU_RLAR_PRIVILEGED_EXECUTE_NEVER ); } - #endif /* portHAS_ARMV8_1_M_EXTENSION == 1 */ + } + #endif /* portARMV8M_MINOR_VERSION >= 1 */ /* Normal memory/ Device memory. */ if( ( xRegions[ lIndex ].ulParameters & tskMPU_REGION_DEVICE_MEMORY ) != 0 ) diff --git a/portable/IAR/ARM_CM23_NTZ/non_secure/portmacro.h b/portable/IAR/ARM_CM23_NTZ/non_secure/portmacro.h index 82d5b5421..9dfcc9132 100644 --- a/portable/IAR/ARM_CM23_NTZ/non_secure/portmacro.h +++ b/portable/IAR/ARM_CM23_NTZ/non_secure/portmacro.h @@ -50,7 +50,7 @@ */ #define portARCH_NAME "Cortex-M23" #define portHAS_ARMV8M_MAIN_EXTENSION 0 -#define portHAS_ARMV8_1_M_EXTENSION 0 +#define portARMV8M_MINOR_VERSION 0 #define portDONT_DISCARD __root /*-----------------------------------------------------------*/ diff --git a/portable/IAR/ARM_CM33/non_secure/port.c b/portable/IAR/ARM_CM33/non_secure/port.c index 66274474f..c9b596d12 100644 --- a/portable/IAR/ARM_CM33/non_secure/port.c +++ b/portable/IAR/ARM_CM33/non_secure/port.c @@ -225,10 +225,11 @@ typedef void ( * portISR_t )( void ); #define portMPU_RLAR_REGION_ENABLE ( 1UL ) -#if (portHAS_ARMV8_1_M_EXTENSION == 1) - /* Enable Privileged eXecute Never MPU attribute for the selected memory region. */ +#if ( portARMV8M_MINOR_VERSION >= 1 ) + /* Enable Privileged eXecute Never MPU attribute for the selected memory + * region. */ #define portMPU_RLAR_PRIVILEGED_EXECUTE_NEVER ( 1UL << 4UL ) -#endif /* portHAS_ARMV8_1_M_EXTENSION == 1 */ +#endif /* portARMV8M_MINOR_VERSION >= 1 */ /* Enable privileged access to unmapped region. */ #define portMPU_PRIV_BACKGROUND_ENABLE_BIT ( 1UL << 2UL ) @@ -236,7 +237,7 @@ typedef void ( * portISR_t )( void ); /* Enable MPU. */ #define portMPU_ENABLE_BIT ( 1UL << 0UL ) -/* Expected value of the portMPU_TYPE register. */ +/* Expected value of the portMPU_TYPE register. */ #define portEXPECTED_MPU_TYPE_VALUE ( configTOTAL_MPU_REGIONS << 8UL ) /* Extract first address of the MPU region as encoded in the @@ -1886,12 +1887,14 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */ ( portMPU_RLAR_REGION_ENABLE ); /* PXN. */ - #if (portHAS_ARMV8_1_M_EXTENSION == 1) + #if ( portARMV8M_MINOR_VERSION >= 1 ) + { if( ( xRegions[ lIndex ].ulParameters & tskMPU_REGION_PRIVILEGED_EXECUTE_NEVER ) != 0 ) { xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRLAR |= ( portMPU_RLAR_PRIVILEGED_EXECUTE_NEVER ); } - #endif /* portHAS_ARMV8_1_M_EXTENSION == 1 */ + } + #endif /* portARMV8M_MINOR_VERSION >= 1 */ /* Normal memory/ Device memory. */ if( ( xRegions[ lIndex ].ulParameters & tskMPU_REGION_DEVICE_MEMORY ) != 0 ) diff --git a/portable/IAR/ARM_CM33/non_secure/portmacro.h b/portable/IAR/ARM_CM33/non_secure/portmacro.h index 26fe594a0..a2a301f00 100644 --- a/portable/IAR/ARM_CM33/non_secure/portmacro.h +++ b/portable/IAR/ARM_CM33/non_secure/portmacro.h @@ -50,7 +50,7 @@ */ #define portARCH_NAME "Cortex-M33" #define portHAS_ARMV8M_MAIN_EXTENSION 1 -#define portHAS_ARMV8_1_M_EXTENSION 0 +#define portARMV8M_MINOR_VERSION 0 #define portDONT_DISCARD __root /*-----------------------------------------------------------*/ diff --git a/portable/IAR/ARM_CM33_NTZ/non_secure/port.c b/portable/IAR/ARM_CM33_NTZ/non_secure/port.c index 66274474f..c9b596d12 100644 --- a/portable/IAR/ARM_CM33_NTZ/non_secure/port.c +++ b/portable/IAR/ARM_CM33_NTZ/non_secure/port.c @@ -225,10 +225,11 @@ typedef void ( * portISR_t )( void ); #define portMPU_RLAR_REGION_ENABLE ( 1UL ) -#if (portHAS_ARMV8_1_M_EXTENSION == 1) - /* Enable Privileged eXecute Never MPU attribute for the selected memory region. */ +#if ( portARMV8M_MINOR_VERSION >= 1 ) + /* Enable Privileged eXecute Never MPU attribute for the selected memory + * region. */ #define portMPU_RLAR_PRIVILEGED_EXECUTE_NEVER ( 1UL << 4UL ) -#endif /* portHAS_ARMV8_1_M_EXTENSION == 1 */ +#endif /* portARMV8M_MINOR_VERSION >= 1 */ /* Enable privileged access to unmapped region. */ #define portMPU_PRIV_BACKGROUND_ENABLE_BIT ( 1UL << 2UL ) @@ -236,7 +237,7 @@ typedef void ( * portISR_t )( void ); /* Enable MPU. */ #define portMPU_ENABLE_BIT ( 1UL << 0UL ) -/* Expected value of the portMPU_TYPE register. */ +/* Expected value of the portMPU_TYPE register. */ #define portEXPECTED_MPU_TYPE_VALUE ( configTOTAL_MPU_REGIONS << 8UL ) /* Extract first address of the MPU region as encoded in the @@ -1886,12 +1887,14 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */ ( portMPU_RLAR_REGION_ENABLE ); /* PXN. */ - #if (portHAS_ARMV8_1_M_EXTENSION == 1) + #if ( portARMV8M_MINOR_VERSION >= 1 ) + { if( ( xRegions[ lIndex ].ulParameters & tskMPU_REGION_PRIVILEGED_EXECUTE_NEVER ) != 0 ) { xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRLAR |= ( portMPU_RLAR_PRIVILEGED_EXECUTE_NEVER ); } - #endif /* portHAS_ARMV8_1_M_EXTENSION == 1 */ + } + #endif /* portARMV8M_MINOR_VERSION >= 1 */ /* Normal memory/ Device memory. */ if( ( xRegions[ lIndex ].ulParameters & tskMPU_REGION_DEVICE_MEMORY ) != 0 ) diff --git a/portable/IAR/ARM_CM33_NTZ/non_secure/portmacro.h b/portable/IAR/ARM_CM33_NTZ/non_secure/portmacro.h index f0493abc4..f0d5f2b9c 100644 --- a/portable/IAR/ARM_CM33_NTZ/non_secure/portmacro.h +++ b/portable/IAR/ARM_CM33_NTZ/non_secure/portmacro.h @@ -50,7 +50,7 @@ */ #define portARCH_NAME "Cortex-M33" #define portHAS_ARMV8M_MAIN_EXTENSION 1 -#define portHAS_ARMV8_1_M_EXTENSION 0 +#define portARMV8M_MINOR_VERSION 0 #define portDONT_DISCARD __root /*-----------------------------------------------------------*/ diff --git a/portable/IAR/ARM_CM35P/non_secure/port.c b/portable/IAR/ARM_CM35P/non_secure/port.c index 66274474f..c9b596d12 100644 --- a/portable/IAR/ARM_CM35P/non_secure/port.c +++ b/portable/IAR/ARM_CM35P/non_secure/port.c @@ -225,10 +225,11 @@ typedef void ( * portISR_t )( void ); #define portMPU_RLAR_REGION_ENABLE ( 1UL ) -#if (portHAS_ARMV8_1_M_EXTENSION == 1) - /* Enable Privileged eXecute Never MPU attribute for the selected memory region. */ +#if ( portARMV8M_MINOR_VERSION >= 1 ) + /* Enable Privileged eXecute Never MPU attribute for the selected memory + * region. */ #define portMPU_RLAR_PRIVILEGED_EXECUTE_NEVER ( 1UL << 4UL ) -#endif /* portHAS_ARMV8_1_M_EXTENSION == 1 */ +#endif /* portARMV8M_MINOR_VERSION >= 1 */ /* Enable privileged access to unmapped region. */ #define portMPU_PRIV_BACKGROUND_ENABLE_BIT ( 1UL << 2UL ) @@ -236,7 +237,7 @@ typedef void ( * portISR_t )( void ); /* Enable MPU. */ #define portMPU_ENABLE_BIT ( 1UL << 0UL ) -/* Expected value of the portMPU_TYPE register. */ +/* Expected value of the portMPU_TYPE register. */ #define portEXPECTED_MPU_TYPE_VALUE ( configTOTAL_MPU_REGIONS << 8UL ) /* Extract first address of the MPU region as encoded in the @@ -1886,12 +1887,14 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */ ( portMPU_RLAR_REGION_ENABLE ); /* PXN. */ - #if (portHAS_ARMV8_1_M_EXTENSION == 1) + #if ( portARMV8M_MINOR_VERSION >= 1 ) + { if( ( xRegions[ lIndex ].ulParameters & tskMPU_REGION_PRIVILEGED_EXECUTE_NEVER ) != 0 ) { xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRLAR |= ( portMPU_RLAR_PRIVILEGED_EXECUTE_NEVER ); } - #endif /* portHAS_ARMV8_1_M_EXTENSION == 1 */ + } + #endif /* portARMV8M_MINOR_VERSION >= 1 */ /* Normal memory/ Device memory. */ if( ( xRegions[ lIndex ].ulParameters & tskMPU_REGION_DEVICE_MEMORY ) != 0 ) diff --git a/portable/IAR/ARM_CM35P/non_secure/portmacro.h b/portable/IAR/ARM_CM35P/non_secure/portmacro.h index 97cccc6f0..633da3a6d 100644 --- a/portable/IAR/ARM_CM35P/non_secure/portmacro.h +++ b/portable/IAR/ARM_CM35P/non_secure/portmacro.h @@ -50,7 +50,7 @@ */ #define portARCH_NAME "Cortex-M35P" #define portHAS_ARMV8M_MAIN_EXTENSION 1 -#define portHAS_ARMV8_1_M_EXTENSION 0 +#define portARMV8M_MINOR_VERSION 0 #define portDONT_DISCARD __root /*-----------------------------------------------------------*/ diff --git a/portable/IAR/ARM_CM35P_NTZ/non_secure/port.c b/portable/IAR/ARM_CM35P_NTZ/non_secure/port.c index 66274474f..c9b596d12 100644 --- a/portable/IAR/ARM_CM35P_NTZ/non_secure/port.c +++ b/portable/IAR/ARM_CM35P_NTZ/non_secure/port.c @@ -225,10 +225,11 @@ typedef void ( * portISR_t )( void ); #define portMPU_RLAR_REGION_ENABLE ( 1UL ) -#if (portHAS_ARMV8_1_M_EXTENSION == 1) - /* Enable Privileged eXecute Never MPU attribute for the selected memory region. */ +#if ( portARMV8M_MINOR_VERSION >= 1 ) + /* Enable Privileged eXecute Never MPU attribute for the selected memory + * region. */ #define portMPU_RLAR_PRIVILEGED_EXECUTE_NEVER ( 1UL << 4UL ) -#endif /* portHAS_ARMV8_1_M_EXTENSION == 1 */ +#endif /* portARMV8M_MINOR_VERSION >= 1 */ /* Enable privileged access to unmapped region. */ #define portMPU_PRIV_BACKGROUND_ENABLE_BIT ( 1UL << 2UL ) @@ -236,7 +237,7 @@ typedef void ( * portISR_t )( void ); /* Enable MPU. */ #define portMPU_ENABLE_BIT ( 1UL << 0UL ) -/* Expected value of the portMPU_TYPE register. */ +/* Expected value of the portMPU_TYPE register. */ #define portEXPECTED_MPU_TYPE_VALUE ( configTOTAL_MPU_REGIONS << 8UL ) /* Extract first address of the MPU region as encoded in the @@ -1886,12 +1887,14 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */ ( portMPU_RLAR_REGION_ENABLE ); /* PXN. */ - #if (portHAS_ARMV8_1_M_EXTENSION == 1) + #if ( portARMV8M_MINOR_VERSION >= 1 ) + { if( ( xRegions[ lIndex ].ulParameters & tskMPU_REGION_PRIVILEGED_EXECUTE_NEVER ) != 0 ) { xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRLAR |= ( portMPU_RLAR_PRIVILEGED_EXECUTE_NEVER ); } - #endif /* portHAS_ARMV8_1_M_EXTENSION == 1 */ + } + #endif /* portARMV8M_MINOR_VERSION >= 1 */ /* Normal memory/ Device memory. */ if( ( xRegions[ lIndex ].ulParameters & tskMPU_REGION_DEVICE_MEMORY ) != 0 ) diff --git a/portable/IAR/ARM_CM35P_NTZ/non_secure/portmacro.h b/portable/IAR/ARM_CM35P_NTZ/non_secure/portmacro.h index 97cccc6f0..633da3a6d 100644 --- a/portable/IAR/ARM_CM35P_NTZ/non_secure/portmacro.h +++ b/portable/IAR/ARM_CM35P_NTZ/non_secure/portmacro.h @@ -50,7 +50,7 @@ */ #define portARCH_NAME "Cortex-M35P" #define portHAS_ARMV8M_MAIN_EXTENSION 1 -#define portHAS_ARMV8_1_M_EXTENSION 0 +#define portARMV8M_MINOR_VERSION 0 #define portDONT_DISCARD __root /*-----------------------------------------------------------*/ diff --git a/portable/IAR/ARM_CM55/non_secure/port.c b/portable/IAR/ARM_CM55/non_secure/port.c index 66274474f..c9b596d12 100644 --- a/portable/IAR/ARM_CM55/non_secure/port.c +++ b/portable/IAR/ARM_CM55/non_secure/port.c @@ -225,10 +225,11 @@ typedef void ( * portISR_t )( void ); #define portMPU_RLAR_REGION_ENABLE ( 1UL ) -#if (portHAS_ARMV8_1_M_EXTENSION == 1) - /* Enable Privileged eXecute Never MPU attribute for the selected memory region. */ +#if ( portARMV8M_MINOR_VERSION >= 1 ) + /* Enable Privileged eXecute Never MPU attribute for the selected memory + * region. */ #define portMPU_RLAR_PRIVILEGED_EXECUTE_NEVER ( 1UL << 4UL ) -#endif /* portHAS_ARMV8_1_M_EXTENSION == 1 */ +#endif /* portARMV8M_MINOR_VERSION >= 1 */ /* Enable privileged access to unmapped region. */ #define portMPU_PRIV_BACKGROUND_ENABLE_BIT ( 1UL << 2UL ) @@ -236,7 +237,7 @@ typedef void ( * portISR_t )( void ); /* Enable MPU. */ #define portMPU_ENABLE_BIT ( 1UL << 0UL ) -/* Expected value of the portMPU_TYPE register. */ +/* Expected value of the portMPU_TYPE register. */ #define portEXPECTED_MPU_TYPE_VALUE ( configTOTAL_MPU_REGIONS << 8UL ) /* Extract first address of the MPU region as encoded in the @@ -1886,12 +1887,14 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */ ( portMPU_RLAR_REGION_ENABLE ); /* PXN. */ - #if (portHAS_ARMV8_1_M_EXTENSION == 1) + #if ( portARMV8M_MINOR_VERSION >= 1 ) + { if( ( xRegions[ lIndex ].ulParameters & tskMPU_REGION_PRIVILEGED_EXECUTE_NEVER ) != 0 ) { xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRLAR |= ( portMPU_RLAR_PRIVILEGED_EXECUTE_NEVER ); } - #endif /* portHAS_ARMV8_1_M_EXTENSION == 1 */ + } + #endif /* portARMV8M_MINOR_VERSION >= 1 */ /* Normal memory/ Device memory. */ if( ( xRegions[ lIndex ].ulParameters & tskMPU_REGION_DEVICE_MEMORY ) != 0 ) diff --git a/portable/IAR/ARM_CM55/non_secure/portmacro.h b/portable/IAR/ARM_CM55/non_secure/portmacro.h index 98b0c5194..95b179413 100644 --- a/portable/IAR/ARM_CM55/non_secure/portmacro.h +++ b/portable/IAR/ARM_CM55/non_secure/portmacro.h @@ -55,7 +55,7 @@ */ #define portARCH_NAME "Cortex-M55" #define portHAS_ARMV8M_MAIN_EXTENSION 1 -#define portHAS_ARMV8_1_M_EXTENSION 1 +#define portARMV8M_MINOR_VERSION 1 #define portDONT_DISCARD __root /*-----------------------------------------------------------*/ diff --git a/portable/IAR/ARM_CM55_NTZ/non_secure/port.c b/portable/IAR/ARM_CM55_NTZ/non_secure/port.c index 66274474f..c9b596d12 100644 --- a/portable/IAR/ARM_CM55_NTZ/non_secure/port.c +++ b/portable/IAR/ARM_CM55_NTZ/non_secure/port.c @@ -225,10 +225,11 @@ typedef void ( * portISR_t )( void ); #define portMPU_RLAR_REGION_ENABLE ( 1UL ) -#if (portHAS_ARMV8_1_M_EXTENSION == 1) - /* Enable Privileged eXecute Never MPU attribute for the selected memory region. */ +#if ( portARMV8M_MINOR_VERSION >= 1 ) + /* Enable Privileged eXecute Never MPU attribute for the selected memory + * region. */ #define portMPU_RLAR_PRIVILEGED_EXECUTE_NEVER ( 1UL << 4UL ) -#endif /* portHAS_ARMV8_1_M_EXTENSION == 1 */ +#endif /* portARMV8M_MINOR_VERSION >= 1 */ /* Enable privileged access to unmapped region. */ #define portMPU_PRIV_BACKGROUND_ENABLE_BIT ( 1UL << 2UL ) @@ -236,7 +237,7 @@ typedef void ( * portISR_t )( void ); /* Enable MPU. */ #define portMPU_ENABLE_BIT ( 1UL << 0UL ) -/* Expected value of the portMPU_TYPE register. */ +/* Expected value of the portMPU_TYPE register. */ #define portEXPECTED_MPU_TYPE_VALUE ( configTOTAL_MPU_REGIONS << 8UL ) /* Extract first address of the MPU region as encoded in the @@ -1886,12 +1887,14 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */ ( portMPU_RLAR_REGION_ENABLE ); /* PXN. */ - #if (portHAS_ARMV8_1_M_EXTENSION == 1) + #if ( portARMV8M_MINOR_VERSION >= 1 ) + { if( ( xRegions[ lIndex ].ulParameters & tskMPU_REGION_PRIVILEGED_EXECUTE_NEVER ) != 0 ) { xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRLAR |= ( portMPU_RLAR_PRIVILEGED_EXECUTE_NEVER ); } - #endif /* portHAS_ARMV8_1_M_EXTENSION == 1 */ + } + #endif /* portARMV8M_MINOR_VERSION >= 1 */ /* Normal memory/ Device memory. */ if( ( xRegions[ lIndex ].ulParameters & tskMPU_REGION_DEVICE_MEMORY ) != 0 ) diff --git a/portable/IAR/ARM_CM55_NTZ/non_secure/portmacro.h b/portable/IAR/ARM_CM55_NTZ/non_secure/portmacro.h index 98b0c5194..95b179413 100644 --- a/portable/IAR/ARM_CM55_NTZ/non_secure/portmacro.h +++ b/portable/IAR/ARM_CM55_NTZ/non_secure/portmacro.h @@ -55,7 +55,7 @@ */ #define portARCH_NAME "Cortex-M55" #define portHAS_ARMV8M_MAIN_EXTENSION 1 -#define portHAS_ARMV8_1_M_EXTENSION 1 +#define portARMV8M_MINOR_VERSION 1 #define portDONT_DISCARD __root /*-----------------------------------------------------------*/ diff --git a/portable/IAR/ARM_CM85/non_secure/port.c b/portable/IAR/ARM_CM85/non_secure/port.c index 66274474f..c9b596d12 100644 --- a/portable/IAR/ARM_CM85/non_secure/port.c +++ b/portable/IAR/ARM_CM85/non_secure/port.c @@ -225,10 +225,11 @@ typedef void ( * portISR_t )( void ); #define portMPU_RLAR_REGION_ENABLE ( 1UL ) -#if (portHAS_ARMV8_1_M_EXTENSION == 1) - /* Enable Privileged eXecute Never MPU attribute for the selected memory region. */ +#if ( portARMV8M_MINOR_VERSION >= 1 ) + /* Enable Privileged eXecute Never MPU attribute for the selected memory + * region. */ #define portMPU_RLAR_PRIVILEGED_EXECUTE_NEVER ( 1UL << 4UL ) -#endif /* portHAS_ARMV8_1_M_EXTENSION == 1 */ +#endif /* portARMV8M_MINOR_VERSION >= 1 */ /* Enable privileged access to unmapped region. */ #define portMPU_PRIV_BACKGROUND_ENABLE_BIT ( 1UL << 2UL ) @@ -236,7 +237,7 @@ typedef void ( * portISR_t )( void ); /* Enable MPU. */ #define portMPU_ENABLE_BIT ( 1UL << 0UL ) -/* Expected value of the portMPU_TYPE register. */ +/* Expected value of the portMPU_TYPE register. */ #define portEXPECTED_MPU_TYPE_VALUE ( configTOTAL_MPU_REGIONS << 8UL ) /* Extract first address of the MPU region as encoded in the @@ -1886,12 +1887,14 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */ ( portMPU_RLAR_REGION_ENABLE ); /* PXN. */ - #if (portHAS_ARMV8_1_M_EXTENSION == 1) + #if ( portARMV8M_MINOR_VERSION >= 1 ) + { if( ( xRegions[ lIndex ].ulParameters & tskMPU_REGION_PRIVILEGED_EXECUTE_NEVER ) != 0 ) { xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRLAR |= ( portMPU_RLAR_PRIVILEGED_EXECUTE_NEVER ); } - #endif /* portHAS_ARMV8_1_M_EXTENSION == 1 */ + } + #endif /* portARMV8M_MINOR_VERSION >= 1 */ /* Normal memory/ Device memory. */ if( ( xRegions[ lIndex ].ulParameters & tskMPU_REGION_DEVICE_MEMORY ) != 0 ) diff --git a/portable/IAR/ARM_CM85/non_secure/portmacro.h b/portable/IAR/ARM_CM85/non_secure/portmacro.h index 963f01f65..efde68dc2 100644 --- a/portable/IAR/ARM_CM85/non_secure/portmacro.h +++ b/portable/IAR/ARM_CM85/non_secure/portmacro.h @@ -55,7 +55,7 @@ */ #define portARCH_NAME "Cortex-M85" #define portHAS_ARMV8M_MAIN_EXTENSION 1 -#define portHAS_ARMV8_1_M_EXTENSION 1 +#define portARMV8M_MINOR_VERSION 1 #define portDONT_DISCARD __root /*-----------------------------------------------------------*/ diff --git a/portable/IAR/ARM_CM85_NTZ/non_secure/port.c b/portable/IAR/ARM_CM85_NTZ/non_secure/port.c index 66274474f..c9b596d12 100644 --- a/portable/IAR/ARM_CM85_NTZ/non_secure/port.c +++ b/portable/IAR/ARM_CM85_NTZ/non_secure/port.c @@ -225,10 +225,11 @@ typedef void ( * portISR_t )( void ); #define portMPU_RLAR_REGION_ENABLE ( 1UL ) -#if (portHAS_ARMV8_1_M_EXTENSION == 1) - /* Enable Privileged eXecute Never MPU attribute for the selected memory region. */ +#if ( portARMV8M_MINOR_VERSION >= 1 ) + /* Enable Privileged eXecute Never MPU attribute for the selected memory + * region. */ #define portMPU_RLAR_PRIVILEGED_EXECUTE_NEVER ( 1UL << 4UL ) -#endif /* portHAS_ARMV8_1_M_EXTENSION == 1 */ +#endif /* portARMV8M_MINOR_VERSION >= 1 */ /* Enable privileged access to unmapped region. */ #define portMPU_PRIV_BACKGROUND_ENABLE_BIT ( 1UL << 2UL ) @@ -236,7 +237,7 @@ typedef void ( * portISR_t )( void ); /* Enable MPU. */ #define portMPU_ENABLE_BIT ( 1UL << 0UL ) -/* Expected value of the portMPU_TYPE register. */ +/* Expected value of the portMPU_TYPE register. */ #define portEXPECTED_MPU_TYPE_VALUE ( configTOTAL_MPU_REGIONS << 8UL ) /* Extract first address of the MPU region as encoded in the @@ -1886,12 +1887,14 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */ ( portMPU_RLAR_REGION_ENABLE ); /* PXN. */ - #if (portHAS_ARMV8_1_M_EXTENSION == 1) + #if ( portARMV8M_MINOR_VERSION >= 1 ) + { if( ( xRegions[ lIndex ].ulParameters & tskMPU_REGION_PRIVILEGED_EXECUTE_NEVER ) != 0 ) { xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRLAR |= ( portMPU_RLAR_PRIVILEGED_EXECUTE_NEVER ); } - #endif /* portHAS_ARMV8_1_M_EXTENSION == 1 */ + } + #endif /* portARMV8M_MINOR_VERSION >= 1 */ /* Normal memory/ Device memory. */ if( ( xRegions[ lIndex ].ulParameters & tskMPU_REGION_DEVICE_MEMORY ) != 0 ) diff --git a/portable/IAR/ARM_CM85_NTZ/non_secure/portmacro.h b/portable/IAR/ARM_CM85_NTZ/non_secure/portmacro.h index 963f01f65..efde68dc2 100644 --- a/portable/IAR/ARM_CM85_NTZ/non_secure/portmacro.h +++ b/portable/IAR/ARM_CM85_NTZ/non_secure/portmacro.h @@ -55,7 +55,7 @@ */ #define portARCH_NAME "Cortex-M85" #define portHAS_ARMV8M_MAIN_EXTENSION 1 -#define portHAS_ARMV8_1_M_EXTENSION 1 +#define portARMV8M_MINOR_VERSION 1 #define portDONT_DISCARD __root /*-----------------------------------------------------------*/