diff --git a/Demo/AVR32_UC3/AT32UC3A/GCC/Makefile b/Demo/AVR32_UC3/AT32UC3A/GCC/Makefile new file mode 100644 index 000000000..1b829fe63 --- /dev/null +++ b/Demo/AVR32_UC3/AT32UC3A/GCC/Makefile @@ -0,0 +1,464 @@ +# Hey Emacs, this is a -*- makefile -*- + +# Goals available on make command line: +# +# [all] Default goal: build the project. +# clean Clean up the project. +# rebuild Rebuild the project. +# ccversion Display CC version information. +# cppfiles file.i Generate preprocessed files from C source files. +# asfiles file.x Generate preprocessed assembler files from C and assembler source files. +# objfiles file.o Generate object files from C and assembler source files. +# a file.a Archive: create A output file from object files. +# elf file.elf Link: create ELF output file from object files. +# lss file.lss Create extended listing from target output file. +# sym file.sym Create symbol table from target output file. +# bin file.bin Create binary image from ELF output file. +# sizes Display target size information. +# cpuinfo Get CPU information. +# halt Stop CPU execution. +# program Program MCU memory from ELF output file. +# reset Reset CPU. +# debug Open a debug connection with the MCU. +# run Start CPU execution. +# readregs Read CPU registers. +# doc Build the documentation. +# cleandoc Clean up the documentation. +# rebuilddoc Rebuild the documentation. +# verbose Display main executed commands. + +# Copyright (c) 2007, Atmel Corporation All rights reserved. +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions are met: +# +# 1. Redistributions of source code must retain the above copyright notice, this +# list of conditions and the following disclaimer. +# +# 2. Redistributions in binary form must reproduce the above copyright notice, +# this list of conditions and the following disclaimer in the documentation and/ +# or other materials provided with the distribution. +# +# 3. The name of ATMEL may not be used to endorse or promote products derived +# from this software without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED +# WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF +# MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND +# SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, +# INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, +# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY +# OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING +# NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, +# EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + + +# ** ** ** *** ** ** ** ** ** ** ** ** ** ** ** +# ENVIRONMENT SETTINGS +# ** ** ** *** ** ** ** ** ** ** ** ** ** ** ** + +FirstWord = $(if $(1),$(word 1,$(1))) +LastWord = $(if $(1),$(word $(words $(1)),$(1))) + +MAKE = make +MAKECFG = config.mk +TGTTYPE = $(suffix $(TARGET)) +TGTFILE = $(PART)-$(TARGET) + +RM = rm -Rf + +AR = avr32-ar +ARFLAGS = rcs + +CPP = $(CC) -E +CPPFLAGS = -march=$(ARCH) -mpart=$(PART) $(WARNINGS) $(DEFS) \ + $(PLATFORM_INC_PATH:%=-I%) $(INC_PATH:%=-I%) $(CPP_EXTRA_FLAGS) +DPNDFILES = $(CSRCS:.c=.d) $(ASSRCS:.S=.d) +CPPFILES = $(CSRCS:.c=.i) + +CC = avr32-gcc +CFLAGS = $(DEBUG) $(OPTIMIZATION) $(C_EXTRA_FLAGS) +ASFILES = $(CSRCS:.c=.x) $(ASSRCS:.S=.x) + +AS = avr32-as +ASFLAGS = $(DEBUG) $(AS_EXTRA_FLAGS) +OBJFILES = $(CSRCS:.c=.o) $(ASSRCS:.S=.o) + +LD = avr32-ld +LDFLAGS = -march=$(ARCH) -mpart=$(PART) \ + $(LIB_PATH:%=-L%) $(LINKER_SCRIPT:%=-T%) $(LD_EXTRA_FLAGS) +LOADLIBES = +LDLIBS = $(LIBS:%=-l%) + +OBJDUMP = avr32-objdump +LSS = $(TGTFILE:$(TGTTYPE)=.lss) + +NM = avr32-nm +SYM = $(TGTFILE:$(TGTTYPE)=.sym) + +OBJCOPY = avr32-objcopy +BIN = $(TGTFILE:$(TGTTYPE)=.bin) + +SIZE = avr32-size + +SUDO = $(shell if [ -x /usr/bin/sudo ]; then echo sudo; fi) + +SLEEP = sleep +SLEEPUSB = 9 + +PROGRAM = avr32program + +DBGPROXY = avr32gdbproxy + +DOCGEN = doxygen + + +# ** ** ** *** ** ** ** ** ** ** ** ** ** ** ** +# MESSAGES +# ** ** ** *** ** ** ** ** ** ** ** ** ** ** ** + +ERR_TARGET_TYPE = Target type not supported: `$(TGTTYPE)' +MSG_CLEANING = Cleaning project. +MSG_PREPROCESSING = Preprocessing \`$<\' to \`$@\'. +MSG_COMPILING = Compiling \`$<\' to \`$@\'. +MSG_ASSEMBLING = Assembling \`$<\' to \`$@\'. +MSG_ARCHIVING = Archiving to \`$@\'. +MSG_LINKING = Linking to \`$@\'. +MSG_EXTENDED_LISTING = Creating extended listing to \`$@\'. +MSG_SYMBOL_TABLE = Creating symbol table to \`$@\'. +MSG_BINARY_IMAGE = Creating binary image to \`$@\'. +MSG_GETTING_CPU_INFO = Getting CPU information. +MSG_HALTING = Stopping CPU execution. +MSG_PROGRAMMING = Programming MCU memory from \`$<\'. +MSG_RESETTING = Resetting CPU. +MSG_DEBUGGING = Opening debug connection with MCU. +MSG_RUNNING = Starting CPU execution. +MSG_READING_CPU_REGS = Reading CPU registers. +MSG_CLEANING_DOC = Cleaning documentation. +MSG_GENERATING_DOC = Generating documentation to \`$(DOC_PATH)\'. + + +# ** ** ** *** ** ** ** ** ** ** ** ** ** ** ** +# MAKE RULES +# ** ** ** *** ** ** ** ** ** ** ** ** ** ** ** + +# Include the make configuration file. +include $(MAKECFG) + +# ** ** TOP-LEVEL RULES ** ** + +# Default goal: build the project. +ifeq ($(TGTTYPE),.a) +.PHONY: all +all: ccversion a lss sym +else +ifeq ($(TGTTYPE),.elf) +.PHONY: all +all: ccversion elf lss sym bin sizes +else +$(error $(ERR_TARGET_TYPE)) +endif +endif + +# Clean up the project. +.PHONY: clean +clean: + @echo $(MSG_CLEANING) + -$(VERBOSE_CMD)$(RM) $(BIN) + -$(VERBOSE_CMD)$(RM) $(SYM) + -$(VERBOSE_CMD)$(RM) $(LSS) + -$(VERBOSE_CMD)$(RM) $(TGTFILE) + -$(VERBOSE_CMD)$(RM) $(OBJFILES) + -$(VERBOSE_CMD)$(RM) $(ASFILES) + -$(VERBOSE_CMD)$(RM) $(CPPFILES) + -$(VERBOSE_CMD)$(RM) $(DPNDFILES) + $(VERBOSE_NL) + +# Rebuild the project. +.PHONY: rebuild +rebuild: clean all + +# Display CC version information. +.PHONY: ccversion +ccversion: + @echo + @echo + @$(CC) --version + +# Generate preprocessed files from C source files. +.PHONY: cppfiles +cppfiles: $(CPPFILES) + +# Generate preprocessed assembler files from C and assembler source files. +.PHONY: asfiles +asfiles: $(ASFILES) + +# Generate object files from C and assembler source files. +.PHONY: objfiles +objfiles: $(OBJFILES) + +ifeq ($(TGTTYPE),.a) +# Archive: create A output file from object files. +.PHONY: a +a: $(TGTFILE) +else +ifeq ($(TGTTYPE),.elf) +# Link: create ELF output file from object files. +.PHONY: elf +elf: $(TGTFILE) +endif +endif + +# Create extended listing from target output file. +.PHONY: lss +lss: $(LSS) + +# Create symbol table from target output file. +.PHONY: sym +sym: $(SYM) + +ifeq ($(TGTTYPE),.elf) +# Create binary image from ELF output file. +.PHONY: bin +bin: $(BIN) +endif + +# Display target size information. +.PHONY: sizes +sizes: $(TGTFILE) + @echo + @echo + @$(SIZE) -Ax $< + +ifeq ($(TGTTYPE),.elf) + +# Get CPU information. +.PHONY: cpuinfo +cpuinfo: + @echo + @echo $(MSG_GETTING_CPU_INFO) + $(VERBOSE_CMD)$(SUDO) $(PROGRAM) -cUSB cpuinfo +ifneq ($(call LastWord,$(filter cpuinfo program reset debug run readregs,$(MAKECMDGOALS))),cpuinfo) + @$(SLEEP) $(SLEEPUSB) +else + @echo +endif + +# Stop CPU execution. +.PHONY: halt +halt: +ifeq ($(filter cpuinfo program reset run readregs,$(MAKECMDGOALS)),) + @echo + @echo $(MSG_HALTING) + $(VERBOSE_CMD)$(SUDO) $(PROGRAM) -cUSB halt +ifneq ($(call LastWord,$(filter halt debug,$(MAKECMDGOALS))),halt) + @$(SLEEP) $(SLEEPUSB) +else + @echo +endif +else + @echo > /dev/null +endif + +# Program MCU memory from ELF output file. +.PHONY: program +program: $(TGTFILE) + @echo + @echo $(MSG_PROGRAMMING) + $(VERBOSE_CMD)$(SUDO) $(PROGRAM) -cUSB program $(FLASH:%=-f%) -e -v -R $(if $(findstring run,$(MAKECMDGOALS)),-r) $< +ifneq ($(call LastWord,$(filter cpuinfo program debug readregs,$(MAKECMDGOALS))),program) + @$(SLEEP) $(SLEEPUSB) +else + @echo +endif + +# Reset CPU. +.PHONY: reset +reset: +ifeq ($(filter program run,$(MAKECMDGOALS)),) + @echo + @echo $(MSG_RESETTING) + $(VERBOSE_CMD)$(SUDO) $(PROGRAM) -cUSB reset +ifneq ($(call LastWord,$(filter cpuinfo reset debug readregs,$(MAKECMDGOALS))),reset) + @$(SLEEP) $(SLEEPUSB) +else + @echo +endif +else + @echo > /dev/null +endif + +# Open a debug connection with the MCU. +.PHONY: debug +debug: + @echo + @echo $(MSG_DEBUGGING) + $(VERBOSE_CMD)$(SUDO) $(DBGPROXY) -cUSB $(patsubst cfi@%,-f%,$(FLASH:internal@%=-f%)) +ifneq ($(call LastWord,$(filter cpuinfo halt program reset debug run readregs,$(MAKECMDGOALS))),debug) + @$(SLEEP) $(SLEEPUSB) +else + @echo +endif + +# Start CPU execution. +.PHONY: run +run: +ifeq ($(findstring program,$(MAKECMDGOALS)),) + @echo + @echo $(MSG_RUNNING) + $(VERBOSE_CMD)$(SUDO) $(PROGRAM) -cUSB run $(if $(findstring reset,$(MAKECMDGOALS)),-R) +ifneq ($(call LastWord,$(filter cpuinfo debug run readregs,$(MAKECMDGOALS))),run) + @$(SLEEP) $(SLEEPUSB) +else + @echo +endif +else + @echo > /dev/null +endif + +# Read CPU registers. +.PHONY: readregs +readregs: + @echo + @echo $(MSG_READING_CPU_REGS) + $(VERBOSE_CMD)$(SUDO) $(PROGRAM) -cUSB readregs +ifneq ($(call LastWord,$(filter cpuinfo program reset debug run readregs,$(MAKECMDGOALS))),readregs) + @$(SLEEP) $(SLEEPUSB) +else + @echo +endif + +endif + +# Build the documentation. +.PHONY: doc +doc: + @echo + @echo $(MSG_GENERATING_DOC) + $(VERBOSE_CMD)cd $(dir $(DOC_CFG)) && $(DOCGEN) $(notdir $(DOC_CFG)) + @echo + +# Clean up the documentation. +.PHONY: cleandoc +cleandoc: + @echo $(MSG_CLEANING_DOC) + -$(VERBOSE_CMD)$(RM) $(DOC_PATH) + $(VERBOSE_NL) + +# Rebuild the documentation. +.PHONY: rebuilddoc +rebuilddoc: cleandoc doc + +# Display main executed commands. +.PHONY: verbose +ifeq ($(MAKECMDGOALS),verbose) +verbose: all +else +verbose: + @echo > /dev/null +endif +ifneq ($(findstring verbose,$(MAKECMDGOALS)),) +# Prefix displaying the following command if and only if verbose is a goal. +VERBOSE_CMD = +# New line displayed if and only if verbose is a goal. +VERBOSE_NL = @echo +else +VERBOSE_CMD = @ +VERBOSE_NL = +endif + +# ** ** COMPILATION RULES ** ** + +# Include silently the dependency files. +-include $(DPNDFILES) + +# The dependency files are not built alone but along with first generation files. +$(DPNDFILES): + +# First generation files depend on make files. +$(CPPFILES) $(ASFILES) $(OBJFILES): Makefile $(MAKECFG) + +ifeq ($(TGTTYPE),.elf) +# Files resulting from linking depend on linker script. +$(TGTFILE): $(LINKER_SCRIPT) +endif + +# Preprocess: create preprocessed files from C source files. +%.i: %.c %.d + @echo $(MSG_PREPROCESSING) + $(VERBOSE_CMD)$(CPP) $(CPPFLAGS) -MD -MP -MT '$*.i $*.x $*.o' -o $@ $< + @touch $*.d + @touch $@ + $(VERBOSE_NL) + +# Preprocess & compile: create assembler files from C source files. +%.x: %.c %.d + @echo $(MSG_COMPILING) + $(VERBOSE_CMD)$(CC) -S $(CPPFLAGS) -MD -MP -MT '$*.i $*.o' $(CFLAGS) -o $@ $< + @touch $*.d + @touch $@ + $(VERBOSE_NL) + +# Preprocess: create preprocessed files from assembler source files. +%.x: %.S %.d + @echo $(MSG_PREPROCESSING) + $(VERBOSE_CMD)$(CPP) $(CPPFLAGS) -MD -MP -MT '$*.x $*.o' -o $@ $< + @touch $*.d + @touch $@ + $(VERBOSE_NL) + +# Preprocess, compile & assemble: create object files from C source files. +%.o: %.c %.d + @echo $(MSG_COMPILING) + $(VERBOSE_CMD)$(CC) -c $(CPPFLAGS) -MD -MP -MT '$*.i $*.x' $(CFLAGS) -o $@ $< + @touch $*.d + @touch $@ + $(VERBOSE_NL) + +# Preprocess & assemble: create object files from assembler source files. +%.o: %.S %.d + @echo $(MSG_ASSEMBLING) + $(VERBOSE_CMD)$(CC) -c $(CPPFLAGS) -MD -MP -MT '$*.x' $(ASFLAGS) -o $@ $< + @touch $*.d + @touch $@ + $(VERBOSE_NL) + +.PRECIOUS: $(OBJFILES) +ifeq ($(TGTTYPE),.a) +# Archive: create A output file from object files. +.SECONDARY: $(TGTFILE) +$(TGTFILE): $(OBJFILES) + @echo $(MSG_ARCHIVING) + $(VERBOSE_CMD)$(AR) $(ARFLAGS) $@ $(filter %.o,$+) + $(VERBOSE_NL) +else +ifeq ($(TGTTYPE),.elf) +# Link: create ELF output file from object files. +.SECONDARY: $(TGTFILE) +$(TGTFILE): $(OBJFILES) + @echo $(MSG_LINKING) + $(VERBOSE_CMD)$(CC) $(LDFLAGS) $(filter %.o,$+) $(LOADLIBES) $(LDLIBS) -o $@ + $(VERBOSE_NL) +endif +endif + +# Create extended listing from target output file. +$(LSS): $(TGTFILE) + @echo $(MSG_EXTENDED_LISTING) + $(VERBOSE_CMD)$(OBJDUMP) -h -S $< > $@ + $(VERBOSE_NL) + +# Create symbol table from target output file. +$(SYM): $(TGTFILE) + @echo $(MSG_SYMBOL_TABLE) + $(VERBOSE_CMD)$(NM) -n $< > $@ + $(VERBOSE_NL) + +ifeq ($(TGTTYPE),.elf) +# Create binary image from ELF output file. +$(BIN): $(TGTFILE) + @echo $(MSG_BINARY_IMAGE) + $(VERBOSE_CMD)$(OBJCOPY) -O binary $< $@ + $(VERBOSE_NL) +endif diff --git a/Demo/AVR32_UC3/AT32UC3A/GCC/config.mk b/Demo/AVR32_UC3/AT32UC3A/GCC/config.mk new file mode 100644 index 000000000..4254dfb0a --- /dev/null +++ b/Demo/AVR32_UC3/AT32UC3A/GCC/config.mk @@ -0,0 +1,144 @@ +# Hey Emacs, this is a -*- makefile -*- + +# The purpose of this file is to define the build configuration variables used +# by the generic Makefile. See Makefile header for further information. + +# Copyright (c) 2007, Atmel Corporation All rights reserved. +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions are met: +# +# 1. Redistributions of source code must retain the above copyright notice, this +# list of conditions and the following disclaimer. +# +# 2. Redistributions in binary form must reproduce the above copyright notice, +# this list of conditions and the following disclaimer in the documentation and/ +# or other materials provided with the distribution. +# +# 3. The name of ATMEL may not be used to endorse or promote products derived +# from this software without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED +# WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF +# MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND +# SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, +# INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, +# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY +# OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING +# NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, +# EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + + +# Base paths +PRJ_PATH = ../.. +APPS_PATH = $(PRJ_PATH)/APPLICATIONS +BRDS_PATH = $(PRJ_PATH)/BOARDS +COMP_PATH = $(PRJ_PATH)/COMPONENTS +DRVR_PATH = $(PRJ_PATH)/DRIVERS +SERV_PATH = $(PRJ_PATH)/SERVICES +UTIL_PATH = $(PRJ_PATH)/UTILS + +# CPU architecture: {ap|uc} +ARCH = uc + +# Part: {none|ap7000|ap7010|ap7020|uc3a0256|uc3a0512|uc3a1128|uc3a1256|uc3a1512} +PART = uc3a0512 + +# Flash memories: [type@address,size]... +FLASH = internal@0x80000000,512Kb + +# Device/Platform/Board include path +PLATFORM_INC_PATH = \ + $(BRDS_PATH)/ + +# Target name: {*.a|*.elf} +TARGET = rtosdemo.elf + +# Definitions: [-D name[=definition]...] [-U name...] +# Things that might be added to DEFS: +# BOARD Board used: {EVK1100} +DEFS = -D BOARD=EVK1100 + +# Include path +INC_PATH = \ + $(UTIL_PATH)/ \ + $(UTIL_PATH)/PREPROCESSOR/ \ + $(DRVR_PATH)/INTC/ \ + $(DRVR_PATH)/PM/ \ + $(DRVR_PATH)/GPIO/ \ + $(DRVR_PATH)/TC/ \ + ../../../../Source/portable/GCC/AVR32_UC3/ \ + ../../../../Source/include/ \ + ../../../Common/include/ \ + ../../ + +# C source files +CSRCS = \ + $(BRDS_PATH)/EVK1100/led.c \ + $(DRVR_PATH)/INTC/intc.c \ + $(DRVR_PATH)/PM/pm.c \ + $(DRVR_PATH)/GPIO/gpio.c \ + $(DRVR_PATH)/TC/tc.c \ + ../../../../Source/portable/GCC/AVR32_UC3/port.c \ + ../../../../Source/portable/MemMang/heap_3.c \ + ../../../../Source/list.c \ + ../../../../Source/queue.c \ + ../../../../Source/tasks.c \ + ../../../Common/Minimal/BlockQ.c \ + ../../../Common/Minimal/comtest.c \ + ../../../Common/Minimal/death.c \ + ../../../Common/Minimal/dynamic.c \ + ../../../Common/Minimal/flash.c \ + ../../../Common/Minimal/flop.c \ + ../../../Common/Minimal/integer.c \ + ../../../Common/Minimal/PollQ.c \ + ../../../Common/Minimal/semtest.c \ + ../../ParTest/ParTest.c \ + ../../serial/serial.c \ + ../../main.c + +# Assembler source files +ASSRCS = \ + ../../../../Source/portable/GCC/AVR32_UC3/exception.S + +# Library path +LIB_PATH = + +# Libraries to link with the project +LIBS = + +# Linker script file if any +LINKER_SCRIPT = + +# Options to request or suppress warnings: [-fsyntax-only] [-pedantic[-errors]] [-w] [-Wwarning...] +# For further details, refer to the chapter "GCC Command Options" of the GCC manual. +WARNINGS = -Wall + +# Options for debugging: [-g]... +# For further details, refer to the chapter "GCC Command Options" of the GCC manual. +DEBUG = -g + +# Options that control optimization: [-O[0|1|2|3|s]]... +# For further details, refer to the chapter "GCC Command Options" of the GCC manual. +OPTIMIZATION = -O0 -ffunction-sections -fdata-sections + +# Extra flags to use when preprocessing +CPP_EXTRA_FLAGS = + +# Extra flags to use when compiling +C_EXTRA_FLAGS = + +# Extra flags to use when assembling +AS_EXTRA_FLAGS = + +# Extra flags to use when linking +LD_EXTRA_FLAGS = -Wl,--gc-sections + +# Documentation path +DOC_PATH = \ + ../../DOC/ + +# Documentation configuration file +DOC_CFG = \ + ../../doxyfile.doxygen diff --git a/Demo/AVR32_UC3/AT32UC3A/GCC/gdb.ini b/Demo/AVR32_UC3/AT32UC3A/GCC/gdb.ini new file mode 100644 index 000000000..418c606cf --- /dev/null +++ b/Demo/AVR32_UC3/AT32UC3A/GCC/gdb.ini @@ -0,0 +1,29 @@ +target extended-remote :1024 +symbol uc3a0512-rtosdemo.elf + +b _handle_Unrecoverable_Exception +b _handle_TLB_Multiple_Hit +b _handle_Bus_Error_Data_Fetch +b _handle_Bus_Error_Instruction_Fetch +b _handle_NMI +b _handle_Instruction_Address +b _handle_ITLB_Protection +b _handle_Breakpoint +b _handle_Illegal_Opcode +b _handle_Unimplemented_Instruction +b _handle_Privilege_Violation +b _handle_Floating_Point +b _handle_Coprocessor_Absent +b _handle_Data_Address_Read +b _handle_Data_Address_Write +b _handle_DTLB_Protection_Read +b _handle_DTLB_Protection_Write +b _handle_DTLB_Modified +b _handle_ITLB_Miss +b _handle_DTLB_Miss_Read +b _handle_DTLB_Miss_Write + +define current_task +printf "Task name: %s\n", ((tskTCB *)pxCurrentTCB)->pcTaskName +printf "pxTopOfStack: %x\n", ((tskTCB *)pxCurrentTCB)->pxTopOfStack +end diff --git a/Demo/AVR32_UC3/AT32UC3A/IAR/rtosdemo.ewd b/Demo/AVR32_UC3/AT32UC3A/IAR/rtosdemo.ewd new file mode 100644 index 000000000..bc38c6ac9 --- /dev/null +++ b/Demo/AVR32_UC3/AT32UC3A/IAR/rtosdemo.ewd @@ -0,0 +1,357 @@ + + + + 1 + + Debug + + AVR32 + + 1 + + C-SPY + 2 + + 0 + 1 + 1 + + + + + + + + + + + + + + + + + JTAGICEMKIIAVR32 + 2 + + 0 + 1 + 1 + + + + + + + + + + + + + + + + + + + + SIMAVR32 + 2 + + 0 + 1 + 1 + + + + + + $EW_DIR$\common\plugins\CodeCoverage\CodeCoverage.ewplugin + 1 + + + $EW_DIR$\common\plugins\Orti\Orti.ewplugin + 0 + + + $EW_DIR$\common\plugins\Profiling\Profiling.ewplugin + 1 + + + $EW_DIR$\common\plugins\Stack\Stack.ewplugin + 1 + + + + + Release + + AVR32 + + 0 + + C-SPY + 2 + + 0 + 1 + 0 + + + + + + + + + + + + + + + + + JTAGICEMKIIAVR32 + 2 + + 0 + 1 + 0 + + + + + + + + + + + + + + + + + + + + SIMAVR32 + 2 + + 0 + 1 + 0 + + + + + + $EW_DIR$\common\plugins\CodeCoverage\CodeCoverage.ewplugin + 1 + + + $EW_DIR$\common\plugins\Orti\Orti.ewplugin + 0 + + + $EW_DIR$\common\plugins\Profiling\Profiling.ewplugin + 1 + + + $EW_DIR$\common\plugins\Stack\Stack.ewplugin + 1 + + + + + + diff --git a/Demo/AVR32_UC3/AT32UC3A/IAR/rtosdemo.ewp b/Demo/AVR32_UC3/AT32UC3A/IAR/rtosdemo.ewp new file mode 100644 index 000000000..13f028061 --- /dev/null +++ b/Demo/AVR32_UC3/AT32UC3A/IAR/rtosdemo.ewp @@ -0,0 +1,1749 @@ + + + + 1 + + Debug + + AVR32 + + 1 + + General + 2 + + 0 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + ICCAVR32 + 2 + + 4 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + AAVR32 + 2 + + 0 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + JAVATOC + 0 + + 0 + 1 + 1 + + + + + CUSTOM + 3 + + + + + + + BICOMP + 0 + + + + BUILDACTION + 1 + + + + + + + XLINK + 2 + + 14 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + XAR + 2 + + 0 + 1 + 1 + + + + + + + BILINK + 0 + + + + + Release + + AVR32 + + 0 + + General + 2 + + 0 + 1 + 0 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + ICCAVR32 + 2 + + 4 + 1 + 0 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + AAVR32 + 2 + + 0 + 1 + 0 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + JAVATOC + 0 + + 0 + 1 + 0 + + + + + CUSTOM + 3 + + + + + + + BICOMP + 0 + + + + BUILDACTION + 1 + + + + + + + XLINK + 2 + + 14 + 1 + 0 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + XAR + 2 + + 0 + 1 + 0 + + + + + + + BILINK + 0 + + + + + DLIB + + $PROJ_DIR$\..\..\..\..\Source\portable\IAR\AVR32_UC3\read.c + + + $PROJ_DIR$\..\..\..\..\Source\portable\IAR\AVR32_UC3\write.c + + + + Drivers + + $PROJ_DIR$\..\..\DRIVERS\GPIO\gpio.c + + + $PROJ_DIR$\..\..\DRIVERS\INTC\intc.c + + + $PROJ_DIR$\..\..\BOARDS\EVK1100\led.c + + + $PROJ_DIR$\..\..\DRIVERS\PM\pm.c + + + $PROJ_DIR$\..\..\DRIVERS\TC\tc.c + + + $PROJ_DIR$\..\..\DRIVERS\USART\usart.c + + + + FreeRTOS + + AVR32_UC3 + + $PROJ_DIR$\..\..\..\..\Source\portable\IAR\AVR32_UC3\exception.s82 + + + $PROJ_DIR$\..\..\..\..\Source\portable\IAR\AVR32_UC3\port.c + + + + Common_demo + + $PROJ_DIR$\..\..\..\Common\Minimal\BlockQ.c + + + $PROJ_DIR$\..\..\..\Common\Minimal\comtest.c + + + $PROJ_DIR$\..\..\..\Common\Minimal\death.c + + + $PROJ_DIR$\..\..\..\Common\Minimal\dynamic.c + + + $PROJ_DIR$\..\..\..\Common\Minimal\flash.c + + + $PROJ_DIR$\..\..\..\Common\Minimal\flop.c + + + $PROJ_DIR$\..\..\..\Common\Minimal\integer.c + + + $PROJ_DIR$\..\..\..\Common\Minimal\PollQ.c + + + $PROJ_DIR$\..\..\..\Common\Minimal\semtest.c + + + + Source + + $PROJ_DIR$\..\..\..\..\Source\portable\MemMang\heap_3.c + + + $PROJ_DIR$\..\..\..\..\Source\list.c + + + $PROJ_DIR$\..\..\..\..\Source\queue.c + + + $PROJ_DIR$\..\..\..\..\Source\tasks.c + + + + + $PROJ_DIR$\..\..\main.c + + + $PROJ_DIR$\..\..\ParTest\ParTest.c + + + $PROJ_DIR$\..\..\serial\serial.c + + + + diff --git a/Demo/AVR32_UC3/AT32UC3A/IAR/rtosdemo.eww b/Demo/AVR32_UC3/AT32UC3A/IAR/rtosdemo.eww new file mode 100644 index 000000000..2294aacb5 --- /dev/null +++ b/Demo/AVR32_UC3/AT32UC3A/IAR/rtosdemo.eww @@ -0,0 +1,10 @@ + + + + + $WS_DIR$\rtosdemo.ewp + + + + + diff --git a/Demo/AVR32_UC3/BOARDS/EVK1100/evk1100.h b/Demo/AVR32_UC3/BOARDS/EVK1100/evk1100.h new file mode 100644 index 000000000..bec0ecd3f --- /dev/null +++ b/Demo/AVR32_UC3/BOARDS/EVK1100/evk1100.h @@ -0,0 +1,318 @@ +/* This header file is part of the ATMEL FREERTOS-0.9.0 Release */ + +/*This file is prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief AT32UC3A EVK1100 board header file. + * + * This file contains definitions and services related to the features of the + * EVK1100 board. + * + * - Compiler: IAR EWAVR32 and GNU GCC for AVR32 + * - Supported devices: All AVR32 AT32UC3A devices can be used. + * - AppNote: + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support email: avr32@atmel.com + * + ******************************************************************************/ + +/* Copyright (c) 2007, Atmel Corporation All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of ATMEL may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND + * SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + + +#ifndef _EVK1100_H_ +#define _EVK1100_H_ + +#include "compiler.h" + +#ifdef __AVR32_ABI_COMPILER__ // Automatically defined when compiling for AVR32, not when assembling. +# include "led.h" +#endif // __AVR32_ABI_COMPILER__ + + +/*! \name Oscillator Definitions + */ +//! @{ + +// RCOsc has no custom calibration by default. Set the following definition to +// the appropriate value if a custom RCOsc calibration has been applied to your +// part. +//#define FRCOSC 115200 //!< RCOsc frequency: Hz. + +#define FOSC32 32000 //!< Osc32 frequency: Hz. +#define OSC32_STARTUP 3 //!< Osc32 startup time: RCOsc periods. + +#define FOSC0 12000000 //!< Osc0 frequency: Hz. +#define OSC0_STARTUP 3 //!< Osc0 startup time: RCOsc periods. + +// Osc1 crystal is not mounted by default. Set the following definitions to the +// appropriate values if a custom Osc1 crystal is mounted on your board. +//#define FOSC1 12000000 //!< Osc1 frequency: Hz. +//#define OSC1_STARTUP 3 //!< Osc1 startup time: RCOsc periods. + +//! @} + + +/*! \name SDRAM Definitions + */ +//! @{ + +//! Part header file of used SDRAM(s). +#define SDRAM_PART_HDR "MT48LC16M16A2TG7E/mt48lc16m16a2tg7e.h" + +//! Data bus width to use the SDRAM(s) with (16 or 32 bits; always 16 bits on +//! UC3). +#define SDRAM_DBW 16 + +//! @} + + +/*! \name USB Definitions + */ +//! @{ + +//! Multiplexed pin used for USB_ID: AVR32_USBB_USB_ID_x_x. +//! To be selected according to the AVR32_USBB_USB_ID_x_x_PIN and +//! AVR32_USBB_USB_ID_x_x_FUNCTION definitions from . +#define USB_ID AVR32_USBB_USB_ID_0_0 + +//! Multiplexed pin used for USB_VBOF: AVR32_USBB_USB_VBOF_x_x. +//! To be selected according to the AVR32_USBB_USB_VBOF_x_x_PIN and +//! AVR32_USBB_USB_VBOF_x_x_FUNCTION definitions from . +#ifdef EVK1100_REVA +# define USB_VBOF AVR32_USBB_USB_VBOF_0_0 +#else +# define USB_VBOF AVR32_USBB_USB_VBOF_0_1 +#endif + +//! Active level of the USB_VBOF output pin. +#ifdef EVK1100_REVA +# define USB_VBOF_ACTIVE_LEVEL HIGH +#else +# define USB_VBOF_ACTIVE_LEVEL LOW +#endif + +//! @} + + +//! GPIO connection of the MAC PHY PWR_DOWN/INT signal. +#ifdef EVK1100_REVA +# define MACB_INTERRUPT_PIN AVR32_PIN_PX12 +#else +# define MACB_INTERRUPT_PIN AVR32_PIN_PA24 +#endif + + +//! Number of LEDs. +#define LED_COUNT 8 + +/*! \name GPIO Connections of LEDs + */ +//! @{ +#ifdef EVK1100_REVA +# define LED0_GPIO AVR32_PIN_PX13 +# define LED1_GPIO AVR32_PIN_PX14 +# define LED2_GPIO AVR32_PIN_PX15 +# define LED3_GPIO AVR32_PIN_PX16 +# define LED4_GPIO AVR32_PIN_PB19 +# define LED5_GPIO AVR32_PIN_PB20 +# define LED6_GPIO AVR32_PIN_PB21 +# define LED7_GPIO AVR32_PIN_PB22 +#else +# define LED0_GPIO AVR32_PIN_PB27 +# define LED1_GPIO AVR32_PIN_PB28 +# define LED2_GPIO AVR32_PIN_PB29 +# define LED3_GPIO AVR32_PIN_PB30 +# define LED4_GPIO AVR32_PIN_PB19 +# define LED5_GPIO AVR32_PIN_PB20 +# define LED6_GPIO AVR32_PIN_PB21 +# define LED7_GPIO AVR32_PIN_PB22 +#endif +//! @} + +/*! \name PWM Channels of LEDs + */ +//! @{ +#define LED0_PWM (-1) +#define LED1_PWM (-1) +#define LED2_PWM (-1) +#define LED3_PWM (-1) +#define LED4_PWM 0 +#define LED5_PWM 1 +#define LED6_PWM 2 +#define LED7_PWM 3 +//! @} + +/*! \name PWM Functions of LEDs + */ +//! @{ +#define LED0_PWM_FUNCTION (-1) +#define LED1_PWM_FUNCTION (-1) +#define LED2_PWM_FUNCTION (-1) +#define LED3_PWM_FUNCTION (-1) +#define LED4_PWM_FUNCTION AVR32_PWM_PWM_0_FUNCTION +#define LED5_PWM_FUNCTION AVR32_PWM_PWM_1_FUNCTION +#define LED6_PWM_FUNCTION AVR32_PWM_PWM_2_FUNCTION +#define LED7_PWM_FUNCTION AVR32_PWM_PWM_3_FUNCTION +//! @} + +/*! \name Color Identifiers of LEDs to Use with LED Functions + */ +//! @{ +#ifdef EVK1100_REVA +# define LED_MONO0_GREEN LED4 +# define LED_MONO1_GREEN LED5 +# define LED_MONO2_GREEN LED6 +# define LED_MONO3_GREEN LED7 +# define LED_BI0_GREEN LED1 +# define LED_BI0_RED LED0 +# define LED_BI1_GREEN LED3 +# define LED_BI1_RED LED2 +#else +# define LED_MONO0_GREEN LED0 +# define LED_MONO1_GREEN LED1 +# define LED_MONO2_GREEN LED2 +# define LED_MONO3_GREEN LED3 +# define LED_BI0_GREEN LED5 +# define LED_BI0_RED LED4 +# define LED_BI1_GREEN LED7 +# define LED_BI1_RED LED6 +#endif +//! @} + + +/*! \name GPIO Connections of Push Buttons + */ +//! @{ +#ifdef EVK1100_REVA +# define GPIO_PUSH_BUTTON_0 AVR32_PIN_PB28 +# define GPIO_PUSH_BUTTON_1 AVR32_PIN_PB29 +# define GPIO_PUSH_BUTTON_2 AVR32_PIN_PB27 +#else +# define GPIO_PUSH_BUTTON_0 AVR32_PIN_PX16 +# define GPIO_PUSH_BUTTON_1 AVR32_PIN_PX19 +# define GPIO_PUSH_BUTTON_2 AVR32_PIN_PX22 +#endif +//! @} + + +/*! \name GPIO Connections of the Joystick + */ +//! @{ +#define GPIO_JOYSTICK_PUSH AVR32_PIN_PA20 +#define GPIO_JOYSTICK_LEFT AVR32_PIN_PA25 +#define GPIO_JOYSTICK_RIGHT AVR32_PIN_PA28 +#define GPIO_JOYSTICK_UP AVR32_PIN_PA26 +#define GPIO_JOYSTICK_DOWN AVR32_PIN_PA27 +//! @} + + +/*! \name ADC Connection of the Potentiometer + */ +//! @{ +#define ADC_POTENTIOMETER_CHANNEL 1 +#define ADC_POTENTIOMETER_PIN AVR32_ADC_AD_1_PIN +#define ADC_POTENTIOMETER_FUNCTION AVR32_ADC_AD_1_FUNCTION +//! @} + + +/*! \name ADC Connection of the Temperature Sensor + */ +//! @{ +#define ADC_TEMPERATURE_CHANNEL 0 +#define ADC_TEMPERATURE_PIN AVR32_ADC_AD_0_PIN +#define ADC_TEMPERATURE_FUNCTION AVR32_ADC_AD_0_FUNCTION +//! @} + + +/*! \name ADC Connection of the Light Sensor + */ +//! @{ +#define ADC_LIGHT_CHANNEL 2 +#define ADC_LIGHT_PIN AVR32_ADC_AD_2_PIN +#define ADC_LIGHT_FUNCTION AVR32_ADC_AD_2_FUNCTION +//! @} + + +/*! \name SPI Connections of the DIP204 LCD + */ +//! @{ +#define DIP204_SPI (&AVR32_SPI1) +#define DIP204_SPI_CS 2 +#define DIP204_SPI_SCK_PIN AVR32_SPI1_SCK_0_PIN +#define DIP204_SPI_SCK_FUNCTION AVR32_SPI1_SCK_0_FUNCTION +#define DIP204_SPI_MISO_PIN AVR32_SPI1_MISO_0_PIN +#define DIP204_SPI_MISO_FUNCTION AVR32_SPI1_MISO_0_FUNCTION +#define DIP204_SPI_MOSI_PIN AVR32_SPI1_MOSI_0_PIN +#define DIP204_SPI_MOSI_FUNCTION AVR32_SPI1_MOSI_0_FUNCTION +#define DIP204_SPI_NPCS_PIN AVR32_SPI1_NPCS_2_PIN +#define DIP204_SPI_NPCS_FUNCTION AVR32_SPI1_NPCS_2_FUNCTION +//! @} + +/*! \name GPIO and PWM Connections of the DIP204 LCD Backlight + */ +//! @{ +#define DIP204_BACKLIGHT_PIN AVR32_PIN_PB18 +#define DIP204_PWM_CHANNEL AVR32_PWM_CHID6 +#define DIP204_PWM_PIN AVR32_PWM_PWM_6_PIN +#define DIP204_PWM_FUNCTION AVR32_PWM_PWM_6_FUNCTION +//! @} + + +/*! \name SPI Connections of the AT45DBX Data Flash Memory + */ +//! @{ +#define AT45DBX_SPI (&AVR32_SPI1) +#define AT45DBX_SPI_SCK_PIN AVR32_SPI1_SCK_0_PIN +#define AT45DBX_SPI_SCK_FUNCTION AVR32_SPI1_SCK_0_FUNCTION +#define AT45DBX_SPI_MISO_PIN AVR32_SPI1_MISO_0_PIN +#define AT45DBX_SPI_MISO_FUNCTION AVR32_SPI1_MISO_0_FUNCTION +#define AT45DBX_SPI_MOSI_PIN AVR32_SPI1_MOSI_0_PIN +#define AT45DBX_SPI_MOSI_FUNCTION AVR32_SPI1_MOSI_0_FUNCTION +#define AT45DBX_SPI_NPCS0_PIN AVR32_SPI1_NPCS_0_PIN +#define AT45DBX_SPI_NPCS0_FUNCTION AVR32_SPI1_NPCS_0_FUNCTION +//! @} + + +/*! \name SPI Connections of the SD/MMC Connector + */ +//! @{ +#define SD_MMC_SPI (&AVR32_SPI1) +#define SD_MMC_SPI_CS 1 +#define SD_MMC_SPI_SCK_PIN AVR32_SPI1_SCK_0_PIN +#define SD_MMC_SPI_SCK_FUNCTION AVR32_SPI1_SCK_0_FUNCTION +#define SD_MMC_SPI_MISO_PIN AVR32_SPI1_MISO_0_PIN +#define SD_MMC_SPI_MISO_FUNCTION AVR32_SPI1_MISO_0_FUNCTION +#define SD_MMC_SPI_MOSI_PIN AVR32_SPI1_MOSI_0_PIN +#define SD_MMC_SPI_MOSI_FUNCTION AVR32_SPI1_MOSI_0_FUNCTION +#define SD_MMC_SPI_NPCS_PIN AVR32_SPI1_NPCS_1_PIN +#define SD_MMC_SPI_NPCS_FUNCTION AVR32_SPI1_NPCS_1_FUNCTION +//! @} + + +#endif // _EVK1100_H_ diff --git a/Demo/AVR32_UC3/BOARDS/EVK1100/led.c b/Demo/AVR32_UC3/BOARDS/EVK1100/led.c new file mode 100644 index 000000000..550b0c028 --- /dev/null +++ b/Demo/AVR32_UC3/BOARDS/EVK1100/led.c @@ -0,0 +1,314 @@ +/* This source file is part of the ATMEL FREERTOS-0.9.0 Release */ + +/*This file is prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief AT32UC3A EVK1100 board LEDs support package. + * + * This file contains definitions and services related to the LED features of + * the EVK1100 board. + * + * - Compiler: IAR EWAVR32 and GNU GCC for AVR32 + * - Supported devices: All AVR32 AT32UC3A devices can be used. + * - AppNote: + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support email: avr32@atmel.com + * + ******************************************************************************/ + +/* Copyright (c) 2007, Atmel Corporation All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of ATMEL may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND + * SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + + +#if __GNUC__ +# include +#elif __ICCAVR32__ +# include +#else +# error Unknown compiler +#endif + +#include "preprocessor.h" +#include "compiler.h" +#include "evk1100.h" +#include "led.h" + + +//! Structure describing LED hardware connections. +typedef const struct +{ + struct + { + U32 PORT; //!< LED GPIO port. + U32 PIN_MASK; //!< Bit-mask of LED pin in GPIO port. + } GPIO; //!< LED GPIO descriptor. + struct + { + S32 CHANNEL; //!< LED PWM channel (< 0 if N/A). + S32 FUNCTION; //!< LED pin PWM function (< 0 if N/A). + } PWM; //!< LED PWM descriptor. +} tLED_DESCRIPTOR; + + +//! Hardware descriptors of all LEDs. +static tLED_DESCRIPTOR LED_DESCRIPTOR[LED_COUNT] = +{ +#define INSERT_LED_DESCRIPTOR(LED_NO, unused) \ + { \ + {LED##LED_NO##_GPIO / 32, 1 << (LED##LED_NO##_GPIO % 32)},\ + {LED##LED_NO##_PWM, LED##LED_NO##_PWM_FUNCTION } \ + }, + MREPEAT(LED_COUNT, INSERT_LED_DESCRIPTOR, ~) +#undef INSERT_LED_DESCRIPTOR +}; + + +//! Saved state of all LEDs. +static U32 LED_State = (1 << LED_COUNT) - 1; + + +U32 LED_Read_Display(void) +{ + return LED_State; +} + + +void LED_Display(U32 leds) +{ + tLED_DESCRIPTOR *led_descriptor; + volatile avr32_gpio_port_t *led_gpio_port; + + leds &= (1 << LED_COUNT) - 1; + LED_State = leds; + for (led_descriptor = &LED_DESCRIPTOR[0]; + led_descriptor < LED_DESCRIPTOR + LED_COUNT; + led_descriptor++) + { + led_gpio_port = &AVR32_GPIO.port[led_descriptor->GPIO.PORT]; + if (leds & 1) + { + led_gpio_port->ovrc = led_descriptor->GPIO.PIN_MASK; + } + else + { + led_gpio_port->ovrs = led_descriptor->GPIO.PIN_MASK; + } + led_gpio_port->oders = led_descriptor->GPIO.PIN_MASK; + led_gpio_port->gpers = led_descriptor->GPIO.PIN_MASK; + leds >>= 1; + } +} + + +U32 LED_Read_Display_Mask(U32 mask) +{ + return Rd_bits(LED_State, mask); +} + + +void LED_Display_Mask(U32 mask, U32 leds) +{ + tLED_DESCRIPTOR *led_descriptor = &LED_DESCRIPTOR[0] - 1; + volatile avr32_gpio_port_t *led_gpio_port; + U8 led_shift; + + mask &= (1 << LED_COUNT) - 1; + Wr_bits(LED_State, mask, leds); + while (mask) + { + led_shift = 1 + ctz(mask); + led_descriptor += led_shift; + led_gpio_port = &AVR32_GPIO.port[led_descriptor->GPIO.PORT]; + leds >>= led_shift - 1; + if (leds & 1) + { + led_gpio_port->ovrc = led_descriptor->GPIO.PIN_MASK; + } + else + { + led_gpio_port->ovrs = led_descriptor->GPIO.PIN_MASK; + } + led_gpio_port->oders = led_descriptor->GPIO.PIN_MASK; + led_gpio_port->gpers = led_descriptor->GPIO.PIN_MASK; + leds >>= 1; + mask >>= led_shift; + } +} + + +Bool LED_Test(U32 leds) +{ + return Tst_bits(LED_State, leds); +} + + +void LED_Off(U32 leds) +{ + tLED_DESCRIPTOR *led_descriptor = &LED_DESCRIPTOR[0] - 1; + volatile avr32_gpio_port_t *led_gpio_port; + U8 led_shift; + + leds &= (1 << LED_COUNT) - 1; + Clr_bits(LED_State, leds); + while (leds) + { + led_shift = 1 + ctz(leds); + led_descriptor += led_shift; + led_gpio_port = &AVR32_GPIO.port[led_descriptor->GPIO.PORT]; + led_gpio_port->ovrs = led_descriptor->GPIO.PIN_MASK; + led_gpio_port->oders = led_descriptor->GPIO.PIN_MASK; + led_gpio_port->gpers = led_descriptor->GPIO.PIN_MASK; + leds >>= led_shift; + } +} + + +void LED_On(U32 leds) +{ + tLED_DESCRIPTOR *led_descriptor = &LED_DESCRIPTOR[0] - 1; + volatile avr32_gpio_port_t *led_gpio_port; + U8 led_shift; + + leds &= (1 << LED_COUNT) - 1; + Set_bits(LED_State, leds); + while (leds) + { + led_shift = 1 + ctz(leds); + led_descriptor += led_shift; + led_gpio_port = &AVR32_GPIO.port[led_descriptor->GPIO.PORT]; + led_gpio_port->ovrc = led_descriptor->GPIO.PIN_MASK; + led_gpio_port->oders = led_descriptor->GPIO.PIN_MASK; + led_gpio_port->gpers = led_descriptor->GPIO.PIN_MASK; + leds >>= led_shift; + } +} + + +void LED_Toggle(U32 leds) +{ + tLED_DESCRIPTOR *led_descriptor = &LED_DESCRIPTOR[0] - 1; + volatile avr32_gpio_port_t *led_gpio_port; + U8 led_shift; + + leds &= (1 << LED_COUNT) - 1; + Tgl_bits(LED_State, leds); + while (leds) + { + led_shift = 1 + ctz(leds); + led_descriptor += led_shift; + led_gpio_port = &AVR32_GPIO.port[led_descriptor->GPIO.PORT]; + led_gpio_port->ovrt = led_descriptor->GPIO.PIN_MASK; + led_gpio_port->oders = led_descriptor->GPIO.PIN_MASK; + led_gpio_port->gpers = led_descriptor->GPIO.PIN_MASK; + leds >>= led_shift; + } +} + + +U32 LED_Read_Display_Field(U32 field) +{ + return Rd_bitfield(LED_State, field); +} + + +void LED_Display_Field(U32 field, U32 leds) +{ + LED_Display_Mask(field, leds << ctz(field)); +} + + +U8 LED_Get_Intensity(U32 led) +{ + tLED_DESCRIPTOR *led_descriptor; + + // Check that the argument value is valid. + led = ctz(led); + led_descriptor = &LED_DESCRIPTOR[led]; + if (led >= LED_COUNT || led_descriptor->PWM.CHANNEL < 0) return 0; + + // Return the duty cycle value if the LED PWM channel is enabled, else 0. + return (AVR32_PWM.sr & (1 << led_descriptor->PWM.CHANNEL)) ? + AVR32_PWM.channel[led_descriptor->PWM.CHANNEL].cdty : 0; +} + + +void LED_Set_Intensity(U32 leds, U8 intensity) +{ + tLED_DESCRIPTOR *led_descriptor = &LED_DESCRIPTOR[0] - 1; + volatile avr32_pwm_channel_t *led_pwm_channel; + volatile avr32_gpio_port_t *led_gpio_port; + U8 led_shift; + + // For each specified LED... + for (leds &= (1 << LED_COUNT) - 1; leds; leds >>= led_shift) + { + // Select the next specified LED and check that it has a PWM channel. + led_shift = 1 + ctz(leds); + led_descriptor += led_shift; + if (led_descriptor->PWM.CHANNEL < 0) continue; + + // Initialize or update the LED PWM channel. + led_pwm_channel = &AVR32_PWM.channel[led_descriptor->PWM.CHANNEL]; + if (!(AVR32_PWM.sr & (1 << led_descriptor->PWM.CHANNEL))) + { + led_pwm_channel->cmr = (AVR32_PWM_CPRE_MCK << AVR32_PWM_CPRE_OFFSET) & + ~(AVR32_PWM_CALG_MASK | + AVR32_PWM_CPOL_MASK | + AVR32_PWM_CPD_MASK); + led_pwm_channel->cprd = 0x000000FF; + led_pwm_channel->cdty = intensity; + AVR32_PWM.ena = 1 << led_descriptor->PWM.CHANNEL; + } + else + { + AVR32_PWM.isr; + while (!(AVR32_PWM.isr & (1 << led_descriptor->PWM.CHANNEL))); + led_pwm_channel->cupd = intensity; + } + + // Switch the LED pin to its PWM function. + led_gpio_port = &AVR32_GPIO.port[led_descriptor->GPIO.PORT]; + if (led_descriptor->PWM.FUNCTION & 0x1) + { + led_gpio_port->pmr0s = led_descriptor->GPIO.PIN_MASK; + } + else + { + led_gpio_port->pmr0c = led_descriptor->GPIO.PIN_MASK; + } + if (led_descriptor->PWM.FUNCTION & 0x2) + { + led_gpio_port->pmr1s = led_descriptor->GPIO.PIN_MASK; + } + else + { + led_gpio_port->pmr1c = led_descriptor->GPIO.PIN_MASK; + } + led_gpio_port->gperc = led_descriptor->GPIO.PIN_MASK; + } +} diff --git a/Demo/AVR32_UC3/BOARDS/EVK1100/led.h b/Demo/AVR32_UC3/BOARDS/EVK1100/led.h new file mode 100644 index 000000000..3b3afd808 --- /dev/null +++ b/Demo/AVR32_UC3/BOARDS/EVK1100/led.h @@ -0,0 +1,188 @@ +/* This header file is part of the ATMEL FREERTOS-0.9.0 Release */ + +/*This file is prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief AT32UC3A EVK1100 board LEDs support package. + * + * This file contains definitions and services related to the LED features of + * the EVK1100 board. + * + * - Compiler: IAR EWAVR32 and GNU GCC for AVR32 + * - Supported devices: All AVR32 AT32UC3A devices can be used. + * - AppNote: + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support email: avr32@atmel.com + * + ******************************************************************************/ + +/* Copyright (c) 2007, Atmel Corporation All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of ATMEL may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND + * SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + + +#ifndef _LED_H_ +#define _LED_H_ + +#include "compiler.h" + + +/*! \name Identifiers of LEDs to Use with LED Functions + */ +//! @{ +#define LED0 0x01 +#define LED1 0x02 +#define LED2 0x04 +#define LED3 0x08 +#define LED4 0x10 +#define LED5 0x20 +#define LED6 0x40 +#define LED7 0x80 +//! @} + + +/*! \brief Gets the last state of all LEDs set through the LED API. + * + * \return State of all LEDs (1 bit per LED). + * + * \note The GPIO pin configuration of all LEDs is left unchanged. + */ +extern U32 LED_Read_Display(void); + +/*! \brief Sets the state of all LEDs. + * + * \param leds New state of all LEDs (1 bit per LED). + * + * \note The pins of all LEDs are set to GPIO output mode. + */ +extern void LED_Display(U32 leds); + +/*! \brief Gets the last state of the specified LEDs set through the LED API. + * + * \param mask LEDs of which to get the state (1 bit per LED). + * + * \return State of the specified LEDs (1 bit per LED). + * + * \note The GPIO pin configuration of all LEDs is left unchanged. + */ +extern U32 LED_Read_Display_Mask(U32 mask); + +/*! \brief Sets the state of the specified LEDs. + * + * \param mask LEDs of which to set the state (1 bit per LED). + * + * \param leds New state of the specified LEDs (1 bit per LED). + * + * \note The pins of the specified LEDs are set to GPIO output mode. + */ +extern void LED_Display_Mask(U32 mask, U32 leds); + +/*! \brief Tests the last state of the specified LEDs set through the LED API. + * + * \param leds LEDs of which to test the state (1 bit per LED). + * + * \return \c TRUE if at least one of the specified LEDs has a state on, else + * \c FALSE. + * + * \note The GPIO pin configuration of all LEDs is left unchanged. + */ +extern Bool LED_Test(U32 leds); + +/*! \brief Turns off the specified LEDs. + * + * \param leds LEDs to turn off (1 bit per LED). + * + * \note The pins of the specified LEDs are set to GPIO output mode. + */ +extern void LED_Off(U32 leds); + +/*! \brief Turns on the specified LEDs. + * + * \param leds LEDs to turn on (1 bit per LED). + * + * \note The pins of the specified LEDs are set to GPIO output mode. + */ +extern void LED_On(U32 leds); + +/*! \brief Toggles the specified LEDs. + * + * \param leds LEDs to toggle (1 bit per LED). + * + * \note The pins of the specified LEDs are set to GPIO output mode. + */ +extern void LED_Toggle(U32 leds); + +/*! \brief Gets as a bit-field the last state of the specified LEDs set through + * the LED API. + * + * \param field LEDs of which to get the state (1 bit per LED). + * + * \return State of the specified LEDs (1 bit per LED, beginning with the first + * specified LED). + * + * \note The GPIO pin configuration of all LEDs is left unchanged. + */ +extern U32 LED_Read_Display_Field(U32 field); + +/*! \brief Sets as a bit-field the state of the specified LEDs. + * + * \param field LEDs of which to set the state (1 bit per LED). + * \param leds New state of the specified LEDs (1 bit per LED, beginning with + * the first specified LED). + * + * \note The pins of the specified LEDs are set to GPIO output mode. + */ +extern void LED_Display_Field(U32 field, U32 leds); + +/*! \brief Gets the intensity of the specified LED. + * + * \param led LED of which to get the intensity (1 bit per LED; only the least + * significant set bit is used). + * + * \return Intensity of the specified LED (0x00 to 0xFF). + * + * \warning The PWM channel of the specified LED is supposed to be used only by + * this module. + * + * \note The GPIO pin configuration of all LEDs is left unchanged. + */ +extern U8 LED_Get_Intensity(U32 led); + +/*! \brief Sets the intensity of the specified LEDs. + * + * \param leds LEDs of which to set the intensity (1 bit per LED). + * \param intensity New intensity of the specified LEDs (0x00 to 0xFF). + * + * \warning The PWM channels of the specified LEDs are supposed to be used only + * by this module. + * + * \note The pins of the specified LEDs are set to PWM output mode. + */ +extern void LED_Set_Intensity(U32 leds, U8 intensity); + + +#endif // _LED_H_ diff --git a/Demo/AVR32_UC3/BOARDS/board.h b/Demo/AVR32_UC3/BOARDS/board.h new file mode 100644 index 000000000..36484edcc --- /dev/null +++ b/Demo/AVR32_UC3/BOARDS/board.h @@ -0,0 +1,73 @@ +/* This header file is part of the ATMEL FREERTOS-0.9.0 Release */ + +/*This file is prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief Standard board header file. + * + * This file includes the appropriate board header file according to the + * defined board. + * + * - Compiler: IAR EWAVR32 and GNU GCC for AVR32 + * - Supported devices: All AVR32 devices can be used. + * - AppNote: + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support email: avr32@atmel.com + * + ******************************************************************************/ + +/* Copyright (c) 2007, Atmel Corporation All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of ATMEL may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND + * SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + + +#ifndef _BOARD_H_ +#define _BOARD_H_ + +#if __GNUC__ +# include +#elif __ICCAVR32__ || __AAVR32__ +# include +#else +# error Unknown compiler +#endif + +#define EVK1100 1 //!< AT32UC3A EVK1100 board. + +#if BOARD == EVK1100 +# include "EVK1100/evk1100.h" +#else +# error No known AVR32 board defined +#endif + + +#ifndef FRCOSC +# define FRCOSC AVR32_PM_RCOSC_FREQUENCY //!< Default RCOsc frequency. +#endif + + +#endif // _BOARD_H_ diff --git a/Demo/AVR32_UC3/DOC/_formulas.tex b/Demo/AVR32_UC3/DOC/_formulas.tex new file mode 100644 index 000000000..55a7a8474 --- /dev/null +++ b/Demo/AVR32_UC3/DOC/_formulas.tex @@ -0,0 +1,11 @@ +\documentclass{article} +\usepackage{epsfig} +\pagestyle{empty} +\begin{document} +$ baudrate = \frac{Selected Clock}{16 \times CD} $ +\pagebreak + +$ baudrate = \frac{Selected Clock}{8 \times CD} $ +\pagebreak + +\end{document} diff --git a/Demo/AVR32_UC3/DOC/doxygen.css b/Demo/AVR32_UC3/DOC/doxygen.css new file mode 100644 index 000000000..c7db1a8a0 --- /dev/null +++ b/Demo/AVR32_UC3/DOC/doxygen.css @@ -0,0 +1,358 @@ +BODY,H1,H2,H3,H4,H5,H6,P,CENTER,TD,TH,UL,DL,DIV { + font-family: Geneva, Arial, Helvetica, sans-serif; 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+ width : 100%; + background : url("tab_b.gif") repeat-x bottom; + margin-bottom : 4px; +} + +DIV.tabs UL +{ + margin : 0px; + padding-left : 10px; + list-style : none; +} + +DIV.tabs LI, DIV.tabs FORM +{ + display : inline; + margin : 0px; + padding : 0px; +} + +DIV.tabs FORM +{ + float : right; +} + +DIV.tabs A +{ + float : left; + background : url("tab_r.gif") no-repeat right top; + border-bottom : 1px solid #84B0C7; + font-size : x-small; + font-weight : bold; + text-decoration : none; +} + +DIV.tabs A:hover +{ + background-position: 100% -150px; +} + +DIV.tabs A:link, DIV.tabs A:visited, +DIV.tabs A:active, DIV.tabs A:hover +{ + color: #1A419D; +} + +DIV.tabs SPAN +{ + float : left; + display : block; + background : url("tab_l.gif") no-repeat left top; + padding : 5px 9px; + white-space : nowrap; +} + +DIV.tabs INPUT +{ + float : right; + display : inline; + font-size : 1em; +} + +DIV.tabs TD +{ + font-size : x-small; + font-weight : bold; + text-decoration : none; +} + + + +/* Commented Backslash Hack hides rule from IE5-Mac \*/ +DIV.tabs SPAN {float : none;} +/* End IE5-Mac hack */ + +DIV.tabs A:hover SPAN +{ + background-position: 0% -150px; +} + +DIV.tabs LI#current A +{ + background-position: 100% -150px; + border-width : 0px; +} + +DIV.tabs LI#current SPAN +{ + background-position: 0% -150px; + padding-bottom : 6px; +} + +DIV.nav +{ + background : none; + border : none; + border-bottom : 1px solid #84B0C7; +} diff --git a/Demo/AVR32_UC3/DRIVERS/GPIO/gpio.c b/Demo/AVR32_UC3/DRIVERS/GPIO/gpio.c new file mode 100644 index 000000000..bbaf979f2 --- /dev/null +++ b/Demo/AVR32_UC3/DRIVERS/GPIO/gpio.c @@ -0,0 +1,216 @@ +/* This source file is part of the ATMEL FREERTOS-0.9.0 Release */ + +/*This file has been prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief GPIO driver for AVR32 UC3. + * + * This file defines a useful set of functions for the GPIO. + * + * - Compiler: IAR EWAVR32 and GNU GCC for AVR32 + * - Supported devices: All AVR32 devices with a PWM module can be used. + * - AppNote: + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support email: avr32@atmel.com + * + *****************************************************************************/ + +/* Copyright (c) 2007, Atmel Corporation All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of ATMEL may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND + * SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + + +#include "gpio.h" + + +//! GPIO module instance. +#define GPIO AVR32_GPIO + + +int gpio_enable_module(avr32_gpiomap_t gpiomap, int size) +{ + int i,status=GPIO_SUCCESS; + + for(i=0; ipmr0c = (1<<(pin%32)); + gpio_port->pmr1c = (1<<(pin%32)); + break; + case 1: // B function + gpio_port->pmr0s = (1<<(pin%32)); + gpio_port->pmr1c = (1<<(pin%32)); + break; + case 2: // C function + gpio_port->pmr0c = (1<<(pin%32)); + gpio_port->pmr1s = (1<<(pin%32)); + break; + default: + return GPIO_INVALID_ARGUMENT; + } + + // Disable gpio control + gpio_port->gperc = (1<<(pin%32)); + + return GPIO_SUCCESS; +} + + +void gpio_enable_gpio(avr32_gpiomap_t gpiomap, int size) +{ + int i; + + for(i=0; igpers = 1<<(pin%32); +} + + +void gpio_enable_gpio_glitch_filter(int pin) +{ + volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin/32]; + gpio_port->gfers = 1<<(pin%32); +} + + +void gpio_disable_gpio_glitch_filter(int pin) +{ + volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin/32]; + gpio_port->gferc = 1<<(pin%32); +} + + +void gpio_disable_module(avr32_gpiomap_t gpiomap, int size) +{ + int i; + + for(i=0; igperc = 1<<(pin%32); +} + + +int gpio_pin_value(int pin) +{ + volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin/32]; + return (gpio_port->pvr >>(pin%32))&1; +} + + +void gpio_set_gpio_pin(int pin) +{ + // The port holding that pin. + volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin/32]; + + gpio_port->ovrs = (1<<(pin%32)); // Value to be driven on the I/O line: 1 + gpio_port->oders = (1<<(pin%32)); // The GPIO output driver is enabled for that pin. + gpio_port->gpers = (1<<(pin%32)); // The GPIO module controls that pin. +} + + +void gpio_clr_gpio_pin(int pin) +{ + volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin/32]; // The port holding that pin. + + gpio_port->ovrc = (1<<(pin%32)); // Value to be driven on the I/O line: 0 + gpio_port->oders = (1<<(pin%32)); // The GPIO output driver is enabled for that pin. + gpio_port->gpers = (1<<(pin%32)); // The GPIO module controls that pin. +} + + +void gpio_tgl_gpio_pin(int pin) +{ + volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin/32]; // The port holding that pin. + + gpio_port->ovrt = (1<<(pin%32)); // Toggle the I/O line. + gpio_port->oders = (1<<(pin%32)); // The GPIO output driver is enabled for that pin. + gpio_port->gpers = (1<<(pin%32)); // The GPIO module controls that pin. +} + + +void gpio_cfg_int_gpio_pin(int pin, int level) +{ + volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin/32]; // The port holding that pin. + + gpio_port->gpers = 1<<(pin%32); // GPIO controller enable + gpio_port->gfers = 1<<(pin%32); // GPIO glitch filter enable + switch (level) + { + case GPIO_RISING_EDGE: + { + // mode rising edge + gpio_port->imr0s = 1<<(pin%32); + gpio_port->imr1c = 1<<(pin%32); + break; + } + case GPIO_FALLING_EDGE: + { + // mode falling edge + gpio_port->imr0c = 1<<(pin%32); + gpio_port->imr1s = 1<<(pin%32); + break; + } + default : + { + // mode pin change + gpio_port->imr0c = 1<<(pin%32); + gpio_port->imr1c = 1<<(pin%32); + break; + } + } + gpio_port->iers = 1<<(pin%32); // GPIO interrupt enable +} diff --git a/Demo/AVR32_UC3/DRIVERS/GPIO/gpio.h b/Demo/AVR32_UC3/DRIVERS/GPIO/gpio.h new file mode 100644 index 000000000..0faf006d1 --- /dev/null +++ b/Demo/AVR32_UC3/DRIVERS/GPIO/gpio.h @@ -0,0 +1,195 @@ +/* This header file is part of the ATMEL FREERTOS-0.9.0 Release */ + +/*This file has been prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief GPIO header for AVR32 UC3. + * + * This file contains basic GPIO driver functions. + * + * - Compiler: IAR EWAVR32 and GNU GCC for AVR32 + * - Supported devices: All AVR32 devices with a GPIO module can be used. + * - AppNote: + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support email: avr32@atmel.com + * + *****************************************************************************/ + +/* Copyright (c) 2007, Atmel Corporation All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of ATMEL may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND + * SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + + +#ifndef _GPIO_H_ +#define _GPIO_H_ + +#if __GNUC__ +# include +#elif __ICCAVR32__ +# include +#else +# error Unknown compiler +#endif + + +/*! \name General GPIO API defines + * These values are returned by the GPIO API: + */ +//! @{ +#define GPIO_SUCCESS 0 //!< Function successfully completed +#define GPIO_FAILURE -1 //!< Function did not successfully complete for some unspecified reason +#define GPIO_INVALID_ARGUMENT 1 //!< Input paramters are out of range +//! @} + + +/*! \name Interrupt configuration defines + * Configure the method used to trigger the interrupt: + */ +//! @{ +#define GPIO_RISING_EDGE 1 //!< configure IT upon Rising Edge +#define GPIO_FALLING_EDGE 2 //!< configure IT upon Falling Edge +#define GPIO_INPUT_CHANGE 3 //!< configure IT upon Pin Change +//! @} + + +/*! + * A type definitions of pins and module connectivity. + * First column is the pin number, the second is gpio connectivity. + */ +typedef char avr32_gpiomap_t[][2]; + + +/*! + * \brief Enable a module pin for a given set of pins and respective modules. + * + * \param gpiomap A list of pins and pio connectivity + * \param size The number of pins in \a gpiomap + * \return \ref GPIO_SUCCESS or \ref GPIO_INVALID_ARGUMENT + */ +extern int gpio_enable_module(avr32_gpiomap_t gpiomap, int size); + +/*! + * \brief Enable a special module (function) for a pin (pin number). + * + * \param pin The pin number + * \param function The pin function + * \return \ref GPIO_SUCCESS or \ref GPIO_INVALID_ARGUMENT + */ +extern int gpio_enable_module_pin(int pin, int function); + +/*! + * \brief Enable pins of a module according gpiomap. + * + * \param gpiomap The pin map + * \param size The number of pins in \a gpiomap + */ +extern void gpio_enable_gpio(avr32_gpiomap_t gpiomap, int size); + +/*! + * \brief Enable the GPIO module to control the pin. + * + * \param pin The pin number + */ +extern void gpio_enable_gpio_pin(int pin); + +/*! + * \brief Enable the GPIO glitch filter. + * + * When the glitch filter is enabled, a + * glitch with duration of less than 1 clock cycle is automatically rejected, while a pulse with duration + * of 2 clock cycles or more is accepted. For pulse durations between 1 clock cycle and 2 clock + * cycles, the pulse may or may not be taken into account, depending on the precise timing of its + * occurrence. Thus for a pulse to be guaranteed visible it must exceed 2 clock cycles, whereas for + * a glitch to be reliably filtered out, its duration must not exceed 1 clock cycle. The filter introduces + * 2 clock cycles latency. + * + * \param pin The pin number + * \return \ref GPIO_SUCCESS + */ +extern void gpio_enable_gpio_glitch_filter(int pin); + +/*! + * \brief Disable the GPIO glitch filter. + * + * \param pin The pin number + */ +extern void gpio_disable_gpio_glitch_filter(int pin); + +/*! + * \brief Return the pin value + * + * \param pin The pin number + * \return pin value + */ +extern int gpio_pin_value(int pin); + +/*! + * \brief Disable the GPIO module to control a set of pins according to gpiomap. + * + * \param gpiomap The pin map + * \param size The number of pins in \a gpiomap + */ +extern void gpio_disable_module(avr32_gpiomap_t gpiomap, int size); + +/*! + * \brief Disable the GPIO module to control the pin. + * + * \param pin The pin number + */ +extern void gpio_disable_gpio_pin(int pin); + +/*! + * \brief Configure a pin to generate IT + * + * \param pin GPIO pin number to configure. + * \param level level to configure (\ref GPIO_RISING_EDGE, \ref GPIO_FALLING_EDGE, \ref GPIO_INPUT_CHANGE). + */ +extern void gpio_cfg_int_gpio_pin(int pin, int level); + +/*! + * \brief Drive a gpio pin value to 1. + * + * \param pin The pin number + */ +extern void gpio_set_gpio_pin(int pin); + +/*! + * \brief Drive a gpio pin value to 0. + * + * \param pin The pin number + */ +extern void gpio_clr_gpio_pin(int pin); + +/*! + * \brief This function toggle a gpio pin value. + * + * \param pin The pin number + */ +extern void gpio_tgl_gpio_pin(int pin); + + +#endif // _GPIO_H_ diff --git a/Demo/AVR32_UC3/DRIVERS/INTC/intc.c b/Demo/AVR32_UC3/DRIVERS/INTC/intc.c new file mode 100644 index 000000000..71f9c706c --- /dev/null +++ b/Demo/AVR32_UC3/DRIVERS/INTC/intc.c @@ -0,0 +1,201 @@ +/*This file is prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief INTC driver for AVR32 UC3. + * + * AVR32 Interrupt Controller driver module. + * + * - Compiler: IAR EWAVR32 and GNU GCC for AVR32 + * - Supported devices: All AVR32 devices with an INTC module can be used. + * - AppNote: + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support email: avr32@atmel.com + * + ******************************************************************************/ + +/* Copyright (c) 2007, Atmel Corporation All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of ATMEL may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND + * SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + + +#if __GNUC__ +# include +#elif __ICCAVR32__ +# include +#else +# error Unknown compiler +#endif + +#include "compiler.h" +#include "preprocessor.h" +#include "intc.h" + + +//! Values to store in the interrupt priority registers for the various interrupt priority levels. +extern const unsigned int ipr_val[AVR32_INTC_NUM_INT_LEVELS]; + +//! Creates a table of interrupt line handlers per interrupt group in order to optimize RAM space. +//! Each line handler table contains a set of pointers to interrupt handlers. +#define DECL_INT_LINE_HANDLER_TABLE(GRP, unused) \ +static volatile __int_handler _int_line_handler_table_##GRP[AVR32_INTC_NUM_IRQS_PER_GRP##GRP]; +MREPEAT(AVR32_INTC_NUM_INT_GRPS, DECL_INT_LINE_HANDLER_TABLE, ~); +#undef DECL_INT_LINE_HANDLER_TABLE + +//! Table containing for each interrupt group the number of interrupt request +//! lines and a pointer to the table of interrupt line handlers. +static const struct +{ + unsigned int num_irqs; + volatile __int_handler *_int_line_handler_table; +} _int_handler_table[AVR32_INTC_NUM_INT_GRPS] = +{ +#define INSERT_INT_LINE_HANDLER_TABLE(GRP, unused) \ + {AVR32_INTC_NUM_IRQS_PER_GRP##GRP, _int_line_handler_table_##GRP}, + MREPEAT(AVR32_INTC_NUM_INT_GRPS, INSERT_INT_LINE_HANDLER_TABLE, ~) +#undef INSERT_INT_LINE_HANDLER_TABLE +}; + + +/*! \brief Default interrupt handler. + * + * \note Taken and adapted from Newlib. + */ +#if __GNUC__ +__attribute__((__interrupt__)) +#elif __ICCAVR32__ +__interrupt +#endif +static void _unhandled_interrupt(void) +{ + // Catch unregistered interrupts. + while (TRUE); +} + + +/*! \brief Gets the interrupt handler of the current event at the \a int_lev + * interrupt priority level (called from exception.S). + * + * \param int_lev Interrupt priority level to handle. + * + * \return Interrupt handler to execute. + * + * \note Taken and adapted from Newlib. + */ +__int_handler _get_interrupt_handler(unsigned int int_lev) +{ + // ICR3 is mapped first, ICR0 last. + // Code in exception.S puts int_lev in R12 which is used by AVR32-GCC to pass + // a single argument to a function. + unsigned int int_grp = (&AVR32_INTC.icr3)[INT3 - int_lev]; + unsigned int int_req = AVR32_INTC.irr[int_grp]; + + // As an interrupt may disappear while it is being fetched by the CPU + // (spurious interrupt caused by a delayed response from an MCU peripheral to + // an interrupt flag clear or interrupt disable instruction), check if there + // are remaining interrupt lines to process. + // If a spurious interrupt occurs, the status register (SR) contains an + // execution mode and interrupt level masks corresponding to a level 0 + // interrupt, whatever the interrupt priority level causing the spurious + // event. This behavior has been chosen because a spurious interrupt has not + // to be a priority one and because it may not cause any trouble to other + // interrupts. + // However, these spurious interrupts place the hardware in an unstable state + // and could give problems in other/future versions of the CPU, so the + // software has to be written so that they never occur. The only safe way of + // achieving this is to always clear or disable peripheral interrupts with the + // following sequence: + // 1: Mask the interrupt in the CPU by setting GM (or IxM) in SR. + // 2: Perform the bus access to the peripheral register that clears or + // disables the interrupt. + // 3: Wait until the interrupt has actually been cleared or disabled by the + // peripheral. This is usually performed by reading from a register in the + // same peripheral (it DOES NOT have to be the same register that was + // accessed in step 2, but it MUST be in the same peripheral), what takes + // bus system latencies into account, but peripheral internal latencies + // (generally 0 cycle) also have to be considered. + // 4: Unmask the interrupt in the CPU by clearing GM (or IxM) in SR. + // Note that steps 1 and 4 are useless inside interrupt handlers as the + // corresponding interrupt level is automatically masked by IxM (unless IxM is + // explicitly cleared by the software). + // + // Get the right IRQ handler. + // + // If several interrupt lines are active in the group, the interrupt line with + // the highest number is selected. This is to be coherent with the + // prioritization of interrupt groups performed by the hardware interrupt + // controller. + // + // If no handler has been registered for the pending interrupt, + // _unhandled_interrupt will be selected thanks to the initialization of + // _int_line_handler_table_x by INTC_init_interrupts. + // + // exception.S will provide the interrupt handler with a clean interrupt stack + // frame, with nothing more pushed onto the stack. The interrupt handler must + // manage the `rete' instruction, what can be done thanks to pure assembly, + // inline assembly or the `__attribute__((__interrupt__))' C function + // attribute. + return (int_req) ? _int_handler_table[int_grp]._int_line_handler_table[32 - clz(int_req) - 1] : NULL; +} + + +void INTC_init_interrupts(void) +{ + unsigned int int_grp, int_req; + + // For all interrupt groups, + for (int_grp = 0; int_grp < AVR32_INTC_NUM_INT_GRPS; int_grp++) + { + // For all interrupt request lines of each group, + for (int_req = 0; int_req < _int_handler_table[int_grp].num_irqs; int_req++) + { + // Assign _unhandled_interrupt as default interrupt handler. + _int_handler_table[int_grp]._int_line_handler_table[int_req] = &_unhandled_interrupt; + } + + // Set the interrupt group priority register to its default value. + // By default, all interrupt groups are linked to the interrupt priority + // level 0 and to the interrupt vector _int0. + AVR32_INTC.ipr[int_grp] = ipr_val[INT0]; + } +} + + +void INTC_register_interrupt(__int_handler handler, unsigned int irq, unsigned int int_lev) +{ + unsigned int int_grp = irq / AVR32_INTC_MAX_NUM_IRQS_PER_GRP; + + // Store in _int_line_handler_table_x the pointer to the interrupt handler, so + // that _get_interrupt_handler can retrieve it when the interrupt is vectored. + _int_handler_table[int_grp]._int_line_handler_table[irq % AVR32_INTC_MAX_NUM_IRQS_PER_GRP] = handler; + + // Program the corresponding IPRX register to set the interrupt priority level + // and the interrupt vector offset that will be fetched by the core interrupt + // system. + // NOTE: The _intx functions are intermediate assembly functions between the + // core interrupt system and the user interrupt handler. + AVR32_INTC.ipr[int_grp] = ipr_val[int_lev & (AVR32_INTC_IPR0_INTLEV_MASK >> AVR32_INTC_IPR0_INTLEV_OFFSET)]; +} diff --git a/Demo/AVR32_UC3/DRIVERS/INTC/intc.h b/Demo/AVR32_UC3/DRIVERS/INTC/intc.h new file mode 100644 index 000000000..0772d9068 --- /dev/null +++ b/Demo/AVR32_UC3/DRIVERS/INTC/intc.h @@ -0,0 +1,104 @@ +/*This file is prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief INTC driver for AVR32 UC3. + * + * AVR32 Interrupt Controller driver module. + * + * - Compiler: IAR EWAVR32 and GNU GCC for AVR32 + * - Supported devices: All AVR32 devices with an INTC module can be used. + * - AppNote: + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support email: avr32@atmel.com + * + ******************************************************************************/ + +/* Copyright (c) 2007, Atmel Corporation All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of ATMEL may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND + * SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + + +#ifndef _INTC_H_ +#define _INTC_H_ + +#include "compiler.h" + + +//! Maximal number of interrupt request lines per group. +#define AVR32_INTC_MAX_NUM_IRQS_PER_GRP 32 + +//! Number of interrupt priority levels. +#define AVR32_INTC_NUM_INT_LEVELS (1 << AVR32_INTC_IPR0_INTLEV_SIZE) + +/*! \name Interrupt Priority Levels + */ +//! @{ +#define INT0 0 //!< Lowest interrupt priority level. +#define INT1 1 +#define INT2 2 +#define INT3 3 //!< Highest interrupt priority level. +//! @} + + +#ifdef __AVR32_ABI_COMPILER__ // Automatically defined when compiling for AVR32, not when assembling. + +//! Pointer to interrupt handler. +#if __GNUC__ +typedef void (*__int_handler)(void); +#elif __ICCAVR32__ +typedef void (__interrupt *__int_handler)(void); +#endif + + +/*! \brief Initializes the hardware interrupt controller driver. + * + * \note Taken and adapted from Newlib. + */ +extern void INTC_init_interrupts(void); + +/*! \brief Registers an interrupt handler. + * + * \param handler Interrupt handler to register. + * \param irq IRQ of the interrupt handler to register. + * \param int_lev Interrupt priority level to assign to the group of this IRQ. + * + * \warning The interrupt handler must manage the `rete' instruction, what can + * be done thanks to pure assembly, inline assembly or the + * `__attribute__((__interrupt__))' C function attribute. + * + * \warning If several interrupt handlers of a same group are registered with + * different priority levels, only the latest priority level set will + * be effective. + * + * \note Taken and adapted from Newlib. + */ +extern void INTC_register_interrupt(__int_handler handler, unsigned int irq, unsigned int int_lev); + +#endif // __AVR32_ABI_COMPILER__ + + +#endif // _INTC_H_ diff --git a/Demo/AVR32_UC3/DRIVERS/PM/pm.c b/Demo/AVR32_UC3/DRIVERS/PM/pm.c new file mode 100644 index 000000000..671c3e22c --- /dev/null +++ b/Demo/AVR32_UC3/DRIVERS/PM/pm.c @@ -0,0 +1,608 @@ +/*This file has been prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief Power Manager driver. + * + * + * - Compiler: IAR EWAVR32 and GNU GCC for AVR32 + * - Supported devices: All AVR32 devices. + * - AppNote: + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support email: avr32@atmel.com + * + *****************************************************************************/ + +/* Copyright (c) 2007, Atmel Corporation All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of ATMEL may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND + * SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + + +#include "pm.h" + + +void pm_enable_osc0_ext_clock(volatile avr32_pm_t *pm) +{ + union { + unsigned long oscctrl0; + avr32_pm_oscctrl0_t OSCCTRL0; + } oscctrl0 ; + // Read + oscctrl0.oscctrl0 = pm->oscctrl0; + // Modify + oscctrl0.OSCCTRL0.mode = AVR32_PM_OSCCTRL0_MODE_EXT_CLOCK; + // Write + pm->oscctrl0 = oscctrl0.oscctrl0; +} + + +void pm_enable_osc0_crystal(volatile avr32_pm_t *pm, unsigned int fosc0) +{ + union { + unsigned long oscctrl0; + avr32_pm_oscctrl0_t OSCCTRL0; + } oscctrl0 ; + // Read + oscctrl0.oscctrl0 = pm->oscctrl0; + // Modify + oscctrl0.OSCCTRL0.mode = (fosc0 < 8000000) ? AVR32_PM_OSCCTRL0_MODE_CRYSTAL_G2 : + AVR32_PM_OSCCTRL0_MODE_CRYSTAL_G3; + // Write + pm->oscctrl0 = oscctrl0.oscctrl0; +} + + +void pm_enable_clk0(volatile avr32_pm_t *pm, unsigned int startup) +{ + union { + avr32_pm_mcctrl_t MCCTRL; + unsigned long mcctrl; + } mcctrl; + union { + unsigned long oscctrl0; + avr32_pm_oscctrl0_t OSCCTRL0; + } oscctrl0 ; + + // Read register + mcctrl.mcctrl = pm->mcctrl; + oscctrl0.oscctrl0 = pm->oscctrl0; + // Modify + mcctrl.MCCTRL.osc0en = 1; + oscctrl0.OSCCTRL0.startup = startup; + // Write back + pm->oscctrl0 = oscctrl0.oscctrl0; + pm->mcctrl = mcctrl.mcctrl; + + while(!pm->ISR.osc0rdy); //For osc output valid +} + + +void pm_disable_clk0(volatile avr32_pm_t *pm) +{ + union { + avr32_pm_mcctrl_t MCCTRL; + unsigned long mcctrl; + } mcctrl; + + // Read register + mcctrl.mcctrl = pm->mcctrl; + + // Modify + mcctrl.MCCTRL.osc0en = 0; + + // Write back + pm->mcctrl = mcctrl.mcctrl; +} + + +void pm_enable_clk0_no_wait(volatile avr32_pm_t *pm, unsigned int startup) +{ + union { + avr32_pm_mcctrl_t MCCTRL; + unsigned long mcctrl; + } mcctrl; + union { + unsigned long oscctrl0; + avr32_pm_oscctrl0_t OSCCTRL0; + } oscctrl0 ; + + // Read register + mcctrl.mcctrl = pm->mcctrl; + oscctrl0.oscctrl0 = pm->oscctrl0; + // Modify + mcctrl.MCCTRL.osc0en = 1; + oscctrl0.OSCCTRL0.startup=startup; + // Write back + pm->mcctrl = mcctrl.mcctrl; + pm->oscctrl0 = oscctrl0.oscctrl0; +} + + +void pm_wait_for_clk0_ready(volatile avr32_pm_t *pm) +{ + while(!pm->ISR.osc0rdy); +} + + +void pm_enable_osc1_ext_clock(volatile avr32_pm_t *pm) +{ + union { + unsigned long oscctrl1; + avr32_pm_oscctrl1_t OSCCTRL1; + } oscctrl1 ; + // Read + oscctrl1.oscctrl1= pm->oscctrl1; + // Modify + oscctrl1.OSCCTRL1.mode = AVR32_PM_OSCCTRL1_MODE_EXT_CLOCK; + // Write + pm->oscctrl1 = oscctrl1.oscctrl1; +} + + +void pm_enable_osc1_crystal(volatile avr32_pm_t *pm, unsigned int fosc1) +{ + union { + unsigned long oscctrl1; + avr32_pm_oscctrl1_t OSCCTRL1; + } oscctrl1 ; + // Read + oscctrl1.oscctrl1= pm->oscctrl1; + // Modify + oscctrl1.OSCCTRL1.mode = (fosc1 < 8000000) ? AVR32_PM_OSCCTRL1_MODE_CRYSTAL_G2 : + AVR32_PM_OSCCTRL1_MODE_CRYSTAL_G3; + // Write + pm->oscctrl1 = oscctrl1.oscctrl1; +} + + +void pm_enable_clk1(volatile avr32_pm_t *pm, unsigned int startup) +{ + union { + avr32_pm_mcctrl_t MCCTRL; + unsigned long mcctrl; + } mcctrl; + union { + unsigned long oscctrl1; + avr32_pm_oscctrl1_t OSCCTRL1; + } oscctrl1 ; + + // Read register + mcctrl.mcctrl = pm->mcctrl; + oscctrl1.oscctrl1 = pm->oscctrl1; + + mcctrl.MCCTRL.osc1en = 1; + oscctrl1.OSCCTRL1.startup=startup; + // Write back + pm->oscctrl1 = oscctrl1.oscctrl1; + pm->mcctrl = mcctrl.mcctrl; + + while(!pm->ISR.osc1rdy); +} + + +void pm_disable_clk1(volatile avr32_pm_t *pm) +{ + union { + avr32_pm_mcctrl_t MCCTRL; + unsigned long mcctrl; + } mcctrl; + + + // Read register + mcctrl.mcctrl = pm->mcctrl; + + // Modify + mcctrl.MCCTRL.osc1en = 0; + + // Write back + pm->mcctrl = mcctrl.mcctrl; +} + + +void pm_enable_clk1_no_wait(volatile avr32_pm_t *pm, unsigned int startup) +{ + union { + avr32_pm_mcctrl_t MCCTRL; + unsigned long mcctrl; + } mcctrl; + union { + unsigned long oscctrl1; + avr32_pm_oscctrl1_t OSCCTRL1; + } oscctrl1 ; + + // Read register + mcctrl.mcctrl = pm->mcctrl; + oscctrl1.oscctrl1 = pm->oscctrl1; + + mcctrl.MCCTRL.osc1en = 1; + oscctrl1.OSCCTRL1.startup=startup; + // Write back + pm->oscctrl1 = oscctrl1.oscctrl1; + pm->mcctrl = mcctrl.mcctrl; +} + + +void pm_wait_for_clk1_ready(volatile avr32_pm_t *pm) +{ + while(!pm->ISR.osc1rdy); +} + + +void pm_enable_osc32_ext_clock(volatile avr32_pm_t *pm) +{ + union { + unsigned long oscctrl32; + avr32_pm_oscctrl32_t OSCCTRL32; + } u_ctrl; + u_ctrl.oscctrl32 = pm->oscctrl32; + u_ctrl.OSCCTRL32.mode = AVR32_PM_OSCCTRL32_MODE_EXT_CLOCK; + pm->oscctrl32 = u_ctrl.oscctrl32; +} + + +void pm_enable_osc32_crystal(volatile avr32_pm_t *pm) +{ + union { + unsigned long oscctrl32; + avr32_pm_oscctrl32_t OSCCTRL32; + } u_ctrl; + u_ctrl.oscctrl32 = pm->oscctrl32; + u_ctrl.OSCCTRL32.mode = AVR32_PM_OSCCTRL32_MODE_CRYSTAL; + pm->oscctrl32 = u_ctrl.oscctrl32; +} + + +void pm_enable_clk32(volatile avr32_pm_t *pm, unsigned int startup) +{ + union { + unsigned long oscctrl32; + avr32_pm_oscctrl32_t OSCCTRL32; + } oscctrl32 ; + + // Read register + oscctrl32.oscctrl32 = pm->oscctrl32; + // Modify + oscctrl32.OSCCTRL32.osc32en = 1; + oscctrl32.OSCCTRL32.startup=startup; + // Write back + pm->oscctrl32 = oscctrl32.oscctrl32; + + while(!pm->ISR.osc32rdy); +} + + +void pm_disable_clk32(volatile avr32_pm_t *pm) +{ + // To get rid of a GCC bug + // This makes C code longer, but not ASM + union { + unsigned long oscctrl32; + avr32_pm_oscctrl32_t OSCCTRL32; + } oscctrl32 ; + + // Read register + oscctrl32.oscctrl32 = pm->oscctrl32; + // Modify + oscctrl32.OSCCTRL32.osc32en = 0; + // Write back + pm->oscctrl32 = oscctrl32.oscctrl32; +} + + +void pm_enable_clk32_no_wait(volatile avr32_pm_t *pm, unsigned int startup) +{ + union { + unsigned long oscctrl32; + avr32_pm_oscctrl32_t OSCCTRL32; + } oscctrl32 ; + + // Read register + oscctrl32.oscctrl32 = pm->oscctrl32; + // Modify + oscctrl32.OSCCTRL32.osc32en = 1; + oscctrl32.OSCCTRL32.startup=startup; + // Write back + pm->oscctrl32 = oscctrl32.oscctrl32; +} + + +void pm_wait_for_clk32_ready(volatile avr32_pm_t *pm) +{ + // To get rid of a GCC bug + // This makes C code longer, but not ASM + + while(!pm->ISR.osc32rdy); +} + + +void pm_cksel(volatile avr32_pm_t *pm, + unsigned int pbadiv, + unsigned int pbasel, + unsigned int pbbdiv, + unsigned int pbbsel, + unsigned int hsbdiv, + unsigned int hsbsel) +{ + // Force the compiler to generate only one 32 bits access + union { + avr32_pm_cksel_t selval ; + unsigned long uword32; + } cksel; + + cksel.uword32 = 0; + + cksel.selval.cpudiv = hsbdiv; + cksel.selval.cpusel = hsbsel; + cksel.selval.hsbdiv = hsbdiv; + cksel.selval.hsbsel = hsbsel; + cksel.selval.pbbdiv = pbbdiv; + cksel.selval.pbbsel = pbbsel; + cksel.selval.pbadiv = pbadiv; + cksel.selval.pbasel = pbasel; + + pm->cksel = cksel.uword32; + + // Wait for ckrdy bit and then clear it + while(!(pm->ISR.ckrdy)); + + return; +} + + +void pm_gc_setup(volatile avr32_pm_t *pm, + unsigned int gc, + unsigned int osc_or_pll, // Use Osc (=0) or PLL (=1) + unsigned int pll_osc, // Sel Osc0/PLL0 or Osc1/PLL1 + unsigned int diven, + unsigned int div) { + union { + unsigned long gcctrl; + avr32_pm_gcctrl_t GCCTRL; + } u_gc; + + u_gc.GCCTRL.oscsel = pll_osc; + u_gc.GCCTRL.pllsel = osc_or_pll; + u_gc.GCCTRL.diven = diven; + u_gc.GCCTRL.div = div; + u_gc.GCCTRL.cen = 0; // Disable GC first + pm->gcctrl[gc] = u_gc.gcctrl; +} + + +void pm_gc_enable(volatile avr32_pm_t *pm, + unsigned int gc) { + union { + unsigned long gcctrl; + avr32_pm_gcctrl_t GCCTRL; + } u_gc; + u_gc.gcctrl = pm->gcctrl[gc]; + u_gc.GCCTRL.cen = 1; + pm->gcctrl[gc] = u_gc.gcctrl; +} + + +void pm_gc_disable(volatile avr32_pm_t *pm, + unsigned int gc) { + union { + unsigned long gcctrl; + avr32_pm_gcctrl_t GCCTRL; + } u_gc; + u_gc.gcctrl = pm->gcctrl[gc]; + u_gc.GCCTRL.cen = 0; + pm->gcctrl[gc] = u_gc.gcctrl; +} + + +void pm_pll_setup(volatile avr32_pm_t *pm, + unsigned int pll, + unsigned int mul, + unsigned int div, + unsigned int osc, + unsigned int lockcount) { + + union { + unsigned long pll ; + avr32_pm_pll_t PLL ; + } u_pll; + + u_pll.pll=0; + + u_pll.PLL.pllmul = mul; + u_pll.PLL.plldiv = div; + u_pll.PLL.pllosc = osc; + u_pll.PLL.pllcount = lockcount; + + u_pll.PLL.pllopt = 0; + + u_pll.PLL.plltest = 0; + + (pm->pll)[pll] = u_pll.pll; +} + + +void pm_pll_set_option(volatile avr32_pm_t *pm, + unsigned int pll, + unsigned int pll_freq, + unsigned int pll_div2, + unsigned int pll_wbwdisable) { + union { + unsigned long pll ; + avr32_pm_pll_t PLL ; + } u_pll; + + u_pll.pll = (pm->pll)[pll]; + u_pll.PLL.pllopt = pll_freq | (pll_div2<<1) | (pll_wbwdisable<<2); + (pm->pll)[pll] = u_pll.pll; +} + + +unsigned int pm_pll_get_option(volatile avr32_pm_t *pm, + unsigned int pll) { + return (pm->PLL)[pll].pllopt; +} + + +void pm_pll_enable(volatile avr32_pm_t *pm, + unsigned int pll) { + union { + unsigned long pll ; + avr32_pm_pll_t PLL ; + } u_pll; + + u_pll.pll = (pm->pll)[pll]; + u_pll.PLL.pllen = 1; + (pm->pll)[pll] = u_pll.pll; +} + + +void pm_pll_disable(volatile avr32_pm_t *pm, + unsigned int pll) { + union { + unsigned long pll ; + avr32_pm_pll_t PLL ; + } u_pll; + + u_pll.pll = (pm->pll)[pll]; + u_pll.PLL.pllen = 0; + (pm->pll)[pll] = u_pll.pll; +} + + +void pm_wait_for_pll0_locked(volatile avr32_pm_t *pm) +{ + while(!pm->ISR.lock0); + + // Bypass the lock signal of the PLL + pm->pll[0] |= AVR32_PM_PLL0_PLLBPL_MASK; +} + + +void pm_wait_for_pll1_locked(volatile avr32_pm_t *pm) +{ + while(!pm->ISR.lock1); + + // Bypass the lock signal of the PLL + pm->pll[1] |= AVR32_PM_PLL1_PLLBPL_MASK; +} + + +void pm_switch_to_clock(volatile avr32_pm_t *pm, unsigned long clock) +{ + union { + avr32_pm_mcctrl_t MCCTRL; + unsigned long mcctrl; + } mcctrl; + // Read + mcctrl.mcctrl = pm->mcctrl; + // Modify + mcctrl.MCCTRL.mcsel = clock; + // Write Back + pm->MCCTRL.mcsel = mcctrl.mcctrl; +} + + +void pm_switch_to_osc0(volatile avr32_pm_t *pm, unsigned int fosc0, unsigned int startup) +{ + pm_enable_osc0_crystal(pm, fosc0); // Enable the Osc0 in crystal mode + pm_enable_clk0(pm, startup); // Crystal startup time - This parameter is critical and depends on the characteristics of the crystal + pm_switch_to_clock(pm, AVR32_PM_MCSEL_OSC0); // Then switch main clock to Osc0 +} + + +void pm_bod_enable_irq(volatile struct avr32_pm_t *pm) { + + union { + unsigned long ier ; + avr32_pm_ier_t IER ; + } u_ier; + u_ier.ier = 0; + u_ier.IER.boddet = 1; + + pm->ier = u_ier.ier; +} + + +void pm_bod_disable_irq(volatile struct avr32_pm_t *pm) { + + union { + unsigned long idr ; + avr32_pm_idr_t IDR ; + } u_idr; + u_idr.idr = 0; + u_idr.IDR.boddet = 1; + + pm->idr = u_idr.idr; +} + + +void pm_bod_clear_irq(volatile struct avr32_pm_t *pm) { + + union { + unsigned long icr ; + avr32_pm_idr_t ICR ; + } u_icr; + u_icr.icr = 0; + u_icr.ICR.boddet = 1; + + pm->icr = u_icr.icr; +} + + +unsigned long pm_bod_get_irq_status(volatile struct avr32_pm_t *pm) { + + return pm->ISR.boddet; +} + + +unsigned long pm_bod_get_irq_enable_bit(volatile struct avr32_pm_t *pm) { + + return pm->IMR.boddet; +} + + +unsigned long pm_bod_get_level(volatile avr32_pm_t *pm) { + union { + unsigned long bod ; + avr32_pm_bod_t BOD ; + } u_bod; + + u_bod.bod = pm->bod; + + return (unsigned long) u_bod.BOD.level; + +} + + +void pm_write_gplp(volatile avr32_pm_t *pm,unsigned long gplp, unsigned long value) { + (pm->gplp)[gplp] = value; + +} + + +unsigned long pm_read_gplp(volatile avr32_pm_t *pm,unsigned long gplp) { + + return (pm->gplp)[gplp]; +} diff --git a/Demo/AVR32_UC3/DRIVERS/PM/pm.h b/Demo/AVR32_UC3/DRIVERS/PM/pm.h new file mode 100644 index 000000000..5a3e6898a --- /dev/null +++ b/Demo/AVR32_UC3/DRIVERS/PM/pm.h @@ -0,0 +1,331 @@ +/*This file has been prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief Power Manager driver. + * + * + * - Compiler: IAR EWAVR32 and GNU GCC for AVR32 + * - Supported devices: All AVR32 devices. + * - AppNote: + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support email: avr32@atmel.com + * + *****************************************************************************/ + +/* Copyright (c) 2007, Atmel Corporation All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of ATMEL may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND + * SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + + +#ifndef _PM_H_ +#define _PM_H_ + +#if __GNUC__ +# include +#elif __ICCAVR32__ +# include +# include +#else +# error Unknown compiler +#endif + +#include "compiler.h" +#include "preprocessor.h" + + +/*! \brief Sets the MCU in the specified sleep mode. + * + * \param mode Sleep mode: + * \arg \c AVR32_PM_SMODE_IDLE: Idle; + * \arg \c AVR32_PM_SMODE_FROZEN: Frozen; + * \arg \c AVR32_PM_SMODE_STANDBY: Standby; + * \arg \c AVR32_PM_SMODE_STOP: Stop; + * \arg \c AVR32_PM_SMODE_SHUTDOWN: Shutdown (DeepStop); + * \arg \c AVR32_PM_SMODE_STATIC: Static. + */ +#define SLEEP(mode) {__asm__ __volatile__ ("sleep "STRINGZ(mode));} + + +/*! + * \brief This function will enable the external clock mode of the oscillator 0. + * \param pm Base address of the Power Manager (i.e. &AVR32_PM) + */ +extern void pm_enable_osc0_ext_clock(volatile avr32_pm_t *pm); + + +/*! + * \brief This function will enable the crystal mode of the oscillator 0. + * \param pm Base address of the Power Manager (i.e. &AVR32_PM) + * \param fosc0 Oscillator 0 crystal frequency (Hz) + */ +extern void pm_enable_osc0_crystal(volatile avr32_pm_t *pm, unsigned int fosc0); + + +/*! + * \brief This function will enable the oscillator 0 to be used with a startup time. + * \param pm Base address of the Power Manager (i.e. &AVR32_PM) + * \param startup Clock 0 startup time. Time is expressed in term of RCOsc periods (3-bit value) + */ +extern void pm_enable_clk0(volatile avr32_pm_t *pm, unsigned int startup); + + +/*! + * \brief This function will disable the oscillator 0. + * \param pm Base address of the Power Manager (i.e. &AVR32_PM) + */ +extern void pm_disable_clk0(volatile avr32_pm_t *pm); + + +/*! + * \brief This function will enable the oscillator 0 to be used with no startup time. + * \param pm Base address of the Power Manager (i.e. &AVR32_PM) + * \param startup Clock 0 startup time. Time is expressed in term of RCOsc periods (3-bit value) but not checked. + */ +extern void pm_enable_clk0_no_wait(volatile avr32_pm_t *pm, unsigned int startup); + + +/*! + * \brief This function will wait until the Osc0 clock is ready. + * \param pm Base address of the Power Manager (i.e. &AVR32_PM) + */ +extern void pm_wait_for_clk0_ready(volatile avr32_pm_t *pm); + + +/*! + * \brief This function will enable the external clock mode of the oscillator 1. + * \param pm Base address of the Power Manager (i.e. &AVR32_PM) + */ +extern void pm_enable_osc1_ext_clock(volatile avr32_pm_t *pm); + + +/*! + * \brief This function will enable the crystal mode of the oscillator 1. + * \param pm Base address of the Power Manager (i.e. &AVR32_PM) + * \param fosc1 Oscillator 1 crystal frequency (Hz) + */ +extern void pm_enable_osc1_crystal(volatile avr32_pm_t *pm, unsigned int fosc1); + + +/*! + * \brief This function will enable the oscillator 1 to be used with a startup time. + * \param pm Base address of the Power Manager (i.e. &AVR32_PM) + * \param startup Clock 1 startup time. Time is expressed in term of RCOsc periods (3-bit value) + */ +extern void pm_enable_clk1(volatile avr32_pm_t *pm, unsigned int startup); + + +/*! + * \brief This function will disable the oscillator 1. + * \param pm Base address of the Power Manager (i.e. &AVR32_PM) + */ +extern void pm_disable_clk1(volatile avr32_pm_t *pm); + + +/*! + * \brief This function will enable the oscillator 1 to be used with no startup time. + * \param pm Base address of the Power Manager (i.e. &AVR32_PM) + * \param startup Clock 1 startup time. Time is expressed in term of RCOsc periods (3-bit value) but not checked. + */ +extern void pm_enable_clk1_no_wait(volatile avr32_pm_t *pm, unsigned int startup); + + +/*! + * \brief This function will wait until the Osc1 clock is ready. + * \param pm Base address of the Power Manager (i.e. &AVR32_PM) + */ +extern void pm_wait_for_clk1_ready(volatile avr32_pm_t *pm); + + +/*! + * \brief This function will enable the external clock mode of the 32-kHz oscillator. + * \param pm Base address of the Power Manager (i.e. &AVR32_PM) + */ +extern void pm_enable_osc32_ext_clock(volatile avr32_pm_t *pm); + + +/*! + * \brief This function will enable the crystal mode of the 32-kHz oscillator. + * \param pm Base address of the Power Manager (i.e. &AVR32_PM) + */ +extern void pm_enable_osc32_crystal(volatile avr32_pm_t *pm); + + +/*! + * \brief This function will enable the oscillator 32 to be used with a startup time. + * \param pm Base address of the Power Manager (i.e. &AVR32_PM) + * \param startup Clock 32 kHz startup time. Time is expressed in term of RCOsc periods (3-bit value) + */ +extern void pm_enable_clk32(volatile avr32_pm_t *pm, unsigned int startup); + + +/*! + * \brief This function will disable the oscillator 32. + * \param pm Base address of the Power Manager (i.e. &AVR32_PM) + */ +extern void pm_disable_clk32(volatile avr32_pm_t *pm); + + +/*! + * \brief This function will enable the oscillator 32 to be used with no startup time. + * \param pm Base address of the Power Manager (i.e. &AVR32_PM) + * \param startup Clock 32 kHz startup time. Time is expressed in term of RCOsc periods (3-bit value) but not checked. + */ +extern void pm_enable_clk32_no_wait(volatile avr32_pm_t *pm, unsigned int startup); + + +/*! + * \brief This function will wait until the osc32 clock is ready. + * \param pm Base address of the Power Manager (i.e. &AVR32_PM) + */ +extern void pm_wait_for_clk32_ready(volatile avr32_pm_t *pm); + + +//FIXME update this header -SM +/*! + * \brief This function will select all the power manager clocks. + * \param pm Base address of the Power Manager (i.e. &AVR32_PM) + * \param pbadiv Peripheral Bus A clock divisor enable + * \param pbasel Peripheral Bus A select + * \param pbbdiv Peripheral Bus B clock divisor enable + * \param pbbsel Peripheral Bus B select + * \param hsbdiv High Speed Bus clock divisor enable (CPU clock = HSB clock) + * \param hsbsel High Speed Bus select (CPU clock = HSB clock ) + */ +extern void pm_cksel(volatile avr32_pm_t *pm, unsigned int pbadiv, unsigned int pbasel, unsigned int pbbdiv, unsigned int pbbsel, unsigned int hsbdiv, unsigned int hsbsel); + + +/*! + * \brief This function will setup a generic clock. + * \param pm Base address of the Power Manager (i.e. &AVR32_PM) + * \param gc generic clock number (0 for gc0...) + * \param osc_or_pll Use OSC (=0) or PLL (=1) + * \param pll_osc Select Osc0/PLL0 or Osc1/PLL1 + * \param diven Generic clock divisor enable + * \param div Generic clock divisor + */ +extern void pm_gc_setup(volatile avr32_pm_t *pm, unsigned int gc, unsigned int osc_or_pll, unsigned int pll_osc, unsigned int diven, unsigned int div); + + +/*! + * \brief This function will enable a generic clock. + * \param pm Base address of the Power Manager (i.e. &AVR32_PM) + * \param gc generic clock number (0 for gc0...) + */ +extern void pm_gc_enable(volatile avr32_pm_t *pm, unsigned int gc); + + +/*! + * \brief This function will disable a generic clock. + * \param pm Base address of the Power Manager (i.e. &AVR32_PM) + * \param gc generic clock number (0 for gc0...) + */ +extern void pm_gc_disable(volatile avr32_pm_t *pm, unsigned int gc); + + +//FIXME update this header -SM +/*! + * \brief This function will setup a PLL. + * \param pm Base address of the Power Manager (i.e. &AVR32_PM) + * \param pll PLL number(0 for PLL0, 1 for PLL1) + * \param mul + * \param div + * \param osc + * \param lockcount + */ +extern void pm_pll_setup(volatile avr32_pm_t *pm, unsigned int pll, unsigned int mul, unsigned int div, unsigned int osc, unsigned int lockcount); + + +//FIXME update this header -SM +/*! + * \brief This function will set a PLL option. + * \param pm Base address of the Power Manager (i.e. &AVR32_PM) + * \param pll PLL number(0 for PLL0, 1 for PLL1) + * \param pll_freq Set to 1 for VCO frequency range 80-180MHz, set to 0 for VCO frequency range 160-240Mhz. + * \param pll_div2 Divide the PLL output frequency by 2 (this settings does not change the FVCO value) + * \param pll_wbwdisable 1 Disable the Wide-Bandith Mode (Wide-Bandwith mode allow a faster startup time and out-of-lock time). 0 to enable the Wide-Bandith Mode. + */ +extern void pm_pll_set_option(volatile avr32_pm_t *pm, unsigned int pll, unsigned int pll_freq, unsigned int pll_div2, unsigned int pll_wbwdisable); + + +//FIXME update this header -SM +/*! + * \brief This function will get a PLL option. + * \param pm Base address of the Power Manager (i.e. &AVR32_PM) + * \param pll PLL number(0 for PLL0, 1 for PLL1) + * \return Option + */ +extern unsigned int pm_pll_get_option(volatile avr32_pm_t *pm, unsigned int pll); + + +/*! + * \brief This function will enable a PLL. + * \param pm Base address of the Power Manager (i.e. &AVR32_PM) + * \param pll PLL number(0 for PLL0, 1 for PLL1) + */ +extern void pm_pll_enable(volatile avr32_pm_t *pm, unsigned int pll); + + +/*! + * \brief This function will disable a PLL. + * \param pm Base address of the Power Manager (i.e. &AVR32_PM) + * \param pll PLL number(0 for PLL0, 1 for PLL1) + */ +extern void pm_pll_disable(volatile avr32_pm_t *pm, unsigned int pll); + + +/*! + * \brief This function will wait for PLL0 locked + * \param pm Base address of the Power Manager (i.e. &AVR32_PM) + */ +extern void pm_wait_for_pll0_locked(volatile avr32_pm_t *pm); + + +/*! + * \brief This function will wait for PLL1 locked + * \param pm Base address of the Power Manager (i.e. &AVR32_PM) + */ +extern void pm_wait_for_pll1_locked(volatile avr32_pm_t *pm); + + +/*! + * \brief This function will switch the power manager main clock. + * \param pm Base address of the Power Manager (i.e. &AVR32_PM) + * \param clock Clock to be switched on. AVR32_PM_MCSEL_SLOW for RCOsc, AVR32_PM_MCSEL_OSC0 for Osc0, AVR32_PM_MCSEL_PLL0 for PLL0. + */ +extern void pm_switch_to_clock(volatile avr32_pm_t *pm, unsigned long clock); + + +/*! + * \brief Switch main clock to clock Osc0 (crystal mode) + * \param pm Base address of the Power Manager (i.e. &AVR32_PM) + * \param fosc0 Oscillator 0 crystal frequency (Hz) + * \param startup Crystal 0 startup time. Time is expressed in term of RCOsc periods (3-bit value) + */ +extern void pm_switch_to_osc0(volatile avr32_pm_t *pm, unsigned int fosc0, unsigned int startup); + + +#endif // _PM_H_ diff --git a/Demo/AVR32_UC3/DRIVERS/TC/tc.c b/Demo/AVR32_UC3/DRIVERS/TC/tc.c new file mode 100644 index 000000000..20dfe4ee5 --- /dev/null +++ b/Demo/AVR32_UC3/DRIVERS/TC/tc.c @@ -0,0 +1,299 @@ +/*This file is prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief TC driver for AVR32 UC3. + * + * AVR32 Timer/Counter driver module. + * + * - Compiler: IAR EWAVR32 and GNU GCC for AVR32 + * - Supported devices: All AVR32 devices with a TC module can be used. + * - AppNote: + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support email: avr32@atmel.com + * + ******************************************************************************/ + +/* Copyright (c) 2007, Atmel Corporation All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of ATMEL may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND + * SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + + +#if __GNUC__ +# include +#elif __ICCAVR32__ +# include +#else +# error Unknown compiler +#endif + +#include "compiler.h" +#include "tc.h" + + +int tc_get_interrupt_settings(volatile avr32_tc_t *tc, unsigned int channel) +{ + // Check for valid input. + if (channel >= TC_NUMBER_OF_CHANNELS) + return TC_INVALID_ARGUMENT; + + return tc->channel[channel].imr; +} + + +int tc_configure_interrupts(volatile avr32_tc_t *tc, unsigned int channel, const tc_interrupt_t *bitfield) +{ + // Check for valid input. + if (channel >= TC_NUMBER_OF_CHANNELS) + return TC_INVALID_ARGUMENT; + + // Enable the appropriate interrupts. + tc->channel[channel].ier = bitfield->etrgs << AVR32_TC_ETRGS_OFFSET | + bitfield->ldrbs << AVR32_TC_LDRBS_OFFSET | + bitfield->ldras << AVR32_TC_LDRAS_OFFSET | + bitfield->cpcs << AVR32_TC_CPCS_OFFSET | + bitfield->cpbs << AVR32_TC_CPBS_OFFSET | + bitfield->cpas << AVR32_TC_CPAS_OFFSET | + bitfield->lovrs << AVR32_TC_LOVRS_OFFSET | + bitfield->covfs << AVR32_TC_COVFS_OFFSET; + + // Disable the appropriate interrupts. + tc->channel[channel].idr = (~bitfield->etrgs & 1) << AVR32_TC_ETRGS_OFFSET | + (~bitfield->ldrbs & 1) << AVR32_TC_LDRBS_OFFSET | + (~bitfield->ldras & 1) << AVR32_TC_LDRAS_OFFSET | + (~bitfield->cpcs & 1) << AVR32_TC_CPCS_OFFSET | + (~bitfield->cpbs & 1) << AVR32_TC_CPBS_OFFSET | + (~bitfield->cpas & 1) << AVR32_TC_CPAS_OFFSET | + (~bitfield->lovrs & 1) << AVR32_TC_LOVRS_OFFSET | + (~bitfield->covfs & 1) << AVR32_TC_COVFS_OFFSET; + + return 0; +} + + +int tc_select_external_clock(volatile avr32_tc_t *tc, unsigned int channel, unsigned int ext_clk_sig_src) +{ + // Check for valid input. + if (channel >= TC_NUMBER_OF_CHANNELS || ext_clk_sig_src >= 1 << AVR32_TC_BMR_TC0XC0S_SIZE) + return TC_INVALID_ARGUMENT; + + // Clear bit-field and set the correct behavior. + tc->bmr = (tc->bmr & ~(AVR32_TC_BMR_TC0XC0S_MASK << (channel * AVR32_TC_BMR_TC0XC0S_SIZE))) | + (ext_clk_sig_src << (channel * AVR32_TC_BMR_TC0XC0S_SIZE)); + + return 0; +} + + +int tc_init_capture(volatile avr32_tc_t *tc, const tc_capture_opt_t *opt) +{ + // Check for valid input. + if (opt->channel >= TC_NUMBER_OF_CHANNELS) + return TC_INVALID_ARGUMENT; + + // MEASURE SIGNALS: Capture operating mode. + tc->channel[opt->channel].cmr = opt->ldrb << AVR32_TC_LDRB_OFFSET | + opt->ldra << AVR32_TC_LDRA_OFFSET | + 0 << AVR32_TC_WAVE_OFFSET | + opt->cpctrg << AVR32_TC_CPCTRG_OFFSET | + opt->abetrg << AVR32_TC_ABETRG_OFFSET | + opt->etrgedg << AVR32_TC_ETRGEDG_OFFSET| + opt->ldbdis << AVR32_TC_LDBDIS_OFFSET | + opt->ldbstop << AVR32_TC_LDBSTOP_OFFSET | + opt->burst << AVR32_TC_BURST_OFFSET | + opt->clki << AVR32_TC_CLKI_OFFSET | + opt->tcclks << AVR32_TC_TCCLKS_OFFSET; + + return 0; +} + + +int tc_init_waveform(volatile avr32_tc_t *tc, const tc_waveform_opt_t *opt) +{ + // Check for valid input. + if (opt->channel >= TC_NUMBER_OF_CHANNELS) + return TC_INVALID_ARGUMENT; + + // GENERATE SIGNALS: Waveform operating mode. + tc->channel[opt->channel].cmr = opt->bswtrg << AVR32_TC_BSWTRG_OFFSET | + opt->beevt << AVR32_TC_BEEVT_OFFSET | + opt->bcpc << AVR32_TC_BCPC_OFFSET | + opt->bcpb << AVR32_TC_BCPB_OFFSET | + opt->aswtrg << AVR32_TC_ASWTRG_OFFSET | + opt->aeevt << AVR32_TC_AEEVT_OFFSET | + opt->acpc << AVR32_TC_ACPC_OFFSET | + opt->acpa << AVR32_TC_ACPA_OFFSET | + 1 << AVR32_TC_WAVE_OFFSET | + opt->wavsel << AVR32_TC_WAVSEL_OFFSET | + opt->enetrg << AVR32_TC_ENETRG_OFFSET | + opt->eevt << AVR32_TC_EEVT_OFFSET | + opt->eevtedg << AVR32_TC_EEVTEDG_OFFSET | + opt->cpcdis << AVR32_TC_CPCDIS_OFFSET | + opt->cpcstop << AVR32_TC_CPCSTOP_OFFSET | + opt->burst << AVR32_TC_BURST_OFFSET | + opt->clki << AVR32_TC_CLKI_OFFSET | + opt->tcclks << AVR32_TC_TCCLKS_OFFSET; + + return 0; +} + + +int tc_start(volatile avr32_tc_t *tc, unsigned int channel) +{ + // Check for valid input. + if (channel >= TC_NUMBER_OF_CHANNELS) + return TC_INVALID_ARGUMENT; + + // Enable, reset and start the selected timer/counter channel. + tc->channel[channel].ccr = AVR32_TC_SWTRG_MASK | AVR32_TC_CLKEN_MASK; + + return 0; +} + + +int tc_stop(volatile avr32_tc_t *tc, unsigned int channel) +{ + // Check for valid input. + if (channel >= TC_NUMBER_OF_CHANNELS) + return TC_INVALID_ARGUMENT; + + // Disable the selected timer/counter channel. + tc->channel[channel].ccr = AVR32_TC_CLKDIS_MASK; + + return 0; +} + + +int tc_software_trigger(volatile avr32_tc_t *tc, unsigned int channel) +{ + // Check for valid input. + if (channel >= TC_NUMBER_OF_CHANNELS) + return TC_INVALID_ARGUMENT; + + // Reset the selected timer/counter channel. + tc->channel[channel].ccr = AVR32_TC_SWTRG_MASK; + + return 0; +} + + +void tc_sync_trigger(volatile avr32_tc_t *tc) +{ + // Reset all channels of the selected timer/counter. + tc->bcr = AVR32_TC_BCR_SYNC_MASK; +} + + +int tc_read_sr(volatile avr32_tc_t *tc, unsigned int channel) +{ + // Check for valid input. + if (channel >= TC_NUMBER_OF_CHANNELS) + return TC_INVALID_ARGUMENT; + + return tc->channel[channel].sr; +} + + +int tc_read_tc(volatile avr32_tc_t *tc, unsigned int channel) +{ + // Check for valid input. + if (channel >= TC_NUMBER_OF_CHANNELS) + return TC_INVALID_ARGUMENT; + + return Rd_bitfield(tc->channel[channel].cv, AVR32_TC_CV_MASK); +} + + +int tc_read_ra(volatile avr32_tc_t *tc, unsigned int channel) +{ + // Check for valid input. + if (channel >= TC_NUMBER_OF_CHANNELS) + return TC_INVALID_ARGUMENT; + + return Rd_bitfield(tc->channel[channel].ra, AVR32_TC_RA_MASK); +} + + +int tc_read_rb(volatile avr32_tc_t *tc, unsigned int channel) +{ + // Check for valid input. + if (channel >= TC_NUMBER_OF_CHANNELS) + return TC_INVALID_ARGUMENT; + + return Rd_bitfield(tc->channel[channel].rb, AVR32_TC_RB_MASK); +} + + +int tc_read_rc(volatile avr32_tc_t *tc, unsigned int channel) +{ + // Check for valid input. + if (channel >= TC_NUMBER_OF_CHANNELS) + return TC_INVALID_ARGUMENT; + + return Rd_bitfield(tc->channel[channel].rc, AVR32_TC_RC_MASK); +} + + +int tc_write_ra(volatile avr32_tc_t *tc, unsigned int channel, unsigned short value) +{ + // Check for valid input. + if (channel >= TC_NUMBER_OF_CHANNELS) + return TC_INVALID_ARGUMENT; + + // This function is only available in WAVEFORM mode. + if (Tst_bits(tc->channel[channel].cmr, AVR32_TC_WAVE_MASK)) + Wr_bitfield(tc->channel[channel].ra, AVR32_TC_RA_MASK, value); + + return value; +} + + +int tc_write_rb(volatile avr32_tc_t *tc, unsigned int channel, unsigned short value) +{ + // Check for valid input. + if (channel >= TC_NUMBER_OF_CHANNELS) + return TC_INVALID_ARGUMENT; + + // This function is only available in WAVEFORM mode. + if (Tst_bits(tc->channel[channel].cmr, AVR32_TC_WAVE_MASK)) + Wr_bitfield(tc->channel[channel].rb, AVR32_TC_RB_MASK, value); + + return value; +} + + +int tc_write_rc(volatile avr32_tc_t *tc, unsigned int channel, unsigned short value) +{ + // Check for valid input. + if (channel >= TC_NUMBER_OF_CHANNELS) + return TC_INVALID_ARGUMENT; + + // This function is only available in WAVEFORM mode. + if (Tst_bits(tc->channel[channel].cmr, AVR32_TC_WAVE_MASK)) + Wr_bitfield(tc->channel[channel].rc, AVR32_TC_RC_MASK, value); + + return value; +} diff --git a/Demo/AVR32_UC3/DRIVERS/TC/tc.h b/Demo/AVR32_UC3/DRIVERS/TC/tc.h new file mode 100644 index 000000000..f76586d70 --- /dev/null +++ b/Demo/AVR32_UC3/DRIVERS/TC/tc.h @@ -0,0 +1,586 @@ +/*This file is prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief Timer/Counter driver for AVR32 UC3. + * + * AVR32 Timer/Counter driver module. + * + * - Compiler: IAR EWAVR32 and GNU GCC for AVR32 + * - Supported devices: All AVR32 devices with a TC module can be used. + * - AppNote: + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support email: avr32@atmel.com + * + ******************************************************************************/ + +/* Copyright (c) 2007, Atmel Corporation All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of ATMEL may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND + * SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + + +#ifndef _TC_H_ +#define _TC_H_ + +#if __GNUC__ +# include +#elif __ICCAVR32__ +# include +#else +# error Unknown compiler +#endif + + +//! TC driver functions return value in case of invalid argument(s). +#define TC_INVALID_ARGUMENT -1 + +//! Number of timer/counter channels. +#define TC_NUMBER_OF_CHANNELS (sizeof(((avr32_tc_t *)0)->channel) / sizeof(avr32_tc_channel_t)) + +/*! \name External Clock Signal 0 Selection + */ +//! @{ +#define TC_CH0_EXT_CLK0_SRC_TCLK0 AVR32_TC_TC0XC0S_TCLK0 +#define TC_CH0_EXT_CLK0_SRC_NO_CLK AVR32_TC_TC0XC0S_NO_CLK +#define TC_CH0_EXT_CLK0_SRC_TIOA1 AVR32_TC_TC0XC0S_TIOA1 +#define TC_CH0_EXT_CLK0_SRC_TIOA2 AVR32_TC_TC0XC0S_TIOA2 +//! @} + +/*! \name External Clock Signal 1 Selection + */ +//! @{ +#define TC_CH1_EXT_CLK1_SRC_TCLK1 AVR32_TC_TC1XC1S_TCLK1 +#define TC_CH1_EXT_CLK1_SRC_NO_CLK AVR32_TC_TC1XC1S_NO_CLK +#define TC_CH1_EXT_CLK1_SRC_TIOA0 AVR32_TC_TC1XC1S_TIOA0 +#define TC_CH1_EXT_CLK1_SRC_TIOA2 AVR32_TC_TC1XC1S_TIOA2 +//! @} + +/*! \name External Clock Signal 2 Selection + */ +//! @{ +#define TC_CH2_EXT_CLK2_SRC_TCLK2 AVR32_TC_TC2XC2S_TCLK2 +#define TC_CH2_EXT_CLK2_SRC_NO_CLK AVR32_TC_TC2XC2S_NO_CLK +#define TC_CH2_EXT_CLK2_SRC_TIOA0 AVR32_TC_TC2XC2S_TIOA0 +#define TC_CH2_EXT_CLK2_SRC_TIOA1 AVR32_TC_TC2XC2S_TIOA1 +//! @} + +/*! \name Event/Trigger Actions on Output + */ +//! @{ +#define TC_EVT_EFFECT_NOOP AVR32_TC_NONE +#define TC_EVT_EFFECT_SET AVR32_TC_SET +#define TC_EVT_EFFECT_CLEAR AVR32_TC_CLEAR +#define TC_EVT_EFFECT_TOGGLE AVR32_TC_TOGGLE +//! @} + +/*! \name RC Compare Trigger Enable + */ +//! @{ +#define TC_NO_TRIGGER_COMPARE_RC 0 +#define TC_TRIGGER_COMPARE_RC 1 +//! @} + +/*! \name Waveform Selection + */ +//! @{ +#define TC_WAVEFORM_SEL_UP_MODE AVR32_TC_WAVSEL_UP_NO_AUTO +#define TC_WAVEFORM_SEL_UP_MODE_RC_TRIGGER AVR32_TC_WAVSEL_UP_AUTO +#define TC_WAVEFORM_SEL_UPDOWN_MODE AVR32_TC_WAVSEL_UPDOWN_NO_AUTO +#define TC_WAVEFORM_SEL_UPDOWN_MODE_RC_TRIGGER AVR32_TC_WAVSEL_UPDOWN_AUTO +//! @} + +/*! \name TIOA or TIOB External Trigger Selection + */ +//! @{ +#define TC_EXT_TRIG_SEL_TIOA 1 +#define TC_EXT_TRIG_SEL_TIOB 0 +//! @} + +/*! \name External Event Selection + */ +//! @{ +#define TC_EXT_EVENT_SEL_TIOB_INPUT AVR32_TC_EEVT_TIOB_INPUT +#define TC_EXT_EVENT_SEL_XC0_OUTPUT AVR32_TC_EEVT_XC0_OUTPUT +#define TC_EXT_EVENT_SEL_XC1_OUTPUT AVR32_TC_EEVT_XC1_OUTPUT +#define TC_EXT_EVENT_SEL_XC2_OUTPUT AVR32_TC_EEVT_XC2_OUTPUT +//! @} + +/*! \name Edge Selection + */ +//! @{ +#define TC_SEL_NO_EDGE AVR32_TC_EEVTEDG_NO_EDGE +#define TC_SEL_RISING_EDGE AVR32_TC_EEVTEDG_POS_EDGE +#define TC_SEL_FALLING_EDGE AVR32_TC_EEVTEDG_NEG_EDGE +#define TC_SEL_EACH_EDGE AVR32_TC_EEVTEDG_BOTH_EDGES +//! @} + +/*! \name Burst Signal Selection + */ +//! @{ +#define TC_BURST_NOT_GATED AVR32_TC_BURST_NOT_GATED +#define TC_BURST_CLK_AND_XC0 AVR32_TC_BURST_CLK_AND_XC0 +#define TC_BURST_CLK_AND_XC1 AVR32_TC_BURST_CLK_AND_XC1 +#define TC_BURST_CLK_AND_XC2 AVR32_TC_BURST_CLK_AND_XC2 +//! @} + +/*! \name Clock Invert + */ +//! @{ +#define TC_CLOCK_RISING_EDGE 0 +#define TC_CLOCK_FALLING_EDGE 1 +//! @} + +/*! \name Clock Selection + */ +//! @{ +#define TC_CLOCK_SOURCE_TC1 AVR32_TC_TCCLKS_TIMER_DIV1_CLOCK +#define TC_CLOCK_SOURCE_TC2 AVR32_TC_TCCLKS_TIMER_DIV2_CLOCK +#define TC_CLOCK_SOURCE_TC3 AVR32_TC_TCCLKS_TIMER_DIV3_CLOCK +#define TC_CLOCK_SOURCE_TC4 AVR32_TC_TCCLKS_TIMER_DIV4_CLOCK +#define TC_CLOCK_SOURCE_TC5 AVR32_TC_TCCLKS_TIMER_DIV5_CLOCK +#define TC_CLOCK_SOURCE_XC0 AVR32_TC_TCCLKS_XC0 +#define TC_CLOCK_SOURCE_XC1 AVR32_TC_TCCLKS_XC1 +#define TC_CLOCK_SOURCE_XC2 AVR32_TC_TCCLKS_XC2 +//! @} + + +//! Timer/counter interrupts. +typedef struct +{ + unsigned int :24; + + //! External trigger interrupt. + unsigned int etrgs : 1; + + //! RB load interrupt. + unsigned int ldrbs : 1; + + //! RA load interrupt. + unsigned int ldras : 1; + + //! RC compare interrupt. + unsigned int cpcs : 1; + + //! RB compare interrupt. + unsigned int cpbs : 1; + + //! RA compare interrupt. + unsigned int cpas : 1; + + //! Load overrun interrupt. + unsigned int lovrs : 1; + + //! Counter overflow interrupt. + unsigned int covfs : 1; +} tc_interrupt_t; + +//! Parameters when initializing a timer/counter in capture mode. +typedef struct +{ + //! Channel to initialize. + unsigned int channel ; + + unsigned int :12; + + //! RB loading selection:\n + //! - \ref TC_SEL_NO_EDGE;\n + //! - \ref TC_SEL_RISING_EDGE;\n + //! - \ref TC_SEL_FALLING_EDGE;\n + //! - \ref TC_SEL_EACH_EDGE. + unsigned int ldrb : 2; + + //! RA loading selection:\n + //! - \ref TC_SEL_NO_EDGE;\n + //! - \ref TC_SEL_RISING_EDGE;\n + //! - \ref TC_SEL_FALLING_EDGE;\n + //! - \ref TC_SEL_EACH_EDGE. + unsigned int ldra : 2; + + unsigned int : 1; + + //! RC compare trigger enable:\n + //! - \ref TC_NO_TRIGGER_COMPARE_RC;\n + //! - \ref TC_TRIGGER_COMPARE_RC. + unsigned int cpctrg : 1; + + unsigned int : 3; + + //! TIOA or TIOB external trigger selection:\n + //! - \ref TC_EXT_TRIG_SEL_TIOA;\n + //! - \ref TC_EXT_TRIG_SEL_TIOB. + unsigned int abetrg : 1; + + //! External trigger edge selection:\n + //! - \ref TC_SEL_NO_EDGE;\n + //! - \ref TC_SEL_RISING_EDGE;\n + //! - \ref TC_SEL_FALLING_EDGE;\n + //! - \ref TC_SEL_EACH_EDGE. + unsigned int etrgedg : 2; + + //! Counter clock disable with RB loading:\n + //! - \c FALSE;\n + //! - \c TRUE. + unsigned int ldbdis : 1; + + //! Counter clock stopped with RB loading:\n + //! - \c FALSE;\n + //! - \c TRUE. + unsigned int ldbstop : 1; + + //! Burst signal selection:\n + //! - \ref TC_BURST_NOT_GATED;\n + //! - \ref TC_BURST_CLK_AND_XC0;\n + //! - \ref TC_BURST_CLK_AND_XC1;\n + //! - \ref TC_BURST_CLK_AND_XC2. + unsigned int burst : 2; + + //! Clock invert:\n + //! - \ref TC_CLOCK_RISING_EDGE;\n + //! - \ref TC_CLOCK_FALLING_EDGE. + unsigned int clki : 1; + + //! Clock selection:\n + //! - \ref TC_CLOCK_SOURCE_TC1;\n + //! - \ref TC_CLOCK_SOURCE_TC2;\n + //! - \ref TC_CLOCK_SOURCE_TC3;\n + //! - \ref TC_CLOCK_SOURCE_TC4;\n + //! - \ref TC_CLOCK_SOURCE_TC5;\n + //! - \ref TC_CLOCK_SOURCE_XC0;\n + //! - \ref TC_CLOCK_SOURCE_XC1;\n + //! - \ref TC_CLOCK_SOURCE_XC2. + unsigned int tcclks : 3; +} tc_capture_opt_t; + +//! Parameters when initializing a timer/counter in waveform mode. +typedef struct +{ + //! Channel to initialize. + unsigned int channel ; + + //! Software trigger effect on TIOB:\n + //! - \ref TC_EVT_EFFECT_NOOP;\n + //! - \ref TC_EVT_EFFECT_SET;\n + //! - \ref TC_EVT_EFFECT_CLEAR;\n + //! - \ref TC_EVT_EFFECT_TOGGLE. + unsigned int bswtrg : 2; + + //! External event effect on TIOB:\n + //! - \ref TC_EVT_EFFECT_NOOP;\n + //! - \ref TC_EVT_EFFECT_SET;\n + //! - \ref TC_EVT_EFFECT_CLEAR;\n + //! - \ref TC_EVT_EFFECT_TOGGLE. + unsigned int beevt : 2; + + //! RC compare effect on TIOB:\n + //! - \ref TC_EVT_EFFECT_NOOP;\n + //! - \ref TC_EVT_EFFECT_SET;\n + //! - \ref TC_EVT_EFFECT_CLEAR;\n + //! - \ref TC_EVT_EFFECT_TOGGLE. + unsigned int bcpc : 2; + + //! RB compare effect on TIOB:\n + //! - \ref TC_EVT_EFFECT_NOOP;\n + //! - \ref TC_EVT_EFFECT_SET;\n + //! - \ref TC_EVT_EFFECT_CLEAR;\n + //! - \ref TC_EVT_EFFECT_TOGGLE. + unsigned int bcpb : 2; + + //! Software trigger effect on TIOA:\n + //! - \ref TC_EVT_EFFECT_NOOP;\n + //! - \ref TC_EVT_EFFECT_SET;\n + //! - \ref TC_EVT_EFFECT_CLEAR;\n + //! - \ref TC_EVT_EFFECT_TOGGLE. + unsigned int aswtrg : 2; + + //! External event effect on TIOA:\n + //! - \ref TC_EVT_EFFECT_NOOP;\n + //! - \ref TC_EVT_EFFECT_SET;\n + //! - \ref TC_EVT_EFFECT_CLEAR;\n + //! - \ref TC_EVT_EFFECT_TOGGLE. + unsigned int aeevt : 2; + + //! RC compare effect on TIOA:\n + //! - \ref TC_EVT_EFFECT_NOOP;\n + //! - \ref TC_EVT_EFFECT_SET;\n + //! - \ref TC_EVT_EFFECT_CLEAR;\n + //! - \ref TC_EVT_EFFECT_TOGGLE. + unsigned int acpc : 2; + + //! RA compare effect on TIOA:\n + //! - \ref TC_EVT_EFFECT_NOOP;\n + //! - \ref TC_EVT_EFFECT_SET;\n + //! - \ref TC_EVT_EFFECT_CLEAR;\n + //! - \ref TC_EVT_EFFECT_TOGGLE. + unsigned int acpa : 2; + + unsigned int : 1; + + //! Waveform selection:\n + //! - \ref TC_WAVEFORM_SEL_UP_MODE;\n + //! - \ref TC_WAVEFORM_SEL_UP_MODE_RC_TRIGGER;\n + //! - \ref TC_WAVEFORM_SEL_UPDOWN_MODE;\n + //! - \ref TC_WAVEFORM_SEL_UPDOWN_MODE_RC_TRIGGER. + unsigned int wavsel : 2; + + //! External event trigger enable:\n + //! - \c FALSE;\n + //! - \c TRUE. + unsigned int enetrg : 1; + + //! External event selection:\n + //! - \ref TC_EXT_EVENT_SEL_TIOB_INPUT;\n + //! - \ref TC_EXT_EVENT_SEL_XC0_OUTPUT;\n + //! - \ref TC_EXT_EVENT_SEL_XC1_OUTPUT;\n + //! - \ref TC_EXT_EVENT_SEL_XC2_OUTPUT. + unsigned int eevt : 2; + + //! External event edge selection:\n + //! - \ref TC_SEL_NO_EDGE;\n + //! - \ref TC_SEL_RISING_EDGE;\n + //! - \ref TC_SEL_FALLING_EDGE;\n + //! - \ref TC_SEL_EACH_EDGE. + unsigned int eevtedg : 2; + + //! Counter clock disable with RC compare:\n + //! - \c FALSE;\n + //! - \c TRUE. + unsigned int cpcdis : 1; + + //! Counter clock stopped with RC compare:\n + //! - \c FALSE;\n + //! - \c TRUE. + unsigned int cpcstop : 1; + + //! Burst signal selection:\n + //! - \ref TC_BURST_NOT_GATED;\n + //! - \ref TC_BURST_CLK_AND_XC0;\n + //! - \ref TC_BURST_CLK_AND_XC1;\n + //! - \ref TC_BURST_CLK_AND_XC2. + unsigned int burst : 2; + + //! Clock invert:\n + //! - \ref TC_CLOCK_RISING_EDGE;\n + //! - \ref TC_CLOCK_FALLING_EDGE. + unsigned int clki : 1; + + //! Clock selection:\n + //! - \ref TC_CLOCK_SOURCE_TC1;\n + //! - \ref TC_CLOCK_SOURCE_TC2;\n + //! - \ref TC_CLOCK_SOURCE_TC3;\n + //! - \ref TC_CLOCK_SOURCE_TC4;\n + //! - \ref TC_CLOCK_SOURCE_TC5;\n + //! - \ref TC_CLOCK_SOURCE_XC0;\n + //! - \ref TC_CLOCK_SOURCE_XC1;\n + //! - \ref TC_CLOCK_SOURCE_XC2. + unsigned int tcclks : 3; +} tc_waveform_opt_t; + + +/*! \brief Reads timer/counter interrupt settings. + * + * \param tc Pointer to the TC instance to access. + * \param channel The TC instance channel to access. + * + * \retval >=0 The interrupt enable configuration organized according to \ref tc_interrupt_t. + * \retval TC_INVALID_ARGUMENT Invalid argument(s). + */ +extern int tc_get_interrupt_settings(volatile avr32_tc_t *tc, unsigned int channel); + +/*! \brief Enables various timer/counter interrupts. + * + * \param tc Pointer to the TC instance to access. + * \param channel The TC instance channel to access. + * \param bitfield The interrupt enable configuration. + * + * \retval 0 Success. + * \retval TC_INVALID_ARGUMENT Invalid argument(s). + */ +extern int tc_configure_interrupts(volatile avr32_tc_t *tc, unsigned int channel, const tc_interrupt_t *bitfield); + +/*! \brief Selects which external clock to use and how to configure it. + * + * \param tc Pointer to the TC instance to access. + * \param channel The TC instance channel to access. + * \param ext_clk_sig_src External clock signal selection: + * \arg \c TC_CH0_EXT_CLK0_SRC_TCLK0; + * \arg \c TC_CH0_EXT_CLK0_SRC_NO_CLK; + * \arg \c TC_CH0_EXT_CLK0_SRC_TIOA1; + * \arg \c TC_CH0_EXT_CLK0_SRC_TIOA2; + * \arg \c TC_CH1_EXT_CLK1_SRC_TCLK1; + * \arg \c TC_CH1_EXT_CLK1_SRC_NO_CLK; + * \arg \c TC_CH1_EXT_CLK1_SRC_TIOA0; + * \arg \c TC_CH1_EXT_CLK1_SRC_TIOA2; + * \arg \c TC_CH2_EXT_CLK2_SRC_TCLK2; + * \arg \c TC_CH2_EXT_CLK2_SRC_NO_CLK; + * \arg \c TC_CH2_EXT_CLK2_SRC_TIOA0; + * \arg \c TC_CH2_EXT_CLK2_SRC_TIOA1. + * + * \retval 0 Success. + * \retval TC_INVALID_ARGUMENT Invalid argument(s). + */ +extern int tc_select_external_clock(volatile avr32_tc_t *tc, unsigned int channel, unsigned int ext_clk_sig_src); + +/*! \brief Sets options for timer/counter capture initialization. + * + * \param tc Pointer to the TC instance to access. + * \param opt Options for capture mode. + * + * \retval 0 Success. + * \retval TC_INVALID_ARGUMENT Invalid argument(s). + */ +extern int tc_init_capture(volatile avr32_tc_t *tc, const tc_capture_opt_t *opt); + +/*! \brief Sets options for timer/counter waveform initialization. + * + * \param tc Pointer to the TC instance to access. + * \param opt Options for waveform generation. + * + * \retval 0 Success. + * \retval TC_INVALID_ARGUMENT Invalid argument(s). + */ +extern int tc_init_waveform(volatile avr32_tc_t *tc, const tc_waveform_opt_t *opt); + +/*! \brief Starts a timer/counter. + * + * \param tc Pointer to the TC instance to access. + * \param channel The TC instance channel to access. + * + * \retval 0 Success. + * \retval TC_INVALID_ARGUMENT Invalid argument(s). + */ +extern int tc_start(volatile avr32_tc_t *tc, unsigned int channel); + +/*! \brief Stops a timer/counter. + * + * \param tc Pointer to the TC instance to access. + * \param channel The TC instance channel to access. + * + * \retval 0 Success. + * \retval TC_INVALID_ARGUMENT Invalid argument(s). + */ +extern int tc_stop(volatile avr32_tc_t *tc, unsigned int channel); + +/*! \brief Performs a software trigger: the counter is reset and the clock is started. + * + * \param tc Pointer to the TC instance to access. + * \param channel The TC instance channel to access. + * + * \retval 0 Success. + * \retval TC_INVALID_ARGUMENT Invalid argument(s). + */ +extern int tc_software_trigger(volatile avr32_tc_t *tc, unsigned int channel); + +/*! \brief Asserts a SYNC signal to generate a software trigger and reset all channels. + * + * \param tc Pointer to the TC instance to access. + */ +extern void tc_sync_trigger(volatile avr32_tc_t *tc); + +/*! \brief Reads the status register. + * + * \param tc Pointer to the TC instance to access. + * \param channel The TC instance channel to access. + * + * \retval >=0 Status register value. + * \retval TC_INVALID_ARGUMENT Invalid argument(s). + */ +extern int tc_read_sr(volatile avr32_tc_t *tc, unsigned int channel); + +/*! \brief Reads the channel's TC counter and returns the value. + * + * \param tc Pointer to the TC instance to access. + * \param channel The TC instance channel to access. + * + * \retval >=0 TC counter value. + * \retval TC_INVALID_ARGUMENT Invalid argument(s). + */ +extern int tc_read_tc(volatile avr32_tc_t *tc, unsigned int channel); + +/*! \brief Reads the channel's RA register and returns the value. + * + * \param tc Pointer to the TC instance to access. + * \param channel The TC instance channel to access. + * + * \retval >=0 RA register value. + * \retval TC_INVALID_ARGUMENT Invalid argument(s). + */ +extern int tc_read_ra(volatile avr32_tc_t *tc, unsigned int channel); + +/*! \brief Reads the channel's RB register and returns the value. + * + * \param tc Pointer to the TC instance to access. + * \param channel The TC instance channel to access. + * + * \retval >=0 RB register value. + * \retval TC_INVALID_ARGUMENT Invalid argument(s). + */ +extern int tc_read_rb(volatile avr32_tc_t *tc, unsigned int channel); + +/*! \brief Reads the channel's RC register and returns the value. + * + * \param tc Pointer to the TC instance to access. + * \param channel The TC instance channel to access. + * + * \retval >=0 RC register value. + * \retval TC_INVALID_ARGUMENT Invalid argument(s). + */ +extern int tc_read_rc(volatile avr32_tc_t *tc, unsigned int channel); + +/*! \brief Writes a value to the channel's RA register. + * + * \param tc Pointer to the TC instance to access. + * \param channel The TC instance channel to access. + * \param value Value to write to the RA register. + * + * \retval >=0 Written value. + * \retval TC_INVALID_ARGUMENT Invalid argument(s). + */ +extern int tc_write_ra(volatile avr32_tc_t *tc, unsigned int channel, unsigned short value); + +/*! \brief Writes a value to the channel's RB register. + * + * \param tc Pointer to the TC instance to access. + * \param channel The TC instance channel to access. + * \param value Value to write to the RB register. + * + * \retval >=0 Written value. + * \retval TC_INVALID_ARGUMENT Invalid argument(s). + */ +extern int tc_write_rb(volatile avr32_tc_t *tc, unsigned int channel, unsigned short value); + +/*! \brief Writes a value to the channel's RC register. + * + * \param tc Pointer to the TC instance to access. + * \param channel The TC instance channel to access. + * \param value Value to write to the RC register. + * + * \retval >=0 Written value. + * \retval TC_INVALID_ARGUMENT Invalid argument(s). + */ +extern int tc_write_rc(volatile avr32_tc_t *tc, unsigned int channel, unsigned short value); + + +#endif // _TC_H_ diff --git a/Demo/AVR32_UC3/DRIVERS/USART/usart.c b/Demo/AVR32_UC3/DRIVERS/USART/usart.c new file mode 100644 index 000000000..bdfc98706 --- /dev/null +++ b/Demo/AVR32_UC3/DRIVERS/USART/usart.c @@ -0,0 +1,437 @@ +/*This file is prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief USART driver for AVR32 UC3. + * + * This file contains basic functions for the AVR32 USART, with support for all + * modes, settings and clock speeds. + * + * - Compiler: IAR EWAVR32 and GNU GCC for AVR32 + * - Supported devices: All AVR32 devices with a USART module can be used. + * - AppNote: + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support email: avr32@atmel.com + * + ******************************************************************************/ + +/* Copyright (c) 2007, Atmel Corporation All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of ATMEL may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND + * SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + + +#include "usart.h" + + +//------------------------------------------------------------------------------ +/*! \name Private Functions + */ +//! @{ + + +/*! \brief Checks if the USART is in multidrop mode. + * + * \param usart Base address of the USART instance. + * + * \return \c 1 if the USART is in multidrop mode, otherwise \c 0. + */ +#if __GNUC__ +__attribute__((__always_inline__)) +#endif +static __inline__ int usart_mode_is_multidrop(volatile avr32_usart_t *usart) +{ + return ((usart->mr >> AVR32_USART_MR_PAR_OFFSET) & AVR32_USART_MR_PAR_MULTI) == AVR32_USART_MR_PAR_MULTI; +} + + +/*! \brief Calculates a clock divider (\e CD) that gets the USART as close to a + * wanted baudrate as possible. + * + * Baudrate calculation: + * \f$ baudrate = \frac{Selected Clock}{16 \times CD} \f$ with 16x oversampling or + * \f$ baudrate = \frac{Selected Clock}{8 \times CD} \f$ with 8x oversampling. + * + * \param usart Base address of the USART instance. + * \param baudrate Wanted baudrate. + * \param pba_hz USART module input clock frequency (PBA clock, Hz). + * + * \retval USART_SUCCESS Baudrate successfully initialized. + * \retval USART_INVALID_INPUT Wanted baudrate is impossible with given clock speed. + */ + +static int usart_set_baudrate(volatile avr32_usart_t *usart, unsigned int baudrate, long pba_hz) +{ + // Clock divider. + int cd; + + // Baudrate calculation. + if (baudrate < pba_hz / 16) + { + // Use 16x oversampling. + usart->mr &=~ AVR32_USART_MR_OVER_MASK; + cd = pba_hz / (16 * baudrate); + + if ((cd >65535)) return USART_INVALID_INPUT; + } + else + { + // Use 8x oversampling. + usart->mr |= AVR32_USART_MR_OVER_MASK; + cd = pba_hz / (8 * baudrate); + + if ((cd < 1)||(cd >65535)) return USART_INVALID_INPUT; + } + usart->brgr = cd << AVR32_USART_BRGR_CD_OFFSET; + + return USART_SUCCESS; +} + +//! @} + + +//------------------------------------------------------------------------------ +/*! \name Initialization Functions + */ +//! @{ + + +void usart_reset(volatile avr32_usart_t *usart) +{ + // Disable all USART interrupts. + // Interrupts needed should be set explicitly on every reset. + usart->idr = 0xFFFFFFFF; + + // Reset mode and other registers that could cause unpredictable behavior after reset. + usart->mr = 0; + usart->rtor = 0; + usart->ttgr = 0; + + // Shutdown TX and RX (will be re-enabled when setup has successfully completed), + // reset status bits and turn off DTR and RTS. + usart->cr = AVR32_USART_CR_RSTRX_MASK | + AVR32_USART_CR_RSTTX_MASK | + AVR32_USART_CR_RSTSTA_MASK | + AVR32_USART_CR_RSTIT_MASK | + AVR32_USART_CR_RSTNACK_MASK | + AVR32_USART_CR_DTRDIS_MASK | + AVR32_USART_CR_RTSDIS_MASK; +} + + +int usart_init_rs232(volatile avr32_usart_t *usart, const usart_options_t *opt, long pba_hz) +{ + // Reset the USART and shutdown TX and RX. + usart_reset(usart); + + // Check input values. + if (!opt) // Null pointer. + return USART_INVALID_INPUT; + if (opt->charlength < 5 || opt->charlength > 9 || + opt->paritytype > 7 || + opt->stopbits > 2 + 255 || + opt->channelmode > 3) + return USART_INVALID_INPUT; + + if (usart_set_baudrate(usart, opt->baudrate, pba_hz) == USART_INVALID_INPUT) + return USART_INVALID_INPUT; + + if (opt->charlength == 9) + { + // Character length set to 9 bits. MODE9 dominates CHRL. + usart->mr |= AVR32_USART_MR_MODE9_MASK; + } + else + { + // CHRL gives the character length (- 5) when MODE9 = 0. + usart->mr |= (opt->charlength - 5) << AVR32_USART_MR_CHRL_OFFSET; + } + + usart->mr |= (opt->channelmode << AVR32_USART_MR_CHMODE_OFFSET) | + (opt->paritytype << AVR32_USART_MR_PAR_OFFSET); + + if (opt->stopbits > USART_2_STOPBITS) + { + // Set two stop bits + usart->mr |= AVR32_USART_MR_NBSTOP_2 << AVR32_USART_MR_NBSTOP_OFFSET; + // and a timeguard period gives the rest. + usart->ttgr = opt->stopbits - USART_2_STOPBITS; + } + else + // Insert 1, 1.5 or 2 stop bits. + usart->mr |= opt->stopbits << AVR32_USART_MR_NBSTOP_OFFSET; + + // Setup complete; enable communication. + // Enable input and output. + usart->cr |= AVR32_USART_CR_TXEN_MASK | + AVR32_USART_CR_RXEN_MASK; + + return USART_SUCCESS; +} + + +int usart_init_hw_handshaking(volatile avr32_usart_t *usart, const usart_options_t *opt, long pba_hz) +{ + // First: Setup standard RS232. + if (usart_init_rs232(usart, opt, pba_hz) == USART_INVALID_INPUT) + return USART_INVALID_INPUT; + + // Clear previous mode. + usart->mr &= ~AVR32_USART_MR_MODE_MASK; + // Hardware handshaking. + usart->mr |= USART_MODE_HW_HSH << AVR32_USART_MR_MODE_OFFSET; + + return USART_SUCCESS; +} + + +int usart_init_IrDA(volatile avr32_usart_t *usart, const usart_options_t *opt, + long pba_hz, unsigned char irda_filter) +{ + // First: Setup standard RS232. + if (usart_init_rs232(usart, opt, pba_hz) == USART_INVALID_INPUT) + return USART_INVALID_INPUT; + + // Set IrDA counter. + usart->ifr = irda_filter; + + // Activate "low-pass filtering" of input. + usart->mr |= AVR32_USART_MR_FILTER_MASK; + + return USART_SUCCESS; +} + + +int usart_init_modem(volatile avr32_usart_t *usart, const usart_options_t *opt, long pba_hz) +{ + // First: Setup standard RS232. + if (usart_init_rs232(usart, opt, pba_hz) == USART_INVALID_INPUT) + return USART_INVALID_INPUT; + + // Clear previous mode. + usart->mr &= ~AVR32_USART_MR_MODE_MASK; + // Set modem mode. + usart->mr |= USART_MODE_MODEM << AVR32_USART_MR_MODE_OFFSET; + + return USART_SUCCESS; +} + + +int usart_init_rs485(volatile avr32_usart_t *usart, const usart_options_t *opt, long pba_hz) +{ + // First: Setup standard RS232. + if (usart_init_rs232(usart, opt, pba_hz) == USART_INVALID_INPUT) + return USART_INVALID_INPUT; + + // Clear previous mode. + usart->mr &= ~AVR32_USART_MR_MODE_MASK; + // Set RS485 mode. + usart->mr |= USART_MODE_RS485 << AVR32_USART_MR_MODE_OFFSET; + + return USART_SUCCESS; +} + + +int usart_init_iso7816(volatile avr32_usart_t *usart, const iso7816_options_t *opt, int t, long pba_hz) +{ + // Reset the USART and shutdown TX and RX. + usart_reset(usart); + + // Check input values. + if (!opt) // Null pointer. + return USART_INVALID_INPUT; + + if (t == 0) + { + // Set USART mode to ISO7816, T=0. + // The T=0 protocol always uses 2 stop bits. + usart->mr = (USART_MODE_ISO7816_T0 << AVR32_USART_MR_MODE_OFFSET) | + (AVR32_USART_MR_NBSTOP_2 << AVR32_USART_MR_NBSTOP_OFFSET) | + (opt->bit_order << AVR32_USART_MR_MSBF_OFFSET); // Allow MSBF in T=0. + } + else if (t == 1) + { + // Only LSB first in the T=1 protocol. + // max_iterations field is only used in T=0 mode. + if (opt->bit_order != 0 || + opt->max_iterations != 0) + return USART_INVALID_INPUT; + // Set USART mode to ISO7816, T=1. + // The T=1 protocol always uses 1 stop bit. + usart->mr = (USART_MODE_ISO7816_T1 << AVR32_USART_MR_MODE_OFFSET) | + (AVR32_USART_MR_NBSTOP_1 << AVR32_USART_MR_NBSTOP_OFFSET); + } + else + return USART_INVALID_INPUT; + + if (usart_set_baudrate(usart, opt->iso7816_hz, pba_hz) == USART_INVALID_INPUT) + return USART_INVALID_INPUT; + + // Set FIDI register: bit rate = selected clock/FI_DI_ratio/16. + usart->fidi = opt->fidi_ratio; + // Set ISO7816 spesific options in the MODE register. + usart->mr |= (opt->inhibit_nack << AVR32_USART_MR_INACK_OFFSET) | + (opt->dis_suc_nack << AVR32_USART_MR_DSNACK_OFFSET) | + (opt->max_iterations << AVR32_USART_MR_MAX_ITERATION_OFFSET) | + AVR32_USART_MR_CLKO_MASK; // Enable clock output. + + // Setup complete; enable input. + // Leave TX disabled for now. + usart->cr |= AVR32_USART_CR_RXEN_MASK; + + return USART_SUCCESS; +} + + +//! @} + + +//------------------------------------------------------------------------------ +/*! \name Transmit/Receive Functions + */ +//! @{ + + +int usart_send_address(volatile avr32_usart_t *usart, int address) +{ + // Check if USART is in multidrop / RS485 mode. + if (!usart_mode_is_multidrop(usart)) return USART_MODE_FAULT; + + // Prepare to send an address. + usart->cr |= AVR32_USART_CR_SENDA_MASK; + + // Write the address to TX. + usart_bw_write_char(usart, address); + + return USART_SUCCESS; +} + + +int usart_write_char(volatile avr32_usart_t *usart, int c) +{ + if (usart->csr & AVR32_USART_CSR_TXRDY_MASK) + { + usart->thr = c; + return USART_SUCCESS; + } + else + return USART_TX_BUSY; +} + + +int usart_putchar(volatile avr32_usart_t *usart, int c) +{ + int timeout = USART_DEFAULT_TIMEOUT; + + if (c == '\n') + { + do + { + if (!timeout--) return USART_FAILURE; + } while (usart_write_char(usart, '\r') != USART_SUCCESS); + + timeout = USART_DEFAULT_TIMEOUT; + } + + do + { + if (!timeout--) return USART_FAILURE; + } while (usart_write_char(usart, c) != USART_SUCCESS); + + return USART_SUCCESS; +} + + +int usart_read_char(volatile avr32_usart_t *usart, int *c) +{ + // Check for errors: frame, parity and overrun. In RS485 mode, a parity error + // would mean that an address char has been received. + if (usart->csr & (AVR32_USART_CSR_OVRE_MASK | + AVR32_USART_CSR_FRAME_MASK | + AVR32_USART_CSR_PARE_MASK)) + return USART_RX_ERROR; + + // No error; if we really did receive a char, read it and return SUCCESS. + if (usart->csr & AVR32_USART_CSR_RXRDY_MASK) + { + *c = (unsigned short)usart->rhr; + return USART_SUCCESS; + } + else + return USART_RX_EMPTY; +} + + +int usart_getchar(volatile avr32_usart_t *usart) +{ + int c, ret; + + while ((ret = usart_read_char(usart, &c)) == USART_RX_EMPTY); + + if (ret == USART_RX_ERROR) + return USART_FAILURE; + + return c; +} + + +void usart_write_line(volatile avr32_usart_t *usart, const char *string) +{ + while (*string != '\0') + usart_putchar(usart, *string++); +} + + +int usart_get_echo_line(volatile avr32_usart_t *usart) +{ + int rx_char; + int retval = USART_SUCCESS; + + while (1) + { + rx_char = usart_getchar(usart); + if (rx_char == USART_FAILURE) + { + usart_write_line(usart, "Error!!!\n"); + break; + } + if (rx_char == '\x03') + { + retval = USART_FAILURE; + break; + } + usart_putchar(usart, rx_char); + if (rx_char == '\r') + { + usart_putchar(usart, '\n'); + break; + } + } + + return retval; +} + + +//! @} diff --git a/Demo/AVR32_UC3/DRIVERS/USART/usart.h b/Demo/AVR32_UC3/DRIVERS/USART/usart.h new file mode 100644 index 000000000..146db9015 --- /dev/null +++ b/Demo/AVR32_UC3/DRIVERS/USART/usart.h @@ -0,0 +1,419 @@ +/*This file is prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief USART driver for AVR32 UC3. + * + * This file contains basic functions for the AVR32 USART, with support for all + * modes, settings and clock speeds. + * + * - Compiler: IAR EWAVR32 and GNU GCC for AVR32 + * - Supported devices: All AVR32 devices with a USART module can be used. + * - AppNote: + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support email: avr32@atmel.com + * + ******************************************************************************/ + +/* Copyright (c) 2007, Atmel Corporation All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of ATMEL may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND + * SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + + +#ifndef _USART_H_ +#define _USART_H_ + +#if __GNUC__ +# include +#elif __ICCAVR32__ +# include +#else +# error Unknown compiler +#endif + +#include "compiler.h" + + +/*! \name Return Values + */ +//! @{ +#define USART_SUCCESS 0 //!< Successful completion. +#define USART_FAILURE -1 //!< Failure because of some unspecified reason. +#define USART_INVALID_INPUT 1 //!< Input value out of range. +#define USART_INVALID_ARGUMENT -1 //!< Argument value out of range. +#define USART_TX_BUSY 2 //!< Transmitter was busy. +#define USART_RX_EMPTY 3 //!< Nothing was received. +#define USART_RX_ERROR 4 //!< Transmission error occurred. +#define USART_MODE_FAULT 5 //!< USART not in the appropriate mode. +//! @} + +//! Default time-out value (number of attempts). +#define USART_DEFAULT_TIMEOUT 10000 + +/*! \name Parity Settings + */ +//! @{ +#define USART_EVEN_PARITY AVR32_USART_MR_PAR_EVEN //!< Use even parity on character transmission. +#define USART_ODD_PARITY AVR32_USART_MR_PAR_ODD //!< Use odd parity on character transmission. +#define USART_SPACE_PARITY AVR32_USART_MR_PAR_SPACE //!< Use a space as parity bit. +#define USART_MARK_PARITY AVR32_USART_MR_PAR_MARK //!< Use a mark as parity bit. +#define USART_NO_PARITY AVR32_USART_MR_PAR_NONE //!< Don't use a parity bit. +#define USART_MULTIDROP_PARITY AVR32_USART_MR_PAR_MULTI //!< Parity bit is used to flag address characters. +//! @} + +/*! \name Operating Modes + */ +//! @{ +#define USART_MODE_NORMAL AVR32_USART_MR_MODE_NORMAL //!< Normal RS232 mode. +#define USART_MODE_RS485 AVR32_USART_MR_MODE_RS485 //!< RS485 mode. +#define USART_MODE_HW_HSH AVR32_USART_MR_MODE_HARDWARE //!< RS232 mode with hardware handshaking. +#define USART_MODE_MODEM AVR32_USART_MR_MODE_MODEM //!< Modem mode. +#define USART_MODE_ISO7816_T0 AVR32_USART_MR_MODE_ISO7816_T0 //!< ISO7816, T = 0 mode. +#define USART_MODE_ISO7816_T1 AVR32_USART_MR_MODE_ISO7816_T1 //!< ISO7816, T = 1 mode. +#define USART_MODE_IRDA AVR32_USART_MR_MODE_IRDA //!< IrDA mode. +#define USART_MODE_SW_HSH AVR32_USART_MR_MODE_SOFTWARE //!< RS232 mode with software handshaking. +//! @} + +/*! \name Channel Modes + */ +//! @{ +#define USART_NORMAL_CHMODE AVR32_USART_MR_CHMODE_NORMAL //!< Normal communication. +#define USART_AUTO_ECHO AVR32_USART_MR_CHMODE_ECHO //!< Echo data. +#define USART_LOCAL_LOOPBACK AVR32_USART_MR_CHMODE_LOCAL_LOOP //!< Local loopback. +#define USART_REMOTE_LOOPBACK AVR32_USART_MR_CHMODE_REMOTE_LOOP //!< Remote loopback. +//! @} + +/*! \name Stop Bits Settings + */ +//! @{ +#define USART_1_STOPBIT AVR32_USART_MR_NBSTOP_1 //!< Use 1 stop bit. +#define USART_1_5_STOPBITS AVR32_USART_MR_NBSTOP_1_5 //!< Use 1.5 stop bits. +#define USART_2_STOPBITS AVR32_USART_MR_NBSTOP_2 //!< Use 2 stop bits (for more, just give the number of bits). +//! @} + + +//! Input parameters when initializing RS232 and similar modes. +typedef struct +{ + //! Set baudrate of the USART. + unsigned long baudrate; + + //! Number of bits to transmit as a character (5 to 9). + unsigned char charlength; + + //! How to calculate the parity bit: \ref USART_EVEN_PARITY, \ref USART_ODD_PARITY, + //! \ref USART_SPACE_PARITY, \ref USART_MARK_PARITY, \ref USART_NO_PARITY or + //! \ref USART_MULTIDROP_PARITY. + unsigned char paritytype; + + //! Number of stop bits between two characters: \ref USART_1_STOPBIT, + //! \ref USART_1_5_STOPBITS, \ref USART_2_STOPBITS or any number from 3 to 257 + //! which will result in a time guard period of that length between characters. + unsigned short stopbits; + + //! Run the channel in testmode: \ref USART_NORMAL_CHMODE, \ref USART_AUTO_ECHO, + //! \ref USART_LOCAL_LOOPBACK or \ref USART_REMOTE_LOOPBACK. + unsigned char channelmode; +} usart_options_t; + +//! Input parameters when initializing ISO7816 modes. +typedef struct +{ + //! Set the frequency of the ISO7816 clock. + unsigned long iso7816_hz; + + //! The number of ISO7816 clock ticks in every bit period (1 to 2047, 0 = disable clock). + //! Bit rate = \ref iso7816_hz / \ref fidi_ratio. + unsigned short fidi_ratio; + + //! Inhibit Non Acknowledge:\n + //! - 0: the NACK is generated;\n + //! - 1: the NACK is not generated. + //! + //! \note This bit will be used only in ISO7816 mode, protocol T = 0 receiver. + int inhibit_nack; + + //! Disable successive NACKs. + //! Successive parity errors are counted up to the value in the \ref max_iterations field. + //! These parity errors generate a NACK on the ISO line. As soon as this value is reached, + //! no addititional NACK is sent on the ISO line. The ITERATION flag is asserted. + int dis_suc_nack; + + //! Max number of repetitions (0 to 7). + unsigned char max_iterations; + + //! Bit order in transmitted characters:\n + //! - 0: LSB first;\n + //! - 1: MSB first. + int bit_order; +} iso7816_options_t; + + +//------------------------------------------------------------------------------ +/*! \name Initialization Functions + */ +//! @{ + +/*! \brief Resets the USART and disables TX and RX. + * + * \param usart Base address of the USART instance. + */ +extern void usart_reset(volatile avr32_usart_t *usart); + +/*! \brief Sets up the USART to use the standard RS232 protocol. + * + * \param usart Base address of the USART instance. + * \param opt Options needed to set up RS232 communication (see \ref usart_options_t). + * \param pba_hz USART module input clock frequency (PBA clock, Hz). + * + * \retval USART_SUCCESS Mode successfully initialized. + * \retval USART_INVALID_INPUT One or more of the arguments is out of valid range. + */ +extern int usart_init_rs232(volatile avr32_usart_t *usart, const usart_options_t *opt, long pba_hz); + +/*! \brief Sets up the USART to use hardware handshaking. + * + * \param usart Base address of the USART instance. + * \param opt Options needed to set up RS232 communication (see \ref usart_options_t). + * \param pba_hz USART module input clock frequency (PBA clock, Hz). + * + * \retval USART_SUCCESS Mode successfully initialized. + * \retval USART_INVALID_INPUT One or more of the arguments is out of valid range. + * + * \note \ref usart_init_rs232 does not need to be invoked before this function. + */ +extern int usart_init_hw_handshaking(volatile avr32_usart_t *usart, const usart_options_t *opt, long pba_hz); + +/*! \brief Sets up the USART to use the IrDA protocol. + * + * \param usart Base address of the USART instance. + * \param opt Options needed to set up RS232 communication (see \ref usart_options_t). + * \param pba_hz USART module input clock frequency (PBA clock, Hz). + * \param irda_filter Counter used to distinguish received ones from zeros. + * + * \retval USART_SUCCESS Mode successfully initialized. + * \retval USART_INVALID_INPUT One or more of the arguments is out of valid range. + */ +extern int usart_init_IrDA(volatile avr32_usart_t *usart, const usart_options_t *opt, + long pba_hz, unsigned char irda_filter); + +/*! \brief Sets up the USART to use the modem protocol, activating dedicated inputs/outputs. + * + * \param usart Base address of the USART instance. + * \param opt Options needed to set up RS232 communication (see \ref usart_options_t). + * \param pba_hz USART module input clock frequency (PBA clock, Hz). + * + * \retval USART_SUCCESS Mode successfully initialized. + * \retval USART_INVALID_INPUT One or more of the arguments is out of valid range. + */ +extern int usart_init_modem(volatile avr32_usart_t *usart, const usart_options_t *opt, long pba_hz); + +/*! \brief Sets up the USART to use the RS485 protocol. + * + * \param usart Base address of the USART instance. + * \param opt Options needed to set up RS232 communication (see \ref usart_options_t). + * \param pba_hz USART module input clock frequency (PBA clock, Hz). + * + * \retval USART_SUCCESS Mode successfully initialized. + * \retval USART_INVALID_INPUT One or more of the arguments is out of valid range. + */ +extern int usart_init_rs485(volatile avr32_usart_t *usart, const usart_options_t *opt, long pba_hz); + +/*! \brief Sets up the USART to use the ISO7816 T=0 or T=1 smartcard protocols. + * + * \param usart Base address of the USART instance. + * \param opt Options needed to set up ISO7816 communication (see \ref iso7816_options_t). + * \param t ISO7816 mode to use (T=0 or T=1). + * \param pba_hz USART module input clock frequency (PBA clock, Hz). + * + * \retval USART_SUCCESS Mode successfully initialized. + * \retval USART_INVALID_INPUT One or more of the arguments is out of valid range. + */ +extern int usart_init_iso7816(volatile avr32_usart_t *usart, const iso7816_options_t *opt, int t, long pba_hz); + +//! @} + + +//------------------------------------------------------------------------------ +/*! \name Read and Reset Error Status Bits + */ +//! @{ + +/*! \brief Resets the error status. + * + * This function resets the status bits indicating that a parity error, + * framing error or overrun has occurred. The RXBRK bit, indicating + * a start/end of break condition on the RX line, is also reset. + * + * \param usart Base address of the USART instance. + */ +#if __GNUC__ +__attribute__((__always_inline__)) +#endif +extern __inline__ void usart_reset_status(volatile avr32_usart_t *usart) +{ + usart->cr |= AVR32_USART_CR_RSTSTA_MASK; +} + +/*! \brief Checks if a parity error has occurred since last status reset. + * + * \param usart Base address of the USART instance. + * + * \return \c 1 if a parity error has been detected, otherwise \c 0. + */ +#if __GNUC__ +__attribute__((__always_inline__)) +#endif +extern __inline__ int usart_parity_error(volatile avr32_usart_t *usart) +{ + return (usart->csr & AVR32_USART_CSR_PARE_MASK) != 0; +} + +/*! \brief Checks if a framing error has occurred since last status reset. + * + * \param usart Base address of the USART instance. + * + * \return \c 1 if a framing error has been detected, otherwise \c 0. + */ +#if __GNUC__ +__attribute__((__always_inline__)) +#endif +extern __inline__ int usart_framing_error(volatile avr32_usart_t *usart) +{ + return (usart->csr & AVR32_USART_CSR_FRAME_MASK) != 0; +} + +/*! \brief Checks if an overrun error has occurred since last status reset. + * + * \param usart Base address of the USART instance. + * + * \return \c 1 if a overrun error has been detected, otherwise \c 0. + */ +#if __GNUC__ +__attribute__((__always_inline__)) +#endif +extern __inline__ int usart_overrun_error(volatile avr32_usart_t *usart) +{ + return (usart->csr & AVR32_USART_CSR_OVRE_MASK) != 0; +} + +//! @} + + +//------------------------------------------------------------------------------ +/*! \name Transmit/Receive Functions + */ +//! @{ + +/*! \brief Addresses a receiver. + * + * While in RS485 mode, receivers only accept data addressed to them. + * A packet/char with the address tag set has to precede any data. + * This function is used to address a receiver. This receiver should read + * all the following data, until an address packet addresses another receiver. + * + * \param usart Base address of the USART instance. + * \param address Address of the target device. + * + * \retval USART_SUCCESS Address successfully sent (if current mode is RS485). + * \retval USART_MODE_FAULT Wrong operating mode. + */ +extern int usart_send_address(volatile avr32_usart_t *usart, int address); + +/*! \brief Writes the given character to the TX buffer if the transmitter is ready. + * + * \param usart Base address of the USART instance. + * \param c The character (up to 9 bits) to transmit. + * + * \retval USART_SUCCESS The transmitter was ready. + * \retval USART_TX_BUSY The transmitter was busy. + */ +extern int usart_write_char(volatile avr32_usart_t *usart, int c); + +/*! \brief An active wait writing a character to the USART. + * + * \param usart Base address of the USART instance. + * \param c The character (up to 9 bits) to transmit. + */ +#if __GNUC__ +__attribute__((__always_inline__)) +#endif +extern __inline__ void usart_bw_write_char(volatile avr32_usart_t *usart, int c) +{ + while (usart_write_char(usart, c) != USART_SUCCESS); +} + +/*! \brief Sends a character with the USART. + * + * \param usart Base address of the USART instance. + * \param c Character to write. + * + * \retval USART_SUCCESS The character was written. + * \retval USART_FAILURE The function timed out before the USART transmitter became ready to send. + */ +extern int usart_putchar(volatile avr32_usart_t *usart, int c); + +/*! \brief Checks the RX buffer for a received character, and stores it at the + * given memory location. + * + * \param usart Base address of the USART instance. + * \param c Pointer to the where the read character should be stored + * (must be at least short in order to accept 9-bit characters). + * + * \retval USART_SUCCESS The character was read successfully. + * \retval USART_RX_EMPTY The RX buffer was empty. + * \retval USART_RX_ERROR An error was deteceted. + */ +extern int usart_read_char(volatile avr32_usart_t *usart, int *c); + +/*! \brief Waits until a character is received, and returns it. + * + * \param usart Base address of the USART instance. + * + * \return The received character, or \ref USART_FAILURE upon error. + */ +extern int usart_getchar(volatile avr32_usart_t *usart); + +/*! \brief Writes one character string to the USART. + * + * \param usart Base address of the USART instance. + * \param string String to be written. + */ +extern void usart_write_line(volatile avr32_usart_t *usart, const char *string); + +/*! \brief Gets and echoes characters until end of line. + * + * \param usart Base address of the USART instance. + * + * \retval USART_SUCCESS Success. + * \retval USART_FAILURE ETX character received. + */ +extern int usart_get_echo_line(volatile avr32_usart_t *usart); + +//! @} + + +#endif // _USART_H_ diff --git a/Demo/AVR32_UC3/FreeRTOSConfig.h b/Demo/AVR32_UC3/FreeRTOSConfig.h new file mode 100644 index 000000000..d12c06b1a --- /dev/null +++ b/Demo/AVR32_UC3/FreeRTOSConfig.h @@ -0,0 +1,105 @@ +/*This file has been prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief FreeRTOS demonstration for AVR32 UC3. + * + * - Compiler: IAR EWAVR32 and GNU GCC for AVR32 + * - Supported devices: All AVR32 devices can be used. + * - AppNote: + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support email: avr32@atmel.com + * + *****************************************************************************/ + +/* Copyright (c) 2007, Atmel Corporation All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of ATMEL may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND + * SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + + +#ifndef FREERTOS_CONFIG_H +#define FREERTOS_CONFIG_H + +#include "board.h" + + +/*----------------------------------------------------------- + * Application specific definitions. + * + * These definitions should be adjusted for your particular hardware and + * application requirements. + * + * THESE PARAMETERS ARE DESCRIBED WITHIN THE 'CONFIGURATION' SECTION OF THE + * FreeRTOS API DOCUMENTATION AVAILABLE ON THE FreeRTOS.org WEB SITE. + *----------------------------------------------------------*/ + +#define configUSE_PREEMPTION 1 +#define configUSE_IDLE_HOOK 0 +#define configUSE_TICK_HOOK 0 +#define configCPU_CLOCK_HZ ( FOSC0 ) /* Hz clk gen */ +#define configPBA_CLOCK_HZ ( FOSC0 ) +#define configTICK_RATE_HZ ( ( portTickType ) 1000 ) +#define configMAX_PRIORITIES ( ( unsigned portBASE_TYPE ) 8 ) +#define configMINIMAL_STACK_SIZE ( ( unsigned portSHORT ) 128 ) +#define configTOTAL_HEAP_SIZE ( ( size_t ) ( 1024*30 ) ) +#define configMAX_TASK_NAME_LEN ( 16 ) +#define configUSE_TRACE_FACILITY 0 +#define configUSE_16_BIT_TICKS 0 +#define configIDLE_SHOULD_YIELD 1 + +/* Co-routine definitions. */ +#define configUSE_CO_ROUTINES 0 +#define configMAX_CO_ROUTINE_PRIORITIES ( 0 ) + +/* Set the following definitions to 1 to include the API function, or zero +to exclude the API function. */ + +#define INCLUDE_vTaskPrioritySet 1 +#define INCLUDE_uxTaskPriorityGet 1 +#define INCLUDE_vTaskDelete 1 +#define INCLUDE_vTaskCleanUpResources 0 +#define INCLUDE_vTaskSuspend 1 +#define INCLUDE_vTaskDelayUntil 1 +#define INCLUDE_vTaskDelay 1 + +/* configTICK_USE_TC is a boolean indicating whether to use a Timer Counter + for the tick generation. Timer Counter will generate an accurate Tick; + otherwise the CPU will generate a tick but with time drift. + configTICK_TC_CHANNEL is the TC channel.*/ +#define configTICK_USE_TC 1 +#define configTICK_TC_CHANNEL 2 + +/* Debug trace configuration. + configDBG is a boolean indicating whether to activate the debug trace. */ +#define configDBG 1 +#define configDBG_USART (&AVR32_USART1) +#define configDBG_USART_RX_PIN AVR32_USART1_RXD_0_PIN +#define configDBG_USART_RX_FUNCTION AVR32_USART1_RXD_0_FUNCTION +#define configDBG_USART_TX_PIN AVR32_USART1_TXD_0_PIN +#define configDBG_USART_TX_FUNCTION AVR32_USART1_TXD_0_FUNCTION +#define configDBG_USART_BAUDRATE 57600 + +#endif /* FREERTOS_CONFIG_H */ diff --git a/Demo/AVR32_UC3/ParTest/ParTest.c b/Demo/AVR32_UC3/ParTest/ParTest.c new file mode 100644 index 000000000..a8e8e8ad1 --- /dev/null +++ b/Demo/AVR32_UC3/ParTest/ParTest.c @@ -0,0 +1,121 @@ +/* This source file is part of the ATMEL FREERTOS-0.9.0 Release */ + +/*This file has been prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief FreeRTOS LEDs Management for AVR32 UC3. + * + * - Compiler: IAR EWAVR32 and GNU GCC for AVR32 + * - Supported devices: All AVR32 devices can be used. + * - AppNote: + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support email: avr32@atmel.com + * + *****************************************************************************/ + +/* Copyright (c) 2007, Atmel Corporation All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of ATMEL may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND + * SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + + + +#if __GNUC__ + #include +#elif __ICCAVR32__ + #include +#else + #error Unknown compiler +#endif + +#include "FreeRTOS.h" +#include "task.h" +#include "partest.h" + + +/*----------------------------------------------------------- + * Simple parallel port IO routines. + *-----------------------------------------------------------*/ + +#define partstALL_OUTPUTS_OFF ( ( unsigned portCHAR ) 0x00 ) +#define partstMAX_OUTPUT_LED ( ( unsigned portCHAR ) 8 ) + +static volatile unsigned portCHAR ucCurrentOutputValue = partstALL_OUTPUTS_OFF; /*lint !e956 File scope parameters okay here. */ + +/*-----------------------------------------------------------*/ + +void vParTestInitialise( void ) +{ + LED_Display( partstALL_OUTPUTS_OFF ); /* Start with all LEDs off. */ +} +/*-----------------------------------------------------------*/ + +void vParTestSetLED( unsigned portBASE_TYPE uxLED, signed portBASE_TYPE xValue ) +{ +unsigned portCHAR ucBit; + + if( uxLED >= partstMAX_OUTPUT_LED ) + { + return; + } + + ucBit = ( ( unsigned portCHAR ) 1 ) << uxLED; + + vTaskSuspendAll(); + { + if( xValue == pdTRUE ) + { + ucCurrentOutputValue |= ucBit; + } + else + { + ucCurrentOutputValue &= ~ucBit; + } + + LED_Display(ucCurrentOutputValue); + } + xTaskResumeAll(); +} +/*-----------------------------------------------------------*/ + +void vParTestToggleLED( unsigned portBASE_TYPE uxLED ) +{ +unsigned portCHAR ucBit; + + if( uxLED >= partstMAX_OUTPUT_LED ) + { + return; + } + + ucBit = ( ( unsigned portCHAR ) 1 ) << uxLED; + + vTaskSuspendAll(); + { + ucCurrentOutputValue ^= ucBit; + LED_Display(ucCurrentOutputValue); + } + xTaskResumeAll(); +} diff --git a/Demo/AVR32_UC3/UTILS/PREPROCESSOR/mrepeat.h b/Demo/AVR32_UC3/UTILS/PREPROCESSOR/mrepeat.h new file mode 100644 index 000000000..3457d20f8 --- /dev/null +++ b/Demo/AVR32_UC3/UTILS/PREPROCESSOR/mrepeat.h @@ -0,0 +1,325 @@ +/* This header file is part of the ATMEL FREERTOS-0.9.0 Release */ + +/*This file is prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief Preprocessor macro repeating utils. + * + * - Compiler: IAR EWAVR32 and GNU GCC for AVR32 + * - Supported devices: All AVR32 devices can be used. + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support email: avr32@atmel.com + * + ******************************************************************************/ + +/* Copyright (c) 2007, Atmel Corporation All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of ATMEL may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND + * SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + + +#ifndef _MREPEAT_H_ +#define _MREPEAT_H_ + +#include "preprocessor.h" + + +//! Maximal number of repetitions supported by MREPEAT. +#define MREPEAT_LIMIT 256 + +/*! \brief Macro repeat. + * + * This macro represents a horizontal repetition construct. + * + * \param count The number of repetitious calls to macro. Valid values range from 0 to MREPEAT_LIMIT. + * \param macro A binary operation of the form macro(n, data). This macro is expanded by MREPEAT with + * the current repetition number and the auxiliary data argument. + * \param data Auxiliary data passed to macro. + * + * \return macro(0, data) macro(1, data) ... macro(count - 1, data) + */ +#define MREPEAT(count, macro, data) TPASTE2(MREPEAT, count)(macro, data) + +#define MREPEAT0( macro, data) +#define MREPEAT1( macro, data) MREPEAT0( macro, data) macro( 0, data) +#define MREPEAT2( macro, data) MREPEAT1( macro, data) macro( 1, data) +#define MREPEAT3( macro, data) MREPEAT2( macro, data) macro( 2, data) +#define MREPEAT4( macro, data) MREPEAT3( macro, data) macro( 3, data) +#define MREPEAT5( macro, data) MREPEAT4( macro, data) macro( 4, data) +#define MREPEAT6( macro, data) MREPEAT5( macro, data) macro( 5, data) +#define MREPEAT7( macro, data) MREPEAT6( macro, data) macro( 6, data) +#define MREPEAT8( macro, data) MREPEAT7( macro, data) macro( 7, data) +#define MREPEAT9( macro, data) MREPEAT8( macro, data) macro( 8, data) +#define MREPEAT10( macro, data) MREPEAT9( macro, data) macro( 9, data) +#define MREPEAT11( macro, data) MREPEAT10( macro, data) macro( 10, data) +#define MREPEAT12( macro, data) MREPEAT11( macro, data) macro( 11, data) +#define MREPEAT13( macro, data) MREPEAT12( macro, data) macro( 12, data) +#define MREPEAT14( macro, data) MREPEAT13( macro, data) macro( 13, data) +#define MREPEAT15( macro, data) MREPEAT14( macro, data) macro( 14, data) +#define MREPEAT16( macro, data) MREPEAT15( macro, data) macro( 15, data) +#define MREPEAT17( macro, data) MREPEAT16( macro, data) macro( 16, data) +#define MREPEAT18( macro, data) MREPEAT17( macro, data) macro( 17, data) +#define MREPEAT19( macro, data) MREPEAT18( macro, data) macro( 18, data) +#define MREPEAT20( macro, data) MREPEAT19( macro, data) macro( 19, data) +#define MREPEAT21( macro, data) MREPEAT20( macro, data) macro( 20, data) +#define MREPEAT22( macro, data) MREPEAT21( macro, data) macro( 21, data) +#define MREPEAT23( macro, data) MREPEAT22( macro, data) macro( 22, data) +#define MREPEAT24( macro, data) MREPEAT23( macro, data) macro( 23, data) +#define MREPEAT25( macro, data) MREPEAT24( macro, data) macro( 24, data) +#define MREPEAT26( macro, data) MREPEAT25( macro, data) macro( 25, data) +#define MREPEAT27( macro, data) MREPEAT26( macro, data) macro( 26, data) +#define MREPEAT28( macro, data) MREPEAT27( macro, data) macro( 27, data) +#define MREPEAT29( macro, data) MREPEAT28( macro, data) macro( 28, data) +#define MREPEAT30( macro, data) MREPEAT29( macro, data) macro( 29, data) +#define MREPEAT31( macro, data) MREPEAT30( macro, data) macro( 30, data) +#define MREPEAT32( macro, data) MREPEAT31( macro, data) macro( 31, data) +#define MREPEAT33( macro, data) MREPEAT32( macro, data) macro( 32, data) +#define MREPEAT34( macro, data) MREPEAT33( macro, data) macro( 33, data) +#define MREPEAT35( macro, data) MREPEAT34( macro, data) macro( 34, data) +#define MREPEAT36( macro, data) MREPEAT35( macro, data) macro( 35, data) +#define MREPEAT37( macro, data) MREPEAT36( macro, data) macro( 36, data) +#define MREPEAT38( macro, data) MREPEAT37( macro, data) macro( 37, data) +#define MREPEAT39( macro, data) MREPEAT38( macro, data) macro( 38, data) +#define MREPEAT40( macro, data) MREPEAT39( macro, data) macro( 39, data) +#define MREPEAT41( macro, data) MREPEAT40( macro, data) macro( 40, data) +#define MREPEAT42( macro, data) MREPEAT41( macro, data) macro( 41, data) +#define MREPEAT43( macro, data) MREPEAT42( macro, data) macro( 42, data) +#define MREPEAT44( macro, data) MREPEAT43( macro, data) macro( 43, data) +#define MREPEAT45( macro, data) MREPEAT44( macro, data) macro( 44, data) +#define MREPEAT46( macro, data) MREPEAT45( macro, data) macro( 45, data) +#define MREPEAT47( macro, data) MREPEAT46( macro, data) macro( 46, data) +#define MREPEAT48( macro, data) MREPEAT47( macro, data) macro( 47, data) +#define MREPEAT49( macro, data) MREPEAT48( macro, data) macro( 48, data) +#define MREPEAT50( macro, data) MREPEAT49( macro, data) macro( 49, data) +#define MREPEAT51( macro, data) MREPEAT50( macro, data) macro( 50, data) +#define MREPEAT52( macro, data) MREPEAT51( macro, data) macro( 51, data) +#define MREPEAT53( macro, data) MREPEAT52( macro, data) macro( 52, data) +#define MREPEAT54( macro, data) MREPEAT53( macro, data) macro( 53, data) +#define MREPEAT55( macro, data) MREPEAT54( macro, data) macro( 54, data) +#define MREPEAT56( macro, data) MREPEAT55( macro, data) macro( 55, data) +#define MREPEAT57( macro, data) MREPEAT56( macro, data) macro( 56, data) +#define MREPEAT58( macro, data) MREPEAT57( macro, data) macro( 57, data) +#define MREPEAT59( macro, data) MREPEAT58( macro, data) macro( 58, data) +#define MREPEAT60( macro, data) MREPEAT59( macro, data) macro( 59, data) +#define MREPEAT61( macro, data) MREPEAT60( macro, data) macro( 60, data) +#define MREPEAT62( macro, data) MREPEAT61( macro, data) macro( 61, data) +#define MREPEAT63( macro, data) MREPEAT62( macro, data) macro( 62, data) +#define MREPEAT64( macro, data) MREPEAT63( macro, data) macro( 63, data) +#define MREPEAT65( macro, data) MREPEAT64( macro, data) macro( 64, data) +#define MREPEAT66( macro, data) MREPEAT65( macro, data) macro( 65, data) +#define MREPEAT67( macro, data) MREPEAT66( macro, data) macro( 66, data) +#define MREPEAT68( macro, data) MREPEAT67( macro, data) macro( 67, data) +#define MREPEAT69( macro, data) MREPEAT68( macro, data) macro( 68, data) +#define MREPEAT70( macro, data) MREPEAT69( macro, data) macro( 69, data) +#define MREPEAT71( macro, data) MREPEAT70( macro, data) macro( 70, data) +#define MREPEAT72( macro, data) MREPEAT71( macro, data) macro( 71, data) +#define MREPEAT73( macro, data) MREPEAT72( macro, data) macro( 72, data) +#define MREPEAT74( macro, data) MREPEAT73( macro, data) macro( 73, data) +#define MREPEAT75( macro, data) MREPEAT74( macro, data) macro( 74, data) +#define MREPEAT76( macro, data) MREPEAT75( macro, data) macro( 75, data) +#define MREPEAT77( macro, data) MREPEAT76( macro, data) macro( 76, data) +#define MREPEAT78( macro, data) MREPEAT77( macro, data) macro( 77, data) +#define MREPEAT79( macro, data) MREPEAT78( macro, data) macro( 78, data) +#define MREPEAT80( macro, data) MREPEAT79( macro, data) macro( 79, data) +#define MREPEAT81( macro, data) MREPEAT80( macro, data) macro( 80, data) +#define MREPEAT82( macro, data) MREPEAT81( macro, data) macro( 81, data) +#define MREPEAT83( macro, data) MREPEAT82( macro, data) macro( 82, data) +#define MREPEAT84( macro, data) MREPEAT83( macro, data) macro( 83, data) +#define MREPEAT85( macro, data) MREPEAT84( macro, data) macro( 84, data) +#define MREPEAT86( macro, data) MREPEAT85( macro, data) macro( 85, data) +#define MREPEAT87( macro, data) MREPEAT86( macro, data) macro( 86, data) +#define MREPEAT88( macro, data) MREPEAT87( macro, data) macro( 87, data) +#define MREPEAT89( macro, data) MREPEAT88( macro, data) macro( 88, data) +#define MREPEAT90( macro, data) MREPEAT89( macro, data) macro( 89, data) +#define MREPEAT91( macro, data) MREPEAT90( macro, data) macro( 90, data) +#define MREPEAT92( macro, data) MREPEAT91( macro, data) macro( 91, data) +#define MREPEAT93( macro, data) MREPEAT92( macro, data) macro( 92, data) +#define MREPEAT94( macro, data) MREPEAT93( macro, data) macro( 93, data) +#define MREPEAT95( macro, data) MREPEAT94( macro, data) macro( 94, data) +#define MREPEAT96( macro, data) MREPEAT95( macro, data) macro( 95, data) +#define MREPEAT97( macro, data) MREPEAT96( macro, data) macro( 96, data) +#define MREPEAT98( macro, data) MREPEAT97( macro, data) macro( 97, data) +#define MREPEAT99( macro, data) MREPEAT98( macro, data) macro( 98, data) +#define MREPEAT100(macro, data) MREPEAT99( macro, data) macro( 99, data) +#define MREPEAT101(macro, data) MREPEAT100(macro, data) macro(100, data) +#define MREPEAT102(macro, data) MREPEAT101(macro, data) macro(101, data) +#define MREPEAT103(macro, data) MREPEAT102(macro, data) macro(102, data) +#define MREPEAT104(macro, data) MREPEAT103(macro, data) macro(103, data) +#define MREPEAT105(macro, data) MREPEAT104(macro, data) macro(104, data) +#define MREPEAT106(macro, data) MREPEAT105(macro, data) macro(105, data) +#define MREPEAT107(macro, data) MREPEAT106(macro, data) macro(106, data) +#define MREPEAT108(macro, data) MREPEAT107(macro, data) macro(107, data) +#define MREPEAT109(macro, data) MREPEAT108(macro, data) macro(108, data) +#define MREPEAT110(macro, data) MREPEAT109(macro, data) macro(109, data) +#define MREPEAT111(macro, data) MREPEAT110(macro, data) macro(110, data) +#define MREPEAT112(macro, data) MREPEAT111(macro, data) macro(111, data) +#define MREPEAT113(macro, data) MREPEAT112(macro, data) macro(112, data) +#define MREPEAT114(macro, data) MREPEAT113(macro, data) macro(113, data) +#define MREPEAT115(macro, data) MREPEAT114(macro, data) macro(114, data) +#define MREPEAT116(macro, data) MREPEAT115(macro, data) macro(115, data) +#define MREPEAT117(macro, data) MREPEAT116(macro, data) macro(116, data) +#define MREPEAT118(macro, data) MREPEAT117(macro, data) macro(117, data) +#define MREPEAT119(macro, data) MREPEAT118(macro, data) macro(118, data) +#define MREPEAT120(macro, data) MREPEAT119(macro, data) macro(119, data) +#define MREPEAT121(macro, data) MREPEAT120(macro, data) macro(120, data) +#define MREPEAT122(macro, data) MREPEAT121(macro, data) macro(121, data) +#define MREPEAT123(macro, data) MREPEAT122(macro, data) macro(122, data) +#define MREPEAT124(macro, data) MREPEAT123(macro, data) macro(123, data) +#define MREPEAT125(macro, data) MREPEAT124(macro, data) macro(124, data) +#define MREPEAT126(macro, data) MREPEAT125(macro, data) macro(125, data) +#define MREPEAT127(macro, data) MREPEAT126(macro, data) macro(126, data) +#define MREPEAT128(macro, data) MREPEAT127(macro, data) macro(127, data) +#define MREPEAT129(macro, data) MREPEAT128(macro, data) macro(128, data) +#define MREPEAT130(macro, data) MREPEAT129(macro, data) macro(129, data) +#define MREPEAT131(macro, data) MREPEAT130(macro, data) macro(130, data) +#define MREPEAT132(macro, data) MREPEAT131(macro, data) macro(131, data) +#define MREPEAT133(macro, data) MREPEAT132(macro, data) macro(132, data) +#define MREPEAT134(macro, data) MREPEAT133(macro, data) macro(133, data) +#define MREPEAT135(macro, data) MREPEAT134(macro, data) macro(134, data) +#define MREPEAT136(macro, data) MREPEAT135(macro, data) macro(135, data) +#define MREPEAT137(macro, data) MREPEAT136(macro, data) macro(136, data) +#define MREPEAT138(macro, data) MREPEAT137(macro, data) macro(137, data) +#define MREPEAT139(macro, data) MREPEAT138(macro, data) macro(138, data) +#define MREPEAT140(macro, data) MREPEAT139(macro, data) macro(139, data) +#define MREPEAT141(macro, data) MREPEAT140(macro, data) macro(140, data) +#define MREPEAT142(macro, data) MREPEAT141(macro, data) macro(141, data) +#define MREPEAT143(macro, data) MREPEAT142(macro, data) macro(142, data) +#define MREPEAT144(macro, data) MREPEAT143(macro, data) macro(143, data) +#define MREPEAT145(macro, data) MREPEAT144(macro, data) macro(144, data) +#define MREPEAT146(macro, data) MREPEAT145(macro, data) macro(145, data) +#define MREPEAT147(macro, data) MREPEAT146(macro, data) macro(146, data) +#define MREPEAT148(macro, data) MREPEAT147(macro, data) macro(147, data) +#define MREPEAT149(macro, data) MREPEAT148(macro, data) macro(148, data) +#define MREPEAT150(macro, data) MREPEAT149(macro, data) macro(149, data) +#define MREPEAT151(macro, data) MREPEAT150(macro, data) macro(150, data) +#define MREPEAT152(macro, data) MREPEAT151(macro, data) macro(151, data) +#define MREPEAT153(macro, data) MREPEAT152(macro, data) macro(152, data) +#define MREPEAT154(macro, data) MREPEAT153(macro, data) macro(153, data) +#define MREPEAT155(macro, data) MREPEAT154(macro, data) macro(154, data) +#define MREPEAT156(macro, data) MREPEAT155(macro, data) macro(155, data) +#define MREPEAT157(macro, data) MREPEAT156(macro, data) macro(156, data) +#define MREPEAT158(macro, data) MREPEAT157(macro, data) macro(157, data) +#define MREPEAT159(macro, data) MREPEAT158(macro, data) macro(158, data) +#define MREPEAT160(macro, data) MREPEAT159(macro, data) macro(159, data) +#define MREPEAT161(macro, data) MREPEAT160(macro, data) macro(160, data) +#define MREPEAT162(macro, data) MREPEAT161(macro, data) macro(161, data) +#define MREPEAT163(macro, data) MREPEAT162(macro, data) macro(162, data) +#define MREPEAT164(macro, data) MREPEAT163(macro, data) macro(163, data) +#define MREPEAT165(macro, data) MREPEAT164(macro, data) macro(164, data) +#define MREPEAT166(macro, data) MREPEAT165(macro, data) macro(165, data) +#define MREPEAT167(macro, data) MREPEAT166(macro, data) macro(166, data) +#define MREPEAT168(macro, data) MREPEAT167(macro, data) macro(167, data) +#define MREPEAT169(macro, data) MREPEAT168(macro, data) macro(168, data) +#define MREPEAT170(macro, data) MREPEAT169(macro, data) macro(169, data) +#define MREPEAT171(macro, data) MREPEAT170(macro, data) macro(170, data) +#define MREPEAT172(macro, data) MREPEAT171(macro, data) macro(171, data) +#define MREPEAT173(macro, data) MREPEAT172(macro, data) macro(172, data) +#define MREPEAT174(macro, data) MREPEAT173(macro, data) macro(173, data) +#define MREPEAT175(macro, data) MREPEAT174(macro, data) macro(174, data) +#define MREPEAT176(macro, data) MREPEAT175(macro, data) macro(175, data) +#define MREPEAT177(macro, data) MREPEAT176(macro, data) macro(176, data) +#define MREPEAT178(macro, data) MREPEAT177(macro, data) macro(177, data) +#define MREPEAT179(macro, data) MREPEAT178(macro, data) macro(178, data) +#define MREPEAT180(macro, data) MREPEAT179(macro, data) macro(179, data) +#define MREPEAT181(macro, data) MREPEAT180(macro, data) macro(180, data) +#define MREPEAT182(macro, data) MREPEAT181(macro, data) macro(181, data) +#define MREPEAT183(macro, data) MREPEAT182(macro, data) macro(182, data) +#define MREPEAT184(macro, data) MREPEAT183(macro, data) macro(183, data) +#define MREPEAT185(macro, data) MREPEAT184(macro, data) macro(184, data) +#define MREPEAT186(macro, data) MREPEAT185(macro, data) macro(185, data) +#define MREPEAT187(macro, data) MREPEAT186(macro, data) macro(186, data) +#define MREPEAT188(macro, data) MREPEAT187(macro, data) macro(187, data) +#define MREPEAT189(macro, data) MREPEAT188(macro, data) macro(188, data) +#define MREPEAT190(macro, data) MREPEAT189(macro, data) macro(189, data) +#define MREPEAT191(macro, data) MREPEAT190(macro, data) macro(190, data) +#define MREPEAT192(macro, data) MREPEAT191(macro, data) macro(191, data) +#define MREPEAT193(macro, data) MREPEAT192(macro, data) macro(192, data) +#define MREPEAT194(macro, data) MREPEAT193(macro, data) macro(193, data) +#define MREPEAT195(macro, data) MREPEAT194(macro, data) macro(194, data) +#define MREPEAT196(macro, data) MREPEAT195(macro, data) macro(195, data) +#define MREPEAT197(macro, data) MREPEAT196(macro, data) macro(196, data) +#define MREPEAT198(macro, data) MREPEAT197(macro, data) macro(197, data) +#define MREPEAT199(macro, data) MREPEAT198(macro, data) macro(198, data) +#define MREPEAT200(macro, data) MREPEAT199(macro, data) macro(199, data) +#define MREPEAT201(macro, data) MREPEAT200(macro, data) macro(200, data) +#define MREPEAT202(macro, data) MREPEAT201(macro, data) macro(201, data) +#define MREPEAT203(macro, data) MREPEAT202(macro, data) macro(202, data) +#define MREPEAT204(macro, data) MREPEAT203(macro, data) macro(203, data) +#define MREPEAT205(macro, data) MREPEAT204(macro, data) macro(204, data) +#define MREPEAT206(macro, data) MREPEAT205(macro, data) macro(205, data) +#define MREPEAT207(macro, data) MREPEAT206(macro, data) macro(206, data) +#define MREPEAT208(macro, data) MREPEAT207(macro, data) macro(207, data) +#define MREPEAT209(macro, data) MREPEAT208(macro, data) macro(208, data) +#define MREPEAT210(macro, data) MREPEAT209(macro, data) macro(209, data) +#define MREPEAT211(macro, data) MREPEAT210(macro, data) macro(210, data) +#define MREPEAT212(macro, data) MREPEAT211(macro, data) macro(211, data) +#define MREPEAT213(macro, data) MREPEAT212(macro, data) macro(212, data) +#define MREPEAT214(macro, data) MREPEAT213(macro, data) macro(213, data) +#define MREPEAT215(macro, data) MREPEAT214(macro, data) macro(214, data) +#define MREPEAT216(macro, data) MREPEAT215(macro, data) macro(215, data) +#define MREPEAT217(macro, data) MREPEAT216(macro, data) macro(216, data) +#define MREPEAT218(macro, data) MREPEAT217(macro, data) macro(217, data) +#define MREPEAT219(macro, data) MREPEAT218(macro, data) macro(218, data) +#define MREPEAT220(macro, data) MREPEAT219(macro, data) macro(219, data) +#define MREPEAT221(macro, data) MREPEAT220(macro, data) macro(220, data) +#define MREPEAT222(macro, data) MREPEAT221(macro, data) macro(221, data) +#define MREPEAT223(macro, data) MREPEAT222(macro, data) macro(222, data) +#define MREPEAT224(macro, data) MREPEAT223(macro, data) macro(223, data) +#define MREPEAT225(macro, data) MREPEAT224(macro, data) macro(224, data) +#define MREPEAT226(macro, data) MREPEAT225(macro, data) macro(225, data) +#define MREPEAT227(macro, data) MREPEAT226(macro, data) macro(226, data) +#define MREPEAT228(macro, data) MREPEAT227(macro, data) macro(227, data) +#define MREPEAT229(macro, data) MREPEAT228(macro, data) macro(228, data) +#define MREPEAT230(macro, data) MREPEAT229(macro, data) macro(229, data) +#define MREPEAT231(macro, data) MREPEAT230(macro, data) macro(230, data) +#define MREPEAT232(macro, data) MREPEAT231(macro, data) macro(231, data) +#define MREPEAT233(macro, data) MREPEAT232(macro, data) macro(232, data) +#define MREPEAT234(macro, data) MREPEAT233(macro, data) macro(233, data) +#define MREPEAT235(macro, data) MREPEAT234(macro, data) macro(234, data) +#define MREPEAT236(macro, data) MREPEAT235(macro, data) macro(235, data) +#define MREPEAT237(macro, data) MREPEAT236(macro, data) macro(236, data) +#define MREPEAT238(macro, data) MREPEAT237(macro, data) macro(237, data) +#define MREPEAT239(macro, data) MREPEAT238(macro, data) macro(238, data) +#define MREPEAT240(macro, data) MREPEAT239(macro, data) macro(239, data) +#define MREPEAT241(macro, data) MREPEAT240(macro, data) macro(240, data) +#define MREPEAT242(macro, data) MREPEAT241(macro, data) macro(241, data) +#define MREPEAT243(macro, data) MREPEAT242(macro, data) macro(242, data) +#define MREPEAT244(macro, data) MREPEAT243(macro, data) macro(243, data) +#define MREPEAT245(macro, data) MREPEAT244(macro, data) macro(244, data) +#define MREPEAT246(macro, data) MREPEAT245(macro, data) macro(245, data) +#define MREPEAT247(macro, data) MREPEAT246(macro, data) macro(246, data) +#define MREPEAT248(macro, data) MREPEAT247(macro, data) macro(247, data) +#define MREPEAT249(macro, data) MREPEAT248(macro, data) macro(248, data) +#define MREPEAT250(macro, data) MREPEAT249(macro, data) macro(249, data) +#define MREPEAT251(macro, data) MREPEAT250(macro, data) macro(250, data) +#define MREPEAT252(macro, data) MREPEAT251(macro, data) macro(251, data) +#define MREPEAT253(macro, data) MREPEAT252(macro, data) macro(252, data) +#define MREPEAT254(macro, data) MREPEAT253(macro, data) macro(253, data) +#define MREPEAT255(macro, data) MREPEAT254(macro, data) macro(254, data) +#define MREPEAT256(macro, data) MREPEAT255(macro, data) macro(255, data) + + +#endif // _MREPEAT_H_ diff --git a/Demo/AVR32_UC3/UTILS/PREPROCESSOR/preprocessor.h b/Demo/AVR32_UC3/UTILS/PREPROCESSOR/preprocessor.h new file mode 100644 index 000000000..47e4cd2e8 --- /dev/null +++ b/Demo/AVR32_UC3/UTILS/PREPROCESSOR/preprocessor.h @@ -0,0 +1,52 @@ +/* This header file is part of the ATMEL FREERTOS-0.9.0 Release */ + +/*This file is prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief Preprocessor utils. + * + * - Compiler: IAR EWAVR32 and GNU GCC for AVR32 + * - Supported devices: All AVR32 devices can be used. + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support email: avr32@atmel.com + * + ******************************************************************************/ + +/* Copyright (c) 2007, Atmel Corporation All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of ATMEL may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND + * SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + + +#ifndef _PREPROCESSOR_H_ +#define _PREPROCESSOR_H_ + +#include "tpaste.h" +#include "stringz.h" +#include "mrepeat.h" + + +#endif // _PREPROCESSOR_H_ diff --git a/Demo/AVR32_UC3/UTILS/PREPROCESSOR/stringz.h b/Demo/AVR32_UC3/UTILS/PREPROCESSOR/stringz.h new file mode 100644 index 000000000..fbeb5156c --- /dev/null +++ b/Demo/AVR32_UC3/UTILS/PREPROCESSOR/stringz.h @@ -0,0 +1,72 @@ +/* This header file is part of the ATMEL FREERTOS-0.9.0 Release */ + +/*This file is prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief Preprocessor stringizing utils. + * + * - Compiler: IAR EWAVR32 and GNU GCC for AVR32 + * - Supported devices: All AVR32 devices can be used. + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support email: avr32@atmel.com + * + ******************************************************************************/ + +/* Copyright (c) 2007, Atmel Corporation All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of ATMEL may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND + * SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + + +#ifndef _STRINGZ_H_ +#define _STRINGZ_H_ + + +/*! \brief Stringize. + * + * Stringize a preprocessing token, this token being allowed to be #defined. + * + * May be used only within macros with the token passed as an argument if the token is #defined. + * + * For example, writing STRINGZ(PIN) within a macro #defined by PIN_NAME(PIN) + * and invoked as PIN_NAME(PIN0) with PIN0 #defined as A0 is equivalent to + * writing "A0". + */ +#define STRINGZ(x) #x + +/*! \brief Absolute stringize. + * + * Stringize a preprocessing token, this token being allowed to be #defined. + * + * No restriction of use if the token is #defined. + * + * For example, writing ASTRINGZ(PIN0) anywhere with PIN0 #defined as A0 is + * equivalent to writing "A0". + */ +#define ASTRINGZ(x) STRINGZ(x) + + +#endif // _STRINGZ_H_ diff --git a/Demo/AVR32_UC3/UTILS/PREPROCESSOR/tpaste.h b/Demo/AVR32_UC3/UTILS/PREPROCESSOR/tpaste.h new file mode 100644 index 000000000..bcedcd01d --- /dev/null +++ b/Demo/AVR32_UC3/UTILS/PREPROCESSOR/tpaste.h @@ -0,0 +1,92 @@ +/* This header file is part of the ATMEL FREERTOS-0.9.0 Release */ + +/*This file is prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief Preprocessor token pasting utils. + * + * - Compiler: IAR EWAVR32 and GNU GCC for AVR32 + * - Supported devices: All AVR32 devices can be used. + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support email: avr32@atmel.com + * + ******************************************************************************/ + +/* Copyright (c) 2007, Atmel Corporation All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of ATMEL may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND + * SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + + +#ifndef _TPASTE_H_ +#define _TPASTE_H_ + + +/*! \name Token Paste + * + * Paste N preprocessing tokens together, these tokens being allowed to be #defined. + * + * May be used only within macros with the tokens passed as arguments if the tokens are #defined. + * + * For example, writing TPASTE2(U, WIDTH) within a macro #defined by + * UTYPE(WIDTH) and invoked as UTYPE(UL_WIDTH) with UL_WIDTH #defined as 32 is + * equivalent to writing U32. + */ +//! @{ +#define TPASTE2( a, b) a##b +#define TPASTE3( a, b, c) a##b##c +#define TPASTE4( a, b, c, d) a##b##c##d +#define TPASTE5( a, b, c, d, e) a##b##c##d##e +#define TPASTE6( a, b, c, d, e, f) a##b##c##d##e##f +#define TPASTE7( a, b, c, d, e, f, g) a##b##c##d##e##f##g +#define TPASTE8( a, b, c, d, e, f, g, h) a##b##c##d##e##f##g##h +#define TPASTE9( a, b, c, d, e, f, g, h, i) a##b##c##d##e##f##g##h##i +#define TPASTE10(a, b, c, d, e, f, g, h, i, j) a##b##c##d##e##f##g##h##i##j +//! @} + +/*! \name Absolute Token Paste + * + * Paste N preprocessing tokens together, these tokens being allowed to be #defined. + * + * No restriction of use if the tokens are #defined. + * + * For example, writing ATPASTE2(U, UL_WIDTH) anywhere with UL_WIDTH #defined + * as 32 is equivalent to writing U32. + */ +//! @{ +#define ATPASTE2( a, b) TPASTE2( a, b) +#define ATPASTE3( a, b, c) TPASTE3( a, b, c) +#define ATPASTE4( a, b, c, d) TPASTE4( a, b, c, d) +#define ATPASTE5( a, b, c, d, e) TPASTE5( a, b, c, d, e) +#define ATPASTE6( a, b, c, d, e, f) TPASTE6( a, b, c, d, e, f) +#define ATPASTE7( a, b, c, d, e, f, g) TPASTE7( a, b, c, d, e, f, g) +#define ATPASTE8( a, b, c, d, e, f, g, h) TPASTE8( a, b, c, d, e, f, g, h) +#define ATPASTE9( a, b, c, d, e, f, g, h, i) TPASTE9( a, b, c, d, e, f, g, h, i) +#define ATPASTE10(a, b, c, d, e, f, g, h, i, j) TPASTE10(a, b, c, d, e, f, g, h, i, j) +//! @} + + +#endif // _TPASTE_H_ diff --git a/Demo/AVR32_UC3/UTILS/compiler.h b/Demo/AVR32_UC3/UTILS/compiler.h new file mode 100644 index 000000000..77483303b --- /dev/null +++ b/Demo/AVR32_UC3/UTILS/compiler.h @@ -0,0 +1,880 @@ +/* This header file is part of the ATMEL FREERTOS-0.9.0 Release */ + +/*This file is prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief Compiler file for AVR32. + * + * This file defines commonly used types and macros. + * + * - Compiler: IAR EWAVR32 and GNU GCC for AVR32 + * - Supported devices: All AVR32 devices can be used. + * - AppNote: + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support email: avr32@atmel.com + * + ******************************************************************************/ + +/* Copyright (c) 2007, Atmel Corporation All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of ATMEL may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND + * SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + + +#ifndef _COMPILER_H_ +#define _COMPILER_H_ + +#if __GNUC__ +# include +#elif __ICCAVR32__ || __AAVR32__ +# include +# include +# if __ICCAVR32__ +# include +# endif +#else +# error Unknown compiler +#endif + +#include "preprocessor.h" + + +//_____ D E C L A R A T I O N S ____________________________________________ + +#ifdef __AVR32_ABI_COMPILER__ // Automatically defined when compiling for AVR32, not when assembling. + +#include +#include + +/*! \name Usual Types + */ +//! @{ +typedef unsigned char Bool; //!< Boolean. +typedef unsigned char U8 ; //!< 8-bit unsigned integer. +typedef unsigned short int U16; //!< 16-bit unsigned integer. +typedef unsigned long int U32; //!< 32-bit unsigned integer. +typedef unsigned long long int U64; //!< 64-bit unsigned integer. +typedef signed char S8 ; //!< 8-bit signed integer. +typedef signed short int S16; //!< 16-bit signed integer. +typedef signed long int S32; //!< 32-bit signed integer. +typedef signed long long int S64; //!< 64-bit signed integer. +typedef float F32; //!< 32-bit floating-point number. +typedef double F64; //!< 64-bit floating-point number. +//! @} + +/*! \name Status Types + */ +//! @{ +typedef Bool Status_bool_t; //!< Boolean status. +typedef U8 Status_t; //!< 8-bit-coded status. +//! @} + +#if __ICCAVR32__ + +/*! \name Compiler Keywords + * + * Translation of some keywords from GNU GCC for AVR32 to IAR Embedded Workbench for Atmel AVR32. + */ +//! @{ +#define __asm__ asm +#define __inline__ inline +#define __volatile__ +//! @} + +#endif + +/*! \name Aliasing Aggregate Types + */ +//! @{ + +//! 16-bit union. +typedef union +{ + U16 u16 ; + U8 u8 [2]; +} Union16; + +//! 32-bit union. +typedef union +{ + U32 u32 ; + U16 u16[2]; + U8 u8 [4]; +} Union32; + +//! 64-bit union. +typedef union +{ + U64 u64 ; + U32 u32[2]; + U16 u16[4]; + U8 u8 [8]; +} Union64; + +//! Union of pointers to 64-, 32-, 16- and 8-bit unsigned integers. +typedef union +{ + U64 *u64ptr; + U32 *u32ptr; + U16 *u16ptr; + U8 *u8ptr ; +} UnionPtr; + +//! Union of pointers to volatile 64-, 32-, 16- and 8-bit unsigned integers. +typedef union +{ + volatile U64 *u64ptr; + volatile U32 *u32ptr; + volatile U16 *u16ptr; + volatile U8 *u8ptr ; +} UnionVPtr; + +//! Union of pointers to constant 64-, 32-, 16- and 8-bit unsigned integers. +typedef union +{ + const U64 *u64ptr; + const U32 *u32ptr; + const U16 *u16ptr; + const U8 *u8ptr ; +} UnionCPtr; + +//! Union of pointers to constant volatile 64-, 32-, 16- and 8-bit unsigned integers. +typedef union +{ + const volatile U64 *u64ptr; + const volatile U32 *u32ptr; + const volatile U16 *u16ptr; + const volatile U8 *u8ptr ; +} UnionCVPtr; + +//! Structure of pointers to 64-, 32-, 16- and 8-bit unsigned integers. +typedef struct +{ + U64 *u64ptr; + U32 *u32ptr; + U16 *u16ptr; + U8 *u8ptr ; +} StructPtr; + +//! Structure of pointers to volatile 64-, 32-, 16- and 8-bit unsigned integers. +typedef struct +{ + volatile U64 *u64ptr; + volatile U32 *u32ptr; + volatile U16 *u16ptr; + volatile U8 *u8ptr ; +} StructVPtr; + +//! Structure of pointers to constant 64-, 32-, 16- and 8-bit unsigned integers. +typedef struct +{ + const U64 *u64ptr; + const U32 *u32ptr; + const U16 *u16ptr; + const U8 *u8ptr ; +} StructCPtr; + +//! Structure of pointers to constant volatile 64-, 32-, 16- and 8-bit unsigned integers. +typedef struct +{ + const volatile U64 *u64ptr; + const volatile U32 *u32ptr; + const volatile U16 *u16ptr; + const volatile U8 *u8ptr ; +} StructCVPtr; + +//! @} + +#endif // __AVR32_ABI_COMPILER__ + +//_____ M A C R O S ________________________________________________________ + +/*! \name Usual Constants + */ +//! @{ +#define DISABLE 0 +#define ENABLE 1 +#define DISABLED 0 +#define ENABLED 1 +#define OFF 0 +#define ON 1 +#define FALSE 0 +#define TRUE 1 +#define KO 0 +#define OK 1 +#define PASS 0 +#define FAIL 1 +#define LOW 0 +#define HIGH 1 +#define CLR 0 +#define SET 1 +//! @} + +#ifdef __AVR32_ABI_COMPILER__ // Automatically defined when compiling for AVR32, not when assembling. + +/*! \name Bit-Field Handling Macros + */ +//! @{ + +/*! \brief Reads the bits of a value specified by a given bit-mask. + * + * \param value Value to read bits from. + * \param mask Bit-mask indicating bits to read. + * + * \return Read bits. + */ +#define Rd_bits( value, mask) ((value) & (mask)) + +/*! \brief Writes the bits of a C lvalue specified by a given bit-mask. + * + * \param lvalue C lvalue to write bits to. + * \param mask Bit-mask indicating bits to write. + * \param bits Bits to write. + * + * \return Resulting value with written bits. + */ +#define Wr_bits(lvalue, mask, bits) ((lvalue) = ((lvalue) & ~(mask)) |\ + ((bits ) & (mask))) + +/*! \brief Tests the bits of a value specified by a given bit-mask. + * + * \param value Value of which to test bits. + * \param mask Bit-mask indicating bits to test. + * + * \return \c 1 if at least one of the tested bits is set, else \c 0. + */ +#define Tst_bits( value, mask) (Rd_bits(value, mask) != 0) + +/*! \brief Clears the bits of a C lvalue specified by a given bit-mask. + * + * \param lvalue C lvalue of which to clear bits. + * \param mask Bit-mask indicating bits to clear. + * + * \return Resulting value with cleared bits. + */ +#define Clr_bits(lvalue, mask) ((lvalue) &= ~(mask)) + +/*! \brief Sets the bits of a C lvalue specified by a given bit-mask. + * + * \param lvalue C lvalue of which to set bits. + * \param mask Bit-mask indicating bits to set. + * + * \return Resulting value with set bits. + */ +#define Set_bits(lvalue, mask) ((lvalue) |= (mask)) + +/*! \brief Toggles the bits of a C lvalue specified by a given bit-mask. + * + * \param lvalue C lvalue of which to toggle bits. + * \param mask Bit-mask indicating bits to toggle. + * + * \return Resulting value with toggled bits. + */ +#define Tgl_bits(lvalue, mask) ((lvalue) ^= (mask)) + +/*! \brief Reads the bit-field of a value specified by a given bit-mask. + * + * \param value Value to read a bit-field from. + * \param mask Bit-mask indicating the bit-field to read. + * + * \return Read bit-field. + */ +#define Rd_bitfield( value, mask) (Rd_bits( value, mask) >> ctz(mask)) + +/*! \brief Writes the bit-field of a C lvalue specified by a given bit-mask. + * + * \param lvalue C lvalue to write a bit-field to. + * \param mask Bit-mask indicating the bit-field to write. + * \param bitfield Bit-field to write. + * + * \return Resulting value with written bit-field. + */ +#define Wr_bitfield(lvalue, mask, bitfield) (Wr_bits(lvalue, mask, (U32)(bitfield) << ctz(mask))) + +//! @} + +/*! \brief This macro is used to test fatal errors. + * + * The macro tests if the expression is FALSE. If it is, a fatal error is + * detected and the application hangs up. + * + * \param expr Expression to evaluate and supposed to be nonzero. + */ +#ifdef _ASSERT_ENABLE_ + #define Assert(expr) \ + {\ + if (!(expr)) while (TRUE);\ + } +#else + #define Assert(expr) +#endif + +/*! \name Zero-Bit Counting Macros + * + * Under AVR32-GCC, __builtin_clz and __builtin_ctz behave like macros when + * applied to constant expressions (values known at compile time), so they are + * more optimized than the use of the corresponding assembly instructions and + * they can be used as constant expressions e.g. to initialize objects having + * static storage duration, and like the corresponding assembly instructions + * when applied to non-constant expressions (values unknown at compile time), so + * they are more optimized than an assembly periphrasis. Hence, clz and ctz + * ensure a possible and optimized behavior for both constant and non-constant + * expressions. + */ +//! @{ + +/*! \brief Counts the leading zero bits of the given value considered as a 32-bit integer. + * + * \param u Value of which to count the leading zero bits. + * + * \return The count of leading zero bits in \a u. + */ +#if __GNUC__ + #define clz(u) __builtin_clz(u) +#elif __ICCAVR32__ + #define clz(u) __count_leading_zeros(u) +#endif + +/*! \brief Counts the trailing zero bits of the given value considered as a 32-bit integer. + * + * \param u Value of which to count the trailing zero bits. + * + * \return The count of trailing zero bits in \a u. + */ +#if __GNUC__ + #define ctz(u) __builtin_ctz(u) +#elif __ICCAVR32__ + #define ctz(u) __count_trailing_zeros(u) +#endif + +//! @} + +/*! \name Alignment Macros + */ +//! @{ + +/*! \brief Tests alignment of the number \a val with the \a n boundary. + * + * \param val Input value. + * \param n Boundary. + * + * \return \c 1 if the number \a val is aligned with the \a n boundary, else \c 0. + */ +#define Test_align(val, n ) (!Tst_bits( val, (n) - 1 ) ) + +/*! \brief Gets alignment of the number \a val with respect to the \a n boundary. + * + * \param val Input value. + * \param n Boundary. + * + * \return Alignment of the number \a val with respect to the \a n boundary. + */ +#define Get_align( val, n ) ( Rd_bits( val, (n) - 1 ) ) + +/*! \brief Sets alignment of the lvalue number \a lval to \a alg with respect to the \a n boundary. + * + * \param lval Input/output lvalue. + * \param n Boundary. + * \param alg Alignment. + * + * \return New value of \a lval resulting from its alignment set to \a alg with respect to the \a n boundary. + */ +#define Set_align(lval, n, alg) ( Wr_bits(lval, (n) - 1, alg) ) + +/*! \brief Aligns the number \a val with the upper \a n boundary. + * + * \param val Input value. + * \param n Boundary. + * + * \return Value resulting from the number \a val aligned with the upper \a n boundary. + */ +#define Align_up( val, n ) (((val) + ((n) - 1)) & ~((n) - 1)) + +/*! \brief Aligns the number \a val with the lower \a n boundary. + * + * \param val Input value. + * \param n Boundary. + * + * \return Value resulting from the number \a val aligned with the lower \a n boundary. + */ +#define Align_down(val, n ) ( (val) & ~((n) - 1)) + +//! @} + +/*! \name Mathematics Macros + * + * The same considerations as for clz and ctz apply here but AVR32-GCC does not + * provide built-in functions to access the assembly instructions abs, min and + * max and it does not produce them by itself in most cases, so two sets of + * macros are defined here: + * - Abs, Min and Max to apply to constant expressions (values known at + * compile time); + * - abs, min and max to apply to non-constant expressions (values unknown at + * compile time). + */ +//! @{ + +/*! \brief Takes the absolute value of \a a. + * + * \param a Input value. + * + * \return Absolute value of \a a. + * + * \note More optimized if only used with values known at compile time. + */ +#define Abs(a) (((a) < 0 ) ? -(a) : (a)) + +/*! \brief Takes the minimal value of \a a and \a b. + * + * \param a Input value. + * \param b Input value. + * + * \return Minimal value of \a a and \a b. + * + * \note More optimized if only used with values known at compile time. + */ +#define Min(a, b) (((a) < (b)) ? (a) : (b)) + +/*! \brief Takes the maximal value of \a a and \a b. + * + * \param a Input value. + * \param b Input value. + * + * \return Maximal value of \a a and \a b. + * + * \note More optimized if only used with values known at compile time. + */ +#define Max(a, b) (((a) > (b)) ? (a) : (b)) + +/*! \brief Takes the absolute value of \a a. + * + * \param a Input value. + * + * \return Absolute value of \a a. + * + * \note More optimized if only used with values unknown at compile time. + */ +#if __GNUC__ + #define abs(a) \ + (\ + {\ + int __value = (a);\ + __asm__ ("abs\t%0" : "+r" (__value) : : "cc");\ + __value;\ + }\ + ) +#elif __ICCAVR32__ + #define abs(a) Abs(a) +#endif + +/*! \brief Takes the minimal value of \a a and \a b. + * + * \param a Input value. + * \param b Input value. + * + * \return Minimal value of \a a and \a b. + * + * \note More optimized if only used with values unknown at compile time. + */ +#if __GNUC__ + #define min(a, b) \ + (\ + {\ + int __value, __arg_a = (a), __arg_b = (b);\ + __asm__ ("min\t%0, %1, %2" : "=r" (__value) : "r" (__arg_a), "r" (__arg_b));\ + __value;\ + }\ + ) +#elif __ICCAVR32__ + #define min(a, b) Min(a, b) +#endif + +/*! \brief Takes the maximal value of \a a and \a b. + * + * \param a Input value. + * \param b Input value. + * + * \return Maximal value of \a a and \a b. + * + * \note More optimized if only used with values unknown at compile time. + */ +#if __GNUC__ + #define max(a, b) \ + (\ + {\ + int __value, __arg_a = (a), __arg_b = (b);\ + __asm__ ("max\t%0, %1, %2" : "=r" (__value) : "r" (__arg_a), "r" (__arg_b));\ + __value;\ + }\ + ) +#elif __ICCAVR32__ + #define max(a, b) Max(a, b) +#endif + +//! @} + +/*! \brief Calls the routine at address \a addr. + * + * It generates a long call opcode. + * + * For example, `Long_call(0x80000000)' generates a software reset on a UC3 if + * it is invoked from the CPU supervisor mode. + * + * \param addr Address of the routine to call. + * + * \note It may be used as a long jump opcode in some special cases. + */ +#define Long_call(addr) ((*(void (*)(void))(addr))()) + +/*! \brief Resets the CPU by software. + * + * \warning It shall not be called from the CPU application mode. + */ +#if __GNUC__ + #define Reset_CPU() \ + (\ + {\ + __asm__ __volatile__ (\ + "lda.w r8, _start\n\t"\ + "lddpc r9, 1f\n\t"\ + "stm --sp, r8-r9\n\t"\ + "mfsr r8, %[SR]\n\t"\ + "bfextu r8, r8, %[SR_MX_OFFSET], %[SR_MX_SIZE]\n\t"\ + "cp.w r8, 0b001\n\t"\ + "breq 0f\n\t"\ + "rete\n"\ + "0:\n\t"\ + "rets\n\t"\ + ".balign 4\n"\ + "1:\n\t"\ + ".word %[RESET_SR]"\ + :\ + : [SR] "i" (AVR32_SR),\ + [SR_MX_OFFSET] "i" (AVR32_SR_M0_OFFSET),\ + [SR_MX_SIZE] "i" (AVR32_SR_M0_SIZE + AVR32_SR_M1_SIZE + AVR32_SR_M2_SIZE),\ + [RESET_SR] "i" (AVR32_SR_GM_MASK | AVR32_SR_EM_MASK | AVR32_SR_M0_MASK)\ + );\ + }\ + ) +#elif __ICCAVR32__ + #define Reset_CPU() \ + {\ + extern void *volatile __program_start;\ + __asm__ __volatile__ (\ + "mov r8, LWRD(__program_start)\n\t"\ + "orh r8, HWRD(__program_start)\n\t"\ + "mov r9, LWRD("ASTRINGZ(AVR32_SR_GM_MASK | AVR32_SR_EM_MASK | AVR32_SR_M0_MASK)")\n\t"\ + "orh r9, HWRD("ASTRINGZ(AVR32_SR_GM_MASK | AVR32_SR_EM_MASK | AVR32_SR_M0_MASK)")\n\t"\ + "stm --sp, r8-r9\n\t"\ + "mfsr r8, "ASTRINGZ(AVR32_SR)"\n\t"\ + "bfextu r8, r8, "ASTRINGZ(AVR32_SR_M0_OFFSET)", "ASTRINGZ(AVR32_SR_M0_SIZE + AVR32_SR_M1_SIZE + AVR32_SR_M2_SIZE)"\n\t"\ + "cp.w r8, 001b\n\t"\ + "breq $ + 4\n\t"\ + "rete\n\t"\ + "rets"\ + );\ + __program_start;\ +} +#endif + +/*! \name CPU Status Register Macros + */ +//! @{ + +/*! \brief Disables all exceptions. + */ +#if __GNUC__ + #define Disable_global_exception() ({__asm__ __volatile__ ("ssrf\t%0" : : "i" (AVR32_SR_EM_OFFSET));}) +#elif __ICCAVR32__ + #define Disable_global_exception() (__set_status_flag(AVR32_SR_EM_OFFSET)) +#endif + +/*! \brief Enables all exceptions. + */ +#if __GNUC__ + #define Enable_global_exception() ({__asm__ __volatile__ ("csrf\t%0" : : "i" (AVR32_SR_EM_OFFSET));}) +#elif __ICCAVR32__ + #define Enable_global_exception() (__clear_status_flag(AVR32_SR_EM_OFFSET)) +#endif + +/*! \brief Disables all interrupts. + */ +#if __GNUC__ + #define Disable_global_interrupt() ({__asm__ __volatile__ ("ssrf\t%0\n\tnop\n\tnop" : : "i" (AVR32_SR_GM_OFFSET));}) +#elif __ICCAVR32__ + #define Disable_global_interrupt() {__asm__ __volatile__ ("ssrf\t"ASTRINGZ(AVR32_SR_GM_OFFSET)"\n\tnop\n\tnop");} +#endif + +/*! \brief Enables all interrupts. + */ +#if __GNUC__ + #define Enable_global_interrupt() ({__asm__ __volatile__ ("csrf\t%0" : : "i" (AVR32_SR_GM_OFFSET));}) +#elif __ICCAVR32__ + #define Enable_global_interrupt() (__enable_interrupt()) +#endif + +/*! \brief Disables interrupt level \a int_lev. + * + * \param int_lev Interrupt level to disable (0 to 3). + */ +#if __GNUC__ + #define Disable_interrupt_level(int_lev) ({__asm__ __volatile__ ("ssrf\t%0\n\tnop\n\tnop" : : "i" (TPASTE3(AVR32_SR_I, int_lev, M_OFFSET)));}) +#elif __ICCAVR32__ + #define Disable_interrupt_level(int_lev) {__asm__ __volatile__ ("ssrf\t"ASTRINGZ(TPASTE3(AVR32_SR_I, int_lev, M_OFFSET))"\n\tnop\n\tnop");} +#endif + +/*! \brief Enables interrupt level \a int_lev. + * + * \param int_lev Interrupt level to enable (0 to 3). + */ +#if __GNUC__ + #define Enable_interrupt_level(int_lev) ({__asm__ __volatile__ ("csrf\t%0" : : "i" (TPASTE3(AVR32_SR_I, int_lev, M_OFFSET)));}) +#elif __ICCAVR32__ + #define Enable_interrupt_level(int_lev) (__clear_status_flag(TPASTE3(AVR32_SR_I, int_lev, M_OFFSET))) +#endif + +//! @} + +/*! \name System Register Access Macros + */ +//! @{ + +/*! \brief Gets the value of the \a sysreg system register. + * + * \param sysreg Address of the system register of which to get the value. + * + * \return Value of the \a sysreg system register. + */ +#if __GNUC__ + #define Get_system_register(sysreg) __builtin_mfsr(sysreg) +#elif __ICCAVR32__ + #define Get_system_register(sysreg) __get_system_register(sysreg) +#endif + +/*! \brief Sets the value of the \a sysreg system register to \a value. + * + * \param sysreg Address of the system register of which to set the value. + * \param value Value to set the \a sysreg system register to. + */ +#if __GNUC__ + #define Set_system_register(sysreg, value) __builtin_mtsr(sysreg, value) +#elif __ICCAVR32__ + #define Set_system_register(sysreg, value) __set_system_register(sysreg, value) +#endif + +//! @} + +#endif // __AVR32_ABI_COMPILER__ + +//! Boolean evaluating MCU little endianism. +#if (__GNUC__ && __AVR32__) || (__ICCAVR32__ || __AAVR32__) + #define LITTLE_ENDIAN_MCU FALSE +#endif + +// Check that MCU endianism is correctly defined. +#ifndef LITTLE_ENDIAN_MCU + #error YOU MUST define the MCU endianism with LITTLE_ENDIAN_MCU: either FALSE or TRUE +#endif + +//! Boolean evaluating MCU big endianism. +#define BIG_ENDIAN_MCU (!LITTLE_ENDIAN_MCU) + +#ifdef __AVR32_ABI_COMPILER__ // Automatically defined when compiling for AVR32, not when assembling. + +/*! \name U16/U32/U64 MCU Endianism Handling Macros + */ +//! @{ +#if LITTLE_ENDIAN_MCU + #define LSB(u16) (((U8 *)&(u16))[0]) //!< Least significant byte of \a u16. + #define MSB(u16) (((U8 *)&(u16))[1]) //!< Most significant byte of \a u16. + #define LSH(u32) (((U16 *)&(u32))[0]) //!< Least significant half-word of \a u32. + #define MSH(u32) (((U16 *)&(u32))[1]) //!< Most significant half-word of \a u32. + #define LSB0W(u32) (((U8 *)&(u32))[0]) //!< Least significant byte of 1st rank of \a u32. + #define LSB1W(u32) (((U8 *)&(u32))[1]) //!< Least significant byte of 2nd rank of \a u32. + #define LSB2W(u32) (((U8 *)&(u32))[2]) //!< Least significant byte of 3rd rank of \a u32. + #define LSB3W(u32) (((U8 *)&(u32))[3]) //!< Least significant byte of 4th rank of \a u32. + #define MSB3W(u32) LSB0W(u32) //!< Most significant byte of 1st rank of \a u32. + #define MSB2W(u32) LSB1W(u32) //!< Most significant byte of 2nd rank of \a u32. + #define MSB1W(u32) LSB2W(u32) //!< Most significant byte of 3rd rank of \a u32. + #define MSB0W(u32) LSB3W(u32) //!< Most significant byte of 4th rank of \a u32. + #define LSW(u64) (((U32 *)&(u64))[0]) //!< Least significant word of \a u64. + #define MSW(u64) (((U32 *)&(u64))[1]) //!< Most significant word of \a u64. + #define LSH0(u64) (((U16 *)&(u64))[0]) //!< Least significant half-word of 1st rank of \a u64. + #define LSH1(u64) (((U16 *)&(u64))[1]) //!< Least significant half-word of 2nd rank of \a u64. + #define LSH2(u64) (((U16 *)&(u64))[2]) //!< Least significant half-word of 3rd rank of \a u64. + #define LSH3(u64) (((U16 *)&(u64))[3]) //!< Least significant half-word of 4th rank of \a u64. + #define MSH3(u64) LSH0(u64) //!< Most significant half-word of 1st rank of \a u64. + #define MSH2(u64) LSH1(u64) //!< Most significant half-word of 2nd rank of \a u64. + #define MSH1(u64) LSH2(u64) //!< Most significant half-word of 3rd rank of \a u64. + #define MSH0(u64) LSH3(u64) //!< Most significant half-word of 4th rank of \a u64. + #define LSB0D(u64) (((U8 *)&(u64))[0]) //!< Least significant byte of 1st rank of \a u64. + #define LSB1D(u64) (((U8 *)&(u64))[1]) //!< Least significant byte of 2nd rank of \a u64. + #define LSB2D(u64) (((U8 *)&(u64))[2]) //!< Least significant byte of 3rd rank of \a u64. + #define LSB3D(u64) (((U8 *)&(u64))[3]) //!< Least significant byte of 4th rank of \a u64. + #define LSB4D(u64) (((U8 *)&(u64))[4]) //!< Least significant byte of 5th rank of \a u64. + #define LSB5D(u64) (((U8 *)&(u64))[5]) //!< Least significant byte of 6th rank of \a u64. + #define LSB6D(u64) (((U8 *)&(u64))[6]) //!< Least significant byte of 7th rank of \a u64. + #define LSB7D(u64) (((U8 *)&(u64))[7]) //!< Least significant byte of 8th rank of \a u64. + #define MSB7D(u64) LSB0D(u64) //!< Most significant byte of 1st rank of \a u64. + #define MSB6D(u64) LSB1D(u64) //!< Most significant byte of 2nd rank of \a u64. + #define MSB5D(u64) LSB2D(u64) //!< Most significant byte of 3rd rank of \a u64. + #define MSB4D(u64) LSB3D(u64) //!< Most significant byte of 4th rank of \a u64. + #define MSB3D(u64) LSB4D(u64) //!< Most significant byte of 5th rank of \a u64. + #define MSB2D(u64) LSB5D(u64) //!< Most significant byte of 6th rank of \a u64. + #define MSB1D(u64) LSB6D(u64) //!< Most significant byte of 7th rank of \a u64. + #define MSB0D(u64) LSB7D(u64) //!< Most significant byte of 8th rank of \a u64. +#else // BIG_ENDIAN_MCU + #define MSB(u16) (((U8 *)&(u16))[0]) //!< Most significant byte of \a u16. + #define LSB(u16) (((U8 *)&(u16))[1]) //!< Least significant byte of \a u16. + #define MSH(u32) (((U16 *)&(u32))[0]) //!< Most significant half-word of \a u32. + #define LSH(u32) (((U16 *)&(u32))[1]) //!< Least significant half-word of \a u32. + #define MSB0W(u32) (((U8 *)&(u32))[0]) //!< Most significant byte of 1st rank of \a u32. + #define MSB1W(u32) (((U8 *)&(u32))[1]) //!< Most significant byte of 2nd rank of \a u32. + #define MSB2W(u32) (((U8 *)&(u32))[2]) //!< Most significant byte of 3rd rank of \a u32. + #define MSB3W(u32) (((U8 *)&(u32))[3]) //!< Most significant byte of 4th rank of \a u32. + #define LSB3W(u32) MSB0W(u32) //!< Least significant byte of 1st rank of \a u32. + #define LSB2W(u32) MSB1W(u32) //!< Least significant byte of 2nd rank of \a u32. + #define LSB1W(u32) MSB2W(u32) //!< Least significant byte of 3rd rank of \a u32. + #define LSB0W(u32) MSB3W(u32) //!< Least significant byte of 4th rank of \a u32. + #define MSW(u64) (((U32 *)&(u64))[0]) //!< Most significant word of \a u64. + #define LSW(u64) (((U32 *)&(u64))[1]) //!< Least significant word of \a u64. + #define MSH0(u64) (((U16 *)&(u64))[0]) //!< Most significant half-word of 1st rank of \a u64. + #define MSH1(u64) (((U16 *)&(u64))[1]) //!< Most significant half-word of 2nd rank of \a u64. + #define MSH2(u64) (((U16 *)&(u64))[2]) //!< Most significant half-word of 3rd rank of \a u64. + #define MSH3(u64) (((U16 *)&(u64))[3]) //!< Most significant half-word of 4th rank of \a u64. + #define LSH3(u64) MSH0(u64) //!< Least significant half-word of 1st rank of \a u64. + #define LSH2(u64) MSH1(u64) //!< Least significant half-word of 2nd rank of \a u64. + #define LSH1(u64) MSH2(u64) //!< Least significant half-word of 3rd rank of \a u64. + #define LSH0(u64) MSH3(u64) //!< Least significant half-word of 4th rank of \a u64. + #define MSB0D(u64) (((U8 *)&(u64))[0]) //!< Most significant byte of 1st rank of \a u64. + #define MSB1D(u64) (((U8 *)&(u64))[1]) //!< Most significant byte of 2nd rank of \a u64. + #define MSB2D(u64) (((U8 *)&(u64))[2]) //!< Most significant byte of 3rd rank of \a u64. + #define MSB3D(u64) (((U8 *)&(u64))[3]) //!< Most significant byte of 4th rank of \a u64. + #define MSB4D(u64) (((U8 *)&(u64))[4]) //!< Most significant byte of 5th rank of \a u64. + #define MSB5D(u64) (((U8 *)&(u64))[5]) //!< Most significant byte of 6th rank of \a u64. + #define MSB6D(u64) (((U8 *)&(u64))[6]) //!< Most significant byte of 7th rank of \a u64. + #define MSB7D(u64) (((U8 *)&(u64))[7]) //!< Most significant byte of 8th rank of \a u64. + #define LSB7D(u64) MSB0D(u64) //!< Least significant byte of 1st rank of \a u64. + #define LSB6D(u64) MSB1D(u64) //!< Least significant byte of 2nd rank of \a u64. + #define LSB5D(u64) MSB2D(u64) //!< Least significant byte of 3rd rank of \a u64. + #define LSB4D(u64) MSB3D(u64) //!< Least significant byte of 4th rank of \a u64. + #define LSB3D(u64) MSB4D(u64) //!< Least significant byte of 5th rank of \a u64. + #define LSB2D(u64) MSB5D(u64) //!< Least significant byte of 6th rank of \a u64. + #define LSB1D(u64) MSB6D(u64) //!< Least significant byte of 7th rank of \a u64. + #define LSB0D(u64) MSB7D(u64) //!< Least significant byte of 8th rank of \a u64. +#endif +//! @} + +/*! \name Endianism Conversion Macros + * + * The same considerations as for clz and ctz apply here but AVR32-GCC's + * __builtin_bswap_16 and __builtin_bswap_32 do not behave like macros when + * applied to constant expressions, so two sets of macros are defined here: + * - Swap16, Swap32 and Swap64 to apply to constant expressions (values known + * at compile time); + * - swap16, swap32 and swap64 to apply to non-constant expressions (values + * unknown at compile time). + */ +//! @{ + +/*! \brief Toggles the endianism of \a u16 (by swapping its bytes). + * + * \param u16 U16 of which to toggle the endianism. + * + * \return Value resulting from \a u16 with toggled endianism. + * + * \note More optimized if only used with values known at compile time. + */ +#define Swap16(u16) ((U16)(((U16)(u16) >> 8) |\ + ((U16)(u16) << 8))) + +/*! \brief Toggles the endianism of \a u32 (by swapping its bytes). + * + * \param u32 U32 of which to toggle the endianism. + * + * \return Value resulting from \a u32 with toggled endianism. + * + * \note More optimized if only used with values known at compile time. + */ +#define Swap32(u32) ((U32)(((U32)Swap16((U32)(u32) >> 16)) |\ + ((U32)Swap16((U32)(u32)) << 16))) + +/*! \brief Toggles the endianism of \a u64 (by swapping its bytes). + * + * \param u64 U64 of which to toggle the endianism. + * + * \return Value resulting from \a u64 with toggled endianism. + * + * \note More optimized if only used with values known at compile time. + */ +#define Swap64(u64) ((U64)(((U64)Swap32((U64)(u64) >> 32)) |\ + ((U64)Swap32((U64)(u64)) << 32))) + +/*! \brief Toggles the endianism of \a u16 (by swapping its bytes). + * + * \param u16 U16 of which to toggle the endianism. + * + * \return Value resulting from \a u16 with toggled endianism. + * + * \note More optimized if only used with values unknown at compile time. + */ +#if __GNUC__ + #define swap16(u16) __builtin_bswap_16(u16) +#elif __ICCAVR32__ + #define swap16(u16) Swap16(u16) +#endif + +/*! \brief Toggles the endianism of \a u32 (by swapping its bytes). + * + * \param u32 U32 of which to toggle the endianism. + * + * \return Value resulting from \a u32 with toggled endianism. + * + * \note More optimized if only used with values unknown at compile time. + */ +#if __GNUC__ + #define swap32(u32) __builtin_bswap_32(u32) +#elif __ICCAVR32__ + #define swap32(u32) Swap32(u32) +#endif + +/*! \brief Toggles the endianism of \a u64 (by swapping its bytes). + * + * \param u64 U64 of which to toggle the endianism. + * + * \return Value resulting from \a u64 with toggled endianism. + * + * \note More optimized if only used with values unknown at compile time. + */ +#define swap64(u64) ((U64)(((U64)swap32((U64)(u64) >> 32)) |\ + ((U64)swap32((U64)(u64)) << 32))) + +//! @} + +#endif // __AVR32_ABI_COMPILER__ + + +#endif // _COMPILER_H_ diff --git a/Demo/AVR32_UC3/documentation.h b/Demo/AVR32_UC3/documentation.h new file mode 100644 index 000000000..0c976ca8e --- /dev/null +++ b/Demo/AVR32_UC3/documentation.h @@ -0,0 +1,72 @@ +/*This file is prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief FreeRTOS application example for AVR32 UC3. + * + * - Compiler: IAR EWAVR32 and GNU GCC for AVR32 + * - Supported devices: All AVR32 devices can be used. + * - AppNote: + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support email: avr32@atmel.com + * + ******************************************************************************/ + +/*! \mainpage + * \section intro Introduction + * + * This is the documentation for the data structures, functions, variables, + * defines, enums, and typedefs for the FreeRTOS application. + * + * \image html freertos.gif + * + * FreeRTOS.orgTM is a portable, open source, mini Real Time Kernel - a + * free to download and royalty free RTOS that can be used in commercial + * applications (see license text). This site shows how a complete embedded + * real time system can be created from a Windows host using quality open + * source development tools (where available). See the FreeRTOS.org features + * summary. + * Highlights include: + * - Free RTOS kernel - preemptive, cooperative and hybrid configuration options. + * - Designed to be small, simple and easy to use. + * - Very portable code structure predominantly written in C. + * - Supports both tasks and co-routines. + * - No software restriction on the number of tasks that can be created. + * - No software restriction on the number of priorities that can be used. + * - No restrictions imposed on priority assignment - more than one task can be assigned the same priority. + * - Queues and semaphores for communication and synchronisation between tasks, or between tasks and interrupts. + * - Free embedded software source code. + * - Royalty free. + * - Cross development from a standard Windows host. + * - Pre-configured demo applications for selected single board computers allowing 'out of the box' operation and fast learning curve. + * - Compile time configuration allows small FLASH footprint + * - The SafeRTOS derivative product provides a high level of confidence in the code integrity. + * + * \section files Main Files + * - main.c : FreeRTOS example + * + * \section compilinfo Compilation Information + * This software is written for GNU GCC for AVR32 and for IAR Embedded Workbench + * for Atmel AVR32. Other compilers may or may not work. + * + * \section deviceinfo Device Information + * All AVR32 devices can be used. + * + * \section configinfo Configuration Information + * This example has been tested with the following configuration: + * - EVK1100 evaluation kit; + * - CPU clock: 12 MHz; + * - USART0 connected to a PC serial port via a standard RS232 DB9 cable; + * - PC terminal settings: + * - 57600 bps, + * - 8 data bits, + * - no parity bit, + * - 1 stop bit, + * - no flow control. + * + * \section contactinfo Contact Information + * For further information, visit + * Atmel AVR32. and + * FreeRTOS home page.\n + * Support e-mail address: avr32@atmel.com. + */ diff --git a/Demo/AVR32_UC3/doxyfile.doxygen b/Demo/AVR32_UC3/doxyfile.doxygen new file mode 100644 index 000000000..17d8679e9 --- /dev/null +++ b/Demo/AVR32_UC3/doxyfile.doxygen @@ -0,0 +1,231 @@ +# Doxyfile 1.4.7 + +#--------------------------------------------------------------------------- +# Project related configuration options +#--------------------------------------------------------------------------- +PROJECT_NAME = "AVR32 UC3 - FreeRTOS Real Time Kernel" +PROJECT_NUMBER = +OUTPUT_DIRECTORY = +CREATE_SUBDIRS = NO +OUTPUT_LANGUAGE = English +USE_WINDOWS_ENCODING = YES +BRIEF_MEMBER_DESC = YES +REPEAT_BRIEF = YES +ABBREVIATE_BRIEF = +ALWAYS_DETAILED_SEC = NO +INLINE_INHERITED_MEMB = NO +FULL_PATH_NAMES = NO +STRIP_FROM_PATH = +STRIP_FROM_INC_PATH = +SHORT_NAMES = NO +JAVADOC_AUTOBRIEF = YES +MULTILINE_CPP_IS_BRIEF = NO +DETAILS_AT_TOP = YES +INHERIT_DOCS = YES +SEPARATE_MEMBER_PAGES = NO +TAB_SIZE = 4 +ALIASES = +OPTIMIZE_OUTPUT_FOR_C = YES +OPTIMIZE_OUTPUT_JAVA = NO +BUILTIN_STL_SUPPORT = NO +DISTRIBUTE_GROUP_DOC = NO +SUBGROUPING = YES +#--------------------------------------------------------------------------- +# Build related configuration options +#--------------------------------------------------------------------------- +EXTRACT_ALL = YES +EXTRACT_PRIVATE = NO +EXTRACT_STATIC = YES +EXTRACT_LOCAL_CLASSES = YES +EXTRACT_LOCAL_METHODS = NO +HIDE_UNDOC_MEMBERS = NO +HIDE_UNDOC_CLASSES = NO +HIDE_FRIEND_COMPOUNDS = NO +HIDE_IN_BODY_DOCS = NO +INTERNAL_DOCS = YES +CASE_SENSE_NAMES = YES +HIDE_SCOPE_NAMES = NO +SHOW_INCLUDE_FILES = YES +INLINE_INFO = YES +SORT_MEMBER_DOCS = YES +SORT_BRIEF_DOCS = YES +SORT_BY_SCOPE_NAME = NO +GENERATE_TODOLIST = YES +GENERATE_TESTLIST = YES +GENERATE_BUGLIST = YES +GENERATE_DEPRECATEDLIST= YES +ENABLED_SECTIONS = +MAX_INITIALIZER_LINES = 30 +SHOW_USED_FILES = NO +SHOW_DIRECTORIES = NO +FILE_VERSION_FILTER = +#--------------------------------------------------------------------------- +# configuration options related to warning and progress messages +#--------------------------------------------------------------------------- +QUIET = YES +WARNINGS = YES +WARN_IF_UNDOCUMENTED = YES +WARN_IF_DOC_ERROR = YES +WARN_NO_PARAMDOC = NO +WARN_FORMAT = "$file:$line: $text" +WARN_LOGFILE = +#--------------------------------------------------------------------------- +# configuration options related to the input files +#--------------------------------------------------------------------------- +INPUT = ./ ./../../Source ./../Common/include ./../Common/Minimal +FILE_PATTERNS = *.c \ + *.h +RECURSIVE = YES +EXCLUDE = +EXCLUDE_SYMLINKS = NO +EXCLUDE_PATTERNS = +EXAMPLE_PATH = +EXAMPLE_PATTERNS = +EXAMPLE_RECURSIVE = NO +IMAGE_PATH = ./ +INPUT_FILTER = +FILTER_PATTERNS = +FILTER_SOURCE_FILES = NO +#--------------------------------------------------------------------------- +# configuration options related to source browsing +#--------------------------------------------------------------------------- +SOURCE_BROWSER = YES +INLINE_SOURCES = YES +STRIP_CODE_COMMENTS = YES +REFERENCED_BY_RELATION = YES +REFERENCES_RELATION = YES +REFERENCES_LINK_SOURCE = YES +USE_HTAGS = NO +VERBATIM_HEADERS = YES +#--------------------------------------------------------------------------- +# configuration options related to the alphabetical class index +#--------------------------------------------------------------------------- +ALPHABETICAL_INDEX = NO +COLS_IN_ALPHA_INDEX = 5 +IGNORE_PREFIX = +#--------------------------------------------------------------------------- +# configuration options related to the HTML output +#--------------------------------------------------------------------------- +GENERATE_HTML = YES +HTML_OUTPUT = DOC +HTML_FILE_EXTENSION = .html +HTML_HEADER = +HTML_FOOTER = +HTML_STYLESHEET = +HTML_ALIGN_MEMBERS = YES +GENERATE_HTMLHELP = NO +CHM_FILE = +HHC_LOCATION = +GENERATE_CHI = NO +BINARY_TOC = NO +TOC_EXPAND = NO +DISABLE_INDEX = NO +ENUM_VALUES_PER_LINE = 4 +GENERATE_TREEVIEW = YES +TREEVIEW_WIDTH = 250 +#--------------------------------------------------------------------------- +# configuration options related to the LaTeX output +#--------------------------------------------------------------------------- +GENERATE_LATEX = NO +LATEX_OUTPUT = latex +LATEX_CMD_NAME = latex +MAKEINDEX_CMD_NAME = makeindex +COMPACT_LATEX = NO +PAPER_TYPE = a4wide +EXTRA_PACKAGES = +LATEX_HEADER = +PDF_HYPERLINKS = NO +USE_PDFLATEX = NO +LATEX_BATCHMODE = NO +LATEX_HIDE_INDICES = NO +#--------------------------------------------------------------------------- +# configuration options related to the RTF output +#--------------------------------------------------------------------------- +GENERATE_RTF = NO +RTF_OUTPUT = RTF +COMPACT_RTF = NO +RTF_HYPERLINKS = YES +RTF_STYLESHEET_FILE = +RTF_EXTENSIONS_FILE = +#--------------------------------------------------------------------------- +# configuration options related to the man page output +#--------------------------------------------------------------------------- +GENERATE_MAN = NO +MAN_OUTPUT = man +MAN_EXTENSION = .3 +MAN_LINKS = NO +#--------------------------------------------------------------------------- +# configuration options related to the XML output +#--------------------------------------------------------------------------- +GENERATE_XML = NO +XML_OUTPUT = xml +XML_SCHEMA = +XML_DTD = +XML_PROGRAMLISTING = YES +#--------------------------------------------------------------------------- +# configuration options for the AutoGen Definitions output +#--------------------------------------------------------------------------- +GENERATE_AUTOGEN_DEF = NO +#--------------------------------------------------------------------------- +# configuration options related to the Perl module output +#--------------------------------------------------------------------------- +GENERATE_PERLMOD = NO +PERLMOD_LATEX = NO +PERLMOD_PRETTY = YES +PERLMOD_MAKEVAR_PREFIX = +#--------------------------------------------------------------------------- +# Configuration options related to the preprocessor +#--------------------------------------------------------------------------- +ENABLE_PREPROCESSING = YES +MACRO_EXPANSION = YES +EXPAND_ONLY_PREDEF = YES +SEARCH_INCLUDES = YES +INCLUDE_PATH = +INCLUDE_FILE_PATTERNS = +PREDEFINED = __GNUC__=4 \ + __attribute__()= \ + __AVR32__=1 \ + __AVR32_UC3A0512__=1 \ + __AVR32_ABI_COMPILER__ \ + BOARD=EVK1100 +EXPAND_AS_DEFINED = +SKIP_FUNCTION_MACROS = YES +#--------------------------------------------------------------------------- +# Configuration::additions related to external references +#--------------------------------------------------------------------------- +TAGFILES = +GENERATE_TAGFILE = +ALLEXTERNALS = NO +EXTERNAL_GROUPS = YES +PERL_PATH = /usr/bin/perl +#--------------------------------------------------------------------------- +# Configuration options related to the dot tool +#--------------------------------------------------------------------------- +CLASS_DIAGRAMS = NO +HIDE_UNDOC_RELATIONS = YES +HAVE_DOT = NO +CLASS_GRAPH = NO +COLLABORATION_GRAPH = NO +GROUP_GRAPHS = NO +UML_LOOK = YES +TEMPLATE_RELATIONS = YES +INCLUDE_GRAPH = NO +INCLUDED_BY_GRAPH = NO +CALL_GRAPH = NO +CALLER_GRAPH = NO +GRAPHICAL_HIERARCHY = NO +DIRECTORY_GRAPH = NO +DOT_IMAGE_FORMAT = png +DOT_PATH = +DOTFILE_DIRS = +MAX_DOT_GRAPH_WIDTH = 1024 +MAX_DOT_GRAPH_HEIGHT = 1024 +MAX_DOT_GRAPH_DEPTH = 0 +DOT_TRANSPARENT = NO +DOT_MULTI_TARGETS = NO +GENERATE_LEGEND = YES +DOT_CLEANUP = YES +#--------------------------------------------------------------------------- +# Configuration::additions related to the search engine +#--------------------------------------------------------------------------- +SEARCHENGINE = NO diff --git a/Demo/AVR32_UC3/freertos.gif b/Demo/AVR32_UC3/freertos.gif new file mode 100644 index 000000000..1ca6d2ec4 Binary files /dev/null and b/Demo/AVR32_UC3/freertos.gif differ diff --git a/Demo/AVR32_UC3/main.c b/Demo/AVR32_UC3/main.c new file mode 100644 index 000000000..4971b3f44 --- /dev/null +++ b/Demo/AVR32_UC3/main.c @@ -0,0 +1,453 @@ +/* This source file is part of the ATMEL FREERTOS-0.9.0 Release */ + +/*This file has been prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief FreeRTOS Real Time Kernel example. + * + * Creates all the demo application tasks, then starts the scheduler. The WEB + * documentation provides more details of the demo application tasks. + * + * Main. c also creates a task called "Check". This only executes every three + * seconds but has the highest priority so is guaranteed to get processor time. + * Its main function is to check that all the other tasks are still operational. + * Each task that does not flash an LED maintains a unique count that is + * incremented each time the task successfully completes its function. Should + * any error occur within such a task the count is permanently halted. The + * check task inspects the count of each task to ensure it has changed since + * the last time the check task executed. If all the count variables have + * changed all the tasks are still executing error free, and the check task + * toggles an LED. Should any task contain an error at any time the LED toggle + * will stop. + * + * The LED flash and communications test tasks do not maintain a count. + * + * - Compiler: IAR EWAVR32 and GNU GCC for AVR32 + * - Supported devices: All AVR32 devices with GPIO. + * - AppNote: + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support email: avr32@atmel.com + * + *****************************************************************************/ + +/* + FreeRTOS.org V4.2.0 - Copyright (C) 2003-2007 Richard Barry. + + This file is part of the FreeRTOS.org distribution. + + FreeRTOS.org is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2 of the License, or + (at your option) any later version. + + FreeRTOS.org is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with FreeRTOS.org; if not, write to the Free Software + Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + + A special exception to the GPL can be applied should you wish to distribute + a combined work that includes FreeRTOS.org, without being obliged to provide + the source code for any proprietary components. See the licensing section + of http://www.FreeRTOS.org for full details of how and when the exception + can be applied. + + *************************************************************************** + See http://www.FreeRTOS.org for documentation, latest information, license + and contact details. Please ensure to read the configuration and relevant + port sections of the online documentation. + *************************************************************************** +*/ + + +#include +#include +#include + +/* Environment header files. */ +#include "pm.h" + +/* Scheduler header files. */ +#include "FreeRTOS.h" +#include "task.h" + +/* Demo file headers. */ +#include "partest.h" +#include "serial.h" +#include "integer.h" +#include "comtest.h" +#include "flash.h" +#include "PollQ.h" +#include "semtest.h" +#include "dynamic.h" +#include "BlockQ.h" +#include "death.h" +#include "flop.h" + +/*! \name Priority definitions for most of the tasks in the demo application. + * Some tasks just use the idle priority. + */ +//! @{ +#define mainLED_TASK_PRIORITY ( tskIDLE_PRIORITY + 1 ) +#define mainCOM_TEST_PRIORITY ( tskIDLE_PRIORITY + 2 ) +#define mainQUEUE_POLL_PRIORITY ( tskIDLE_PRIORITY + 2 ) +#define mainSEM_TEST_PRIORITY ( tskIDLE_PRIORITY + 1 ) +#define mainBLOCK_Q_PRIORITY ( tskIDLE_PRIORITY + 3 ) +#define mainCHECK_TASK_PRIORITY ( tskIDLE_PRIORITY + 4 ) +#define mainCREATOR_TASK_PRIORITY ( tskIDLE_PRIORITY + 3 ) +//! @} + +//! Baud rate used by the serial port tasks. +#define mainCOM_TEST_BAUD_RATE ( ( unsigned portLONG ) 57600 ) + +//! LED used by the serial port tasks. This is toggled on each character Tx, +//! and mainCOM_TEST_LED + 1 is toggled on each character Rx. +#define mainCOM_TEST_LED ( 3 ) + +//! LED that is toggled by the check task. The check task periodically checks +//! that all the other tasks are operating without error. If no errors are found +//! the LED is toggled. If an error is found at any time the LED toggles faster. +#define mainCHECK_TASK_LED ( 6 ) + +//! LED that is set upon error. +#define mainERROR_LED ( 7 ) + +//! The period between executions of the check task. +#define mainCHECK_PERIOD ( ( portTickType ) 3000 / portTICK_RATE_MS ) + +//! If an error is detected in a task, the vErrorChecks task will enter in an +//! infinite loop flashing the LED at this rate. +#define mainERROR_FLASH_RATE ( (portTickType) 500 / portTICK_RATE_MS ) + +/*! \name Constants used by the vMemCheckTask() task. + */ +//! @{ +#define mainCOUNT_INITIAL_VALUE ( ( unsigned portLONG ) 0 ) +#define mainNO_TASK ( 0 ) +//! @} + +/*! \name The size of the memory blocks allocated by the vMemCheckTask() task. + */ +//! @{ +#define mainMEM_CHECK_SIZE_1 ( ( size_t ) 51 ) +#define mainMEM_CHECK_SIZE_2 ( ( size_t ) 52 ) +#define mainMEM_CHECK_SIZE_3 ( ( size_t ) 151 ) +//! @} + + +/*-----------------------------------------------------------*/ + +/* + * The task that executes at the highest priority and calls + * prvCheckOtherTasksAreStillRunning(). See the description at the top + * of the file. + */ +static void vErrorChecks( void *pvParameters ); + +/* + * Checks that all the demo application tasks are still executing without error + * - as described at the top of the file. + */ +static portBASE_TYPE prvCheckOtherTasksAreStillRunning( void ); + +/* + * A task that exercises the memory allocator. + */ +static void vMemCheckTask( void *pvParameters ); + +/*-----------------------------------------------------------*/ + +int main( void ) +{ + /* Start the crystal oscillator 0 and switch the main clock to it. */ + pm_switch_to_osc0(&AVR32_PM, FOSC0, OSC0_STARTUP); + + portDBG_TRACE("Starting the FreeRTOS AVR32 UC3 Demo..."); + + /* Setup the LED's for output. */ + vParTestInitialise(); + + /* Start the standard demo tasks. See the WEB documentation for more + information. */ + vStartLEDFlashTasks( mainLED_TASK_PRIORITY ); + vAltStartComTestTasks( mainCOM_TEST_PRIORITY, mainCOM_TEST_BAUD_RATE, mainCOM_TEST_LED ); + vStartPolledQueueTasks( mainQUEUE_POLL_PRIORITY ); + vStartIntegerMathTasks( tskIDLE_PRIORITY ); + vStartSemaphoreTasks( mainSEM_TEST_PRIORITY ); + vStartDynamicPriorityTasks(); + vStartBlockingQueueTasks( mainBLOCK_Q_PRIORITY ); + vStartMathTasks( tskIDLE_PRIORITY ); + + /* Start the demo tasks defined within this file, specifically the check + task as described at the top of this file. */ + xTaskCreate( + vErrorChecks + , (const signed portCHAR *)"ErrCheck" + , configMINIMAL_STACK_SIZE + , NULL + , mainCHECK_TASK_PRIORITY + , NULL ); + + /* Start the scheduler. */ + vTaskStartScheduler(); + + /* Will only get here if there was insufficient memory to create the idle + task. */ + + return 0; +} +/*-----------------------------------------------------------*/ + +/*! + * \brief The task function for the "Check" task. + */ +static void vErrorChecks( void *pvParameters ) +{ +static volatile unsigned portLONG ulDummyVariable = 3UL; +unsigned portLONG ulMemCheckTaskRunningCount; +xTaskHandle xCreatedTask; +portBASE_TYPE bSuicidalTask = 0; + + /* The parameters are not used. Prevent compiler warnings. */ + ( void ) pvParameters; + + /* Cycle for ever, delaying then checking all the other tasks are still + operating without error. + + In addition to the standard tests the memory allocator is tested through + the dynamic creation and deletion of a task each cycle. Each time the + task is created memory must be allocated for its stack. When the task is + deleted this memory is returned to the heap. If the task cannot be created + then it is likely that the memory allocation failed. */ + + for( ;; ) + { + /* Do this only once. */ + if( bSuicidalTask == 0 ) + { + bSuicidalTask++; + + /* This task has to be created last as it keeps account of the number of + tasks it expects to see running. However its implementation expects + to be called before vTaskStartScheduler(). We're in the case here where + vTaskStartScheduler() has already been called (thus the hidden IDLE task + has already been spawned). Since vCreateSuicidalTask() supposes that the + IDLE task isn't included in the response from uxTaskGetNumberOfTasks(), + let the MEM_CHECK task play that role. => this is why vCreateSuicidalTasks() + is not called as the last task. */ + vCreateSuicidalTasks( mainCREATOR_TASK_PRIORITY ); + } + + /* Reset xCreatedTask. This is modified by the task about to be + created so we can tell if it is executing correctly or not. */ + xCreatedTask = mainNO_TASK; + + /* Dynamically create a task - passing ulMemCheckTaskRunningCount as a + parameter. */ + ulMemCheckTaskRunningCount = mainCOUNT_INITIAL_VALUE; + + if( xTaskCreate( vMemCheckTask, + ( signed portCHAR * ) "MEM_CHECK", + configMINIMAL_STACK_SIZE, + ( void * ) &ulMemCheckTaskRunningCount, + tskIDLE_PRIORITY, &xCreatedTask ) != pdPASS ) + { + /* Could not create the task - we have probably run out of heap. + Don't go any further and flash the LED faster to provide visual + feedback of the error. */ + for(;;) + { + vParTestToggleLED( mainCHECK_TASK_LED ); + vTaskDelay( mainERROR_FLASH_RATE ); + } + } + + /* Delay until it is time to execute again. */ + vTaskDelay( mainCHECK_PERIOD ); + + /* Delete the dynamically created task. */ + if( xCreatedTask != mainNO_TASK ) + { + vTaskDelete( xCreatedTask ); + } + + /* Perform a bit of 32bit maths to ensure the registers used by the + integer tasks get some exercise. The result here is not important - + see the demo application documentation for more info. */ + ulDummyVariable *= 3; + + /* Check all other tasks are still operating without error. + Check that vMemCheckTask did increment the counter. */ + if( ( prvCheckOtherTasksAreStillRunning() != pdFALSE ) + || ( ulMemCheckTaskRunningCount == mainCOUNT_INITIAL_VALUE ) ) + { + /* An error has occurred in one of the tasks. + Don't go any further and flash the LED faster to give visual + feedback of the error. */ + vParTestSetLED(mainERROR_LED,pdTRUE); + for(;;) + { + vParTestToggleLED( mainCHECK_TASK_LED ); + vTaskDelay( mainERROR_FLASH_RATE ); + } + } + else + { + /* Toggle the LED if everything is okay. */ + vParTestToggleLED( mainCHECK_TASK_LED ); + } + } +} +/*-----------------------------------------------------------*/ + + +/*! + * \brief Checks that all the demo application tasks are still executing without error. + */ +static portBASE_TYPE prvCheckOtherTasksAreStillRunning( void ) +{ +static portBASE_TYPE xErrorHasOccurred = pdFALSE; + + if( xAreComTestTasksStillRunning() != pdTRUE ) + { + xErrorHasOccurred = pdTRUE; + } + + if( xArePollingQueuesStillRunning() != pdTRUE ) + { + xErrorHasOccurred = pdTRUE; + } + + if( xAreIntegerMathsTaskStillRunning() != pdTRUE ) + { + xErrorHasOccurred = pdTRUE; + } + + if( xAreSemaphoreTasksStillRunning() != pdTRUE ) + { + xErrorHasOccurred = pdTRUE; + } + + if( xAreBlockingQueuesStillRunning() != pdTRUE ) + { + xErrorHasOccurred = pdTRUE; + } + + if( xAreDynamicPriorityTasksStillRunning() != pdTRUE ) + { + xErrorHasOccurred = pdTRUE; + } + + if( xAreMathsTaskStillRunning() != pdTRUE ) + { + xErrorHasOccurred = pdTRUE; + } + + if( xIsCreateTaskStillRunning() != pdTRUE ) + { + xErrorHasOccurred = pdTRUE; + } + + return ( xErrorHasOccurred ); +} +/*-----------------------------------------------------------*/ + + +/*! + * \brief Dynamically created and deleted during each cycle of the vErrorChecks() + * task. This is done to check the operation of the memory allocator. + * See the top of vErrorChecks for more details. + * + * \param *pvParameters Parameters for the task (can be of any kind) + */ +static void vMemCheckTask( void *pvParameters ) +{ +unsigned portLONG *pulMemCheckTaskRunningCounter; +void *pvMem1, *pvMem2, *pvMem3; +static portLONG lErrorOccurred = pdFALSE; + + /* This task is dynamically created then deleted during each cycle of the + vErrorChecks task to check the operation of the memory allocator. Each time + the task is created memory is allocated for the stack and TCB. Each time + the task is deleted this memory is returned to the heap. This task itself + exercises the allocator by allocating and freeing blocks. + + The task executes at the idle priority so does not require a delay. + + pulMemCheckTaskRunningCounter is incremented each cycle to indicate to the + vErrorChecks() task that this task is still executing without error. */ + + pulMemCheckTaskRunningCounter = ( unsigned portLONG * ) pvParameters; + + for( ;; ) + { + if( lErrorOccurred == pdFALSE ) + { + /* We have never seen an error so increment the counter. */ + ( *pulMemCheckTaskRunningCounter )++; + } + else + { + /* There has been an error so reset the counter so the check task + can tell that an error occurred. */ + *pulMemCheckTaskRunningCounter = mainCOUNT_INITIAL_VALUE; + } + + /* Allocate some memory - just to give the allocator some extra + exercise. This has to be in a critical section to ensure the + task does not get deleted while it has memory allocated. */ + + vTaskSuspendAll(); + { + pvMem1 = pvPortMalloc( mainMEM_CHECK_SIZE_1 ); + + if( pvMem1 == NULL ) + { + lErrorOccurred = pdTRUE; + } + else + { + memset( pvMem1, 0xaa, mainMEM_CHECK_SIZE_1 ); + vPortFree( pvMem1 ); + } + } + xTaskResumeAll(); + + /* Again - with a different size block. */ + vTaskSuspendAll(); + { + pvMem2 = pvPortMalloc( mainMEM_CHECK_SIZE_2 ); + + if( pvMem2 == NULL ) + { + lErrorOccurred = pdTRUE; + } + else + { + memset( pvMem2, 0xaa, mainMEM_CHECK_SIZE_2 ); + vPortFree( pvMem2 ); + } + } + xTaskResumeAll(); + + /* Again - with a different size block. */ + vTaskSuspendAll(); + { + pvMem3 = pvPortMalloc( mainMEM_CHECK_SIZE_3 ); + if( pvMem3 == NULL ) + { + lErrorOccurred = pdTRUE; + } + else + { + memset( pvMem3, 0xaa, mainMEM_CHECK_SIZE_3 ); + vPortFree( pvMem3 ); + } + } + xTaskResumeAll(); + } +} diff --git a/Demo/AVR32_UC3/serial/serial.c b/Demo/AVR32_UC3/serial/serial.c new file mode 100644 index 000000000..7a7ea02ba --- /dev/null +++ b/Demo/AVR32_UC3/serial/serial.c @@ -0,0 +1,383 @@ +/* This source file is part of the ATMEL FREERTOS-0.9.0 Release */ + +/*This file has been prepared for Doxygen automatic documentation generation.*/ +/*! \file ********************************************************************* + * + * \brief FreeRTOS Serial Port management example for AVR32 UC3. + * + * - Compiler: IAR EWAVR32 and GNU GCC for AVR32 + * - Supported devices: All AVR32 devices can be used. + * - AppNote: + * + * \author Atmel Corporation: http://www.atmel.com \n + * Support email: avr32@atmel.com + * + *****************************************************************************/ + +/* Copyright (c) 2007, Atmel Corporation All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. The name of ATMEL may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND + * SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + + +/* + BASIC INTERRUPT DRIVEN SERIAL PORT DRIVER FOR USART0. +*/ + +/* Scheduler includes. */ +#include "FreeRTOS.h" +#include "queue.h" +#include "task.h" + +/* Demo application includes. */ +#include "serial.h" + +#if __GNUC__ + #include +#elif __ICCAVR32__ + #include +#else + #error Unknown compiler +#endif + +#include "board.h" +#include "gpio.h" + +/*-----------------------------------------------------------*/ + +/* Constants to setup and access the USART. */ +#define serINVALID_COMPORT_HANDLER ( ( xComPortHandle ) 0 ) +#define serINVALID_QUEUE ( ( xQueueHandle ) 0 ) +#define serHANDLE ( ( xComPortHandle ) 1 ) +#define serNO_BLOCK ( ( portTickType ) 0 ) + +/*-----------------------------------------------------------*/ + +/* Queues used to hold received characters, and characters waiting to be +transmitted. */ +static xQueueHandle xRxedChars; +static xQueueHandle xCharsForTx; + +/*-----------------------------------------------------------*/ + +/* Forward declaration. */ +static void vprvSerialCreateQueues( unsigned portBASE_TYPE uxQueueLength, + xQueueHandle *pxRxedChars, + xQueueHandle *pxCharsForTx ); + +/*-----------------------------------------------------------*/ + +#if __GNUC__ + __attribute__((__noinline__)) +#elif __ICCAVR32__ + #pragma optimize = no_inline +#endif + +static portBASE_TYPE prvUSART0_ISR_NonNakedBehaviour( void ) +{ + /* Now we can declare the local variables. */ + signed portCHAR cChar; + portBASE_TYPE xTaskWokenByTx = pdFALSE, xTaskWokenByRx = pdFALSE; + unsigned portLONG ulStatus; + volatile avr32_usart_t *usart0 = &AVR32_USART0; + portBASE_TYPE retstatus; + + /* What caused the interrupt? */ + ulStatus = usart0->csr & usart0->imr; + + if (ulStatus & AVR32_USART_CSR_TXRDY_MASK) + { + /* The interrupt was caused by the THR becoming empty. Are there any + more characters to transmit? + Because FreeRTOS is not supposed to run with nested interrupts, put all OS + calls in a critical section . */ + portENTER_CRITICAL(); + retstatus = xQueueReceiveFromISR( xCharsForTx, &cChar, &xTaskWokenByTx ); + portEXIT_CRITICAL(); + + if (retstatus == pdTRUE) + { + /* A character was retrieved from the queue so can be sent to the + THR now. */ + usart0->thr = cChar; + } + else + { + /* Queue empty, nothing to send so turn off the Tx interrupt. */ + usart0->idr = AVR32_USART_IDR_TXRDY_MASK; + } + } + + if (ulStatus & AVR32_USART_CSR_RXRDY_MASK) + { + /* The interrupt was caused by the receiver getting data. */ + cChar = usart0->rhr; //TODO + + /* Because FreeRTOS is not supposed to run with nested interrupts, put all OS + calls in a critical section . */ + portENTER_CRITICAL(); + retstatus = xQueueSendFromISR(xRxedChars, &cChar, pdFALSE); + portEXIT_CRITICAL(); + + if( retstatus ) + { + xTaskWokenByRx = pdTRUE; + } + } + + /* The return value will be used by portEXIT_SWITCHING_ISR() to know if it + should perform a vTaskSwitchContext(). */ + return ( xTaskWokenByTx || xTaskWokenByRx ); +} +/*-----------------------------------------------------------*/ + +/* + * USART0 interrupt service routine. + */ +#if __GNUC__ + __attribute__((__naked__)) +#elif __ICCAVR32__ + #pragma shadow_registers = full // Naked. +#endif + +static void vUSART0_ISR( void ) +{ + /* This ISR can cause a context switch, so the first statement must be a + call to the portENTER_SWITCHING_ISR() macro. This must be BEFORE any + variable declarations. */ + portENTER_SWITCHING_ISR(); + + prvUSART0_ISR_NonNakedBehaviour(); + + /* Exit the ISR. If a task was woken by either a character being received + or transmitted then a context switch will occur. */ + portEXIT_SWITCHING_ISR(); +} +/*-----------------------------------------------------------*/ + + +/* + * Init the serial port for the Minimal implementation. + */ +xComPortHandle xSerialPortInitMinimal( unsigned portLONG ulWantedBaud, unsigned portBASE_TYPE uxQueueLength ) +{ +xComPortHandle xReturn = serHANDLE; +volatile avr32_usart_t *usart0 = &AVR32_USART0; +int cd; /* USART0 Clock Divider. */ + + /* Create the rx and tx queues. */ + vprvSerialCreateQueues( uxQueueLength, &xRxedChars, &xCharsForTx ); + + /* Configure USART0. */ + if( ( xRxedChars != serINVALID_QUEUE ) && + ( xCharsForTx != serINVALID_QUEUE ) && + ( ulWantedBaud != ( unsigned portLONG ) 0 ) ) + { + portENTER_CRITICAL(); + { + /** + ** Reset USART0. + **/ + /* Disable all USART0 interrupt sources to begin... */ + usart0->idr = 0xFFFFFFFF; + + /* Reset mode and other registers that could cause unpredictable + behaviour after reset */ + usart0->mr = 0; /* Reset Mode register. */ + usart0->rtor = 0; /* Reset Receiver Time-out register. */ + usart0->ttgr = 0; /* Reset Transmitter Timeguard register. */ + + /* Shutdown RX and TX, reset status bits, reset iterations in CSR, reset NACK + and turn off DTR and RTS */ + usart0->cr = AVR32_USART_CR_RSTRX_MASK | + AVR32_USART_CR_RSTTX_MASK | + AVR32_USART_CR_RXDIS_MASK | + AVR32_USART_CR_TXDIS_MASK | + AVR32_USART_CR_RSTSTA_MASK | + AVR32_USART_CR_RSTIT_MASK | + AVR32_USART_CR_RSTNACK_MASK | + AVR32_USART_CR_DTRDIS_MASK | + AVR32_USART_CR_RTSDIS_MASK; + + /** + ** Configure USART0. + **/ + /* Enable USART0 RXD & TXD pins. */ + gpio_enable_module_pin(AVR32_USART0_RXD_0_PIN, AVR32_USART0_RXD_0_FUNCTION); + gpio_enable_module_pin(AVR32_USART0_TXD_0_PIN, AVR32_USART0_TXD_0_FUNCTION); + + /* Set the USART0 baudrate to be as close as possible to the wanted baudrate. */ + /* + * ** BAUDRATE CALCULATION ** + * + * Selected Clock Selected Clock + * baudrate = ---------------- or baudrate = ---------------- + * 16 x CD 8 x CD + * + * (with 16x oversampling) (with 8x oversampling) + */ + + if( ulWantedBaud < ( configCPU_CLOCK_HZ / 16 ) ) + { + /* Use 8x oversampling */ + usart0->mr |= (1<brgr = (cd << AVR32_USART_BRGR_CD_OFFSET); + } + else + { + /* Use 16x oversampling */ + usart0->mr &= ~(1< 65535 ) + { + /* Baudrate is too low */ + return serINVALID_COMPORT_HANDLER; + } + } + + usart0->brgr = (cd << AVR32_USART_BRGR_CD_OFFSET); + + /* Set the USART0 Mode register: Mode=Normal(0), Clk selection=MCK(0), + CHRL=8, SYNC=0(asynchronous), PAR=None, NBSTOP=1, CHMODE=0, MSBF=0, + MODE9=0, CKLO=0, OVER(previously done when setting the baudrate), + other fields not used in this mode. */ + usart0->mr |= ((8-5) << AVR32_USART_MR_CHRL_OFFSET ) | + ( 4 << AVR32_USART_MR_PAR_OFFSET ) | + ( 1 << AVR32_USART_MR_NBSTOP_OFFSET); + + /* Write the Transmit Timeguard Register */ + usart0->ttgr = 0; + + + /* Register the USART0 interrupt handler to the interrupt controller and + enable the USART0 interrupt. */ + INTC_register_interrupt((__int_handler)&vUSART0_ISR, AVR32_USART0_IRQ, INT1); + + /* Enable USART0 interrupt sources (but not Tx for now)... */ + usart0->ier = AVR32_USART_IER_RXRDY_MASK; + + /* Enable receiver and transmitter... */ + usart0->cr |= AVR32_USART_CR_TXEN_MASK | AVR32_USART_CR_RXEN_MASK; + } + portEXIT_CRITICAL(); + } + else + { + xReturn = serINVALID_COMPORT_HANDLER; + } + + return xReturn; +} +/*-----------------------------------------------------------*/ + +signed portBASE_TYPE xSerialGetChar( xComPortHandle pxPort, signed portCHAR *pcRxedChar, portTickType xBlockTime ) +{ + /* The port handle is not required as this driver only supports UART0. */ + ( void ) pxPort; + + /* Get the next character from the buffer. Return false if no characters + are available, or arrive before xBlockTime expires. */ + if( xQueueReceive( xRxedChars, pcRxedChar, xBlockTime ) ) + { + return pdTRUE; + } + else + { + return pdFALSE; + } +} +/*-----------------------------------------------------------*/ + +void vSerialPutString( xComPortHandle pxPort, const signed portCHAR * const pcString, unsigned portSHORT usStringLength ) +{ +signed portCHAR *pxNext; + + /* NOTE: This implementation does not handle the queue being full as no + block time is used! */ + + /* The port handle is not required as this driver only supports UART0. */ + ( void ) pxPort; + + /* Send each character in the string, one at a time. */ + pxNext = ( signed portCHAR * ) pcString; + while( *pxNext ) + { + xSerialPutChar( pxPort, *pxNext, serNO_BLOCK ); + pxNext++; + } +} +/*-----------------------------------------------------------*/ + +signed portBASE_TYPE xSerialPutChar( xComPortHandle pxPort, signed portCHAR cOutChar, portTickType xBlockTime ) +{ +volatile avr32_usart_t *usart0 = &AVR32_USART0; + + /* Place the character in the queue of characters to be transmitted. */ + if( xQueueSend( xCharsForTx, &cOutChar, xBlockTime ) != pdPASS ) + { + return pdFAIL; + } + + /* Turn on the Tx interrupt so the ISR will remove the character from the + queue and send it. This does not need to be in a critical section as + if the interrupt has already removed the character the next interrupt + will simply turn off the Tx interrupt again. */ + usart0->ier = (1 << AVR32_USART_IER_TXRDY_OFFSET); + + return pdPASS; +} +/*-----------------------------------------------------------*/ + +void vSerialClose( xComPortHandle xPort ) +{ + /* Not supported as not required by the demo application. */ +} +/*-----------------------------------------------------------*/ + +/*###########################################################*/ + +/* + * Create the rx and tx queues. + */ +static void vprvSerialCreateQueues( unsigned portBASE_TYPE uxQueueLength, xQueueHandle *pxRxedChars, xQueueHandle *pxCharsForTx ) +{ + /* Create the queues used to hold Rx and Tx characters. */ + xRxedChars = xQueueCreate( uxQueueLength, ( unsigned portBASE_TYPE ) sizeof( signed portCHAR ) ); + xCharsForTx = xQueueCreate( uxQueueLength + 1, ( unsigned portBASE_TYPE ) sizeof( signed portCHAR ) ); + + /* Pass back a reference to the queues so the serial API file can + post/receive characters. */ + *pxRxedChars = xRxedChars; + *pxCharsForTx = xCharsForTx; +} +/*-----------------------------------------------------------*/