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First version under SVN is V4.0.1
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Richard Barry
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299
Source/portable/GCC/ARM_CM3/port.c
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299
Source/portable/GCC/ARM_CM3/port.c
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/*
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FreeRTOS V4.0.1 - Copyright (C) 2003-2006 Richard Barry.
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This file is part of the FreeRTOS distribution.
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FreeRTOS is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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FreeRTOS is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with FreeRTOS; if not, write to the Free Software
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Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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A special exception to the GPL can be applied should you wish to distribute
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a combined work that includes FreeRTOS, without being obliged to provide
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the source code for any proprietary components. See the licensing section
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of http://www.FreeRTOS.org for full details of how and when the exception
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can be applied.
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***************************************************************************
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See http://www.FreeRTOS.org for documentation, latest information, license
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and contact details. Please ensure to read the configuration and relevant
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port sections of the online documentation.
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***************************************************************************
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*/
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/*
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Changes between V4.0.0 and V4.0.1
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+ Reduced the code used to setup the initial stack frame.
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+ The kernel no longer has to install or handle the fault interrupt.
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*/
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/*-----------------------------------------------------------
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* Implementation of functions defined in portable.h for the ARM CM3 port.
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*----------------------------------------------------------*/
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/* Scheduler includes. */
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#include "FreeRTOS.h"
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#include "task.h"
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/* Constants required to manipulate the NVIC. */
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#define portNVIC_SYSTICK_CTRL ( ( volatile unsigned portLONG *) 0xe000e010 )
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#define portNVIC_SYSTICK_LOAD ( ( volatile unsigned portLONG *) 0xe000e014 )
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#define portNVIC_INT_CTRL ( ( volatile unsigned portLONG *) 0xe000ed04 )
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#define portNVIC_SYSPRI2 ( ( volatile unsigned portLONG *) 0xe000ed20 )
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#define portNVIC_SYSPRI1 ( ( volatile unsigned portLONG *) 0xe000ed1c )
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#define portNVIC_SYSTICK_CLK 0x00000004
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#define portNVIC_SYSTICK_INT 0x00000002
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#define portNVIC_SYSTICK_ENABLE 0x00000001
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#define portNVIC_PENDSVSET 0x10000000
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#define portNVIC_PENDSV_PRI 0x00ff0000
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#define portNVIC_SVCALL_PRI 0xff000000
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#define portNVIC_SYSTICK_PRI 0xff000000
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/* Constants required to set up the initial stack. */
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#define portINITIAL_XPSR ( 0x01000000 )
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/* Each task maintains its own interrupt status in the critical nesting
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variable. */
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unsigned portBASE_TYPE uxCriticalNesting = 0xaaaaaaaa;
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/*
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* Setup the timer to generate the tick interrupts.
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*/
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static void prvSetupTimerInterrupt( void );
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/*
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* Exception handlers.
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*/
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void xPortPendSVHandler( void ) __attribute__ (( naked ));
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void xPortSysTickHandler( void ) __attribute__ (( naked ));
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/*
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* Set the MSP/PSP to a known value.
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*/
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void prvSetMSP( unsigned long ulValue ) __attribute__ (( naked ));
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void prvSetPSP( unsigned long ulValue ) __attribute__ (( naked ));
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/*-----------------------------------------------------------*/
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/*
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* See header file for description.
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*/
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portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )
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{
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/* Simulate the stack frame as it would be created by a context switch
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interrupt. */
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*pxTopOfStack = portINITIAL_XPSR; /* xPSR */
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pxTopOfStack--;
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*pxTopOfStack = ( portSTACK_TYPE ) pxCode; /* PC */
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pxTopOfStack--;
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*pxTopOfStack = 0xfffffffd; /* LR */
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pxTopOfStack -= 5; /* R12, R3, R2 and R1. */
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*pxTopOfStack = ( portSTACK_TYPE ) pvParameters; /* R0 */
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pxTopOfStack -= 9; /* R11, R10, R9, R8, R7, R6, R5 and R4. */
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*pxTopOfStack = 0x00000000; /* uxCriticalNesting. */
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return pxTopOfStack;
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}
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/*-----------------------------------------------------------*/
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void prvSetPSP( unsigned long ulValue )
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{
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asm volatile( "msr psp, r0" );
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asm volatile( "bx lr" );
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}
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/*-----------------------------------------------------------*/
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void prvSetMSP( unsigned long ulValue )
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{
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asm volatile( "msr msp, r0" );
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asm volatile( "bx lr" );
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}
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/*-----------------------------------------------------------*/
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/*
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* See header file for description.
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*/
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portBASE_TYPE xPortStartScheduler( void )
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{
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/* Make PendSV, CallSV and SysTick the lowest priority interrupts. */
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*(portNVIC_SYSPRI2) |= portNVIC_PENDSV_PRI;
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*(portNVIC_SYSPRI2) |= portNVIC_SYSTICK_PRI;
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/* Start the timer that generates the tick ISR. Interrupts are disabled
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here already. */
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prvSetupTimerInterrupt();
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/* Start the first task. */
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prvSetPSP( 0 );
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prvSetMSP( *((unsigned portLONG *) 0 ) );
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*(portNVIC_INT_CTRL) |= portNVIC_PENDSVSET;
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/* Enable interrupts */
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portENABLE_INTERRUPTS();
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/* Should not get here! */
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return 0;
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}
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/*-----------------------------------------------------------*/
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void vPortEndScheduler( void )
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{
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/* It is unlikely that the CM3 port will require this function as there
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is nothing to return to. */
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}
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/*-----------------------------------------------------------*/
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void vPortYieldFromISR( void )
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{
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/* Set a PendSV to request a context switch. */
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*(portNVIC_INT_CTRL) |= portNVIC_PENDSVSET;
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/* This function is also called in response to a Yield(), so we want
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the yield to occur immediately. */
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portENABLE_INTERRUPTS();
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}
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/*-----------------------------------------------------------*/
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void vPortEnterCritical( void )
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{
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portDISABLE_INTERRUPTS();
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uxCriticalNesting++;
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}
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/*-----------------------------------------------------------*/
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void vPortExitCritical( void )
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{
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uxCriticalNesting--;
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if( uxCriticalNesting == 0 )
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{
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portENABLE_INTERRUPTS();
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}
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}
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/*-----------------------------------------------------------*/
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void xPortPendSVHandler( void )
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{
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/* Start first task if the stack has not yet been setup. */
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__asm volatile
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(
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" mrs r0, psp \n"
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" cbz r0, no_save \n"
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" \n" /* Save the context into the TCB. */
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" sub r0, #0x20 \n"
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" stm r0, {r4-r11} \n"
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" nop \n"
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" sub r0, #0x04 \n"
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" ldr r1, uxCriticalNestingConst \n"
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" ldr r1, [r1] \n"
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" stm r0, {r1} \n"
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" ldr r1, pxCurrentTCBConst \n"
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" ldr r1, [r1] \n"
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" str r0, [r1] \n"
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" \n"
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"no_save:\n"
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" ldr r0, vTaskSwitchContextConst \n" /* Find the task to execute. */
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" push {r14} \n"
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" cpsid i \n"
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" blx r0 \n"
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" cpsie i \n"
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" pop {r14} \n"
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" \n" /* Restore the context. */
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" ldr r1, pxCurrentTCBConst \n"
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" ldr r1, [r1] \n"
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" ldr r0, [r1] \n"
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" ldm r0, {r1, r4-r11} \n"
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" nop \n"
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" ldr r2, uxCriticalNestingConst \n"
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" str r1, [r2] \n"
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" add r0, #0x24 \n"
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" msr psp, r0 \n"
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" orr r14, #0xd \n"
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" \n" /* Exit with interrupts in the state required by the task. */
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" cbnz r1, sv_disable_interrupts \n"
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" bx r14 \n"
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" \n"
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"sv_disable_interrupts: \n"
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" cpsid i \n"
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" bx r14 \n"
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" \n"
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" .align 2 \n"
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"vTaskSwitchContextConst: .word vTaskSwitchContext \n"
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"pxCurrentTCBConst: .word pxCurrentTCB \n"
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"uxCriticalNestingConst: .word uxCriticalNesting \n"
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);
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}
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/*-----------------------------------------------------------*/
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void xPortSysTickHandler( void )
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{
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extern void vTaskIncrementTick( void );
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extern void vPortYieldFromISR( void );
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/* Call the scheduler tick function. */
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__asm volatile
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(
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" ldr r0, vTaskIncrementTickConst \n"
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" push {r14} \n"
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" cpsid i \n"
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" blx r0 \n"
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" cpsie i \n"
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" pop {r14}"
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);
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/* If using preemption, also force a context switch. */
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#if configUSE_PREEMPTION == 1
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__asm volatile
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(
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" push {r14} \n"
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" ldr r0, vPortYieldFromISRConst2 \n"
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" blx r0 \n"
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" pop {r14}"
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);
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#endif
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/* Exit with interrupts in the correct state. */
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__asm volatile
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(
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" ldr r2, uxCriticalNestingConst2 \n"
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" ldr r2, [r2] \n"
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" cbnz r2, tick_disable_interrupts \n"
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" bx r14"
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);
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__asm volatile
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(
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"tick_disable_interrupts: \n"
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" cpsid i \n"
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" bx r14 \n"
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" \n"
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" .align 2 \n"
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"vPortYieldFromISRConst2: .word vPortYieldFromISR\n"
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"vTaskIncrementTickConst: .word vTaskIncrementTick\n"
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"uxCriticalNestingConst2: .word uxCriticalNesting"
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);
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}
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/*-----------------------------------------------------------*/
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/*
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* Setup the systick timer to generate the tick interrupts at the required
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* frequency.
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*/
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void prvSetupTimerInterrupt( void )
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{
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/* Configure SysTick to interrupt at the requested rate. */
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*(portNVIC_SYSTICK_LOAD) = configCPU_CLOCK_HZ / configTICK_RATE_HZ;
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*(portNVIC_SYSTICK_CTRL) = portNVIC_SYSTICK_CLK | portNVIC_SYSTICK_INT | portNVIC_SYSTICK_ENABLE;
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}
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