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First version under SVN is V4.0.1
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Demo/WizNET_DEMO_GCC_ARM7/TCPISR.c
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Demo/WizNET_DEMO_GCC_ARM7/TCPISR.c
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/*
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FreeRTOS V4.0.1 - copyright (C) 2003-2006 Richard Barry.
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This file is part of the FreeRTOS distribution.
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FreeRTOS is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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FreeRTOS is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with FreeRTOS; if not, write to the Free Software
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Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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A special exception to the GPL can be applied should you wish to distribute
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a combined work that includes FreeRTOS, without being obliged to provide
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the source code for any proprietary components. See the licensing section
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of http://www.FreeRTOS.org for full details of how and when the exception
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can be applied.
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***************************************************************************
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See http://www.FreeRTOS.org for documentation, latest information, license
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and contact details. Please ensure to read the configuration and relevant
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port sections of the online documentation.
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***************************************************************************
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*/
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/* Scheduler include files. */
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#include "FreeRTOS.h"
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#include "task.h"
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#include "queue.h"
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/* Constants required for interrupt management. */
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#define tcpCLEAR_VIC_INTERRUPT ( 0 )
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#define tcpEINT0_VIC_CHANNEL_BIT ( ( unsigned portLONG ) 0x4000 )
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/* EINT0 interrupt handler. This processes interrupts from the WIZnet device. */
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void vEINT0_ISR( void ) __attribute__((naked));
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/* Variable is required for its address, but does not otherwise get used. */
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static portLONG lDummyVariable;
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/*
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* When the WIZnet device asserts an interrupt we send an (empty) message to
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* the TCP task. This wakes the task so the interrupt can be processed. The
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* source of the interrupt has to be ascertained by the TCP task as this
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* requires an I2C transaction which cannot be performed from this ISR.
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*/
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void vEINT0_ISR( void )
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{
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portENTER_SWITCHING_ISR();
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extern xQueueHandle xTCPISRQueue;
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portBASE_TYPE xTaskWoken = pdFALSE;
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/* Just wake the TCP task so it knows an ISR has occurred. */
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xQueueSendFromISR( xTCPISRQueue, ( void * ) &lDummyVariable, xTaskWoken );
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/* We cannot carry on processing interrupts until the TCP task has
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processed this one - so for now interrupts are disabled. The TCP task will
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re-enable it. */
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VICIntEnClear |= tcpEINT0_VIC_CHANNEL_BIT;
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/* Clear the interrupt bit. */
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VICVectAddr = tcpCLEAR_VIC_INTERRUPT;
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/* Switch to the TCP task immediately so the cause of the interrupt can
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be ascertained. It is the responsibility of the TCP task to clear the
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interrupts. */
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portEXIT_SWITCHING_ISR( ( xTaskWoken ) );
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}
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