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/** ###################################################################
** THIS BEAN MODULE IS GENERATED BY THE TOOL. DO NOT MODIFY IT.
** Filename : Byte1.C
** Project : RTOSDemo
** Processor : MC9S12DP256BCPV
** Beantype : ByteIO
** Version : Bean 02.019, Driver 01.03, CPU db: 2.87.283
** Compiler : Metrowerks HC12 C Compiler
** Date/Time : 16/06/2005, 21:10
** Abstract :
** This bean "ByteIO" implements an one-byte input/output.
** It uses one 8-bit port.
** Note: This bean is set to work in Output direction only.
** Methods of this bean are mostly implemented as a macros
** (if supported by target langauage and compiler).
** Settings :
** Port name : B
**
** Initial direction : Output (direction cannot be changed)
** Initial output value : 255 = 0FFH
** Initial pull option : off
**
** 8-bit data register : PORTB [1]
** 8-bit control register : DDRB [3]
**
** ----------------------------------------------------
** Bit | Pin | Name
** ----------------------------------------------------
** 0 | 24 | PB0_ADDR0_DATA0
** 1 | 25 | PB1_ADDR1_DATA1
** 2 | 26 | PB2_ADDR2_DATA2
** 3 | 27 | PB3_ADDR3_DATA3
** 4 | 28 | PB4_ADDR4_DATA4
** 5 | 29 | PB5_ADDR5_DATA5
** 6 | 30 | PB6_ADDR6_DATA6
** 7 | 31 | PB7_ADDR7_DATA7
** ----------------------------------------------------
** Contents :
** PutBit - void Byte1_PutBit(byte Bit,bool Val);
** NegBit - void Byte1_NegBit(byte Bit);
**
** (c) Copyright UNIS, spol. s r.o. 1997-2002
** UNIS, spol. s r.o.
** Jundrovska 33
** 624 00 Brno
** Czech Republic
** http : www.processorexpert.com
** mail : info@processorexpert.com
** ###################################################################*/
/* MODULE Byte1. */
#include "Byte1.h"
/*Including shared modules, which are used for all project*/
#include "PE_Types.h"
#include "PE_Error.h"
#include "PE_Const.h"
#include "IO_Map.h"
#include "PE_Timer.h"
#include "Cpu.h"
/* Definition of DATA and CODE segments for this bean. User can specify where
these segments will be located on "Build options" tab of the selected CPU bean. */
#pragma DATA_SEG Byte1_DATA /* Data section for this module. */
#pragma CODE_SEG Byte1_CODE /* Code section for this module. */
/*
** ===================================================================
** Method : Byte1_GetMsk (bean ByteIO)
**
** Description :
** This method is internal. It is used by Processor Expert
** only.
** ===================================================================
*/
byte Byte1_Table[8]={ 1, 2, 4, 8, 16, 32, 64, 128 }; /* Table of mask constants */
byte Byte1_GetMsk(byte Value)
{
return((Value<8)?Byte1_Table[Value]:0); /* Return appropriate bit mask */
}
/*
** ===================================================================
** Method : Byte1_PutBit (bean ByteIO)
**
** Description :
** This method writes the new value to the specified bit
** of the output value.
** Parameters :
** NAME - DESCRIPTION
** Bitnum - Number of the bit (0 to 7)
** Val - New value of the bit (FALSE or TRUE)
** FALSE = "0" or "Low", TRUE = "1" or "High"
** Returns : Nothing
** ===================================================================
*/
void Byte1_PutBit(byte BitNum, byte Value)
{
byte Mask=Byte1_GetMsk(BitNum); /* Temporary variable - bit mask */
if (Mask) /* Is bit mask correct? */
if (Value) { /* Is it one to be written? */
PORTB |= Mask; /* Set appropriate bit on port */
}
else { /* Is it zero to be written? */
PORTB &= ~Mask; /* Clear appropriate bit on port */
}
}
/*
** ===================================================================
** Method : Byte1_NegBit (bean ByteIO)
**
** Description :
** This method negates (invertes) the specified bit of the
** output value.
** Parameters :
** NAME - DESCRIPTION
** Bit - Number of the bit to invert (0 to 7)
** Returns : Nothing
** ===================================================================
*/
void Byte1_NegBit(byte BitNum)
{
byte Mask=Byte1_GetMsk(BitNum); /* Temporary variable - bit mask */
if (Mask) { /* Is bit mask correct? */
PORTB ^= Mask; /* Negate appropriate bit on port */
}
}
/* END Byte1. */
/*
** ###################################################################
**
** This file was created by UNIS Processor Expert 03.33 for
** the Motorola HCS12 series of microcontrollers.
**
** ###################################################################
*/

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/** ###################################################################
** THIS BEAN MODULE IS GENERATED BY THE TOOL. DO NOT MODIFY IT.
** Filename : Byte1.H
** Project : RTOSDemo
** Processor : MC9S12DP256BCPV
** Beantype : ByteIO
** Version : Bean 02.019, Driver 01.03, CPU db: 2.87.283
** Compiler : Metrowerks HC12 C Compiler
** Date/Time : 16/06/2005, 21:10
** Abstract :
** This bean "ByteIO" implements an one-byte input/output.
** It uses one 8-bit port.
** Note: This bean is set to work in Output direction only.
** Methods of this bean are mostly implemented as a macros
** (if supported by target langauage and compiler).
** Settings :
** Port name : B
**
** Initial direction : Output (direction cannot be changed)
** Initial output value : 255 = 0FFH
** Initial pull option : off
**
** 8-bit data register : PORTB [1]
** 8-bit control register : DDRB [3]
**
** ----------------------------------------------------
** Bit | Pin | Name
** ----------------------------------------------------
** 0 | 24 | PB0_ADDR0_DATA0
** 1 | 25 | PB1_ADDR1_DATA1
** 2 | 26 | PB2_ADDR2_DATA2
** 3 | 27 | PB3_ADDR3_DATA3
** 4 | 28 | PB4_ADDR4_DATA4
** 5 | 29 | PB5_ADDR5_DATA5
** 6 | 30 | PB6_ADDR6_DATA6
** 7 | 31 | PB7_ADDR7_DATA7
** ----------------------------------------------------
** Contents :
** PutBit - void Byte1_PutBit(byte Bit,bool Val);
** NegBit - void Byte1_NegBit(byte Bit);
**
** (c) Copyright UNIS, spol. s r.o. 1997-2002
** UNIS, spol. s r.o.
** Jundrovska 33
** 624 00 Brno
** Czech Republic
** http : www.processorexpert.com
** mail : info@processorexpert.com
** ###################################################################*/
#ifndef __Byte1_H
#define __Byte1_H
/* MODULE Byte1. */
/*Including shared modules, which are used in the whole project*/
#include "PE_Types.h"
#include "PE_Error.h"
#include "PE_Const.h"
#include "IO_Map.h"
#include "PE_Timer.h"
#include "Cpu.h"
#pragma CODE_SEG Byte1_CODE /* Code section for this module. */
/*
** ===================================================================
** Method : Byte1_PutBit (bean ByteIO)
**
** Description :
** This method writes the new value to the specified bit
** of the output value.
** Parameters :
** NAME - DESCRIPTION
** BitNum - Number of the bit (0 to 7)
** Val - New value of the bit (FALSE or TRUE)
** FALSE = "0" or "Low", TRUE = "1" or "High"
** Returns : Nothing
** ===================================================================
*/
void Byte1_PutBit(byte BitNum, byte Value);
/*
** ===================================================================
** Method : Byte1_NegBit (bean ByteIO)
**
** Description :
** This method negates (invertes) the specified bit of the
** output value.
** Parameters :
** NAME - DESCRIPTION
** BitNum - Number of the bit to invert (0 to 7)
** Returns : Nothing
** ===================================================================
*/
void Byte1_NegBit(byte BitNum);
#pragma CODE_SEG DEFAULT /* Change code section to DEFAULT. */
/* END Byte1. */
#endif /* __Byte1_H*/
/*
** ###################################################################
**
** This file was created by UNIS Processor Expert 03.33 for
** the Motorola HCS12 series of microcontrollers.
**
** ###################################################################
*/

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/** ###################################################################
** THIS BEAN MODULE IS GENERATED BY THE TOOL. DO NOT MODIFY IT.
** Filename : COM0.C
** Project : RTOSDemo
** Processor : MC9S12DP256BCPV
** Beantype : AsynchroSerial
** Version : Bean 02.231, Driver 01.08, CPU db: 2.87.283
** Compiler : Metrowerks HC12 C Compiler
** Date/Time : 19/06/2005, 15:07
** Abstract :
** This bean "AsynchroSerial" implements an asynchronous serial
** communication. The bean supports different settings of
** parity, word width, stop-bit and communication speed,
** user can select interrupt or polling handler.
** Communication speed can be changed also in runtime.
** The bean requires one on-chip asynchronous serial channel.
** Settings :
** Serial channel : SCI0
**
** Protocol
** Init baud rate : 38400baud
** Width : 8 bits
** Stop bits : 1
** Parity : none
** Breaks : Disabled
**
** Registers
** Input buffer : SCI0DRL [207]
** Output buffer : SCI0DRL [207]
** Control register : SCI0CR1 [202]
** Mode register : SCI0CR2 [203]
** Baud setting reg. : SCI0BD [200]
** Special register : SCI0SR1 [204]
**
** Input interrupt
** Vector name : INT_SCI0
** Priority : 1
**
** Output interrupt
** Vector name : INT_SCI0
** Priority : 1
**
** Used pins :
** ----------------------------------------------------
** Function | On package | Name
** ----------------------------------------------------
** Input | 89 | PS0_RxD0
** Output | 90 | PS1_TxD0
** ----------------------------------------------------
**
**
** Used baud modes :
** ----------------------------------------------------
** No. | Mode ID | Baud rate
** ----------------------------------------------------
** 0 | Bm_38400baud | 38400baud
** 1 | Bm_19200baud | 19200baud
** 2 | Bm_9600baud | 9600baud
** 3 | Bm_4800baud | 4800baud
** ----------------------------------------------------
** Contents :
** SetBaudRateMode - byte COM0_SetBaudRateMode(byte Mod);
**
** (c) Copyright UNIS, spol. s r.o. 1997-2002
** UNIS, spol. s r.o.
** Jundrovska 33
** 624 00 Brno
** Czech Republic
** http : www.processorexpert.com
** mail : info@processorexpert.com
** ###################################################################*/
/* MODULE COM0. */
#pragma MESSAGE DISABLE C4002 /* WARNING C4002: Result not used is ignored */
#pragma MESSAGE DISABLE C4301 /* INFORMATION C4301: Inline expansion done for function call */
#include "COM0.h"
#include "TickTimer.h"
#include "Byte1.h"
/* Definition of DATA and CODE segments for this bean. User can specify where
these segments will be located on "Build options" tab of the selected CPU bean. */
#pragma DATA_SEG COM0_DATA /* Data section for this module. */
#pragma CODE_SEG COM0_CODE /* Code section for this module. */
#define OVERRUN_ERR 1 /* Overrun error flag bit */
#define FRAMING_ERR 2 /* Framing error flag bit */
#define PARITY_ERR 4 /* Parity error flag bit */
#define CHAR_IN_RX 8 /* Char is in RX buffer */
#define FULL_TX 16 /* Full transmit buffer */
#define RUNINT_FROM_TX 32 /* Interrupt is in progress */
#define FULL_RX 64 /* Full receive buffer */
#define NOISE_ERR 128 /* Noise erorr flag bit */
#define IDLE_ERR 256 /* Idle character flag bit */
#define BREAK_ERR 512 /* Break detect */
static word SerFlag; /* Flags for serial communication */
/* Bits: 0 - OverRun error */
/* 1 - Framing error */
/* 2 - Parity error */
/* 3 - Char in RX buffer */
/* 4 - Full TX buffer */
/* 5 - Running int from TX */
/* 6 - Full RX buffer */
/* 7 - Noise error */
/* 8 - Idle character */
/* 9 - Break detected */
/* 10 - Unused */
static word PrescHigh;
static byte NumMode; /* Number of selected baud mode */
/*
** ===================================================================
** Method : HWEnDi (bean AsynchroSerial)
**
** Description :
** This method is internal. It is used by Processor Expert
** only.
** ===================================================================
*/
static void HWEnDi(void)
{
SCI0CR2_TE = 1; /* Enable transmitter */
SCI0CR2_RE = 1; /* Enable receiver */
SCI0CR2_RIE = 1; /* Enable recieve interrupt */
}
/*
** ===================================================================
** Method : COM0_SetBaudRateMode (bean AsynchroSerial)
**
** Description :
** This method changes the channel communication speed (baud
** rate). This method can be used only if you specify a list
** of possible period settings at design time (see <Timing
** dialog box> - Runtime setting - from a list of values).
** Each of these settings constitutes a mode and Processor
** Expert^[TM] assigns them a mode identifier. The prescaler
** and compare values corresponding to each mode are
** calculated at design time. You may switch modes at
** runtime by referring only to a mode identifier. No
** run-time calculations are performed, all the calculations
** are performed at design time.
** Parameters :
** NAME - DESCRIPTION
** Mod - Timing mode to set
** Returns :
** --- - Error code, possible codes:
** ERR_OK - OK
** ERR_SPEED - This device does not work in
** the active speed mode
** ===================================================================
*/
byte COM0_SetBaudRateMode(byte Mod)
{
static const word COM0_PrescHigh[4] = {41,81,163,326};
if(Mod >= 4) /* Is mode in baud mode list */
return ERR_VALUE; /* If no then error */
NumMode = Mod; /* New baud mode */
PrescHigh = COM0_PrescHigh[Mod]; /* Prescaler in high speed mode */
SCI0BD = PrescHigh; /* Set prescaler bits */
return ERR_OK; /* OK */
}
/*
** ===================================================================
** Method : COM0_Init (bean AsynchroSerial)
**
** Description :
** This method is internal. It is used by Processor Expert
** only.
** ===================================================================
*/
void COM0_Init(void)
{
PrescHigh = 41; /* Precaler in high speed mode */
SerFlag = 0; /* Reset flags */
NumMode = 0; /* Number of selected baud mode */
/* SCI0CR1: LOOPS=0,SCISWAI=1,RSRC=0,M=0,WAKE=0,ILT=0,PE=0,PT=0 */
SCI0CR1 = 64; /* Set the SCI configuration */
/* SCI0SR2: ??=0,??=0,??=0,??=0,??=0,BRK13=0,TXDIR=0,RAF=0 */
SCI0SR2 = 0; /* Set the Break Character Length and Transmitter pin data direction in Single-wire mode */
SCI0SR1; /* Reset interrupt request flags */
/* SCI0CR2: SCTIE=0,TCIE=0,RIE=0,ILIE=0,TE=0,RE=0,RWU=0,SBK=0 */
SCI0CR2 = 0; /* Disable error interrupts */
SCI0BD = PrescHigh; /* Set prescaler bits */
HWEnDi(); /* Enable/disable device according to status flags */
}
/* END COM0. */
/*
** ###################################################################
**
** This file was created by UNIS Processor Expert 03.33 for
** the Motorola HCS12 series of microcontrollers.
**
** ###################################################################
*/

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/** ###################################################################
** THIS BEAN MODULE IS GENERATED BY THE TOOL. DO NOT MODIFY IT.
** Filename : COM0.H
** Project : RTOSDemo
** Processor : MC9S12DP256BCPV
** Beantype : AsynchroSerial
** Version : Bean 02.231, Driver 01.08, CPU db: 2.87.283
** Compiler : Metrowerks HC12 C Compiler
** Date/Time : 19/06/2005, 15:07
** Abstract :
** This bean "AsynchroSerial" implements an asynchronous serial
** communication. The bean supports different settings of
** parity, word width, stop-bit and communication speed,
** user can select interrupt or polling handler.
** Communication speed can be changed also in runtime.
** The bean requires one on-chip asynchronous serial channel.
** Settings :
** Serial channel : SCI0
**
** Protocol
** Init baud rate : 38400baud
** Width : 8 bits
** Stop bits : 1
** Parity : none
** Breaks : Disabled
**
** Registers
** Input buffer : SCI0DRL [207]
** Output buffer : SCI0DRL [207]
** Control register : SCI0CR1 [202]
** Mode register : SCI0CR2 [203]
** Baud setting reg. : SCI0BD [200]
** Special register : SCI0SR1 [204]
**
** Input interrupt
** Vector name : INT_SCI0
** Priority : 1
**
** Output interrupt
** Vector name : INT_SCI0
** Priority : 1
**
** Used pins :
** ----------------------------------------------------
** Function | On package | Name
** ----------------------------------------------------
** Input | 89 | PS0_RxD0
** Output | 90 | PS1_TxD0
** ----------------------------------------------------
**
**
** Used baud modes :
** ----------------------------------------------------
** No. | Mode ID | Baud rate
** ----------------------------------------------------
** 0 | Bm_38400baud | 38400baud
** 1 | Bm_19200baud | 19200baud
** 2 | Bm_9600baud | 9600baud
** 3 | Bm_4800baud | 4800baud
** ----------------------------------------------------
** Contents :
** SetBaudRateMode - byte COM0_SetBaudRateMode(byte Mod);
**
** (c) Copyright UNIS, spol. s r.o. 1997-2002
** UNIS, spol. s r.o.
** Jundrovska 33
** 624 00 Brno
** Czech Republic
** http : www.processorexpert.com
** mail : info@processorexpert.com
** ###################################################################*/
#ifndef __COM0
#define __COM0
/* MODULE COM0. */
#include "Cpu.h"
#define COM0_Bm_38400baud 0 /* Constant for switch to mode 0 */
#define COM0_Bm_19200baud 1 /* Constant for switch to mode 1 */
#define COM0_Bm_9600baud 2 /* Constant for switch to mode 2 */
#define COM0_Bm_4800baud 3 /* Constant for switch to mode 3 */
#ifndef __BWUserType_tItem
#define __BWUserType_tItem
typedef struct { /* Item of the index table for possible baudrates */
word div; /* divisior */
byte val; /* values of the prescalers */
} tItem;
#endif
#ifndef __BWUserType_COM0_TError
#define __BWUserType_COM0_TError
typedef union {
byte err;
struct {
bool OverRun : 1; /* OverRun error flag */
bool Framing : 1; /* Framing error flag */
bool Parity : 1; /* Parity error flag */
bool RxBufOvf : 1; /* Rx buffer full error flag */
bool Noise : 1; /* Noise error */
bool Break : 1; /* Break detect */
bool Idle : 1; /* Idle characted */
}errName;
} COM0_TError;
#endif
#ifndef __BWUserType_TDirection
#define __BWUserType_TDirection
typedef enum { /* */
TXD_INPUT,
TXD_OUTPUT
} TDirection;
#endif
#ifndef __BWUserType_COM0_TComData
#define __BWUserType_COM0_TComData
typedef byte COM0_TComData ; /* User type for communication. Size of this type depends on the communication data witdh. */
#endif
#pragma CODE_SEG COM0_CODE /* Code section for this module. */
byte COM0_SetBaudRateMode(byte Mod);
/*
** ===================================================================
** Method : COM0_SetBaudRateMode (bean AsynchroSerial)
**
** Description :
** This method changes the channel communication speed (baud
** rate). This method can be used only if you specify a list
** of possible period settings at design time (see <Timing
** dialog box> - Runtime setting - from a list of values).
** Each of these settings constitutes a mode and Processor
** Expert^[TM] assigns them a mode identifier. The prescaler
** and compare values corresponding to each mode are
** calculated at design time. You may switch modes at
** runtime by referring only to a mode identifier. No
** run-time calculations are performed, all the calculations
** are performed at design time.
** Parameters :
** NAME - DESCRIPTION
** Mod - Timing mode to set
** Returns :
** --- - Error code, possible codes:
** ERR_OK - OK
** ERR_SPEED - This device does not work in
** the active speed mode
** ===================================================================
*/
#pragma CODE_SEG __NEAR_SEG NON_BANKED /* Interrupt section for this module. Placement will be in NON_BANKED area. */
__interrupt void COM0_Interrupt(void);
#pragma CODE_SEG COM0_CODE /* Code section for this module. */
/*
** ===================================================================
** Method : COM0_Interrupt (bean AsynchroSerial)
**
** Description :
** This method is internal. It is used by Processor Expert
** only.
** ===================================================================
*/
void COM0_Init(void);
/*
** ===================================================================
** Method : COM0_Init (bean AsynchroSerial)
**
** Description :
** This method is internal. It is used by Processor Expert
** only.
** ===================================================================
*/
#pragma CODE_SEG DEFAULT /* Change code section to DEFAULT. */
/* END COM0. */
/*
** ###################################################################
**
** This file was created by UNIS Processor Expert 03.33 for
** the Motorola HCS12 series of microcontrollers.
**
** ###################################################################
*/
#endif /* ifndef __COM0 */

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/** ###################################################################
** THIS BEAN MODULE IS GENERATED BY THE TOOL. DO NOT MODIFY IT.
** Filename : Cpu.C
** Project : RTOSDemo
** Processor : MC9S12DP256BCPV
** Beantype : MC9S12DP256_112
** Version : Bean 01.148, Driver 01.09, CPU db: 2.87.283
** Compiler : Metrowerks HC12 C Compiler
** Date/Time : 16/06/2005, 19:18
** Abstract :
** This bean "MC9S12DP256_112" implements properties, methods,
** and events of the CPU.
** Settings :
**
** Contents :
** EnableInt - void Cpu_EnableInt(void);
** DisableInt - void Cpu_DisableInt(void);
**
** (c) Copyright UNIS, spol. s r.o. 1997-2002
** UNIS, spol. s r.o.
** Jundrovska 33
** 624 00 Brno
** Czech Republic
** http : www.processorexpert.com
** mail : info@processorexpert.com
** ###################################################################*/
#include "Cpu.h"
#include "TickTimer.h"
#include "Byte1.h"
extern void near _EntryPoint(void); /* Startup routine */
extern void near vPortTickInterrupt( void );
extern void near vPortYield( void );
extern void near vCOM0_ISR( void );
typedef void (*near tIsrFunc)(void);
const tIsrFunc _vect[] @0xFF80 = { /* Interrupt table */
Cpu_Interrupt, /* 0 Default (unused) interrupt */
Cpu_Interrupt, /* 1 Default (unused) interrupt */
Cpu_Interrupt, /* 2 Default (unused) interrupt */
Cpu_Interrupt, /* 3 Default (unused) interrupt */
Cpu_Interrupt, /* 4 Default (unused) interrupt */
Cpu_Interrupt, /* 5 Default (unused) interrupt */
Cpu_Interrupt, /* 6 Default (unused) interrupt */
Cpu_Interrupt, /* 7 Default (unused) interrupt */
Cpu_Interrupt, /* 8 Default (unused) interrupt */
Cpu_Interrupt, /* 9 Default (unused) interrupt */
Cpu_Interrupt, /* 10 Default (unused) interrupt */
Cpu_Interrupt, /* 11 Default (unused) interrupt */
Cpu_Interrupt, /* 12 Default (unused) interrupt */
Cpu_Interrupt, /* 13 Default (unused) interrupt */
Cpu_Interrupt, /* 14 Default (unused) interrupt */
Cpu_Interrupt, /* 15 Default (unused) interrupt */
Cpu_Interrupt, /* 16 Default (unused) interrupt */
Cpu_Interrupt, /* 17 Default (unused) interrupt */
Cpu_Interrupt, /* 18 Default (unused) interrupt */
Cpu_Interrupt, /* 19 Default (unused) interrupt */
Cpu_Interrupt, /* 20 Default (unused) interrupt */
Cpu_Interrupt, /* 21 Default (unused) interrupt */
Cpu_Interrupt, /* 22 Default (unused) interrupt */
Cpu_Interrupt, /* 23 Default (unused) interrupt */
Cpu_Interrupt, /* 24 Default (unused) interrupt */
Cpu_Interrupt, /* 25 Default (unused) interrupt */
Cpu_Interrupt, /* 26 Default (unused) interrupt */
Cpu_Interrupt, /* 27 Default (unused) interrupt */
Cpu_Interrupt, /* 28 Default (unused) interrupt */
Cpu_Interrupt, /* 29 Default (unused) interrupt */
Cpu_Interrupt, /* 30 Default (unused) interrupt */
Cpu_Interrupt, /* 31 Default (unused) interrupt */
Cpu_Interrupt, /* 32 Default (unused) interrupt */
Cpu_Interrupt, /* 33 Default (unused) interrupt */
Cpu_Interrupt, /* 34 Default (unused) interrupt */
Cpu_Interrupt, /* 35 Default (unused) interrupt */
Cpu_Interrupt, /* 36 Default (unused) interrupt */
Cpu_Interrupt, /* 37 Default (unused) interrupt */
Cpu_Interrupt, /* 38 Default (unused) interrupt */
Cpu_Interrupt, /* 39 Default (unused) interrupt */
Cpu_Interrupt, /* 40 Default (unused) interrupt */
Cpu_Interrupt, /* 41 Default (unused) interrupt */
Cpu_Interrupt, /* 42 Default (unused) interrupt */
vCOM0_ISR,
Cpu_Interrupt, /* 44 Default (unused) interrupt */
Cpu_Interrupt, /* 45 Default (unused) interrupt */
Cpu_Interrupt, /* 46 Default (unused) interrupt */
Cpu_Interrupt, /* 47 Default (unused) interrupt */
Cpu_Interrupt, /* 48 Default (unused) interrupt */
Cpu_Interrupt, /* 49 Default (unused) interrupt */
Cpu_Interrupt, /* 50 Default (unused) interrupt */
Cpu_Interrupt, /* 51 Default (unused) interrupt */
Cpu_Interrupt, /* 52 Default (unused) interrupt */
Cpu_Interrupt, /* 53 Default (unused) interrupt */
Cpu_Interrupt, /* 54 Default (unused) interrupt */
vPortTickInterrupt,
Cpu_Interrupt, /* 56 Default (unused) interrupt */
Cpu_Interrupt, /* 57 Default (unused) interrupt */
Cpu_Interrupt, /* 58 Default (unused) interrupt */
vPortYield, /* 59 Default (unused) interrupt */
Cpu_Interrupt, /* 60 Default (unused) interrupt */
Cpu_Interrupt, /* 61 Default (unused) interrupt */
Cpu_Interrupt, /* 62 Default (unused) interrupt */
_EntryPoint /* Reset vector */
};
/*
** ###################################################################
**
** This file was created by UNIS Processor Expert 03.33 for
** the Motorola HCS12 series of microcontrollers.
**
** ###################################################################
*/

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/** ###################################################################
** THIS BEAN MODULE IS GENERATED BY THE TOOL. DO NOT MODIFY IT.
** Filename : Cpu.C
** Project : RTOSDemo
** Processor : MC9S12DP256BCPV
** Beantype : MC9S12DP256_112
** Version : Bean 01.148, Driver 01.09, CPU db: 2.87.283
** Compiler : Metrowerks HC12 C Compiler
** Date/Time : 18/06/2005, 16:21
** Abstract :
** This bean "MC9S12DP256_112" implements properties, methods,
** and events of the CPU.
** Settings :
**
** Contents :
** EnableInt - void Cpu_EnableInt(void);
** DisableInt - void Cpu_DisableInt(void);
**
** (c) Copyright UNIS, spol. s r.o. 1997-2002
** UNIS, spol. s r.o.
** Jundrovska 33
** 624 00 Brno
** Czech Republic
** http : www.processorexpert.com
** mail : info@processorexpert.com
** ###################################################################*/
/* MODULE Cpu. */
#include "TickTimer.h"
#include "Byte1.h"
#include "COM0.h"
#include "PE_Types.h"
#include "PE_Error.h"
#include "PE_Const.h"
#include "IO_Map.h"
#include "PE_Timer.h"
#include "Events.h"
#include "Cpu.h"
#define CGM_DELAY 3071UL
/* Global variables */
volatile byte CCR_reg; /* Current CCR reegister */
byte CpuMode = HIGH_SPEED; /* Current speed mode */
/*
** ===================================================================
** Method : Cpu_Interrupt (bean MC9S12DP256_112)
**
** Description :
** This method is internal. It is used by Processor Expert
** only.
** ===================================================================
*/
#pragma CODE_SEG __NEAR_SEG NON_BANKED /* Interrupt section for this module. Placement will be in NON_BANKED area. */
__interrupt void Cpu_Interrupt(void)
{
}
#pragma CODE_SEG DEFAULT /* Change code section to DEFAULT. */
/*
** ===================================================================
** Method : Cpu_DisableInt (bean MC9S12DP256_112)
**
** Description :
** Disable maskable interrupts
** Parameters : None
** Returns : Nothing
** ===================================================================
*/
/*
void Cpu_DisableInt(void)
** This method is implemented as macro in the header module. **
*/
/*
** ===================================================================
** Method : Cpu_EnableInt (bean MC9S12DP256_112)
**
** Description :
** Enable maskable interrupts
** Parameters : None
** Returns : Nothing
** ===================================================================
*/
/*
void Cpu_EnableInt(void)
** This method is implemented as macro in the header module. **
*/
/*
** ===================================================================
** Method : _EntryPoint (bean MC9S12DP256_112)
**
** Description :
** This method is internal. It is used by Processor Expert
** only.
** ===================================================================
*/
extern void _Startup(void); /* Forward declaration of external startup function declared in file Start12.c */
#define INITRG_ADR 0x0011 /* Register map position register */
#pragma NO_FRAME
#pragma NO_EXIT
void _EntryPoint(void)
{
/*** ### MC9S12DP256_112 "Cpu" init code ... ***/
/*** PE initialization code after reset ***/
/* Initialization of the registers INITRG, INITRM, INITEE is done to protect them to be written accidentally later by the application */
*(byte*)INITRG_ADR = 0; /* Set the register map position */
asm nop; /* nop instruction */
INITRM=1; /* Set the RAM map position */
INITEE=1; /* Set the EEPROM map position */
/* MISC: ??=0,??=0,??=0,??=0,EXSTR1=0,EXSTR0=0,ROMHM=0,ROMON=1 */
MISC=1;
/* System clock initialization */
CLKSEL=0;
CLKSEL_PLLSEL = 0; /* Select clock source from XTAL */
PLLCTL_PLLON = 0; /* Disable the PLL */
SYNR = 24; /* Set the multiplier register */
REFDV = 15; /* Set the divider register */
PLLCTL = 192;
PLLCTL_PLLON = 1; /* Enable the PLL */
while(!CRGFLG_LOCK); /* Wait */
CLKSEL_PLLSEL = 1; /* Select clock source from PLL */
/*** End of PE initialization code after reset ***/
__asm jmp _Startup; /* Jump to C startup code */
}
/*
** ===================================================================
** Method : PE_low_level_init (bean MC9S12DP256_112)
**
** Description :
** This method is internal. It is used by Processor Expert
** only.
** ===================================================================
*/
void PE_low_level_init(void)
{
/* Common initialization of the CPU registers */
/* TSCR1: TEN=0,TSWAI=0,TSFRZ=1 */
output( TSCR1, input( TSCR1 ) & ~192 | 32 );
/* TCTL2: OM0=0,OL0=0 */
output( TCTL2, input( TCTL2 ) & ~3 );
/* TCTL1: OM7=0,OL7=0 */
output( TCTL1, input( TCTL1 ) & ~192 );
/* TIE: C0I=0 */
output( TIE, input( TIE ) & ~1 );
/* TTOV: TOV0=0 */
output( TTOV, input( TTOV ) & ~1 );
/* TSCR2: TOI=0,TCRE=1 */
output( TSCR2, input( TSCR2 ) & ~128 | 8 );
/* TIOS: IOS7=1,IOS0=1 */
output( TIOS, input( TIOS ) | 129 );
/* PWMCTL: PSWAI=0,PFRZ=0 */
output( PWMCTL, input( PWMCTL ) & ~12 );
/* PWMSDN: PWMIF=0,PWMIE=0,PWMRSTRT=0,PWMLVL=0,??=0,PWM7IN=0,PWM7INL=0,PWM7ENA=0 */
output( PWMSDN, 0 );
/* ICSYS: SH37=0,SH26=0,SH15=0,SH04=0,TFMOD=0,PACMX=0,BUFEN=0,LATQ=0 */
output( ICSYS, 0 );
/* MCCTL: MODMC=1 */
output( MCCTL, input( MCCTL ) | 64 );
/* ### MC9S12DP256_112 "Cpu" init code ... */
/* ### TimerInt "TickTimer" init code ... */
TickTimer_Init();
/* ### ByteIO "Byte1" init code ... */
PORTB = 255; /* Prepare value for output */
DDRB = 255; /* Set direction to output */
/* ### Asynchro serial "COM0" init code ... */
DDRS &= ~1;
PTS |= 2;
DDRS |= 2;
COM0_Init();
/* Common peripheral initialization - ENABLE */
/* TSCR1: TEN=1 */
output( TSCR1, input( TSCR1 ) | 128 );
INTCR_IRQEN = 0; /* Disable the IRQ interrupt. IRQ interrupt is enabled after CPU reset by default. */
__DI(); /* Disable interrupts */
}
/* END Cpu. */
/*
** ###################################################################
**
** This file was created by UNIS Processor Expert 03.33 for
** the Motorola HCS12 series of microcontrollers.
**
** ###################################################################
*/

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/** ###################################################################
** THIS BEAN MODULE IS GENERATED BY THE TOOL. DO NOT MODIFY IT.
** Filename : Cpu.H
** Project : RTOSDemo
** Processor : MC9S12DP256BCPV
** Beantype : MC9S12DP256_112
** Version : Bean 01.148, Driver 01.09, CPU db: 2.87.283
** Compiler : Metrowerks HC12 C Compiler
** Date/Time : 14/06/2005, 16:34
** Abstract :
** This bean "MC9S12DP256_112" implements properties, methods,
** and events of the CPU.
** Settings :
**
** Contents :
** EnableInt - void Cpu_EnableInt(void);
** DisableInt - void Cpu_DisableInt(void);
**
** (c) Copyright UNIS, spol. s r.o. 1997-2002
** UNIS, spol. s r.o.
** Jundrovska 33
** 624 00 Brno
** Czech Republic
** http : www.processorexpert.com
** mail : info@processorexpert.com
** ###################################################################*/
#ifndef __Cpu
#define __Cpu
/* Active configuration define symbol */
#define PEcfg_112pin 1
/*Include shared modules, which are used for whole project*/
#include "PE_Types.h"
#include "PE_Error.h"
#include "PE_Const.h"
#include "IO_Map.h"
#include "PE_Timer.h"
/* MODULE Cpu. */
/* Global variables */
extern volatile byte CCR_reg; /* Current CCR reegister */
extern byte CpuMode; /* Current speed mode */
#define Cpu_DisableInt() __DI() /* Disable interrupts */
/*
** ===================================================================
** Method : Cpu_DisableInt (bean MC9S12DP256_112)
**
** Description :
** Disable maskable interrupts
** Parameters : None
** Returns : Nothing
** ===================================================================
*/
#define Cpu_EnableInt() __EI() /* Enable interrupts */
/*
** ===================================================================
** Method : Cpu_EnableInt (bean MC9S12DP256_112)
**
** Description :
** Enable maskable interrupts
** Parameters : None
** Returns : Nothing
** ===================================================================
*/
#pragma CODE_SEG __NEAR_SEG NON_BANKED /* Interrupt section for this module. Placement will be in NON_BANKED area. */
__interrupt void Cpu_Interrupt(void);
/*
** ===================================================================
** Method : Cpu_Interrupt (bean MC9S12DP256_112)
**
** Description :
** This method is internal. It is used by Processor Expert
** only.
** ===================================================================
*/
#pragma CODE_SEG DEFAULT /* Change code section to DEFAULT. */
void PE_low_level_init(void);
/*
** ===================================================================
** Method : PE_low_level_init (bean MC9S12DP256_112)
**
** Description :
** This method is internal. It is used by Processor Expert
** only.
** ===================================================================
*/
/* END Cpu. */
#endif /* ifndef __Cpu */
/*
** ###################################################################
**
** This file was created by UNIS Processor Expert 03.33 for
** the Motorola HCS12 series of microcontrollers.
**
** ###################################################################
*/

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/** ###################################################################
** Filename : Events.C
** Project : RTOSDemo
** Processor : MC9S12DP256BCPV
** Beantype : Events
** Version : Driver 01.01
** Compiler : Metrowerks HC12 C Compiler
** Date/Time : 14/06/2005, 16:34
** Abstract :
** This is user's event module.
** Put your event handler code here.
** Settings :
** Contents :
** TickTimer_OnInterrupt - void TickTimer_OnInterrupt(void);
**
** (c) Copyright UNIS, spol. s r.o. 1997-2002
** UNIS, spol. s r.o.
** Jundrovska 33
** 624 00 Brno
** Czech Republic
** http : www.processorexpert.com
** mail : info@processorexpert.com
** ###################################################################*/
/* MODULE Events */
/*Including used modules for compilling procedure*/
#include "Cpu.h"
#include "Events.h"
#include "TickTimer.h"
#include "Byte1.h"
#include "COM0.h"
/*Include shared modules, which are used for whole project*/
#include "PE_Types.h"
#include "PE_Error.h"
#include "PE_Const.h"
#include "IO_Map.h"
#include "PE_Timer.h"
/*
** ===================================================================
** Event : TickTimer_OnInterrupt (module Events)
**
** From bean : TickTimer [TimerInt]
** Description :
** When a timer interrupt occurs this event is called (only
** when the bean is enabled - "Enable" and the events are
** enabled - "EnableEvent").
** Parameters : None
** Returns : Nothing
** ===================================================================
*/
void TickTimer_OnInterrupt(void)
{
/* Write your code here ... */
}
/*
** ===================================================================
** Event : COM0_OnError (module Events)
**
** From bean : COM0 [AsynchroSerial]
** Description :
** This event is called when a channel error (not the error
** returned by a given method) occurs. The errors can be
** read using <GetError> method.
** Parameters : None
** Returns : Nothing
** ===================================================================
*/
void COM0_OnError(void)
{
/* Write your code here ... */
}
/*
** ===================================================================
** Event : COM0_OnRxChar (module Events)
**
** From bean : COM0 [AsynchroSerial]
** Description :
** This event is called after a correct character is
** received. This
** Parameters : None
** Returns : Nothing
** ===================================================================
*/
void COM0_OnRxChar(void)
{
/* Write your code here ... */
}
/*
** ===================================================================
** Event : COM0_OnTxChar (module Events)
**
** From bean : COM0 [AsynchroSerial]
** Description :
** This event is called after a character is transmitted.
** Parameters : None
** Returns : Nothing
** ===================================================================
*/
void COM0_OnTxChar(void)
{
/* Write your code here ... */
}
/*
** ===================================================================
** Event : COM0_OnFullRxBuf (module Events)
**
** From bean : COM0 [AsynchroSerial]
** Description :
** This event is called when the input buffer is full.
** Parameters : None
** Returns : Nothing
** ===================================================================
*/
void COM0_OnFullRxBuf(void)
{
/* Write your code here ... */
}
/*
** ===================================================================
** Event : COM0_OnFreeTxBuf (module Events)
**
** From bean : COM0 [AsynchroSerial]
** Description :
** This event is called after the last character in output
** buffer is transmitted.
** Parameters : None
** Returns : Nothing
** ===================================================================
*/
void COM0_OnFreeTxBuf(void)
{
/* Write your code here ... */
}
/* END Events */
/*
** ###################################################################
**
** This file was created by UNIS Processor Expert 03.33 for
** the Motorola HCS12 series of microcontrollers.
**
** ###################################################################
*/

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/** ###################################################################
** Filename : Events.H
** Project : RTOSDemo
** Processor : MC9S12DP256BCPV
** Beantype : Events
** Version : Driver 01.01
** Compiler : Metrowerks HC12 C Compiler
** Date/Time : 14/06/2005, 16:34
** Abstract :
** This is user's event module.
** Put your event handler code here.
** Settings :
** Contents :
** TickTimer_OnInterrupt - void TickTimer_OnInterrupt(void);
**
** (c) Copyright UNIS, spol. s r.o. 1997-2002
** UNIS, spol. s r.o.
** Jundrovska 33
** 624 00 Brno
** Czech Republic
** http : www.processorexpert.com
** mail : info@processorexpert.com
** ###################################################################*/
#ifndef __Events_H
#define __Events_H
/* MODULE Events */
#include "PE_Types.h"
#include "PE_Error.h"
#include "PE_Const.h"
#include "IO_Map.h"
#include "PE_Timer.h"
void TickTimer_OnInterrupt(void);
/*
** ===================================================================
** Event : TickTimer_OnInterrupt (module Events)
**
** From bean : TickTimer [TimerInt]
** Description :
** When a timer interrupt occurs this event is called (only
** when the bean is enabled - "Enable" and the events are
** enabled - "EnableEvent").
** Parameters : None
** Returns : Nothing
** ===================================================================
*/
void COM0_OnError(void);
/*
** ===================================================================
** Event : COM0_OnError (module Events)
**
** From bean : COM0 [AsynchroSerial]
** Description :
** This event is called when a channel error (not the error
** returned by a given method) occurs. The errors can be
** read using <GetError> method.
** Parameters : None
** Returns : Nothing
** ===================================================================
*/
void COM0_OnRxChar(void);
/*
** ===================================================================
** Event : COM0_OnRxChar (module Events)
**
** From bean : COM0 [AsynchroSerial]
** Description :
** This event is called after a correct character is
** received. This
** Parameters : None
** Returns : Nothing
** ===================================================================
*/
void COM0_OnTxChar(void);
/*
** ===================================================================
** Event : COM0_OnTxChar (module Events)
**
** From bean : COM0 [AsynchroSerial]
** Description :
** This event is called after a character is transmitted.
** Parameters : None
** Returns : Nothing
** ===================================================================
*/
void COM0_OnFullRxBuf(void);
/*
** ===================================================================
** Event : COM0_OnFullRxBuf (module Events)
**
** From bean : COM0 [AsynchroSerial]
** Description :
** This event is called when the input buffer is full.
** Parameters : None
** Returns : Nothing
** ===================================================================
*/
void COM0_OnFreeTxBuf(void);
/*
** ===================================================================
** Event : COM0_OnFreeTxBuf (module Events)
**
** From bean : COM0 [AsynchroSerial]
** Description :
** This event is called after the last character in output
** buffer is transmitted.
** Parameters : None
** Returns : Nothing
** ===================================================================
*/
/* END Events */
#endif /* __Events_H*/
/*
** ###################################################################
**
** This file was created by UNIS Processor Expert 03.33 for
** the Motorola HCS12 series of microcontrollers.
**
** ###################################################################
*/

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/** ###################################################################
** THIS BEAN MODULE IS GENERATED BY THE TOOL. DO NOT MODIFY IT.
** Filename : IO_Map.C
** Project : RTOSDemo
** Processor : MC9S12DP256BCPV
** Beantype : IO_Map
** Version : Driver 01.01
** Compiler : Metrowerks HC12 C Compiler
** Date/Time : 13/06/2005, 20:14
** Abstract :
** This bean "IO_Map" implements an IO devices mapping.
** Settings :
**
** Contents :
** No public methods
**
** (c) Copyright UNIS, spol. s r.o. 1997-2002
** UNIS, spol. s r.o.
** Jundrovska 33
** 624 00 Brno
** Czech Republic
** http : www.processorexpert.com
** mail : info@processorexpert.com
** ###################################################################*/
/* Based on CPU DB MC9S12DP256_112, version 2.87.278 */
#include "PE_types.h"
#include "IO_Map.h"
volatile ARMCOPSTR _ARMCOP; /* CRG COP Timer Arm/Reset Register */
volatile ATD0DIENSTR _ATD0DIEN; /* ATD 0 Input Enable Mask Register */
volatile ATD0STAT0STR _ATD0STAT0; /* ATD 0 Status Register 0 */
volatile ATD0STAT1STR _ATD0STAT1; /* ATD 0 Status Register 1 */
volatile ATD1DIENSTR _ATD1DIEN; /* ATD 1 Input Enable Mask Register */
volatile ATD1STAT0STR _ATD1STAT0; /* ATD 1 Status Register 0 */
volatile ATD1STAT1STR _ATD1STAT1; /* ATD 1 Status Register 1 */
volatile BDMCCRSTR _BDMCCR; /* BDM CCR Holding Register */
volatile BDMINRSTR _BDMINR; /* BDM Internal Register Position Register */
volatile BDMSTSSTR _BDMSTS; /* BDM Status Register */
volatile BKP0HSTR _BKP0H; /* First Address High Byte Breakpoint Register */
volatile BKP0LSTR _BKP0L; /* First Address Low Byte Breakpoint Register */
volatile BKP0XSTR _BKP0X; /* First Address Memory Expansion Breakpoint Register */
volatile BKP1HSTR _BKP1H; /* Data (Second Address) High Byte Breakpoint Register */
volatile BKP1LSTR _BKP1L; /* Data (Second Address) Low Byte Breakpoint Register */
volatile BKP1XSTR _BKP1X; /* Second Address Memory Expansion Breakpoint Register */
volatile BKPCT0STR _BKPCT0; /* Breakpoint Control Register 0 */
volatile BKPCT1STR _BKPCT1; /* Breakpoint Control Register 1 */
volatile CAN0BTR0STR _CAN0BTR0; /* MSCAN 0 Bus Timing Register 0 */
volatile CAN0BTR1STR _CAN0BTR1; /* MSCAN 0 Bus Timing Register 1 */
volatile CAN0CTL0STR _CAN0CTL0; /* MSCAN 0 Control 0 Register */
volatile CAN0CTL1STR _CAN0CTL1; /* MSCAN 0 Control 1 Register */
volatile CAN0IDACSTR _CAN0IDAC; /* MSCAN 0 Identifier Acceptance Control Register */
volatile CAN0IDAR0STR _CAN0IDAR0; /* MSCAN 0 Identifier Acceptance Register 0 */
volatile CAN0IDAR1STR _CAN0IDAR1; /* MSCAN 0 Identifier Acceptance Register 1 */
volatile CAN0IDAR2STR _CAN0IDAR2; /* MSCAN 0 Identifier Acceptance Register 2 */
volatile CAN0IDAR3STR _CAN0IDAR3; /* MSCAN 0 Identifier Acceptance Register 3 */
volatile CAN0IDAR4STR _CAN0IDAR4; /* MSCAN 0 Identifier Acceptance Register 4 */
volatile CAN0IDAR5STR _CAN0IDAR5; /* MSCAN 0 Identifier Acceptance Register 5 */
volatile CAN0IDAR6STR _CAN0IDAR6; /* MSCAN 0 Identifier Acceptance Register 6 */
volatile CAN0IDAR7STR _CAN0IDAR7; /* MSCAN 0 Identifier Acceptance Register 7 */
volatile CAN0IDMR0STR _CAN0IDMR0; /* MSCAN 0 Identifier Mask Register 0 */
volatile CAN0IDMR1STR _CAN0IDMR1; /* MSCAN 0 Identifier Mask Register 1 */
volatile CAN0IDMR2STR _CAN0IDMR2; /* MSCAN 0 Identifier Mask Register 2 */
volatile CAN0IDMR3STR _CAN0IDMR3; /* MSCAN 0 Identifier Mask Register 3 */
volatile CAN0IDMR4STR _CAN0IDMR4; /* MSCAN 0 Identifier Mask Register 4 */
volatile CAN0IDMR5STR _CAN0IDMR5; /* MSCAN 0 Identifier Mask Register 5 */
volatile CAN0IDMR6STR _CAN0IDMR6; /* MSCAN 0 Identifier Mask Register 6 */
volatile CAN0IDMR7STR _CAN0IDMR7; /* MSCAN 0 Identifier Mask Register 7 */
volatile CAN0RFLGSTR _CAN0RFLG; /* MSCAN 0 Receiver Flag Register */
volatile CAN0RIERSTR _CAN0RIER; /* MSCAN 0 Receiver Interrupt Enable Register */
volatile CAN0RXDLRSTR _CAN0RXDLR; /* MSCAN 0 Receive Data Length Register */
volatile CAN0RXDSR0STR _CAN0RXDSR0; /* MSCAN 0 Receive Data Segment Register 0 */
volatile CAN0RXDSR1STR _CAN0RXDSR1; /* MSCAN 0 Receive Data Segment Register 1 */
volatile CAN0RXDSR2STR _CAN0RXDSR2; /* MSCAN 0 Receive Data Segment Register 2 */
volatile CAN0RXDSR3STR _CAN0RXDSR3; /* MSCAN 0 Receive Data Segment Register 3 */
volatile CAN0RXDSR4STR _CAN0RXDSR4; /* MSCAN 0 Receive Data Segment Register 4 */
volatile CAN0RXDSR5STR _CAN0RXDSR5; /* MSCAN 0 Receive Data Segment Register 5 */
volatile CAN0RXDSR6STR _CAN0RXDSR6; /* MSCAN 0 Receive Data Segment Register 6 */
volatile CAN0RXDSR7STR _CAN0RXDSR7; /* MSCAN 0 Receive Data Segment Register 7 */
volatile CAN0RXERRSTR _CAN0RXERR; /* MSCAN 0 Receive Error Counter Register */
volatile CAN0RXIDR0STR _CAN0RXIDR0; /* MSCAN 0 Receive Identifier Register 0 */
volatile CAN0RXIDR1STR _CAN0RXIDR1; /* MSCAN 0 Receive Identifier Register 1 */
volatile CAN0RXIDR2STR _CAN0RXIDR2; /* MSCAN 0 Receive Identifier Register 2 */
volatile CAN0RXIDR3STR _CAN0RXIDR3; /* MSCAN 0 Receive Identifier Register 3 */
volatile CAN0TAAKSTR _CAN0TAAK; /* MSCAN 0 Transmitter Message Abort Control */
volatile CAN0TARQSTR _CAN0TARQ; /* MSCAN 0 Transmitter Message Abort Request */
volatile CAN0TBSELSTR _CAN0TBSEL; /* MSCAN 0 Transmit Buffer Selection */
volatile CAN0TFLGSTR _CAN0TFLG; /* MSCAN 0 Transmitter Flag Register */
volatile CAN0TIERSTR _CAN0TIER; /* MSCAN 0 Transmitter Interrupt Enable Register */
volatile CAN0TXDLRSTR _CAN0TXDLR; /* MSCAN 0 Transmit Data Length Register */
volatile CAN0TXDSR0STR _CAN0TXDSR0; /* MSCAN 0 Transmit Data Segment Register 0 */
volatile CAN0TXDSR1STR _CAN0TXDSR1; /* MSCAN 0 Transmit Data Segment Register 1 */
volatile CAN0TXDSR2STR _CAN0TXDSR2; /* MSCAN 0 Transmit Data Segment Register 2 */
volatile CAN0TXDSR3STR _CAN0TXDSR3; /* MSCAN 0 Transmit Data Segment Register 3 */
volatile CAN0TXDSR4STR _CAN0TXDSR4; /* MSCAN 0 Transmit Data Segment Register 4 */
volatile CAN0TXDSR5STR _CAN0TXDSR5; /* MSCAN 0 Transmit Data Segment Register 5 */
volatile CAN0TXDSR6STR _CAN0TXDSR6; /* MSCAN 0 Transmit Data Segment Register 6 */
volatile CAN0TXDSR7STR _CAN0TXDSR7; /* MSCAN 0 Transmit Data Segment Register 7 */
volatile CAN0TXERRSTR _CAN0TXERR; /* MSCAN 0 Transmit Error Counter Register */
volatile CAN0TXIDR0STR _CAN0TXIDR0; /* MSCAN 0 Transmit Identifier Register 0 */
volatile CAN0TXIDR1STR _CAN0TXIDR1; /* MSCAN 0 Transmit Identifier Register 1 */
volatile CAN0TXIDR2STR _CAN0TXIDR2; /* MSCAN 0 Transmit Identifier Register 2 */
volatile CAN0TXIDR3STR _CAN0TXIDR3; /* MSCAN 0 Transmit Identifier Register 3 */
volatile CAN0TXTBPRSTR _CAN0TXTBPR; /* MSCAN 0 Transmit Buffer Priority */
volatile CAN1BTR0STR _CAN1BTR0; /* MSCAN 1 Bus Timing Register 0 */
volatile CAN1BTR1STR _CAN1BTR1; /* MSCAN 1 Bus Timing Register 1 */
volatile CAN1CTL0STR _CAN1CTL0; /* MSCAN 1 Control 0 Register */
volatile CAN1CTL1STR _CAN1CTL1; /* MSCAN 1 Control 1 Register */
volatile CAN1IDACSTR _CAN1IDAC; /* MSCAN 1 Identifier Acceptance Control Register */
volatile CAN1IDAR0STR _CAN1IDAR0; /* MSCAN 1 Identifier Acceptance Register 0 */
volatile CAN1IDAR1STR _CAN1IDAR1; /* MSCAN 1 Identifier Acceptance Register 1 */
volatile CAN1IDAR2STR _CAN1IDAR2; /* MSCAN 1 Identifier Acceptance Register 2 */
volatile CAN1IDAR3STR _CAN1IDAR3; /* MSCAN 1 Identifier Acceptance Register 3 */
volatile CAN1IDAR4STR _CAN1IDAR4; /* MSCAN 1 Identifier Acceptance Register 4 */
volatile CAN1IDAR5STR _CAN1IDAR5; /* MSCAN 1 Identifier Acceptance Register 5 */
volatile CAN1IDAR6STR _CAN1IDAR6; /* MSCAN 1 Identifier Acceptance Register 6 */
volatile CAN1IDAR7STR _CAN1IDAR7; /* MSCAN 1 Identifier Acceptance Register 7 */
volatile CAN1IDMR0STR _CAN1IDMR0; /* MSCAN 1 Identifier Mask Register 0 */
volatile CAN1IDMR1STR _CAN1IDMR1; /* MSCAN 1 Identifier Mask Register 1 */
volatile CAN1IDMR2STR _CAN1IDMR2; /* MSCAN 1 Identifier Mask Register 2 */
volatile CAN1IDMR3STR _CAN1IDMR3; /* MSCAN 1 Identifier Mask Register 3 */
volatile CAN1IDMR4STR _CAN1IDMR4; /* MSCAN 1 Identifier Mask Register 4 */
volatile CAN1IDMR5STR _CAN1IDMR5; /* MSCAN 1 Identifier Mask Register 5 */
volatile CAN1IDMR6STR _CAN1IDMR6; /* MSCAN 1 Identifier Mask Register 6 */
volatile CAN1IDMR7STR _CAN1IDMR7; /* MSCAN 1 Identifier Mask Register 7 */
volatile CAN1RFLGSTR _CAN1RFLG; /* MSCAN 1 Receiver Flag Register */
volatile CAN1RIERSTR _CAN1RIER; /* MSCAN 1 Receiver Interrupt Enable Register */
volatile CAN1RXDLRSTR _CAN1RXDLR; /* MSCAN 1 Receive Data Length Register */
volatile CAN1RXDSR0STR _CAN1RXDSR0; /* MSCAN 1 Receive Data Segment Register 0 */
volatile CAN1RXDSR1STR _CAN1RXDSR1; /* MSCAN 1 Receive Data Segment Register 1 */
volatile CAN1RXDSR2STR _CAN1RXDSR2; /* MSCAN 1 Receive Data Segment Register 2 */
volatile CAN1RXDSR3STR _CAN1RXDSR3; /* MSCAN 1 Receive Data Segment Register 3 */
volatile CAN1RXDSR4STR _CAN1RXDSR4; /* MSCAN 1 Receive Data Segment Register 4 */
volatile CAN1RXDSR5STR _CAN1RXDSR5; /* MSCAN 1 Receive Data Segment Register 5 */
volatile CAN1RXDSR6STR _CAN1RXDSR6; /* MSCAN 1 Receive Data Segment Register 6 */
volatile CAN1RXDSR7STR _CAN1RXDSR7; /* MSCAN 1 Receive Data Segment Register 7 */
volatile CAN1RXERRSTR _CAN1RXERR; /* MSCAN 1 Receive Error Counter Register */
volatile CAN1RXIDR0STR _CAN1RXIDR0; /* MSCAN 1 Receive Identifier Register 0 */
volatile CAN1RXIDR1STR _CAN1RXIDR1; /* MSCAN 1 Receive Identifier Register 1 */
volatile CAN1RXIDR2STR _CAN1RXIDR2; /* MSCAN 1 Receive Identifier Register 2 */
volatile CAN1RXIDR3STR _CAN1RXIDR3; /* MSCAN 1 Receive Identifier Register 3 */
volatile CAN1TAAKSTR _CAN1TAAK; /* MSCAN 1 Transmitter Message Abort Control */
volatile CAN1TARQSTR _CAN1TARQ; /* MSCAN 1 Transmitter Message Abort Request */
volatile CAN1TBSELSTR _CAN1TBSEL; /* MSCAN 1 Transmit Buffer Selection */
volatile CAN1TFLGSTR _CAN1TFLG; /* MSCAN 1 Transmitter Flag Register */
volatile CAN1TIERSTR _CAN1TIER; /* MSCAN 1 Transmitter Interrupt Enable Register */
volatile CAN1TXDLRSTR _CAN1TXDLR; /* MSCAN 1 Transmit Data Length Register */
volatile CAN1TXDSR0STR _CAN1TXDSR0; /* MSCAN 1 Transmit Data Segment Register 0 */
volatile CAN1TXDSR1STR _CAN1TXDSR1; /* MSCAN 1 Transmit Data Segment Register 1 */
volatile CAN1TXDSR2STR _CAN1TXDSR2; /* MSCAN 1 Transmit Data Segment Register 2 */
volatile CAN1TXDSR3STR _CAN1TXDSR3; /* MSCAN 1 Transmit Data Segment Register 3 */
volatile CAN1TXDSR4STR _CAN1TXDSR4; /* MSCAN 1 Transmit Data Segment Register 4 */
volatile CAN1TXDSR5STR _CAN1TXDSR5; /* MSCAN 1 Transmit Data Segment Register 5 */
volatile CAN1TXDSR6STR _CAN1TXDSR6; /* MSCAN 1 Transmit Data Segment Register 6 */
volatile CAN1TXDSR7STR _CAN1TXDSR7; /* MSCAN 1 Transmit Data Segment Register 7 */
volatile CAN1TXERRSTR _CAN1TXERR; /* MSCAN 1 Transmit Error Counter Register */
volatile CAN1TXIDR0STR _CAN1TXIDR0; /* MSCAN 1 Transmit Identifier Register 0 */
volatile CAN1TXIDR1STR _CAN1TXIDR1; /* MSCAN 1 Transmit Identifier Register 1 */
volatile CAN1TXIDR2STR _CAN1TXIDR2; /* MSCAN 1 Transmit Identifier Register 2 */
volatile CAN1TXIDR3STR _CAN1TXIDR3; /* MSCAN 1 Transmit Identifier Register 3 */
volatile CAN1TXTBPRSTR _CAN1TXTBPR; /* MSCAN 1 Transmit Buffer Priority */
volatile CAN2BTR0STR _CAN2BTR0; /* MSCAN 2 Bus Timing Register 0 */
volatile CAN2BTR1STR _CAN2BTR1; /* MSCAN 2 Bus Timing Register 1 */
volatile CAN2CTL0STR _CAN2CTL0; /* MSCAN 2 Control 0 Register */
volatile CAN2CTL1STR _CAN2CTL1; /* MSCAN 2 Control 1 Register */
volatile CAN2IDACSTR _CAN2IDAC; /* MSCAN 2 Identifier Acceptance Control Register */
volatile CAN2IDAR0STR _CAN2IDAR0; /* MSCAN 2 Identifier Acceptance Register 0 */
volatile CAN2IDAR1STR _CAN2IDAR1; /* MSCAN 2 Identifier Acceptance Register 1 */
volatile CAN2IDAR2STR _CAN2IDAR2; /* MSCAN 2 Identifier Acceptance Register 2 */
volatile CAN2IDAR3STR _CAN2IDAR3; /* MSCAN 2 Identifier Acceptance Register 3 */
volatile CAN2IDAR4STR _CAN2IDAR4; /* MSCAN 2 Identifier Acceptance Register 4 */
volatile CAN2IDAR5STR _CAN2IDAR5; /* MSCAN 2 Identifier Acceptance Register 5 */
volatile CAN2IDAR6STR _CAN2IDAR6; /* MSCAN 2 Identifier Acceptance Register 6 */
volatile CAN2IDAR7STR _CAN2IDAR7; /* MSCAN 2 Identifier Acceptance Register 7 */
volatile CAN2IDMR0STR _CAN2IDMR0; /* MSCAN 2 Identifier Mask Register 0 */
volatile CAN2IDMR1STR _CAN2IDMR1; /* MSCAN 2 Identifier Mask Register 1 */
volatile CAN2IDMR2STR _CAN2IDMR2; /* MSCAN 2 Identifier Mask Register 2 */
volatile CAN2IDMR3STR _CAN2IDMR3; /* MSCAN 2 Identifier Mask Register 3 */
volatile CAN2IDMR4STR _CAN2IDMR4; /* MSCAN 2 Identifier Mask Register 4 */
volatile CAN2IDMR5STR _CAN2IDMR5; /* MSCAN 2 Identifier Mask Register 5 */
volatile CAN2IDMR6STR _CAN2IDMR6; /* MSCAN 2 Identifier Mask Register 6 */
volatile CAN2IDMR7STR _CAN2IDMR7; /* MSCAN 2 Identifier Mask Register 7 */
volatile CAN2RFLGSTR _CAN2RFLG; /* MSCAN 2 Receiver Flag Register */
volatile CAN2RIERSTR _CAN2RIER; /* MSCAN 2 Receiver Interrupt Enable Register */
volatile CAN2RXDLRSTR _CAN2RXDLR; /* MSCAN 2 Receive Data Length Register */
volatile CAN2RXDSR0STR _CAN2RXDSR0; /* MSCAN 2 Receive Data Segment Register 0 */
volatile CAN2RXDSR1STR _CAN2RXDSR1; /* MSCAN 2 Receive Data Segment Register 1 */
volatile CAN2RXDSR2STR _CAN2RXDSR2; /* MSCAN 2 Receive Data Segment Register 2 */
volatile CAN2RXDSR3STR _CAN2RXDSR3; /* MSCAN 2 Receive Data Segment Register 3 */
volatile CAN2RXDSR4STR _CAN2RXDSR4; /* MSCAN 2 Receive Data Segment Register 4 */
volatile CAN2RXDSR5STR _CAN2RXDSR5; /* MSCAN 2 Receive Data Segment Register 5 */
volatile CAN2RXDSR6STR _CAN2RXDSR6; /* MSCAN 2 Receive Data Segment Register 6 */
volatile CAN2RXDSR7STR _CAN2RXDSR7; /* MSCAN 2 Receive Data Segment Register 7 */
volatile CAN2RXERRSTR _CAN2RXERR; /* MSCAN 2 Receive Error Counter Register */
volatile CAN2RXIDR0STR _CAN2RXIDR0; /* MSCAN 2 Receive Identifier Register 0 */
volatile CAN2RXIDR1STR _CAN2RXIDR1; /* MSCAN 2 Receive Identifier Register 1 */
volatile CAN2RXIDR2STR _CAN2RXIDR2; /* MSCAN 2 Receive Identifier Register 2 */
volatile CAN2RXIDR3STR _CAN2RXIDR3; /* MSCAN 2 Receive Identifier Register 3 */
volatile CAN2TAAKSTR _CAN2TAAK; /* MSCAN 2 Transmitter Message Abort Control */
volatile CAN2TARQSTR _CAN2TARQ; /* MSCAN 2 Transmitter Message Abort Request */
volatile CAN2TBSELSTR _CAN2TBSEL; /* MSCAN 2 Transmit Buffer Selection */
volatile CAN2TFLGSTR _CAN2TFLG; /* MSCAN 2 Transmitter Flag Register */
volatile CAN2TIERSTR _CAN2TIER; /* MSCAN 2 Transmitter Interrupt Enable Register */
volatile CAN2TXDLRSTR _CAN2TXDLR; /* MSCAN 2 Transmit Data Length Register */
volatile CAN2TXDSR0STR _CAN2TXDSR0; /* MSCAN 2 Transmit Data Segment Register 0 */
volatile CAN2TXDSR1STR _CAN2TXDSR1; /* MSCAN 2 Transmit Data Segment Register 1 */
volatile CAN2TXDSR2STR _CAN2TXDSR2; /* MSCAN 2 Transmit Data Segment Register 2 */
volatile CAN2TXDSR3STR _CAN2TXDSR3; /* MSCAN 2 Transmit Data Segment Register 3 */
volatile CAN2TXDSR4STR _CAN2TXDSR4; /* MSCAN 2 Transmit Data Segment Register 4 */
volatile CAN2TXDSR5STR _CAN2TXDSR5; /* MSCAN 2 Transmit Data Segment Register 5 */
volatile CAN2TXDSR6STR _CAN2TXDSR6; /* MSCAN 2 Transmit Data Segment Register 6 */
volatile CAN2TXDSR7STR _CAN2TXDSR7; /* MSCAN 2 Transmit Data Segment Register 7 */
volatile CAN2TXERRSTR _CAN2TXERR; /* MSCAN 2 Transmit Error Counter Register */
volatile CAN2TXIDR0STR _CAN2TXIDR0; /* MSCAN 2 Transmit Identifier Register 0 */
volatile CAN2TXIDR1STR _CAN2TXIDR1; /* MSCAN 2 Transmit Identifier Register 1 */
volatile CAN2TXIDR2STR _CAN2TXIDR2; /* MSCAN 2 Transmit Identifier Register 2 */
volatile CAN2TXIDR3STR _CAN2TXIDR3; /* MSCAN 2 Transmit Identifier Register 3 */
volatile CAN2TXTBPRSTR _CAN2TXTBPR; /* MSCAN 2 Transmit Buffer Priority */
volatile CAN3BTR0STR _CAN3BTR0; /* MSCAN 3 Bus Timing Register 0 */
volatile CAN3BTR1STR _CAN3BTR1; /* MSCAN 3 Bus Timing Register 1 */
volatile CAN3CTL0STR _CAN3CTL0; /* MSCAN 3 Control 0 Register */
volatile CAN3CTL1STR _CAN3CTL1; /* MSCAN 3 Control 1 Register */
volatile CAN3IDACSTR _CAN3IDAC; /* MSCAN 3 Identifier Acceptance Control Register */
volatile CAN3IDAR0STR _CAN3IDAR0; /* MSCAN 3 Identifier Acceptance Register 0 */
volatile CAN3IDAR1STR _CAN3IDAR1; /* MSCAN 3 Identifier Acceptance Register 1 */
volatile CAN3IDAR2STR _CAN3IDAR2; /* MSCAN 3 Identifier Acceptance Register 2 */
volatile CAN3IDAR3STR _CAN3IDAR3; /* MSCAN 3 Identifier Acceptance Register 3 */
volatile CAN3IDAR4STR _CAN3IDAR4; /* MSCAN 3 Identifier Acceptance Register 4 */
volatile CAN3IDAR5STR _CAN3IDAR5; /* MSCAN 3 Identifier Acceptance Register 5 */
volatile CAN3IDAR6STR _CAN3IDAR6; /* MSCAN 3 Identifier Acceptance Register 6 */
volatile CAN3IDAR7STR _CAN3IDAR7; /* MSCAN 3 Identifier Acceptance Register 7 */
volatile CAN3IDMR0STR _CAN3IDMR0; /* MSCAN 3 Identifier Mask Register 0 */
volatile CAN3IDMR1STR _CAN3IDMR1; /* MSCAN 3 Identifier Mask Register 1 */
volatile CAN3IDMR2STR _CAN3IDMR2; /* MSCAN 3 Identifier Mask Register 2 */
volatile CAN3IDMR3STR _CAN3IDMR3; /* MSCAN 3 Identifier Mask Register 3 */
volatile CAN3IDMR4STR _CAN3IDMR4; /* MSCAN 3 Identifier Mask Register 4 */
volatile CAN3IDMR5STR _CAN3IDMR5; /* MSCAN 3 Identifier Mask Register 5 */
volatile CAN3IDMR6STR _CAN3IDMR6; /* MSCAN 3 Identifier Mask Register 6 */
volatile CAN3IDMR7STR _CAN3IDMR7; /* MSCAN 3 Identifier Mask Register 7 */
volatile CAN3RFLGSTR _CAN3RFLG; /* MSCAN 3 Receiver Flag Register */
volatile CAN3RIERSTR _CAN3RIER; /* MSCAN 3 Receiver Interrupt Enable Register */
volatile CAN3RXDLRSTR _CAN3RXDLR; /* MSCAN 3 Receive Data Length Register */
volatile CAN3RXDSR0STR _CAN3RXDSR0; /* MSCAN 3 Receive Data Segment Register 0 */
volatile CAN3RXDSR1STR _CAN3RXDSR1; /* MSCAN 3 Receive Data Segment Register 1 */
volatile CAN3RXDSR2STR _CAN3RXDSR2; /* MSCAN 3 Receive Data Segment Register 2 */
volatile CAN3RXDSR3STR _CAN3RXDSR3; /* MSCAN 3 Receive Data Segment Register 3 */
volatile CAN3RXDSR4STR _CAN3RXDSR4; /* MSCAN 3 Receive Data Segment Register 4 */
volatile CAN3RXDSR5STR _CAN3RXDSR5; /* MSCAN 3 Receive Data Segment Register 5 */
volatile CAN3RXDSR6STR _CAN3RXDSR6; /* MSCAN 3 Receive Data Segment Register 6 */
volatile CAN3RXDSR7STR _CAN3RXDSR7; /* MSCAN 3 Receive Data Segment Register 7 */
volatile CAN3RXERRSTR _CAN3RXERR; /* MSCAN 3 Receive Error Counter Register */
volatile CAN3RXIDR0STR _CAN3RXIDR0; /* MSCAN 3 Receive Identifier Register 0 */
volatile CAN3RXIDR1STR _CAN3RXIDR1; /* MSCAN 3 Receive Identifier Register 1 */
volatile CAN3RXIDR2STR _CAN3RXIDR2; /* MSCAN 3 Receive Identifier Register 2 */
volatile CAN3RXIDR3STR _CAN3RXIDR3; /* MSCAN 3 Receive Identifier Register 3 */
volatile CAN3TAAKSTR _CAN3TAAK; /* MSCAN 3 Transmitter Message Abort Control */
volatile CAN3TARQSTR _CAN3TARQ; /* MSCAN 3 Transmitter Message Abort Request */
volatile CAN3TBSELSTR _CAN3TBSEL; /* MSCAN 3 Transmit Buffer Selection */
volatile CAN3TFLGSTR _CAN3TFLG; /* MSCAN 3 Transmitter Flag Register */
volatile CAN3TIERSTR _CAN3TIER; /* MSCAN 3 Transmitter Interrupt Enable Register */
volatile CAN3TXDLRSTR _CAN3TXDLR; /* MSCAN 3 Transmit Data Length Register */
volatile CAN3TXDSR0STR _CAN3TXDSR0; /* MSCAN 3 Transmit Data Segment Register 0 */
volatile CAN3TXDSR1STR _CAN3TXDSR1; /* MSCAN 3 Transmit Data Segment Register 1 */
volatile CAN3TXDSR2STR _CAN3TXDSR2; /* MSCAN 3 Transmit Data Segment Register 2 */
volatile CAN3TXDSR3STR _CAN3TXDSR3; /* MSCAN 3 Transmit Data Segment Register 3 */
volatile CAN3TXDSR4STR _CAN3TXDSR4; /* MSCAN 3 Transmit Data Segment Register 4 */
volatile CAN3TXDSR5STR _CAN3TXDSR5; /* MSCAN 3 Transmit Data Segment Register 5 */
volatile CAN3TXDSR6STR _CAN3TXDSR6; /* MSCAN 3 Transmit Data Segment Register 6 */
volatile CAN3TXDSR7STR _CAN3TXDSR7; /* MSCAN 3 Transmit Data Segment Register 7 */
volatile CAN3TXERRSTR _CAN3TXERR; /* MSCAN 3 Transmit Error Counter Register */
volatile CAN3TXIDR0STR _CAN3TXIDR0; /* MSCAN 3 Transmit Identifier Register 0 */
volatile CAN3TXIDR1STR _CAN3TXIDR1; /* MSCAN 3 Transmit Identifier Register 1 */
volatile CAN3TXIDR2STR _CAN3TXIDR2; /* MSCAN 3 Transmit Identifier Register 2 */
volatile CAN3TXIDR3STR _CAN3TXIDR3; /* MSCAN 3 Transmit Identifier Register 3 */
volatile CAN3TXTBPRSTR _CAN3TXTBPR; /* MSCAN 3 Transmit Buffer Priority */
volatile CAN4BTR0STR _CAN4BTR0; /* MSCAN4 Bus Timing Register 0 */
volatile CAN4BTR1STR _CAN4BTR1; /* MSCAN4 Bus Timing Register 1 */
volatile CAN4CTL0STR _CAN4CTL0; /* MSCAN4 Control 0 Register */
volatile CAN4CTL1STR _CAN4CTL1; /* MSCAN4 Control 1 Register */
volatile CAN4IDACSTR _CAN4IDAC; /* MSCAN4 Identifier Acceptance Control Register */
volatile CAN4IDAR0STR _CAN4IDAR0; /* MSCAN4 Identifier Acceptance Register 0 */
volatile CAN4IDAR1STR _CAN4IDAR1; /* MSCAN4 Identifier Acceptance Register 1 */
volatile CAN4IDAR2STR _CAN4IDAR2; /* MSCAN4 Identifier Acceptance Register 2 */
volatile CAN4IDAR3STR _CAN4IDAR3; /* MSCAN4 Identifier Acceptance Register 3 */
volatile CAN4IDAR4STR _CAN4IDAR4; /* MSCAN4 Identifier Acceptance Register 4 */
volatile CAN4IDAR5STR _CAN4IDAR5; /* MSCAN4 Identifier Acceptance Register 5 */
volatile CAN4IDAR6STR _CAN4IDAR6; /* MSCAN4 Identifier Acceptance Register 6 */
volatile CAN4IDAR7STR _CAN4IDAR7; /* MSCAN4 Identifier Acceptance Register 7 */
volatile CAN4IDMR0STR _CAN4IDMR0; /* MSCAN4 Identifier Mask Register 0 */
volatile CAN4IDMR1STR _CAN4IDMR1; /* MSCAN4 Identifier Mask Register 1 */
volatile CAN4IDMR2STR _CAN4IDMR2; /* MSCAN4 Identifier Mask Register 2 */
volatile CAN4IDMR3STR _CAN4IDMR3; /* MSCAN4 Identifier Mask Register 3 */
volatile CAN4IDMR4STR _CAN4IDMR4; /* MSCAN4 Identifier Mask Register 4 */
volatile CAN4IDMR5STR _CAN4IDMR5; /* MSCAN4 Identifier Mask Register 5 */
volatile CAN4IDMR6STR _CAN4IDMR6; /* MSCAN4 Identifier Mask Register 6 */
volatile CAN4IDMR7STR _CAN4IDMR7; /* MSCAN4 Identifier Mask Register 7 */
volatile CAN4RFLGSTR _CAN4RFLG; /* MSCAN4 Receiver Flag Register */
volatile CAN4RIERSTR _CAN4RIER; /* MSCAN4 Receiver Interrupt Enable Register */
volatile CAN4RXDLRSTR _CAN4RXDLR; /* MSCAN4 Receive Data Length Register */
volatile CAN4RXDSR0STR _CAN4RXDSR0; /* MSCAN4 Receive Data Segment Register 0 */
volatile CAN4RXDSR1STR _CAN4RXDSR1; /* MSCAN4 Receive Data Segment Register 1 */
volatile CAN4RXDSR2STR _CAN4RXDSR2; /* MSCAN4 Receive Data Segment Register 2 */
volatile CAN4RXDSR3STR _CAN4RXDSR3; /* MSCAN4 Receive Data Segment Register 3 */
volatile CAN4RXDSR4STR _CAN4RXDSR4; /* MSCAN4 Receive Data Segment Register 4 */
volatile CAN4RXDSR5STR _CAN4RXDSR5; /* MSCAN4 Receive Data Segment Register 5 */
volatile CAN4RXDSR6STR _CAN4RXDSR6; /* MSCAN4 Receive Data Segment Register 6 */
volatile CAN4RXDSR7STR _CAN4RXDSR7; /* MSCAN4 Receive Data Segment Register 7 */
volatile CAN4RXERRSTR _CAN4RXERR; /* MSCAN4 Receive Error Counter Register */
volatile CAN4RXIDR0STR _CAN4RXIDR0; /* MSCAN4 Receive Identifier Register 0 */
volatile CAN4RXIDR1STR _CAN4RXIDR1; /* MSCAN4 Receive Identifier Register 1 */
volatile CAN4RXIDR2STR _CAN4RXIDR2; /* MSCAN4 Receive Identifier Register 2 */
volatile CAN4RXIDR3STR _CAN4RXIDR3; /* MSCAN4 Receive Identifier Register 3 */
volatile CAN4TAAKSTR _CAN4TAAK; /* MSCAN4 Transmitter Message Abort Control */
volatile CAN4TARQSTR _CAN4TARQ; /* MSCAN 4 Transmitter Message Abort Request */
volatile CAN4TBSELSTR _CAN4TBSEL; /* MSCAN4 Transmit Buffer Selection */
volatile CAN4TFLGSTR _CAN4TFLG; /* MSCAN4 Transmitter Flag Register */
volatile CAN4TIERSTR _CAN4TIER; /* MSCAN4 Transmitter Interrupt Enable Register */
volatile CAN4TXDLRSTR _CAN4TXDLR; /* MSCAN4 Transmit Data Length Register */
volatile CAN4TXDSR0STR _CAN4TXDSR0; /* MSCAN4 Transmit Data Segment Register 0 */
volatile CAN4TXDSR1STR _CAN4TXDSR1; /* MSCAN4 Transmit Data Segment Register 1 */
volatile CAN4TXDSR2STR _CAN4TXDSR2; /* MSCAN4 Transmit Data Segment Register 2 */
volatile CAN4TXDSR3STR _CAN4TXDSR3; /* MSCAN4 Transmit Data Segment Register 3 */
volatile CAN4TXDSR4STR _CAN4TXDSR4; /* MSCAN4 Transmit Data Segment Register 4 */
volatile CAN4TXDSR5STR _CAN4TXDSR5; /* MSCAN4 Transmit Data Segment Register 5 */
volatile CAN4TXDSR6STR _CAN4TXDSR6; /* MSCAN4 Transmit Data Segment Register 6 */
volatile CAN4TXDSR7STR _CAN4TXDSR7; /* MSCAN4 Transmit Data Segment Register 7 */
volatile CAN4TXERRSTR _CAN4TXERR; /* MSCAN4 Transmit Error Counter Register */
volatile CAN4TXIDR0STR _CAN4TXIDR0; /* MSCAN4 Transmit Identifier Register 0 */
volatile CAN4TXIDR1STR _CAN4TXIDR1; /* MSCAN4 Transmit Identifier Register 1 */
volatile CAN4TXIDR2STR _CAN4TXIDR2; /* MSCAN4 Transmit Identifier Register 2 */
volatile CAN4TXIDR3STR _CAN4TXIDR3; /* MSCAN4 Transmit Identifier Register 3 */
volatile CAN4TXTBPRSTR _CAN4TXTBPR; /* MSCAN4 Transmit Transmit Buffer Priority */
volatile CFORCSTR _CFORC; /* Timer Compare Force Register */
volatile CLKSELSTR _CLKSEL; /* CRG Clock Select Register */
volatile COPCTLSTR _COPCTL; /* CRG COP Control Register */
volatile CRGFLGSTR _CRGFLG; /* CRG Flags Register */
volatile CRGINTSTR _CRGINT; /* CRG Interrupt Enable Register */
volatile CTCTLSTR _CTCTL; /* CRG Test Control Register */
volatile CTFLGSTR _CTFLG; /* CRG Test Flags Register */
volatile DDRESTR _DDRE; /* Port E Data Direction Register */
volatile DDRHSTR _DDRH; /* Port H Data Direction Register */
volatile DDRJSTR _DDRJ; /* Port J Data Direction Register */
volatile DDRKSTR _DDRK; /* Port K Data Direction Register */
volatile DDRMSTR _DDRM; /* Port M Data Direction Register */
volatile DDRPSTR _DDRP; /* Port P Data Direction Register */
volatile DDRSSTR _DDRS; /* Port S Data Direction Register */
volatile DDRTSTR _DDRT; /* Port T Data Direction Register */
volatile DLCBARDSTR _DLCBARD; /* BDLC Analog Round Trip Delay Register */
volatile DLCBCR1STR _DLCBCR1; /* BDLC Control Register 1 */
volatile DLCBCR2STR _DLCBCR2; /* BDLC Control Register 2 */
volatile DLCBDRSTR _DLCBDR; /* BDLC Data Register */
volatile DLCBRSRSTR _DLCBRSR; /* BDLC Rate Select Register */
volatile DLCBSVRSTR _DLCBSVR; /* BDLC State Vector Register */
volatile DLCSCRSTR _DLCSCR; /* BDLC Control Register */
volatile DLYCTSTR _DLYCT; /* Delay Counter Control Register */
volatile EBICTLSTR _EBICTL; /* External Bus Interface Control */
volatile ECLKDIVSTR _ECLKDIV; /* EEPROM Clock Divider Register */
volatile ECMDSTR _ECMD; /* EEPROM Command Buffer and Register */
volatile ECNFGSTR _ECNFG; /* EEPROM Configuration Register */
volatile EPROTSTR _EPROT; /* EEPROM Protection Register */
volatile ESTATSTR _ESTAT; /* EEPROM Status Register */
volatile FCLKDIVSTR _FCLKDIV; /* Flash Clock Divider Register */
volatile FCMDSTR _FCMD; /* Flash Command Buffer and Register */
volatile FCNFGSTR _FCNFG; /* Flash Configuration Register */
volatile FORBYPSTR _FORBYP; /* Crg force and bypass test register */
volatile FPROTSTR _FPROT; /* Flash Protection Register */
volatile FSECSTR _FSEC; /* Flash Security Register */
volatile FSTATSTR _FSTAT; /* Flash Status Register */
volatile HPRIOSTR _HPRIO; /* Highest Priority I Interrupt */
volatile IBADSTR _IBAD; /* IIC Address Register */
volatile IBCRSTR _IBCR; /* IIC Control Register */
volatile IBDRSTR _IBDR; /* IIC Data I/O Register */
volatile IBFDSTR _IBFD; /* IIC Frequency Divider Register */
volatile IBSRSTR _IBSR; /* IIC Status Register */
volatile ICOVWSTR _ICOVW; /* Input Control Overwrite Register */
volatile ICPARSTR _ICPAR; /* Input Control Pulse Accumulator Register */
volatile ICSYSSTR _ICSYS; /* Input Control System Control Register */
volatile INITEESTR _INITEE; /* Initialization of Internal EEPROM Position Register */
volatile INITRGSTR _INITRG; /* Initialization of Internal Register Position Register */
volatile INITRMSTR _INITRM; /* Initialization of Internal RAM Position Register */
volatile INTCRSTR _INTCR; /* Interrupt Control Register */
volatile ITCRSTR _ITCR; /* Interrupt Test Control Register */
volatile ITESTSTR _ITEST; /* Interrupt Test Register */
volatile MCCTLSTR _MCCTL; /* Modulus Down Counter underflow */
volatile MCFLGSTR _MCFLG; /* 16-Bit Modulus Down Counter Flag Register */
volatile MEMSIZ0STR _MEMSIZ0; /* Memory Size Register Zero */
volatile MEMSIZ1STR _MEMSIZ1; /* Memory Size Register One */
volatile MISCSTR _MISC; /* Miscellaneous Mapping Control Register */
volatile MODESTR _MODE; /* Mode Register */
volatile MODRRSTR _MODRR; /* Module Routing Register */
volatile MTST0STR _MTST0; /* MTST0 */
volatile MTST1STR _MTST1; /* MTST1 */
volatile OC7DSTR _OC7D; /* Output Compare 7 Data Register */
volatile OC7MSTR _OC7M; /* Output Compare 7 Mask Register */
volatile PACTLSTR _PACTL; /* 16-Bit Pulse Accumulator A Control Register */
volatile PAFLGSTR _PAFLG; /* Pulse Accumulator A Flag Register */
volatile PARTIDHSTR _PARTIDH; /* Part ID Register High */
volatile PARTIDLSTR _PARTIDL; /* Part ID Register Low */
volatile PBCTLSTR _PBCTL; /* 16-Bit Pulse Accumulator B Control Register */
volatile PBFLGSTR _PBFLG; /* Pulse Accumulator B Flag Register */
volatile PEARSTR _PEAR; /* Port E Assignment Register */
volatile PERHSTR _PERH; /* Port H Pull Device Enable Register */
volatile PERJSTR _PERJ; /* Port J Pull Device Enable Register */
volatile PERMSTR _PERM; /* Port M Pull Device Enable Register */
volatile PERPSTR _PERP; /* Port P Pull Device Enable Register */
volatile PERSSTR _PERS; /* Port S Pull Device Enable Register */
volatile PERTSTR _PERT; /* Port T Pull Device Enable Register */
volatile PIEHSTR _PIEH; /* Port H Interrupt Enable Register */
volatile PIEJSTR _PIEJ; /* Port J Interrupt Enable Register */
volatile PIEPSTR _PIEP; /* Port P Interrupt Enable Register */
volatile PIFHSTR _PIFH; /* Port H Interrupt Flag Register */
volatile PIFJSTR _PIFJ; /* Port J Interrupt Flag Register */
volatile PIFPSTR _PIFP; /* Port P Interrupt Flag Register */
volatile PLLCTLSTR _PLLCTL; /* CRG PLL Control Register */
volatile PORTAD0STR _PORTAD0; /* Port AD0 Register */
volatile PORTAD1STR _PORTAD1; /* Port AD1 Register */
volatile PORTESTR _PORTE; /* Port E Register */
volatile PORTKSTR _PORTK; /* Port K Data Register */
volatile PPAGESTR _PPAGE; /* Page Index Register */
volatile PPSHSTR _PPSH; /* Port H Polarity Select Register */
volatile PPSJSTR _PPSJ; /* PortJP Polarity Select Register */
volatile PPSMSTR _PPSM; /* Port M Polarity Select Register */
volatile PPSPSTR _PPSP; /* Port P Polarity Select Register */
volatile PPSSSTR _PPSS; /* Port S Polarity Select Register */
volatile PPSTSTR _PPST; /* Port T Polarity Select Register */
volatile PTHSTR _PTH; /* Port H I/O Register */
volatile PTIHSTR _PTIH; /* Port H Input Register */
volatile PTIJSTR _PTIJ; /* Port J Input Register */
volatile PTIMSTR _PTIM; /* Port M Input */
volatile PTIPSTR _PTIP; /* Port P Input */
volatile PTISSTR _PTIS; /* Port S Input */
volatile PTITSTR _PTIT; /* Port T Input */
volatile PTJSTR _PTJ; /* Port J I/O Register */
volatile PTMSTR _PTM; /* Port M I/O Register */
volatile PTPSTR _PTP; /* Port P I/O Register */
volatile PTSSTR _PTS; /* Port S I/O Register */
volatile PTTSTR _PTT; /* Port T I/O Register */
volatile PUCRSTR _PUCR; /* Pull-Up Control Register */
volatile PWMCAESTR _PWMCAE; /* PWM Center Align Enable Register */
volatile PWMCLKSTR _PWMCLK; /* PWM Clock Select Register */
volatile PWMCTLSTR _PWMCTL; /* PWM Control Register */
volatile PWMESTR _PWME; /* PWM Enable Register */
volatile PWMPOLSTR _PWMPOL; /* PWM Polarity Register */
volatile PWMPRCLKSTR _PWMPRCLK; /* PWM Prescale Clock Select Register */
volatile PWMSCLASTR _PWMSCLA; /* PWM Scale A Register */
volatile PWMSCLBSTR _PWMSCLB; /* PWM Scale B Register */
volatile PWMSDNSTR _PWMSDN; /* PWM Shutdown Register */
volatile RDRHSTR _RDRH; /* Port H Reduced Drive Register */
volatile RDRIVSTR _RDRIV; /* Reduced Drive of I/O Lines */
volatile RDRJSTR _RDRJ; /* Port J Reduced Drive Register */
volatile RDRMSTR _RDRM; /* Port M Reduced Drive Register */
volatile RDRPSTR _RDRP; /* Port P Reduced Drive Register */
volatile RDRSSTR _RDRS; /* Port S Reduced Drive Register */
volatile RDRTSTR _RDRT; /* Port T Reduced Drive Register */
volatile REFDVSTR _REFDV; /* CRG Reference Divider Register */
volatile RTICTLSTR _RTICTL; /* CRG RTI Control Register */
volatile SCI0CR1STR _SCI0CR1; /* SCI 0 Control Register 1 */
volatile SCI0CR2STR _SCI0CR2; /* SCI 0 Control Register 2 */
volatile SCI0DRHSTR _SCI0DRH; /* SCI 0 Data Register High */
volatile SCI0DRLSTR _SCI0DRL; /* SCI 0 Data Register Low */
volatile SCI0SR1STR _SCI0SR1; /* SCI 0 Status Register 1 */
volatile SCI0SR2STR _SCI0SR2; /* SCI 0 Status Register 2 */
volatile SCI1CR1STR _SCI1CR1; /* SCI 1 Control Register 1 */
volatile SCI1CR2STR _SCI1CR2; /* SCI 1 Control Register 2 */
volatile SCI1DRHSTR _SCI1DRH; /* SCI 1 Data Register High */
volatile SCI1DRLSTR _SCI1DRL; /* SCI 1 Data Register Low */
volatile SCI1SR1STR _SCI1SR1; /* SCI 1 Status Register 1 */
volatile SCI1SR2STR _SCI1SR2; /* SCI 1 Status Register 2 */
volatile SPI0BRSTR _SPI0BR; /* SPI 0 Baud Rate Register */
volatile SPI0CR1STR _SPI0CR1; /* SPI 0 Control Register */
volatile SPI0CR2STR _SPI0CR2; /* SPI 0 Control Register 2 */
volatile SPI0DRSTR _SPI0DR; /* SPI 0 Data Register */
volatile SPI0SRSTR _SPI0SR; /* SPI 0 Status Register */
volatile SPI1BRSTR _SPI1BR; /* SPI 1 Baud Rate Register */
volatile SPI1CR1STR _SPI1CR1; /* SPI 1 Control Register */
volatile SPI1CR2STR _SPI1CR2; /* SPI 1 Control Register 2 */
volatile SPI1DRSTR _SPI1DR; /* SPI 1 Data Register */
volatile SPI1SRSTR _SPI1SR; /* SPI 1 Status Register */
volatile SPI2BRSTR _SPI2BR; /* SPI 2 Baud Rate Register */
volatile SPI2CR1STR _SPI2CR1; /* SPI 2 Control Register */
volatile SPI2CR2STR _SPI2CR2; /* SPI 2 Control Register 2 */
volatile SPI2DRSTR _SPI2DR; /* SPI 2 Data Register */
volatile SPI2SRSTR _SPI2SR; /* SPI 2 Status Register */
volatile SYNRSTR _SYNR; /* CRG Synthesizer Register */
volatile TCTL1STR _TCTL1; /* Timer Control Registers 1 */
volatile TCTL2STR _TCTL2; /* Timer Control Registers 2 */
volatile TCTL3STR _TCTL3; /* Timer Control Register 3 */
volatile TCTL4STR _TCTL4; /* Timer Control Register 4 */
volatile TFLG1STR _TFLG1; /* Main Timer Interrupt Flag 1 */
volatile TFLG2STR _TFLG2; /* Main Timer Interrupt Flag 2 */
volatile TIESTR _TIE; /* Timer Interrupt Enable Register */
volatile TIMTSTSTR _TIMTST; /* Timer Test Register */
volatile TIOSSTR _TIOS; /* Timer Input Capture/Output Compare Select */
volatile TSCR1STR _TSCR1; /* Timer System Control Register1 */
volatile TSCR2STR _TSCR2; /* Timer System Control Register 2 */
volatile TTOVSTR _TTOV; /* Timer Toggle On Overflow Register */
volatile WOMMSTR _WOMM; /* Port M Wired-Or Mode Register */
volatile WOMSSTR _WOMS; /* Port S Wired-Or Mode Register */
volatile ATD0CTL23STR _ATD0CTL23; /* ATD 0 Control Register 23 */
volatile ATD0CTL45STR _ATD0CTL45; /* ATD 0 Control Register 45 */
volatile ATD0DR0STR _ATD0DR0; /* ATD 0 Conversion Result Register 0 */
volatile ATD0DR1STR _ATD0DR1; /* ATD 0 Conversion Result Register 1 */
volatile ATD0DR2STR _ATD0DR2; /* ATD 0 Conversion Result Register 2 */
volatile ATD0DR3STR _ATD0DR3; /* ATD 0 Conversion Result Register 3 */
volatile ATD0DR4STR _ATD0DR4; /* ATD 0 Conversion Result Register 4 */
volatile ATD0DR5STR _ATD0DR5; /* ATD 0 Conversion Result Register 5 */
volatile ATD0DR6STR _ATD0DR6; /* ATD 0 Conversion Result Register 6 */
volatile ATD0DR7STR _ATD0DR7; /* ATD 0 Conversion Result Register 7 */
volatile ATD1CTL23STR _ATD1CTL23; /* ATD 1 Control Register 23 */
volatile ATD1CTL45STR _ATD1CTL45; /* ATD 1 Control Register 45 */
volatile ATD1DR0STR _ATD1DR0; /* ATD 1 Conversion Result Register 0 */
volatile ATD1DR1STR _ATD1DR1; /* ATD 1 Conversion Result Register 1 */
volatile ATD1DR2STR _ATD1DR2; /* ATD 1 Conversion Result Register 2 */
volatile ATD1DR3STR _ATD1DR3; /* ATD 1 Conversion Result Register 3 */
volatile ATD1DR4STR _ATD1DR4; /* ATD 1 Conversion Result Register 4 */
volatile ATD1DR5STR _ATD1DR5; /* ATD 1 Conversion Result Register 5 */
volatile ATD1DR6STR _ATD1DR6; /* ATD 1 Conversion Result Register 6 */
volatile ATD1DR7STR _ATD1DR7; /* ATD 1 Conversion Result Register 7 */
volatile DDRABSTR _DDRAB; /* Port AB Data Direction Register */
volatile MCCNTSTR _MCCNT; /* Modulus Down-Counter Count Register */
volatile PA10HSTR _PA10H; /* 8-Bit Pulse Accumulators Holding 10 Register */
volatile PA32HSTR _PA32H; /* 8-Bit Pulse Accumulators Holding 32 Register */
volatile PACN10STR _PACN10; /* Pulse Accumulators Count 10 Register */
volatile PACN32STR _PACN32; /* Pulse Accumulators Count 32 Register */
volatile PORTABSTR _PORTAB; /* Port AB Register */
volatile PWMCNT01STR _PWMCNT01; /* PWM Channel Counter 01 Register */
volatile PWMCNT23STR _PWMCNT23; /* PWM Channel Counter 23 Register */
volatile PWMCNT45STR _PWMCNT45; /* PWM Channel Counter 45 Register */
volatile PWMCNT67STR _PWMCNT67; /* PWM Channel Counter 67 Register */
volatile PWMDTY01STR _PWMDTY01; /* PWM Channel Duty 01 Register */
volatile PWMDTY23STR _PWMDTY23; /* PWM Channel Duty 23 Register */
volatile PWMDTY45STR _PWMDTY45; /* PWM Channel Duty 45 Register */
volatile PWMDTY67STR _PWMDTY67; /* PWM Channel Duty 67 Register */
volatile PWMPER01STR _PWMPER01; /* PWM Channel Period 01 Register */
volatile PWMPER23STR _PWMPER23; /* PWM Channel Period 23 Register */
volatile PWMPER45STR _PWMPER45; /* PWM Channel Period 45 Register */
volatile PWMPER67STR _PWMPER67; /* PWM Channel Period 67 Register */
volatile SCI0BDSTR _SCI0BD; /* SCI 0 Baud Rate Register */
volatile SCI1BDSTR _SCI1BD; /* SCI 1 Baud Rate Register */
volatile TC0STR _TC0; /* Timer Input Capture/Output Compare Register 0 */
volatile TC0HSTR _TC0H; /* Timer Input Capture Holding Registers 0 */
volatile TC1STR _TC1; /* Timer Input Capture/Output Compare Register 1 */
volatile TC1HSTR _TC1H; /* Timer Input Capture Holding Registers 1 */
volatile TC2STR _TC2; /* Timer Input Capture/Output Compare Register 2 */
volatile TC2HSTR _TC2H; /* Timer Input Capture Holding Registers 2 */
volatile TC3STR _TC3; /* Timer Input Capture/Output Compare Register 3 */
volatile TC3HSTR _TC3H; /* Timer Input Capture Holding Registers 3 */
volatile TC4STR _TC4; /* Timer Input Capture/Output Compare Register 4 */
volatile TC5STR _TC5; /* Timer Input Capture/Output Compare Register 5 */
volatile TC6STR _TC6; /* Timer Input Capture/Output Compare Register 6 */
volatile TC7STR _TC7; /* Timer Input Capture/Output Compare Register 7 */
volatile TCNTSTR _TCNT; /* Timer Count Register */
/*
** ###################################################################
**
** This file was created by UNIS Processor Expert 03.33 for
** the Motorola HCS12 series of microcontrollers.
**
** ###################################################################
*/

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/* ================================================================================================================================= **
** ================================================================================================================================= **
** CONFIGURATION FILE FOR PESL LIBRARY **
** ================================================================================================================================= **
** ================================================================================================================================= */
#define _MC9S12A128_112 1
#define _MC9S12A128_80 2
#define _MC9S12A256_112 3
#define _MC9S12A256_80 4
#define _MC9S12A64_112 5
#define _MC9S12A64_80 6
#define _MC9S12C32_48 7
#define _MC9S12C32_52 8
#define _MC9S12C32_80 9
#define _MC9S12D64_112 10
#define _MC9S12D64_80 11
#define _MC9S12DB128_112 12
#define _MC9S12DG128_112 13
#define _MC9S12DG128_80 14
#define _MC9S12DG256_112 15
#define _MC9S12DJ128_112 16
#define _MC9S12DJ128_80 17
#define _MC9S12DJ256_112 18
#define _MC9S12DJ256_80 19
#define _MC9S12DJ64_112 20
#define _MC9S12DJ64_80 21
#define _MC9S12DP256_112 22
#define _MC9S12DT128_112 23
#define _MC9S12DT256_112 24
#define _MC9S12A32_80 25
#define _MC9S12D32_80 26
#define _MC9S12DP512_112 27
#define _MC9S12A512_112 28
#define _MC9S12E128_112 29
#define _MC9S12E128_80 30
#define _MC9S12E64_112 31
/* Selected target MCU */
#define CPUtype _MC9S12DP256_112
/* PESL library */
#pragma MESSAGE DISABLE C4000 /* WARNING C4000: Condition is always TRUE */
#pragma MESSAGE DISABLE C4001 /* WARNING C4001: Condition is always FALSE */
#include "PESLlib.h"

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/** ###################################################################
** THIS BEAN MODULE IS GENERATED BY THE TOOL. DO NOT MODIFY IT.
** Filename : PE_Const.H
** Project : RTOSDemo
** Processor : MC9S12DP256BCPV
** Beantype : PE_Const
** Version : Driver 01.00
** Compiler : Metrowerks HC12 C Compiler
** Date/Time : 13/06/2005, 20:14
** Abstract :
** This bean "PE_Const" contains internal definitions
** of the constants.
** Settings :
** Contents :
** No public methods
**
** (c) Copyright UNIS, spol. s r.o. 1997-2002
** UNIS, spol. s r.o.
** Jundrovska 33
** 624 00 Brno
** Czech Republic
** http : www.processorexpert.com
** mail : info@processorexpert.com
** ###################################################################*/
#ifndef __PE_Const_H
#define __PE_Const_H
/* Constants for detecting running mode */
#define HIGH_SPEED 0 /* High speed */
#define LOW_SPEED 1 /* Low speed */
#define SLOW_SPEED 2 /* Slow speed */
/* Reset cause constants */
#define RSTSRC_POR 1 /* Power-on reset */
#define RSTSRC_PIN 8 /* External reset bit */
#define RSTSRC_COP 4 /* COP reset */
#define RSTSRC_ILOP 2 /* Illegal opcode reset */
#define RSTSRC_ILAD 16 /* Illegal address reset */
#define RSTSRC_LVI 32 /* Low voltage inhibit reset */
#endif /* _PE_Const_H */
/*
** ###################################################################
**
** This file was created by UNIS Processor Expert 03.33 for
** the Motorola HCS12 series of microcontrollers.
**
** ###################################################################
*/

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/** ###################################################################
** THIS BEAN MODULE IS GENERATED BY THE TOOL. DO NOT MODIFY IT.
** Filename : PE_Error.H
** Project : RTOSDemo
** Processor : MC9S12DP256BCPV
** Beantype : PE_Error
** Version : Driver 01.00
** Compiler : Metrowerks HC12 C Compiler
** Date/Time : 13/06/2005, 20:14
** Abstract :
** This bean "PE_Error" contains internal definitions
** of the error constants.
** Settings :
** Contents :
** No public methods
**
** (c) Copyright UNIS, spol. s r.o. 1997-2002
** UNIS, spol. s r.o.
** Jundrovska 33
** 624 00 Brno
** Czech Republic
** http : www.processorexpert.com
** mail : info@processorexpert.com
** ###################################################################*/
#ifndef __PE_Error_H
#define __PE_Error_H
#define ERR_OK 0 /* OK */
#define ERR_SPEED 1 /* This device does not work in the active speed mode. */
#define ERR_RANGE 2 /* Parameter out of range. */
#define ERR_VALUE 3 /* Parameter of incorrect value. */
#define ERR_OVERFLOW 4 /* Timer overflow. */
#define ERR_MATH 5 /* Overflow during evaluation. */
#define ERR_ENABLED 6 /* Device is enabled. */
#define ERR_DISABLED 7 /* Device is disabled. */
#define ERR_BUSY 8 /* Device is busy. */
#define ERR_NOTAVAIL 9 /* Requested value or method not available. */
#define ERR_RXEMPTY 10 /* No data in receiver. */
#define ERR_TXFULL 11 /* Transmitter is full. */
#define ERR_BUSOFF 12 /* Bus not available. */
#define ERR_OVERRUN 13 /* Overrun error is detected. */
#define ERR_FRAMING 14 /* Framing error is detected. */
#define ERR_PARITY 15 /* Parity error is detected. */
#define ERR_NOISE 16 /* Noise error is detected. */
#define ERR_IDLE 17 /* Idle error is detectes. */
#define ERR_FAULT 18 /* Fault error is detected. */
#define ERR_BREAK 19 /* Break char is received during communication. */
#define ERR_CRC 20 /* CRC error is detected. */
#define ERR_ARBITR 21 /* A node losts arbitration. This error occurs if two nodes start transmission at the same time. */
#define ERR_PROTECT 22 /* Protection error is detected. */
#endif __PE_Error_H

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/** ###################################################################
** THIS BEAN MODULE IS GENERATED BY THE TOOL. DO NOT MODIFY IT.
** Filename : PE_Timer.C
** Project : RTOSDemo
** Processor : MC9S12DP256BCPV
** Beantype : PE_Timer
** Version : Driver 01.00
** Compiler : Metrowerks HC12 C Compiler
** Date/Time : 14/06/2005, 16:34
** Abstract :
** This bean "PE_Timer" implements internal methods and definitions
** used by beans working with timers.
** Settings :
** Contents :
** No public methods
**
** (c) Copyright UNIS, spol. s r.o. 1997-2002
** UNIS, spol. s r.o.
** Jundrovska 33
** 624 00 Brno
** Czech Republic
** http : www.processorexpert.com
** mail : info@processorexpert.com
** ###################################################################*/
/* MODULE PE_Timer. */
#include "PE_Timer.h"
typedef unsigned long UINT32;
typedef union {
UINT32 val;
struct {
unsigned short hi16,lo16;
} s;
} OP_UINT32;
typedef struct {
unsigned short dummy;
UINT32 mid;
} M_UINT32;
typedef struct {
UINT32 hi32, lo32;
} UINT64;
typedef union {
UINT64 val;
M_UINT32 m;
} OP_UINT64;
/*
** ===================================================================
** Method : PE_Timer_LngMul (bean PE_Timer)
**
** Description :
** This method is internal. It is used by Processor Expert
** only.
** ===================================================================
*/
void PE_Timer_LngMul(dword va1, dword va2, dlong *var)
{
OP_UINT32 *va = (OP_UINT32*)&va1;
OP_UINT32 *vb = (OP_UINT32*)&va2;
OP_UINT64 *vr = (OP_UINT64*)var;
vr->val.hi32 = 0UL;
vr->val.lo32 = ((UINT32)va->s.lo16)*((UINT32)vb->s.lo16);
{
OP_UINT32 tmp;
tmp.val = ((UINT32)va->s.lo16)*((UINT32)vb->s.hi16);
vr->m.mid += (UINT32)tmp.s.lo16;
vr->val.hi32 += (UINT32)tmp.s.hi16;
}
{
OP_UINT32 tmp;
tmp.val = ((UINT32)va->s.hi16)*((UINT32)vb->s.lo16);
vr->m.mid += (UINT32)tmp.s.lo16;
vr->val.hi32 += (UINT32)tmp.s.hi16;
}
vr->val.hi32 += ((UINT32)va->s.hi16)*((UINT32)vb->s.hi16);
}
/*
** ===================================================================
** Method : PE_Timer_LngHi1 (bean PE_Timer)
**
** Description :
** This method is internal. It is used by Processor Expert
** only.
** ===================================================================
*/
bool PE_Timer_LngHi1(dword High, dword Low, word *Out)
{
if ((High == 0) && ((Low >> 24) == 0))
if ((Low & 0x80) != 0) {
if ((Low >> 8) < 0xFFFF) {
*Out = ((unsigned int)(Low >> 8))+1;
return FALSE;
}
}
else {
*Out = (unsigned int)(Low >> 8);
return FALSE;
}
*Out = (unsigned int)(Low >> 8);
return TRUE;
}
/*
** ===================================================================
** Method : PE_Timer_LngHi2 (bean PE_Timer)
**
** Description :
** This method is internal. It is used by Processor Expert
** only.
** ===================================================================
*/
bool PE_Timer_LngHi2(dword High, dword Low, word *Out)
{
if (High == 0)
if ((Low & 0x8000) != 0) {
if ((Low >> 16) < 0xFFFF) {
*Out = ((unsigned int)(Low >> 16))+1;
return FALSE;
}
}
else {
*Out = (unsigned int)(Low >> 16);
return FALSE;
}
*Out = (unsigned int)(Low >> 16);
return TRUE;
}
/*
** ===================================================================
** Method : PE_Timer_LngHi3 (bean PE_Timer)
**
** Description :
** This method is internal. It is used by Processor Expert
** only.
** ===================================================================
*/
bool PE_Timer_LngHi3(dword High, dword Low, word *Out)
{
if ((High >> 8) == 0)
if ((Low & 0x800000) != 0) {
if (((Low >> 24) | (High << 8)) < 0xFFFF) {
*Out = ((unsigned int)((Low >> 24) | (High << 8)))+1;
return FALSE;
}
}
else {
*Out = (unsigned int)((Low >> 24) | (High << 8));
return FALSE;
}
*Out = (unsigned int)((Low >> 24) | (High << 8));
return TRUE;
}
/*
** ===================================================================
** Method : PE_Timer_LngHi4 (bean PE_Timer)
**
** Description :
** This method is internal. It is used by Processor Expert
** only.
** ===================================================================
*/
bool PE_Timer_LngHi4(dword High, dword Low, word *Out)
{
if ((High >> 16) == 0)
if ((Low & 0x80000000) != 0) {
if (High < 0xFFFF) {
*Out = ((unsigned int)High)+1;
return FALSE;
}
}
else {
*Out = (unsigned int)High;
return FALSE;
}
*Out = (unsigned int)High;
return TRUE;
}
/* END PE_Timer. */
/*
** ###################################################################
**
** This file was created by UNIS Processor Expert 03.33 for
** the Motorola HCS12 series of microcontrollers.
**
** ###################################################################
*/

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/** ###################################################################
** THIS BEAN MODULE IS GENERATED BY THE TOOL. DO NOT MODIFY IT.
** Filename : PE_Timer.H
** Project : RTOSDemo
** Processor : MC9S12DP256BCPV
** Beantype : PE_Timer
** Version : Driver 01.00
** Compiler : Metrowerks HC12 C Compiler
** Date/Time : 14/06/2005, 16:34
** Abstract :
** This bean "PE_Timer" implements internal methods and definitions
** used by beans working with timers.
** Settings :
** Contents :
** No public methods
**
** (c) Copyright UNIS, spol. s r.o. 1997-2002
** UNIS, spol. s r.o.
** Jundrovska 33
** 624 00 Brno
** Czech Republic
** http : www.processorexpert.com
** mail : info@processorexpert.com
** ###################################################################*/
#ifndef __PE_Timer
#define __PE_Timer
/*Include shared modules, which are used for whole project*/
#include "PE_types.h"
#include "PE_const.h"
/* MODULE PE_Timer. */
void PE_Timer_LngMul(dword va1, dword va2, dlong *var);
/*
** ===================================================================
** Method : PE_Timer_LngMul (bean PE_Timer)
**
** Description :
** This method is internal. It is used by Processor Expert
** only.
** ===================================================================
*/
bool PE_Timer_LngHi1(dword Low, dword High, word *Out);
/*
** ===================================================================
** Method : PE_Timer_LngHi1 (bean PE_Timer)
**
** Description :
** This method is internal. It is used by Processor Expert
** only.
** ===================================================================
*/
bool PE_Timer_LngHi2(dword Low, dword High, word *Out);
/*
** ===================================================================
** Method : PE_Timer_LngHi2 (bean PE_Timer)
**
** Description :
** This method is internal. It is used by Processor Expert
** only.
** ===================================================================
*/
bool PE_Timer_LngHi3(dword Low, dword High, word *Out);
/*
** ===================================================================
** Method : PE_Timer_LngHi3 (bean PE_Timer)
**
** Description :
** This method is internal. It is used by Processor Expert
** only.
** ===================================================================
*/
bool PE_Timer_LngHi4(dword Low, dword High, word *Out);
/*
** ===================================================================
** Method : PE_Timer_LngHi4 (bean PE_Timer)
**
** Description :
** This method is internal. It is used by Processor Expert
** only.
** ===================================================================
*/
#endif /* END PE_Timer. */
/*
** ###################################################################
**
** This file was created by UNIS Processor Expert 03.33 for
** the Motorola HCS12 series of microcontrollers.
**
** ###################################################################
*/

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/** ###################################################################
** THIS BEAN MODULE IS GENERATED BY THE TOOL. DO NOT MODIFY IT.
** Filename : PE_Types.H
** Project : RTOSDemo
** Processor : MC9S12DP256BCPV
** Beantype : PE_Types
** Version : Driver 01.04
** Compiler : Metrowerks HC12 C Compiler
** Date/Time : 13/06/2005, 20:14
** Abstract :
** This bean "PE_Types" contains internal definitions
** of the types.
** Settings :
** Contents :
** No public methods
**
** (c) Copyright UNIS, spol. s r.o. 1997-2002
** UNIS, spol. s r.o.
** Jundrovska 33
** 624 00 Brno
** Czech Republic
** http : www.processorexpert.com
** mail : info@processorexpert.com
** ###################################################################*/
#ifndef __PE_Types_H
#define __PE_Types_H
#define FALSE 0
#define TRUE 1
/*Types definition*/
typedef unsigned char bool;
typedef unsigned char byte;
typedef unsigned int word;
typedef unsigned long dword;
typedef unsigned long dlong[2];
typedef void (*tIntFunc)(void);
/* Motorola types */
typedef unsigned char VUINT8;
typedef signed char VINT8;
typedef unsigned short int VUINT16;
typedef signed short int VINT16;
typedef unsigned long int VUINT32;
#define in16(var,l,h) var = ((word)(l)) | (((word)(h)) << 8)
#define out16(l,h,val) { l = (byte)val; h = (byte)(val >> 8); }
#define output(P, V) P = (V)
#define input(P) (P)
#define __DI() { asm sei; } /* Disable global interrupts */
#define __EI() { asm cli; } /* Enable global interrupts */
#define EnterCritical() { __asm pshc; __asm sei; __asm movb 1,SP+,CCR_reg; } /* This macro is used by Processor Expert. It saves CCR register and disable global interrupts. */
#define ExitCritical() { __asm movb CCR_reg, 1,-SP; __asm pulc; } /* This macro is used by Processor Expert. It restores CCR register saved in SaveStatusReg(). */
/* obsolete definition for backward compatibility */
#define SaveStatusReg() EnterCritical()
#define RestoreStatusReg() ExitCritical()
typedef struct { /* Black&White Image */
word width; /* Image width */
word height; /* Image height */
byte *pixmap; /* Image pixel bitmap */
word size; /* Image size */
char *name; /* Image name */
} TIMAGE;
typedef TIMAGE* PIMAGE ; /* Pointer to image */
/* 16-bit register (Motorola format - big endian) */
typedef union {
word w;
struct {
byte high,low;
} b;
} TWREG;
#endif /* __PE_Types_H */
/*
** ###################################################################
**
** This file was created by UNIS Processor Expert 03.33 for
** the Motorola HCS12 series of microcontrollers.
**
** ###################################################################
*/

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/** ###################################################################
** Filename : RTOSDemo.C
** Project : RTOSDemo
** Processor : MC9S12DP256BCPV
** Version : Driver 01.05
** Compiler : Metrowerks HC12 C Compiler
** Date/Time : 13/06/2005, 20:14
** Abstract :
** Main module.
** Here is to be placed user's code.
** Settings :
** Contents :
** No public methods
**
** (c) Copyright UNIS, spol. s r.o. 1997-2002
** UNIS, spol. s r.o.
** Jundrovska 33
** 624 00 Brno
** Czech Republic
** http : www.processorexpert.com
** mail : info@processorexpert.com
** ###################################################################*/
/* MODULE RTOSDemo */
/* Including used modules for compilling procedure */
#include "Cpu.h"
#include "Events.h"
#include "TickTimer.h"
#include "Byte1.h"
#include "COM0.h"
/* Include shared modules, which are used for whole project */
#include "PE_Types.h"
#include "PE_Error.h"
#include "PE_Const.h"
#include "IO_Map.h"
extern void vMain( void );
void main(void)
{
/*** Processor Expert internal initialization. DON'T REMOVE THIS CODE!!! ***/
PE_low_level_init();
/*** End of Processor Expert internal initialization. ***/
/*Write your code here*/
/* Just jump to the real main(). */
__asm
{
jmp vMain
}
/*** Processor Expert end of main routine. DON'T MODIFY THIS CODE!!! ***/
for(;;);
/*** Processor Expert end of main routine. DON'T WRITE CODE BELOW!!! ***/
} /*** End of main routine. DO NOT MODIFY THIS TEXT!!! ***/
/* END RTOSDemo */
/*
** ###################################################################
**
** This file was created by UNIS Processor Expert 03.33 for
** the Motorola HCS12 series of microcontrollers.
**
** ###################################################################
*/

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/*
** ###################################################################
** THIS BEAN MODULE IS GENERATED BY THE TOOL. DO NOT MODIFY IT.
** Filename : RTOSDemo.PRM
** Project : RTOSDemo
** Processor : MC9S12DP256BCPV
** Compiler : Metrowerks HC12 C Compiler
** Date/Time : 19/06/2005, 15:54
** Abstract :
** This file is used by the linker. It describes files to be linked,
** memory ranges, stack size, etc. For detailed description of the PRM file
** see CodeWarrior documentation. This file is generated by default.
** You can switch off generation by setting the property
** "Generate PRM file = no" on the "Build options" tab in CPU bean and then modify
** this file if needed.
**
** (c) Copyright UNIS, spol. s r.o. 1997-2002
** UNIS, spol. s r.o.
** Jundrovska 33
** 624 00 Brno
** Czech Republic
** http : www.processorexpert.com
** mail : info@processorexpert.com
** ###################################################################
*/
NAMES
END
SECTIONS
/* List of all sections specified on the "Build options" tab */
RAM = READ_WRITE 0x00001000 TO 0x00003FFF;
ROM_C000 = READ_ONLY 0x0000C000 TO 0x0000C511;
ROM_4000 = READ_ONLY 0x00004000 TO 0x00004255;
ROM_PAGE30 = READ_ONLY 0x00308000 TO 0x00308255;
ROM_PAGE31 = READ_ONLY 0x00318000 TO 0x00318255;
ROM_PAGE32 = READ_ONLY 0x00328000 TO 0x00328255;
ROM_PAGE33 = READ_ONLY 0x00338000 TO 0x00338255;
ROM_PAGE34 = READ_ONLY 0x00348000 TO 0x00348255;
ROM_PAGE35 = READ_ONLY 0x00358000 TO 0x00358255;
ROM_PAGE36 = READ_ONLY 0x00368000 TO 0x00368255;
ROM_PAGE37 = READ_ONLY 0x00378000 TO 0x00378255;
ROM_PAGE38 = READ_ONLY 0x00388000 TO 0x00388255;
ROM_PAGE39 = READ_ONLY 0x00398000 TO 0x00398255;
ROM_PAGE3A = READ_ONLY 0x003A8000 TO 0x003A8255;
ROM_PAGE3B = READ_ONLY 0x003B8000 TO 0x003B8255;
ROM_PAGE3C = READ_ONLY 0x003C8000 TO 0x003C8255;
ROM_PAGE3D = READ_ONLY 0x003D8000 TO 0x003D8255;
END
PLACEMENT
DEFAULT_RAM INTO RAM;
DEFAULT_ROM INTO ROM_PAGE30, ROM_PAGE31, ROM_PAGE32, ROM_PAGE33, ROM_PAGE34, ROM_PAGE35, ROM_PAGE36,
ROM_PAGE37, ROM_PAGE38, ROM_PAGE39, ROM_PAGE3A, ROM_PAGE3B, ROM_PAGE3C, ROM_PAGE3D;
_PRESTART, STARTUP,
ROM_VAR, STRINGS,
NON_BANKED, COPY INTO ROM_C000, ROM_4000;
END
INIT _EntryPoint /* The entry point of the application. This function is generated into the CPU module. */
STACKSIZE 0x0080 /* Size of the system stack. Value can be changed on the "Build options" tab */

393
Demo/HCS12_CodeWarrior_banked/CODE/TickTimer.C Normal file
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@ -0,0 +1,393 @@
/** ###################################################################
** THIS BEAN MODULE IS GENERATED BY THE TOOL. DO NOT MODIFY IT.
** Filename : TickTimer.C
** Project : RTOSDemo
** Processor : MC9S12DP256BCPV
** Beantype : TimerInt
** Version : Bean 02.063, Driver 01.05, CPU db: 2.87.283
** Compiler : Metrowerks HC12 C Compiler
** Date/Time : 18/06/2005, 16:21
** Abstract :
** This bean "TimerInt" implements a periodic interrupt.
** When the bean and its events are enabled, the "OnInterrupt"
** event is called periodically with the period that you specify.
** TimerInt supports also changing the period in runtime.
** The source of periodic interrupt can be timer compare or reload
** register or timer-overflow interrupt (of free running counter).
** Settings :
** Timer name : ECT (16-bit)
** Compare name : TC0
** Counter shared : No
**
** High-speed CPU mode
** Prescaler : divide-by-8
** Clock : 3124000 Hz
** Initial period/frequency
** Xtal ticks : 16000
** microseconds : 1000
** milliseconds : 1
** seconds (real) : 0.0010000
** Hz : 1000
** kHz : 1
**
** Runtime setting : period/frequency interval (continual setting)
** ticks : 16000 to 320000 ticks
** microseconds : 1000 to 20000 microseconds
** milliseconds : 1 to 20 milliseconds
** seconds (real) : 0.0010000 to 0.0200000 seconds
** Hz : 50 to 1000 Hz
**
** Initialization:
** Timer : Enabled
** Events : Enabled
**
** Timer registers
** Counter : TCNT [68]
** Mode : TIOS [64]
** Run : TSCR1 [70]
** Prescaler : TSCR2 [77]
**
** Compare registers
** Compare : TC0 [80]
**
** Flip-flop registers
** Mode : TCTL2 [73]
** Contents :
** Enable - byte TickTimer_Enable(void);
** SetPeriodTicks16 - byte TickTimer_SetPeriodTicks16(word Ticks);
** SetPeriodTicks32 - byte TickTimer_SetPeriodTicks32(dword Ticks);
** SetPeriodUS - byte TickTimer_SetPeriodUS(word Time);
** SetPeriodMS - byte TickTimer_SetPeriodMS(word Time);
** SetFreqHz - byte TickTimer_SetFreqHz(word Freq);
**
** (c) Copyright UNIS, spol. s r.o. 1997-2002
** UNIS, spol. s r.o.
** Jundrovska 33
** 624 00 Brno
** Czech Republic
** http : www.processorexpert.com
** mail : info@processorexpert.com
** ###################################################################*/
/* MODULE TickTimer. */
#include "Events.h"
#include "TickTimer.h"
/* Definition of DATA and CODE segments for this bean. User can specify where
these segments will be located on "Build options" tab of the selected CPU bean. */
#pragma DATA_SEG TickTimer_DATA /* Data section for this module. */
#pragma CODE_SEG TickTimer_CODE /* Code section for this module. */
static word CmpHighVal; /* Compare register value for high speed CPU mode */
/*
** ===================================================================
** Method : SetCV (bean TimerInt)
**
** Description :
** This method is internal. It is used by Processor Expert
** only.
** ===================================================================
*/
static void SetCV(word Val)
{
if (Val == 0) /* If the given value is zero */
Val = 65535; /* then change it to the maximal one */
TC0 = Val; /* Store given value to the compare register */
TC7 = Val; /* Store given value to the modulo register */
}
/*
** ===================================================================
** Method : SetPV (bean TimerInt)
**
** Description :
** This method is internal. It is used by Processor Expert
** only.
** ===================================================================
*/
static void SetPV(byte Val)
{
TSCR2_PR = Val; /* Store given value to the prescaler */
}
/*
** ===================================================================
** Method : HWEnDi (bean TimerInt)
**
** Description :
** This method is internal. It is used by Processor Expert
** only.
** ===================================================================
*/
static void HWEnDi(void)
{
TFLG1 = 1; /* Reset interrupt request flag */
TIE_C0I = 1; /* Enable interrupt */
}
/*
** ===================================================================
** Method : TickTimer_Enable (bean TimerInt)
**
** Description :
** Enable the bean - it starts the timer. Events may be
** generated ("DisableEvent"/"EnableEvent").
** Parameters : None
** Returns :
** --- - Error code, possible codes:
** ERR_OK - OK
** ERR_SPEED - This device does not work in
** the active speed mode
** ===================================================================
*/
byte TickTimer_Enable(void)
{
HWEnDi(); /* Enable the device */
return ERR_OK; /* OK */
}
/*
** ===================================================================
** Method : TickTimer_SetPeriodTicks16 (bean TimerInt)
**
** Description :
** This method sets the new period of the generated events.
** The period is expressed in Xtal ticks as a 16-bit unsigned
** integer number.
** This method is available only if runtime setting type
** 'from interval' is selected in the Timing dialog box in
** Runtime setting area.
** Parameters :
** NAME - DESCRIPTION
** Ticks - Period to set [in Xtal ticks]
** (16000 to 65535 ticks)
** Returns :
** --- - Error code, possible codes:
** ERR_OK - OK
** ERR_SPEED - This device does not work in
** the active speed mode
** ERR_MATH - Overflow during evaluation
** ERR_RANGE - Parameter out of range
** ===================================================================
*/
byte TickTimer_SetPeriodTicks16(word Ticks)
{
dlong rtval; /* Result of two 32-bit numbers multiplication */
word rtword; /* Result of 64-bit number division */
if (Ticks < 16000) /* Is the given value out of range? */
return ERR_RANGE; /* If yes then error */
PE_Timer_LngMul((dword)Ticks,838592365,&rtval); /* Multiply given value and high speed CPU mode coefficient */
if (PE_Timer_LngHi4(rtval[0],rtval[1],&rtword)) /* Is the result greater or equal than 65536 ? */
rtword = 65535; /* If yes then use maximal possible value */
CmpHighVal = rtword; /* Store result (compare register value for high speed CPU mode) to the variable CmpHighVal */
SetCV(CmpHighVal); /* Store appropriate value to the compare register according to the selected high speed CPU mode */
return ERR_OK; /* OK */
}
/*
** ===================================================================
** Method : TickTimer_SetPeriodTicks32 (bean TimerInt)
**
** Description :
** This method sets the new period of the generated events.
** The period is expressed in Xtal ticks as a 32-bit unsigned
** integer number.
** This method is available only if runtime setting type
** 'from interval' is selected in the Timing dialog box in
** Runtime setting area.
** Parameters :
** NAME - DESCRIPTION
** Ticks - Period to set [in Xtal ticks]
** (16000 to 320000 ticks)
** Returns :
** --- - Error code, possible codes:
** ERR_OK - OK
** ERR_SPEED - This device does not work in
** the active speed mode
** ERR_MATH - Overflow during evaluation
** ERR_RANGE - Parameter out of range
** ===================================================================
*/
byte TickTimer_SetPeriodTicks32(dword Ticks)
{
dlong rtval; /* Result of two 32-bit numbers multiplication */
word rtword; /* Result of 64-bit number division */
if ((Ticks > 320000) || (Ticks < 16000)) /* Is the given value out of range? */
return ERR_RANGE; /* Range error */
PE_Timer_LngMul(Ticks,838592365,&rtval); /* Multiply given value and high speed CPU mode coefficient */
if (PE_Timer_LngHi4(rtval[0],rtval[1],&rtword)) /* Is the result greater or equal than 65536 ? */
rtword = 65535; /* If yes then use maximal possible value */
CmpHighVal = rtword; /* Store result (compare register value for high speed CPU mode) to the variable CmpHighVal */
SetCV(CmpHighVal); /* Store appropriate value to the compare register according to the selected high speed CPU mode */
return ERR_OK; /* OK */
}
/*
** ===================================================================
** Method : TickTimer_SetPeriodUS (bean TimerInt)
**
** Description :
** This method sets the new period of the generated events.
** The period is expressed in microseconds as a 16-bit
** unsigned integer number.
** This method is available only if runtime setting type
** 'from interval' is selected in the Timing dialog box in
** Runtime setting area.
** Parameters :
** NAME - DESCRIPTION
** Time - Period to set [in microseconds]
** (1000 to 20000 microseconds)
** Returns :
** --- - Error code, possible codes:
** ERR_OK - OK
** ERR_SPEED - This device does not work in
** the active speed mode
** ERR_MATH - Overflow during evaluation
** ERR_RANGE - Parameter out of range
** ===================================================================
*/
byte TickTimer_SetPeriodUS(word Time)
{
dlong rtval; /* Result of two 32-bit numbers multiplication */
word rtword; /* Result of 64-bit number division */
if ((Time > 20000) || (Time < 1000)) /* Is the given value out of range? */
return ERR_RANGE; /* If yes then error */
PE_Timer_LngMul((dword)Time,52412023,&rtval); /* Multiply given value and high speed CPU mode coefficient */
if (PE_Timer_LngHi3(rtval[0],rtval[1],&rtword)) /* Is the result greater or equal than 65536 ? */
rtword = 65535; /* If yes then use maximal possible value */
CmpHighVal = rtword; /* Store result (compare register value for high speed CPU mode) to the variable CmpHighVal */
SetCV(CmpHighVal); /* Store appropriate value to the compare register according to the selected high speed CPU mode */
return ERR_OK; /* OK */
}
/*
** ===================================================================
** Method : TickTimer_SetPeriodMS (bean TimerInt)
**
** Description :
** This method sets the new period of the generated events.
** The period is expressed in miliseconds as a 16-bit
** unsigned integer number.
** This method is available only if runtime setting type
** 'from interval' is selected in the Timing dialog box in
** Runtime setting area.
** Parameters :
** NAME - DESCRIPTION
** Time - Period to set [in miliseconds]
** (1 to 20 milliseconds)
** Returns :
** --- - Error code, possible codes:
** ERR_OK - OK
** ERR_SPEED - This device does not work in
** the active speed mode
** ERR_MATH - Overflow during evaluation
** ERR_RANGE - Parameter out of range
** ===================================================================
*/
byte TickTimer_SetPeriodMS(word Time)
{
dlong rtval; /* Result of two 32-bit numbers multiplication */
word rtword; /* Result of 64-bit number division */
if ((Time > 20) || (Time < 1)) /* Is the given value out of range? */
return ERR_RANGE; /* If yes then error */
PE_Timer_LngMul((dword)Time,204734464,&rtval); /* Multiply given value and high speed CPU mode coefficient */
if (PE_Timer_LngHi2(rtval[0],rtval[1],&rtword)) /* Is the result greater or equal than 65536 ? */
rtword = 65535; /* If yes then use maximal possible value */
CmpHighVal = rtword; /* Store result (compare register value for high speed CPU mode) to the variable CmpHighVal */
SetCV(CmpHighVal); /* Store appropriate value to the compare register according to the selected high speed CPU mode */
return ERR_OK; /* OK */
}
/*
** ===================================================================
** Method : TickTimer_SetFreqHz (bean TimerInt)
**
** Description :
** This method sets the new frequency of the generated
** events. The frequency is expressed in Hz as a 16-bit
** unsigned integer number.
** This method is available only if runtime setting type
** 'from interval' is selected in the Timing dialog box in
** Runtime setting area.
** Parameters :
** NAME - DESCRIPTION
** Freq - Frequency to set [in Hz]
** (50 to 1000 Hz)
** Returns :
** --- - Error code, possible codes:
** ERR_OK - OK
** ERR_SPEED - This device does not work in
** the active speed mode
** ERR_MATH - Overflow during evaluation
** ERR_RANGE - Parameter out of range
** ===================================================================
*/
byte TickTimer_SetFreqHz(word Freq)
{
dlong rtval; /* Result of two 32-bit numbers division */
word rtword; /* Result of 64-bit number division */
if ((Freq > 1000) || (Freq < 50)) /* Is the given value out of range? */
return ERR_RANGE; /* If yes then error */
rtval[1] = 799744000 / (dword)Freq; /* Divide high speed CPU mode coefficient by the given value */
rtval[0] = 0; /* Convert result to the type dlong */
if (PE_Timer_LngHi1(rtval[0],rtval[1],&rtword)) /* Is the result greater or equal than 65536 ? */
rtword = 65535; /* If yes then use maximal possible value */
CmpHighVal = rtword; /* Store result (compare register value for high speed CPU mode) to the variable CmpHighVal */
SetCV(CmpHighVal); /* Store appropriate value to the compare register according to the selected high speed CPU mode */
return ERR_OK; /* OK */
}
/*
** ===================================================================
** Method : TickTimer_Init (bean TimerInt)
**
** Description :
** This method is internal. It is used by Processor Expert
** only.
** ===================================================================
*/
void TickTimer_Init(void)
{
CmpHighVal = 3124; /* Compare register value for high speed CPU mode */
SetCV(CmpHighVal); /* Store appropriate value to the compare register according to the selected high speed CPU mode */
SetPV(3); /* Set prescaler register according to the selected high speed CPU mode */
HWEnDi(); /* Enable/disable device according to status flags */
}
/*
** ===================================================================
** Method : TickTimer_Interrupt (bean TimerInt)
**
** Description :
** This method is internal. It is used by Processor Expert
** only.
** ===================================================================
*/
#pragma CODE_SEG __NEAR_SEG NON_BANKED /* Interrupt section for this module. Placement will be in NON_BANKED area. */
__interrupt void TickTimer_Interrupt(void)
{
TFLG1 = 1; /* Reset interrupt request flag */
TickTimer_OnInterrupt(); /* Invoke user event */
}
#pragma CODE_SEG TickTimer_CODE /* Code section for this module. */
/* END TickTimer. */
/*
** ###################################################################
**
** This file was created by UNIS Processor Expert 03.33 for
** the Motorola HCS12 series of microcontrollers.
**
** ###################################################################
*/

276
Demo/HCS12_CodeWarrior_banked/CODE/TickTimer.H Normal file
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@ -0,0 +1,276 @@
/** ###################################################################
** THIS BEAN MODULE IS GENERATED BY THE TOOL. DO NOT MODIFY IT.
** Filename : TickTimer.H
** Project : RTOSDemo
** Processor : MC9S12DP256BCPV
** Beantype : TimerInt
** Version : Bean 02.063, Driver 01.05, CPU db: 2.87.283
** Compiler : Metrowerks HC12 C Compiler
** Date/Time : 18/06/2005, 16:21
** Abstract :
** This bean "TimerInt" implements a periodic interrupt.
** When the bean and its events are enabled, the "OnInterrupt"
** event is called periodically with the period that you specify.
** TimerInt supports also changing the period in runtime.
** The source of periodic interrupt can be timer compare or reload
** register or timer-overflow interrupt (of free running counter).
** Settings :
** Timer name : ECT (16-bit)
** Compare name : TC0
** Counter shared : No
**
** High-speed CPU mode
** Prescaler : divide-by-8
** Clock : 3124000 Hz
** Initial period/frequency
** Xtal ticks : 16000
** microseconds : 1000
** milliseconds : 1
** seconds (real) : 0.0010000
** Hz : 1000
** kHz : 1
**
** Runtime setting : period/frequency interval (continual setting)
** ticks : 16000 to 320000 ticks
** microseconds : 1000 to 20000 microseconds
** milliseconds : 1 to 20 milliseconds
** seconds (real) : 0.0010000 to 0.0200000 seconds
** Hz : 50 to 1000 Hz
**
** Initialization:
** Timer : Enabled
** Events : Enabled
**
** Timer registers
** Counter : TCNT [68]
** Mode : TIOS [64]
** Run : TSCR1 [70]
** Prescaler : TSCR2 [77]
**
** Compare registers
** Compare : TC0 [80]
**
** Flip-flop registers
** Mode : TCTL2 [73]
** Contents :
** Enable - byte TickTimer_Enable(void);
** SetPeriodTicks16 - byte TickTimer_SetPeriodTicks16(word Ticks);
** SetPeriodTicks32 - byte TickTimer_SetPeriodTicks32(dword Ticks);
** SetPeriodUS - byte TickTimer_SetPeriodUS(word Time);
** SetPeriodMS - byte TickTimer_SetPeriodMS(word Time);
** SetFreqHz - byte TickTimer_SetFreqHz(word Freq);
**
** (c) Copyright UNIS, spol. s r.o. 1997-2002
** UNIS, spol. s r.o.
** Jundrovska 33
** 624 00 Brno
** Czech Republic
** http : www.processorexpert.com
** mail : info@processorexpert.com
** ###################################################################*/
#ifndef __TickTimer
#define __TickTimer
/* MODULE TickTimer. */
#include "Cpu.h"
#pragma CODE_SEG TickTimer_CODE /* Code section for this module. */
#define TickTimer_SPT16Min 16000 /* Lower bound of interval for method SetPeriodTicks16 */
#define TickTimer_SPT16Max 65535 /* Upper bound of interval for method SetPeriodTicks16 */
#define TickTimer_SPT32Min 16000 /* Lower bound of interval for method SetPeriodTicks32 */
#define TickTimer_SPT32Max 320000 /* Upper bound of interval for method SetPeriodTicks32 */
#define TickTimer_SPUSMin 1000 /* Lower bound of interval for method SetPeriodUS */
#define TickTimer_SPUSMax 20000 /* Upper bound of interval for method SetPeriodUS */
#define TickTimer_SPMSMin 1 /* Lower bound of interval for method SetPeriodMS */
#define TickTimer_SPMSMax 20 /* Upper bound of interval for method SetPeriodMS */
#define TickTimer_SFHzMin 50 /* Lower bound of interval for method SetFreqHz */
#define TickTimer_SFHzMax 1000 /* Upper bound of interval for method SetFreqHz */
byte TickTimer_Enable(void);
/*
** ===================================================================
** Method : TickTimer_Enable (bean TimerInt)
**
** Description :
** Enable the bean - it starts the timer. Events may be
** generated ("DisableEvent"/"EnableEvent").
** Parameters : None
** Returns :
** --- - Error code, possible codes:
** ERR_OK - OK
** ERR_SPEED - This device does not work in
** the active speed mode
** ===================================================================
*/
byte TickTimer_SetPeriodTicks16(word Ticks);
/*
** ===================================================================
** Method : TickTimer_SetPeriodTicks16 (bean TimerInt)
**
** Description :
** This method sets the new period of the generated events.
** The period is expressed in Xtal ticks as a 16-bit unsigned
** integer number.
** This method is available only if runtime setting type
** 'from interval' is selected in the Timing dialog box in
** Runtime setting area.
** Parameters :
** NAME - DESCRIPTION
** Ticks - Period to set [in Xtal ticks]
** (16000 to 65535 ticks)
** Returns :
** --- - Error code, possible codes:
** ERR_OK - OK
** ERR_SPEED - This device does not work in
** the active speed mode
** ERR_MATH - Overflow during evaluation
** ERR_RANGE - Parameter out of range
** ===================================================================
*/
byte TickTimer_SetPeriodTicks32(dword Ticks);
/*
** ===================================================================
** Method : TickTimer_SetPeriodTicks32 (bean TimerInt)
**
** Description :
** This method sets the new period of the generated events.
** The period is expressed in Xtal ticks as a 32-bit unsigned
** integer number.
** This method is available only if runtime setting type
** 'from interval' is selected in the Timing dialog box in
** Runtime setting area.
** Parameters :
** NAME - DESCRIPTION
** Ticks - Period to set [in Xtal ticks]
** (16000 to 320000 ticks)
** Returns :
** --- - Error code, possible codes:
** ERR_OK - OK
** ERR_SPEED - This device does not work in
** the active speed mode
** ERR_MATH - Overflow during evaluation
** ERR_RANGE - Parameter out of range
** ===================================================================
*/
byte TickTimer_SetPeriodUS(word Time);
/*
** ===================================================================
** Method : TickTimer_SetPeriodUS (bean TimerInt)
**
** Description :
** This method sets the new period of the generated events.
** The period is expressed in microseconds as a 16-bit
** unsigned integer number.
** This method is available only if runtime setting type
** 'from interval' is selected in the Timing dialog box in
** Runtime setting area.
** Parameters :
** NAME - DESCRIPTION
** Time - Period to set [in microseconds]
** (1000 to 20000 microseconds)
** Returns :
** --- - Error code, possible codes:
** ERR_OK - OK
** ERR_SPEED - This device does not work in
** the active speed mode
** ERR_MATH - Overflow during evaluation
** ERR_RANGE - Parameter out of range
** ===================================================================
*/
byte TickTimer_SetPeriodMS(word Time);
/*
** ===================================================================
** Method : TickTimer_SetPeriodMS (bean TimerInt)
**
** Description :
** This method sets the new period of the generated events.
** The period is expressed in miliseconds as a 16-bit
** unsigned integer number.
** This method is available only if runtime setting type
** 'from interval' is selected in the Timing dialog box in
** Runtime setting area.
** Parameters :
** NAME - DESCRIPTION
** Time - Period to set [in miliseconds]
** (1 to 20 milliseconds)
** Returns :
** --- - Error code, possible codes:
** ERR_OK - OK
** ERR_SPEED - This device does not work in
** the active speed mode
** ERR_MATH - Overflow during evaluation
** ERR_RANGE - Parameter out of range
** ===================================================================
*/
byte TickTimer_SetFreqHz(word Freq);
/*
** ===================================================================
** Method : TickTimer_SetFreqHz (bean TimerInt)
**
** Description :
** This method sets the new frequency of the generated
** events. The frequency is expressed in Hz as a 16-bit
** unsigned integer number.
** This method is available only if runtime setting type
** 'from interval' is selected in the Timing dialog box in
** Runtime setting area.
** Parameters :
** NAME - DESCRIPTION
** Freq - Frequency to set [in Hz]
** (50 to 1000 Hz)
** Returns :
** --- - Error code, possible codes:
** ERR_OK - OK
** ERR_SPEED - This device does not work in
** the active speed mode
** ERR_MATH - Overflow during evaluation
** ERR_RANGE - Parameter out of range
** ===================================================================
*/
#pragma CODE_SEG __NEAR_SEG NON_BANKED /* Interrupt section for this module. Placement will be in NON_BANKED area. */
__interrupt void TickTimer_Interrupt(void);
#pragma CODE_SEG TickTimer_CODE /* Code section for this module. */
/*
** ===================================================================
** Method : TickTimer_Interrupt (bean TimerInt)
**
** Description :
** This method is internal. It is used by Processor Expert
** only.
** ===================================================================
*/
void TickTimer_Init(void);
/*
** ===================================================================
** Method : TickTimer_Init (bean TimerInt)
**
** Description :
** This method is internal. It is used by Processor Expert
** only.
** ===================================================================
*/
#pragma CODE_SEG DEFAULT /* Change code section to DEFAULT. */
/* END TickTimer. */
#endif /* ifndef __TickTimer */
/*
** ###################################################################
**
** This file was created by UNIS Processor Expert 03.33 for
** the Motorola HCS12 series of microcontrollers.
**
** ###################################################################
*/

112
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@ -0,0 +1,112 @@
/** ###################################################################
** THIS BEAN MODULE IS GENERATED BY THE TOOL. DO NOT MODIFY IT.
** Filename : Cpu.C
** Project : RTOSDemo
** Processor : MC9S12DP256BCPV
** Beantype : MC9S12DP256_112
** Version : Bean 01.148, Driver 01.09, CPU db: 2.87.283
** Compiler : Metrowerks HC12 C Compiler
** Date/Time : 16/06/2005, 19:18
** Abstract :
** This bean "MC9S12DP256_112" implements properties, methods,
** and events of the CPU.
** Settings :
**
** Contents :
** EnableInt - void Cpu_EnableInt(void);
** DisableInt - void Cpu_DisableInt(void);
**
** (c) Copyright UNIS, spol. s r.o. 1997-2002
** UNIS, spol. s r.o.
** Jundrovska 33
** 624 00 Brno
** Czech Republic
** http : www.processorexpert.com
** mail : info@processorexpert.com
** ###################################################################*/
#include "Cpu.h"
#include "TickTimer.h"
#include "Byte1.h"
extern void near _EntryPoint(void); /* Startup routine */
extern void near vPortTickInterrupt( void );
extern void near vPortYield( void );
extern void near vCOM0_ISR( void );
typedef void (*near tIsrFunc)(void);
const tIsrFunc _vect[] @0xFF80 = { /* Interrupt table */
Cpu_Interrupt, /* 0 Default (unused) interrupt */
Cpu_Interrupt, /* 1 Default (unused) interrupt */
Cpu_Interrupt, /* 2 Default (unused) interrupt */
Cpu_Interrupt, /* 3 Default (unused) interrupt */
Cpu_Interrupt, /* 4 Default (unused) interrupt */
Cpu_Interrupt, /* 5 Default (unused) interrupt */
Cpu_Interrupt, /* 6 Default (unused) interrupt */
Cpu_Interrupt, /* 7 Default (unused) interrupt */
Cpu_Interrupt, /* 8 Default (unused) interrupt */
Cpu_Interrupt, /* 9 Default (unused) interrupt */
Cpu_Interrupt, /* 10 Default (unused) interrupt */
Cpu_Interrupt, /* 11 Default (unused) interrupt */
Cpu_Interrupt, /* 12 Default (unused) interrupt */
Cpu_Interrupt, /* 13 Default (unused) interrupt */
Cpu_Interrupt, /* 14 Default (unused) interrupt */
Cpu_Interrupt, /* 15 Default (unused) interrupt */
Cpu_Interrupt, /* 16 Default (unused) interrupt */
Cpu_Interrupt, /* 17 Default (unused) interrupt */
Cpu_Interrupt, /* 18 Default (unused) interrupt */
Cpu_Interrupt, /* 19 Default (unused) interrupt */
Cpu_Interrupt, /* 20 Default (unused) interrupt */
Cpu_Interrupt, /* 21 Default (unused) interrupt */
Cpu_Interrupt, /* 22 Default (unused) interrupt */
Cpu_Interrupt, /* 23 Default (unused) interrupt */
Cpu_Interrupt, /* 24 Default (unused) interrupt */
Cpu_Interrupt, /* 25 Default (unused) interrupt */
Cpu_Interrupt, /* 26 Default (unused) interrupt */
Cpu_Interrupt, /* 27 Default (unused) interrupt */
Cpu_Interrupt, /* 28 Default (unused) interrupt */
Cpu_Interrupt, /* 29 Default (unused) interrupt */
Cpu_Interrupt, /* 30 Default (unused) interrupt */
Cpu_Interrupt, /* 31 Default (unused) interrupt */
Cpu_Interrupt, /* 32 Default (unused) interrupt */
Cpu_Interrupt, /* 33 Default (unused) interrupt */
Cpu_Interrupt, /* 34 Default (unused) interrupt */
Cpu_Interrupt, /* 35 Default (unused) interrupt */
Cpu_Interrupt, /* 36 Default (unused) interrupt */
Cpu_Interrupt, /* 37 Default (unused) interrupt */
Cpu_Interrupt, /* 38 Default (unused) interrupt */
Cpu_Interrupt, /* 39 Default (unused) interrupt */
Cpu_Interrupt, /* 40 Default (unused) interrupt */
Cpu_Interrupt, /* 41 Default (unused) interrupt */
Cpu_Interrupt, /* 42 Default (unused) interrupt */
vCOM0_ISR, /* Defined in Demo/serial/serial.c */
Cpu_Interrupt, /* 44 Default (unused) interrupt */
Cpu_Interrupt, /* 45 Default (unused) interrupt */
Cpu_Interrupt, /* 46 Default (unused) interrupt */
Cpu_Interrupt, /* 47 Default (unused) interrupt */
Cpu_Interrupt, /* 48 Default (unused) interrupt */
Cpu_Interrupt, /* 49 Default (unused) interrupt */
Cpu_Interrupt, /* 50 Default (unused) interrupt */
Cpu_Interrupt, /* 51 Default (unused) interrupt */
Cpu_Interrupt, /* 52 Default (unused) interrupt */
Cpu_Interrupt, /* 53 Default (unused) interrupt */
Cpu_Interrupt, /* 54 Default (unused) interrupt */
vPortTickInterrupt, /* The RTOS tick. */
Cpu_Interrupt, /* 56 Default (unused) interrupt */
Cpu_Interrupt, /* 57 Default (unused) interrupt */
Cpu_Interrupt, /* 58 Default (unused) interrupt */
vPortYield, /* RTOS yield software interrupt. */
Cpu_Interrupt, /* 60 Default (unused) interrupt */
Cpu_Interrupt, /* 61 Default (unused) interrupt */
Cpu_Interrupt, /* 62 Default (unused) interrupt */
_EntryPoint /* Reset vector */
};
/*
** ###################################################################
**
** This file was created by UNIS Processor Expert 03.33 for
** the Motorola HCS12 series of microcontrollers.
**
** ###################################################################
*/

20
Demo/HCS12_CodeWarrior_banked/C_Layout.hwl Normal file
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OPEN source 0 0 60 39
Source < attributes MARKS off
OPEN assembly 60 0 40 31
Assembly < attributes ADR on,CODE off,ABSADR on,SYMB off,TOPPC 0xF88C
OPEN procedure 0 39 60 17
Procedure < attributes VALUES on,TYPES off
OPEN register 60 31 40 25
Register < attributes FORMAT AUTO,COMPLEMENT None
OPEN memory 60 56 40 22
Memory < attributes FORMAT hex,COMPLEMENT None,WORD 1,ASC on,ADR on,ADDRESS 0x80
OPEN data 0 56 60 22
Data:1 < attributes SCOPE global,COMPLEMENT None,FORMAT Symb,MODE automatic,UPDATERATE 10,NAMEWIDTH 16
OPEN data 0 78 60 22
Data:2 < attributes SCOPE local,COMPLEMENT None,FORMAT Symb,MODE automatic,UPDATERATE 10,NAMEWIDTH 16
OPEN command 60 78 40 22
Command < attributes CACHESIZE 1000
bckcolor 50331647
font 'Courier New' 9 BLACK
AUTOSIZE on
ACTIVATE Data:2 Command Procedure Data:1 Source Register Assembly Memory

23
Demo/HCS12_CodeWarrior_banked/DOC/RTOSDemo.sig Normal file
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=================================================================
This file was generated from Processor Expert 03.33
project "RTOSDemo", 19/06/2005, 15:54
-----------------------------------------------------------------
There is no signal defined in this project.
Hint: Signals may be defined in the Bean Inspector (advanced or expert view)
=================================================================
=================================================================
SIGNAL LIST
-----------------------------------------------------------------
SIGNAL NAME => PIN NAME
-----------------------------------------------------------------
=================================================================
=================================================================
PIN LIST
-----------------------------------------------------------------
PIN NAME => SIGNAL NAME
-----------------------------------------------------------------
=================================================================

43
Demo/HCS12_CodeWarrior_banked/DOC/RTOSDemo.txt Normal file
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=============================================================================
List of methods in project: RTOSDemo
THIS TEXT DESCRIPTION IS GENERATED BY THE TOOL. DO NOT MODIFY IT.
=============================================================================
Module "TickTimer" (bean TimerInt)
TickTimer_Enable -Enable the bean - it starts the timer. Events may be generated ("DisableEvent"/"EnableEvent").
TickTimer_SetPeriodTicks16 -This method sets the new period of the generated events. The period is expressed in CPU [ticks]
as a 16-bit unsigned integer number. This method is available only if runtime setting type 'from interval' is
selected in the <Timing dialog box> in Runtime setting area.
TickTimer_SetPeriodTicks32 -This method sets the new period of the generated events. The period is expressed in CPU [ticks]
as a 32-bit unsigned integer number. This method is available only if runtime setting type 'from interval' is
selected in the <Timing dialog box> in Runtime setting area.
TickTimer_SetPeriodUS -This method sets the new period of the generated events. The period is expressed in [microseconds] as
a 16-bit unsigned integer number. This method is available only if runtime setting type 'from interval' is
selected in the <Timing dialog box> in Runtime setting area.
TickTimer_SetPeriodMS -This method sets the new period of the generated events. The period is expressed in [miliseconds] as
a 16-bit unsigned integer number. This method is available only if runtime setting type 'from interval' is
selected in the <Timing dialog box> in Runtime setting area.
TickTimer_SetFreqHz -This method sets the new frequency of the generated events. The frequency is expressed in [Hz] as a
16-bit unsigned integer number. This method is available only if runtime setting type 'from interval' is
selected in the <Timing dialog box> in Runtime setting area.
Module "Byte1" (bean ByteIO)
Byte1_PutBit -Put the specified value to the specified bit/pin of the Input/Output bean. If direction is [input] saves the
value to a memory or a register, this value will be written to the pin after switching to the output mode -
using [SetDir(TRUE)]. If direction is [output] writes the value to the pin.
Byte1_NegBit -Negate (invert) the specified bit of the Input/Output bean. It is the same as [PutBit(Bit,!GetBit(Bit))].
Module "COM0" (bean AsynchroSerial)
COM0_SetBaudRateMode -This method changes the channel communication speed (baud rate). This method can be used only if you
specify a list of possible period settings at design time (see <Timing dialog box> - Runtime setting - from a
list of values). Each of these settings constitutes a mode and Processor Expert^[TM] assigns them a mode
identifier. The prescaler and compare values corresponding to each mode are calculated at design time. You may
switch modes at runtime by referring only to a mode identifier. No run-time calculations are performed, all the
calculations are performed at design time.
Module "Cpu" (bean MC9S12DP256_112)
Cpu_EnableInt -Enable maskable interrupts
Cpu_DisableInt -Disable maskable interrupts
=============================================================================

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Demo/HCS12_CodeWarrior_banked/FreeRTOSConfig.h Normal file
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/*
FreeRTOS V4.0.1 - Copyright (C) 2003-2006 Richard Barry.
This file is part of the FreeRTOS distribution.
FreeRTOS is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or
(at your option) any later version.
FreeRTOS is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with FreeRTOS; if not, write to the Free Software
Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
A special exception to the GPL can be applied should you wish to distribute
a combined work that includes FreeRTOS, without being obliged to provide
the source code for any proprietary components. See the licensing section
of http://www.FreeRTOS.org for full details of how and when the exception
can be applied.
***************************************************************************
See http://www.FreeRTOS.org for documentation, latest information, license
and contact details. Please ensure to read the configuration and relevant
port sections of the online documentation.
***************************************************************************
*/
#ifndef FREERTOS_CONFIG_H
#define FREERTOS_CONFIG_H
#include <hidef.h> /* common defines and macros */
#include "TickTimer.h"
/* This port requires the compiler to generate code for the BANKED memory
model. */
#define BANKED_MODEL
/*-----------------------------------------------------------
* Application specific definitions.
*
* These definitions should be adjusted for your particular hardware and
* application requirements.
*
* THESE PARAMETERS ARE DESCRIBED WITHIN THE 'CONFIGURATION' SECTION OF THE
* FreeRTOS API DOCUMENTATION AVAILABLE ON THE FreeRTOS.org WEB SITE.
*----------------------------------------------------------*/
#define configUSE_PREEMPTION 1
#define configUSE_IDLE_HOOK 1
#define configUSE_TICK_HOOK 0
#define configTICK_RATE_HZ ( ( portTickType ) 1000 )
#define configMAX_PRIORITIES ( ( unsigned portBASE_TYPE ) 4 )
#define configMINIMAL_STACK_SIZE ( ( unsigned portSHORT ) 80 )
#define configTOTAL_HEAP_SIZE ( ( size_t ) ( 10240 ) )
#define configMAX_TASK_NAME_LEN ( 1 )
#define configUSE_TRACE_FACILITY 0
#define configUSE_16_BIT_TICKS 1
#define configIDLE_SHOULD_YIELD 1
/* Co-routine definitions. */
#define configUSE_CO_ROUTINES 0
#define configMAX_CO_ROUTINE_PRIORITIES ( 2 )
/* This parameter is normally required in order to set the RTOS tick timer.
This port is a bit different in that hardware setup uses the code generated by
the Processor Expert, making this definition obsolete.
#define configCPU_CLOCK_HZ ( ( unsigned portLONG ) 25000000 )
*/
/* Set the following definitions to 1 to include the API function, or zero
to exclude the API function. */
#define INCLUDE_vTaskPrioritySet 1
#define INCLUDE_uxTaskPriorityGet 1
#define INCLUDE_vTaskDelete 1
#define INCLUDE_vTaskCleanUpResources 0
#define INCLUDE_vTaskSuspend 1
#define INCLUDE_vTaskDelayUntil 1
#define INCLUDE_vTaskDelay 1
#endif /* FREERTOS_CONFIG_H */

71
Demo/HCS12_CodeWarrior_banked/P&E_ICD.ini Normal file
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[Environment Variables]
GENPATH={Compiler}lib\HC12c\src;{Compiler}lib\HC12c\include;{Compiler}lib\HC12c\lib
LIBPATH={Compiler}lib\HC12c\include
OBJPATH={Project}bin
TEXTPATH={Project}bin
ABSPATH={Project}bin
[HI-WAVE]
Target=icd12
Layout=C_layout.hwl
LoadDialogOptions=AUTOERASEANDFLASH
CPU=HC12
MainFrame=2,3,-1,-1,-1,-1,54,54,1254,908
TOOLBAR=57600 57601 32795 0 57635 57634 57637 0 57671 57669 0 32777 32776 32782 32780 32781 32778 0 32806
AEFWarningDialog=FALSE
[ICD12]
CMDFILE0=CMDFILE STARTUP ON ".\cmd\p&e_icd_startup.cmd"
CMDFILE1=CMDFILE RESET ON ".\cmd\p&e_icd_reset.cmd"
CMDFILE2=CMDFILE PRELOAD ON ".\cmd\p&e_icd_preload.cmd"
CMDFILE3=CMDFILE POSTLOAD ON ".\cmd\p&e_icd_postload.cmd"
CMDFILE4=CMDFILE VPPON ON ".\cmd\p&e_icd_vppon.cmd"
CMDFILE5=CMDFILE VPPOFF ON ".\cmd\p&e_icd_vppoff.cmd"
CMDFILE6=CMDFILE UNSECURE ON ".\cmd\P&E_ICD_erase_unsecure_hcs12.cmd"
MCUID=0x3C6
CHIPSECURE=CHIPSECURE SETUP 0xFF0F 0x3 0x2
BDMClockSpeed=14
BNKA_MCUID03C6_BANKWINDOW0=BANKWINDOW PPAGE ON 0x8000..0xBFFF 0x30 16 0x30
BNKA_MCUID03C6_BANKWINDOW1=BANKWINDOW DPAGE OFF 0x7000..0x7FFF 0x34 256 0x0
BNKA_MCUID03C6_BANKWINDOW2=BANKWINDOW EPAGE OFF 0x400..0x7FF 0x36 256 0x0
HWBPD_MCUID03C6_HWBPM0=HWBPM MODE AUTOMATIC BPM22BITS 0x28 SKIP_OFF
HWBPD_MCUID03C6_BKPT_REMAP0=HWBPM REMAP_22BITS RANGE 0x4000 0x7FFF 0x3E
HWBPD_MCUID03C6_BKPT_REMAP1=HWBPM REMAP_22BITS RANGE 0xC000 0xFFFF 0x3F
HWBPD_MCUID03C6_HWBPM1=HWBPM SET16BITS 0x0 0x0 0x0 0x0
HWBPD_MCUID03C6_HWBPM2=HWBPM SET22BITS 0x0 0x0 0x0 0x0
BDMAutoSpeed=0
COMDEVICE=SETCOMM COMPORT USB "USB-PE5014402"
SETCLKSW=1
DETECTRUNNING=0
ISRDISABLEDSTEP=0
SHOWPROT=1
NV_PARAMETER_FILE=C:\devtools\Metrowerks\CodeWarrior CW12_V3.1\prog\FPP\mcu03C6.fpp
NV_SAVE_WSP=0
NV_AUTO_ID=1
DMM_MCUID03C6_MODULE0=Registers 0x0 0x400 1 4 0 2 1 1
DMM_MCUID03C6_MODULE1=Ram 0x1000 0x3000 2 5 0 3 1 1
DMM_MCUID03C6_MODULE2=Eeprom 0x0 0x1000 3 5 1 4 1 1
DMM_MCUID03C6_MODULE3=Banked£memory 0x8000 0x2f4000 100 6 0 6 1 0
DMM_MCUID03C6_MODULE4=Banked£flash 0x308000 0xf4000 101 6 1 5 1 0
DMM_MCUID03C6_MODULE5=Unbanked£flash£4000 0x4000 0x4000 102 5 1 5 1 1
DMM_MCUID03C6_MODULE6=Unbanked£flash£C000 0xc000 0x4000 103 5 1 5 1 1
HOTPLUGGING=0
REALTIMEHWBP=0
NOREADWHILERUNNING=0
RESYNCONCOPRESET=0
[Recent Applications File List]
File1=E:\Dev\FreeRTOS\Demo\HCS12_CodeWarrior_banked\bin\P&E_ICD.abs
File2=E:\Dev\FreeRTOS\Demo\MC9S12DP256_CodeWarrior\bin\P&E_ICD.abs
File3=
File4=
LoadFlags1=4099
LoadFlags2=4099
LoadFlags3=0
LoadFlags4=0
[Recent Layout File List]
File1=C_layout.hwl
File2=
File3=
File4=

69
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/*
FreeRTOS V4.0.1 - Copyright (C) 2003-2006 Richard Barry.
This file is part of the FreeRTOS distribution.
FreeRTOS is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or
(at your option) any later version.
FreeRTOS is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with FreeRTOS; if not, write to the Free Software
Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
A special exception to the GPL can be applied should you wish to distribute
a combined work that includes FreeRTOS, without being obliged to provide
the source code for any proprietary components. See the licensing section
of http://www.FreeRTOS.org for full details of how and when the exception
can be applied.
***************************************************************************
See http://www.FreeRTOS.org for documentation, latest information, license
and contact details. Please ensure to read the configuration and relevant
port sections of the online documentation.
***************************************************************************
*/
/* Scheduler include files. */
#include "FreeRTOS.h"
#include "portable.h"
/* Processor Expert created headers. */
#include "byte1.h"
/* Demo application include files. */
#include "partest.h"
/*-----------------------------------------------------------
* Simple parallel port IO routines.
*-----------------------------------------------------------*/
void vParTestSetLED( unsigned portBASE_TYPE uxLED, signed portBASE_TYPE xValue )
{
/* This function is required as it is called from the standard demo
application files. All it does however is call the Processor Expert
created function. */
portENTER_CRITICAL();
Byte1_PutBit( uxLED, !xValue );
portEXIT_CRITICAL();
}
/*-----------------------------------------------------------*/
void vParTestToggleLED( unsigned portBASE_TYPE uxLED )
{
/* This function is required as it is called from the standard demo
application files. All it does however is call the processor Expert
created function. */
portENTER_CRITICAL();
Byte1_NegBit( uxLED );
portEXIT_CRITICAL();
}

500
Demo/HCS12_CodeWarrior_banked/RTOSDemo.G_C Normal file
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@ -0,0 +1,500 @@
;Please do not modify this file!
;The file contains internal information about the Processor Expert project generation
[Options]
ProjectName=RTOSDemo
ProjectDirectory=E:\Dev\FreeRTOS\Demo\HCS12_CodeWarrior_banked\
DestEventsDirectory=CODE\
DestDriversSubDirectory=
DestDocumentationDirectory=DOC\
DestCompiledFilesSubDirectory=
DestFpgaSubDirectory=
DestTemporaryDirectory=
[GenFiles]
LinkerFileGenerated=Yes
MakefileGenerated=No
GenSharedModules=5
Line=PE_Types
Line=PE_Error
Line=PE_Const
Line=IO_Map
Line=PE_Timer
ShrdHeaderAge0=852337107
ShrdCodeAge0=-1
ShrdAsemblAge0=-1
ShrdHeaderAge1=852337107
ShrdCodeAge1=-1
ShrdAsemblAge1=-1
ShrdHeaderAge2=852337107
ShrdCodeAge2=-1
ShrdAsemblAge2=-1
ShrdHeaderAge3=852337107
ShrdCodeAge3=852337107
ShrdAsemblAge3=-1
ShrdHeaderAge4=852395090
ShrdCodeAge4=852395090
ShrdAsemblAge4=-1
GenExtraFiles=2
Line=E:\Dev\FreeRTOS\Demo\HCS12_CodeWarrior_banked\CODE\Vectors.c
Line=E:\Dev\FreeRTOS\Demo\HCS12_CodeWarrior_banked\CODE\PESL.h
XtraAge0=852534276
XtraAge1=852337108
GenExtraFileType1=4
GenExtraFileType0=4
GenEventModules=1
Line=Events
GenMethodsInEvents=0
GenAllModules=10
Line=Byte1
Line=COM0
Line=Cpu
Line=Events
Line=IO_Map
Line=PE_Const
Line=PE_Error
Line=PE_Timer
Line=PE_Types
Line=TickTimer
GenExternModules=0
GenBeanModules=3
Line=COM0
Line=Byte1
Line=TickTimer
SignalListFile=E:\Dev\FreeRTOS\Demo\HCS12_CodeWarrior_banked\DOC\RTOSDemo.sig
DestinationCompiler=MetrowerksHC12CC
ProjectModificationStamp=28
[4]
Generated=Yes
GenCompName=Cpu
GenEventModule=Events
HeaderAge=852395091
CodeAge=852656823
AsemblAge=-1
GenNumMethods=10
SetStopMode=No
SetWaitMode=No
DisableInt=Yes
EnableInt=Yes
GetIntVect=No
SetIntVect=No
GetSpeedMode=No
SetSlowSpeed=No
SetLowSpeed=No
SetHighSpeed=No
GenNumEvents=4
OnClockMonitorFail_Selected=1
OnClockMonitorFail_Name=Cpu_OnClockMonitorFail
OnClockMonitorFail_Priority=interrupts disabled
OnIllegalOpcode_Selected=1
OnIllegalOpcode_Name=Cpu_OnIllegalOpcode
OnIllegalOpcode_Priority=interrupts disabled
OnReset_Selected=1
OnReset_Name=Cpu_OnReset
OnReset_Priority=interrupts disabled
OnSwINT_Selected=1
OnSwINT_Name=Cpu_OnSwINT
OnSwINT_Priority=interrupts disabled
GenSmartUserChangesDetected_Header=No
GenSmartUserChangesDetected_Code=No
GenSmartUserChangesDetected_Asembl=No
[6]
Generated=Yes
GenCompName=TickTimer
GenEventModule=Events
HeaderAge=852656822
CodeAge=852656822
AsemblAge=-1
GenNumMethods=14
SetFreqMHz=No
SetFreqkHz=No
SetFreqHz=Yes
SetPeriodReal=No
SetPeriodSec=No
SetPeriodMS=Yes
SetPeriodUS=Yes
SetPeriodTicks32=Yes
SetPeriodTicks16=Yes
SetPeriodMode=No
DisableEvent=No
EnableEvent=No
Disable=No
Enable=Yes
GenNumEvents=3
BeforeNewSpeed_Selected=1
BeforeNewSpeed_Name=TickTimer_BeforeNewSpeed
BeforeNewSpeed_Priority=interrupts disabled
AfterNewSpeed_Selected=1
AfterNewSpeed_Name=TickTimer_AfterNewSpeed
AfterNewSpeed_Priority=interrupts disabled
OnInterrupt_Selected=2
OnInterrupt_Name=TickTimer_OnInterrupt
OnInterrupt_Priority=same as interrupt
GenSmartUserChangesDetected_Header=No
GenSmartUserChangesDetected_Code=No
GenSmartUserChangesDetected_Asembl=No
GenMethodPos=19
MethodPos0=Enable
MethodType=method
ModuleType=Header
LineBeg=92
LineEnd=108
MethodPos1=SetPeriodTicks16
MethodType=method
ModuleType=Header
LineBeg=109
LineEnd=134
MethodPos2=SetPeriodTicks32
MethodType=method
ModuleType=Header
LineBeg=135
LineEnd=160
MethodPos3=SetPeriodUS
MethodType=method
ModuleType=Header
LineBeg=161
LineEnd=186
MethodPos4=SetPeriodMS
MethodType=method
ModuleType=Header
LineBeg=187
LineEnd=212
MethodPos5=SetFreqHz
MethodType=method
ModuleType=Header
LineBeg=213
LineEnd=238
MethodPos6=Interrupt
MethodType=internal_method
ModuleType=Header
LineBeg=239
LineEnd=251
MethodPos7=Init
MethodType=internal_method
ModuleType=Header
LineBeg=252
LineEnd=262
MethodPos8=SetCV
MethodType=internal_method
ModuleType=Code
LineBeg=85
LineEnd=101
MethodPos9=SetPV
MethodType=internal_method
ModuleType=Code
LineBeg=102
LineEnd=115
MethodPos10=HWEnDi
MethodType=internal_method
ModuleType=Code
LineBeg=116
LineEnd=130
MethodPos11=Enable
MethodType=method
ModuleType=Code
LineBeg=131
LineEnd=151
MethodPos12=SetPeriodTicks16
MethodType=method
ModuleType=Code
LineBeg=152
LineEnd=190
MethodPos13=SetPeriodTicks32
MethodType=method
ModuleType=Code
LineBeg=191
LineEnd=229
MethodPos14=SetPeriodUS
MethodType=method
ModuleType=Code
LineBeg=230
LineEnd=268
MethodPos15=SetPeriodMS
MethodType=method
ModuleType=Code
LineBeg=269
LineEnd=307
MethodPos16=SetFreqHz
MethodType=method
ModuleType=Code
LineBeg=308
LineEnd=347
MethodPos17=Init
MethodType=internal_method
ModuleType=Code
LineBeg=348
LineEnd=364
MethodPos18=Interrupt
MethodType=internal_method
ModuleType=Code
LineBeg=365
LineEnd=381
[7]
Generated=Yes
GenCompName=Byte1
GenEventModule=Events
HeaderAge=852535625
CodeAge=852535625
AsemblAge=-1
GenNumMethods=9
NegBit=Yes
ClrBit=No
SetBit=No
PutBit=Yes
GetBit=No
PutVal=No
GetVal=No
SetDir=No
GetDir=No
GenNumEvents=0
GenSmartUserChangesDetected_Header=No
GenSmartUserChangesDetected_Code=No
GenSmartUserChangesDetected_Asembl=No
GenMethodPos=5
MethodPos0=PutBit
MethodType=method
ModuleType=Header
LineBeg=66
LineEnd=82
MethodPos1=NegBit
MethodType=method
ModuleType=Header
LineBeg=83
LineEnd=97
MethodPos2=GetMsk
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ModuleType=Code
LineBeg=68
LineEnd=83
MethodPos3=PutBit
MethodType=method
ModuleType=Code
LineBeg=84
LineEnd=111
MethodPos4=NegBit
MethodType=method
ModuleType=Code
LineBeg=112
LineEnd=133
[8]
Generated=Yes
GenCompName=COM0
GenEventModule=Events
HeaderAge=852719863
CodeAge=852719863
AsemblAge=-1
GenNumMethods=29
SetDirection=No
Standby=No
LoopMode=No
SetIdle=No
TurnRxOff=No
TurnRxOn=No
SetTxBaudGenerator=No
SetRxBaudGenerator=No
TurnTxOff=No
TurnTxOn=No
SetAttentionMode=No
SetBreak=No
GetBreak=No
GetError=No
SetBaudRateMode=Yes
GetCharsInTxBuf=No
CharsInTxBuf=No
GetCharsInRxBuf=No
CharsInRxBuf=No
ClearTxBuf=No
ClearRxBuf=No
SendBlock=No
RecvBlock=No
SendChar=No
RecvChar=No
DisableEvent=No
EnableEvent=No
Disable=No
Enable=No
GenNumEvents=9
BeforeNewSpeed_Selected=1
BeforeNewSpeed_Name=COM0_BeforeNewSpeed
BeforeNewSpeed_Priority=interrupts disabled
AfterNewSpeed_Selected=1
AfterNewSpeed_Name=COM0_AfterNewSpeed
AfterNewSpeed_Priority=interrupts disabled
OnError_Selected=1
OnError_Name=COM0_OnError
OnError_Priority=same as interrupt
OnRxChar_Selected=1
OnRxChar_Name=COM0_OnRxChar
OnRxChar_Priority=same as interrupt
OnTxChar_Selected=1
OnTxChar_Name=COM0_OnTxChar
OnTxChar_Priority=same as interrupt
OnFullRxBuf_Selected=0
OnFullRxBuf_Name=COM0_OnFullRxBuf
OnFullRxBuf_Priority=same as interrupt
OnFreeTxBuf_Selected=0
OnFreeTxBuf_Name=COM0_OnFreeTxBuf
OnFreeTxBuf_Priority=same as interrupt
OnBreak_Selected=0
OnBreak_Name=COM0_OnBreak
OnBreak_Priority=same as interrupt
OnIdle_Selected=1
OnIdle_Name=COM0_OnIdle
OnIdle_Priority=same as interrupt
GenSmartUserChangesDetected_Header=No
GenSmartUserChangesDetected_Code=No
GenSmartUserChangesDetected_Asembl=No
GenMethodPos=11
MethodPos0=SetBaudRateMode
MethodType=method
ModuleType=Header
LineBeg=123
LineEnd=150
MethodPos1=Interrupt
MethodType=internal_method
ModuleType=Header
LineBeg=151
LineEnd=163
MethodPos2=InterruptCs
MethodType=internal_method
ModuleType=Header
LineBeg=164
LineEnd=164
MethodPos3=Init
MethodType=internal_method
ModuleType=Header
LineBeg=165
LineEnd=175
MethodPos4=HWEnDi
MethodType=internal_method
ModuleType=Code
LineBeg=115
LineEnd=130
MethodPos5=InterruptRx
MethodType=internal_method
ModuleType=Code
LineBeg=131
LineEnd=157
MethodPos6=InterruptTx
MethodType=internal_method
ModuleType=Code
LineBeg=158
LineEnd=175
MethodPos7=InterruptError
MethodType=internal_method
ModuleType=Code
LineBeg=176
LineEnd=200
MethodPos8=Interrupt
MethodType=internal_method
ModuleType=Code
LineBeg=201
LineEnd=221
MethodPos9=SetBaudRateMode
MethodType=method
ModuleType=Code
LineBeg=222
LineEnd=259
MethodPos10=Init
MethodType=internal_method
ModuleType=Code
LineBeg=260
LineEnd=284
[UsedSrcFiles]
SrcFile=Drivers\TimerInt.src=779379233
SrcFile=Drivers\HCS12\TimerInt.drv=790330280
SrcFile=Drivers\Common\Header.h=788035759
SrcFile=Drivers\Common\TimerIntAbstract.Inc=697533454
SrcFile=Drivers\Common\TimerIntSettings.Inc=662077596
SrcFile=Drivers\HCS12\CreateCodeSection.prg=759717537
SrcFile=Drivers\Common\TimerIntEnable.Inc=724722488
SrcFile=Drivers\Common\GeneralMethod.inc=711812818
SrcFile=Drivers\Common\GeneralParametersNone.inc=711813294
SrcFile=Drivers\Common\GeneralDamage.inc=711813453
SrcFile=Drivers\Common\TimerIntSetPeriodTicks16.Inc=724921621
SrcFile=Drivers\Common\GeneralParameters.inc=711813750
SrcFile=Drivers\Common\TimerIntSetPeriodTicks32.Inc=724921601
SrcFile=Drivers\Common\TimerIntSetPeriodUS.Inc=724921676
SrcFile=Drivers\Common\TimerIntSetPeriodMS.Inc=724921329
SrcFile=Drivers\Common\TimerIntSetFreqHz.Inc=724921137
SrcFile=Drivers\HCS12\CreateIntSection.prg=760697835
SrcFile=Drivers\Common\TimerIntInterrupt.Inc=662077583
SrcFile=Drivers\Common\GeneralInternal.inc=724263004
SrcFile=Drivers\Common\Header.End=710308512
SrcFile=Drivers\Common\TimerIntOnInterrupt.Inc=724722488
SrcFile=Drivers\Common\GeneralEvent.inc=711816218
SrcFile=Drivers\Common\GeneralReturnNothing.inc=711816104
SrcFile=Drivers\Common\Header.C=788035759
SrcFile=Drivers\HCS12\CreateDataSection.prg=759780817
SrcFile=Drivers\Common\GeneralInternalGlobal.Inc=724263104
SrcFile=Drivers\Common\InitReg8.prg=727217490
SrcFile=Drivers\Common\InitReg8Enable.prg=783766675
SrcFile=Drivers\ByteIO.src=779379247
SrcFile=Drivers\HCS12\ByteIO.drv=786325143
SrcFile=Drivers\Common\ByteIOAbstract.Inc=697533609
SrcFile=Drivers\Common\ByteIOSettings.Inc=662077581
SrcFile=Drivers\Common\UsedPins.inc=662077580
SrcFile=Drivers\Common\ByteIOPutBit.Inc=662077581
SrcFile=Drivers\Common\GeneralPutBit.inc=724263173
SrcFile=Drivers\Common\ByteIONegBit.Inc=662077581
SrcFile=Drivers\Common\GeneralNegBit.inc=724263119
SrcFile=Drivers\AsynchroSerial.src=779379258
SrcFile=Drivers\HCS12\AsynchroSerial.drv=790261986
SrcFile=Drivers\Common\AsynchroSerialAbstract.Inc=697534037
SrcFile=Drivers\Common\AsynchroSerialSettings.Inc=696025229
SrcFile=Drivers\Common\UsedAsynchroPins.inc=730763605
SrcFile=Drivers\Common\UsedBaudModes.inc=662077584
SrcFile=Drivers\Common\AsynchroSerialSetBaudRateMode.Inc=777215290
SrcFile=Drivers\Common\DataHeader.Inc=662077594
SrcFile=Drivers\Common\DataHeader.End=662077594
SrcFile=Drivers\Common\GenReg8InitInfo.prg=754344225
SrcFile=Drivers\Common\GenReg8BitsInitInfo.prg=777356856
SrcFile=Drivers\HCS12\PE_Types.drv=790261986
SrcFile=Drivers\Common\PE_TypesAbstract.Inc=662077595
SrcFile=Drivers\Common\PE_TypesSettings.Inc=662077595
SrcFile=Drivers\HCS12\PE_Error.drv=744839008
SrcFile=Drivers\Common\PE_ErrorAbstract.Inc=662077580
SrcFile=Drivers\Common\ErrorDefinitions.Inc=781282486
SrcFile=Drivers\HCS12\PE_Const.drv=744839020
SrcFile=Drivers\Common\PE_ConstAbstract.Inc=662077595
SrcFile=Drivers\Common\PE_ConstSettings.Inc=662077595
SrcFile=Drivers\HCS12\IO_Map.drv=790392555
SrcFile=Drivers\Common\IO_MapAbstract.Inc=662077601
SrcFile=Drivers\Common\IO_MapSettings.Inc=662077601
SrcFile=Drivers\HCS12\MC9S12DP256_112h.prg=788297414
SrcFile=Drivers\HCS12\MC9S12DP256_112c.prg=787841633
SrcFile=Drivers\HCS12\PE_Timer.drv=764054261
SrcFile=Drivers\Common\PE_TimerConstants.Inc=662077594
SrcFile=Drivers\Common\PE_TimerMethods.Inc=662077585
SrcFile=Drivers\Common\PE_TimerAbstract.Inc=662077594
SrcFile=Drivers\Common\PE_TimerSettings.Inc=662077581
SrcFile=Drivers\Common\PE_TimerLngMul.Inc=662077581
SrcFile=Drivers\Common\PE_TimerLngHi1.Inc=662077594
SrcFile=Drivers\Common\PE_TimerLngHi2.Inc=662077594
SrcFile=Drivers\Common\PE_TimerLngHi3.Inc=662077594
SrcFile=Drivers\Common\PE_TimerLngHi4.Inc=662077594
SrcFile=Drivers\MC9S12DP256_112.src=746163715
SrcFile=Drivers\HCS12\MC9S12.drv=788297552
SrcFile=Drivers\Common\MC9S12Abstract.Inc=786070990
SrcFile=Drivers\Common\MC9S12Settings.Inc=786070990
SrcFile=Drivers\Common\MC9S12DisableInt.Inc=786070990
SrcFile=Drivers\Common\MC9S12EnableInt.Inc=786070990
SrcFile=Drivers\Common\CommonInitialization.prg=760832797
SrcFile=Drivers\Common\CommonRegInitialization.prg=785882407
SrcFile=Drivers\Common\SetRegBits8.prg=775453568
SrcFile=Drivers\Common\SetReg8.prg=776374479
SrcFile=Drivers\Common\CommonEnabling.prg=783766630
SrcFile=Drivers\Common\CommonRegEnabling.prg=785882407
SrcFile=Drivers\HCS12\PESL.prg=790397020
SrcFile=Drivers\Event.src=779379228
SrcFile=Drivers\HCS12\Evnt.drv=763978411
SrcFile=Drivers\Common\EvntAbstract.Inc=662077596
SrcFile=Drivers\Common\EvntSettings.inc=662077580
SrcFile=Drivers\Common\Header.In1=710699431
SrcFile=Drivers\_PE_ProjectInfo.src=713322570
SrcFile=Drivers\SW\_PE_ProjectInfo.drv=726426382
[_end_]

166
Demo/HCS12_CodeWarrior_banked/RTOSDemo.dsk Normal file
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@ -0,0 +1,166 @@
[Version]
PE_DesktopFileVersion=819
[Desktop]
StartupPrj=E:\Dev\FreeRTOS\Demo\HCS12_CodeWarrior_banked\RTOSDemo.pe
[PE_IDE_PlugIn]
[CpuExpert]
[AppPanel]
AllFocusedNode=Cpu:MC9S12DP256BCPV
ConfigurationsInAllExpanded=No
CPUsInAllExpanded=Yes
FPGAsInAllExpanded=No
OperatingSystemInAllExpanded=Yes
BeansInAllExpanded=Yes
TasksInAllExpanded=No
ProgramsInAllExpanded=No
DocumentationInAllExpanded=No
PESLInAllExpanded=No
PESL_moduleInAllExpanded=No
ViewEnabledItemsOnly=No
[CpuPanel]
Status=hiden
WindowState=NORMAL
Rect=[0|90|593|532]
CpuPanViewMode=Default
[ErrorPanel]
Status=Visible
WindowState=NORMAL
Rect=[593|976|593|178]
[ResourceMeter]
Status=hiden
WindowState=NORMAL
Rect=[593|976|593|178]
[BeanSelector]
Status=Visible
WindowState=NORMAL
Rect=[-4|62|1608|1130]
BF_ForTgtCpuOnly=Yes
BF_LicensedOnly=Yes
[ObjInspector]
Status=Visible
WindowState=MAXIMAL
Rect=[-4|62|1199|1100]
ColWidth01=263
ColWidth02=479
ColWidth11=188
ColWidth12=317
ColWidth21=180
ColWidth22=352
ColWidth31=255
ColWidth32=479
ColWidth41=133
ColWidth42=266
ViewItemLevel=2
[PrphInspector]
Status=hiden
WindowState=NORMAL
Rect=[-466|400|516|411]
ViewMode=PrphUsageReport
SortRegsByAddr=Yes
GroupRegisters=No
Peripheral=
[Editor]
Rect=[-4|0|1199|1100]
FontName=Courier New
FontSize=10
FontBold=No
FontItalic=No
FontScript=1
ToolBar=Yes
ToolBarPosition=top
SyntaxHighlighting=Yes
NoHorizScrollBar=Yes
ShowLineNumbers=No
PreserveCurPosDuringPaste=No
UseTabChar=No
ModulesInOneWindow=Yes
TabSize=8
HintDelay=2
OpenFilesCount=0
SelFile=
SelLine=-1
FileHistory=0
[CpuStructure]
Rect=[0|0|0|0]
[StrListEditor]
WindowWidth=450
WindowHeight=333
[Breakpoints]
WindowVisible=No
Rect=[0|0|0|0]
BreakLine1=0
BreakModule1=
[Watches]
Rect=[0|0|0|0]
WindowVisible=No
WatchCount=0
WatchHistoryCount=0
[Registers]
Rect=[0|0|100|500]
WindowVisible=No
[Dump]
WindowVisible=No
Rect=[0|0|0|0]
Address=0
DataSize=1
DataType=num
HistoryAddrCount=0
[InterruptVectors]
WindowVisible=No
Rect=[0|0|0|0]
[MemoryMap]
Rect=[422|156|355|480]
DisplayOnlyMemories=No
WindowVisible=No
[Browser]
Rect=[0|0|0|0]
WindowVisible=No
[BeanManager]
Rect=[0|0|0|0]
BeanInfoFilter=
DriverFilter=
DriverInfoFilter=
BeanSettingsProjectFilter=
[Options]
AutosaveWithProject=No
AutosaveBeforeTool=No
NumberOfBackupCopies=0
AutoSaveDesktop=Yes
AutoOpenPropEdit=Yes
AutoConnectDevice=Yes
SelectTemplate=No
ShowGenProgress=Yes
AutoShowGeneratedSrc=No
AutoShowEventModules=No
ShowMethodCode=No
GenerateUndo=No
CpuBitmapFileName=Config\PE\CPUbckgr.bmp
CpuBitmapTilled=No
ShowProducerLogo=No
AutoStartApplicationCode=No
ShowSourceLinAfterDbgInit=No
RestoreFilesAfterDebug=No
[_end_]

BIN
Demo/HCS12_CodeWarrior_banked/RTOSDemo.mcp Normal file
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4154
Demo/HCS12_CodeWarrior_banked/RTOSDemo.pe Normal file
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BIN
Demo/HCS12_CodeWarrior_banked/RTOSDemo_Data/CWSettingsWindows.stg Normal file
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BIN
Demo/HCS12_CodeWarrior_banked/RTOSDemo_Data/P&E_ICD/TargetDataWindows.tdt Normal file
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BIN
Demo/HCS12_CodeWarrior_banked/RTOSDemo_Data/Simulator/TargetDataWindows.tdt Normal file
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25
Demo/HCS12_CodeWarrior_banked/Simulator.ini Normal file
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@ -0,0 +1,25 @@
[Environment Variables]
GENPATH={Compiler}lib\HC12c\src;{Compiler}lib\HC12c\include;{Compiler}lib\HC12c\lib
LIBPATH={Compiler}lib\HC12c\include
OBJPATH={Project}bin
TEXTPATH={Project}bin
ABSPATH={Project}bin
[HI-WAVE]
Target=sim
Layout=C_layout.hwl
LoadDialogOptions= AUTOERASEANDFLASH
CPU=HC12
MainFrame=2,3,-1,-1,-1,-1,108,108,1308,962
TOOLBAR=57600 57601 32795 0 57635 57634 57637 0 57671 57669 0 32777 32776 32782 32780 32781 32778 0 32806
[Simulator]
CMDFILE0=CMDFILE STARTUP ON ".\cmd\simulator_startup.cmd"
[Simulator HC12]
CMDFILE0=CMDFILE RESET ON ".\cmd\simulator_reset.cmd"
CMDFILE1=CMDFILE PRELOAD ON ".\cmd\simulator_preload.cmd"
CMDFILE2=CMDFILE POSTLOAD ON ".\cmd\simulator_postload.cmd"
CMDFILE3=CMDFILE SETCPU ON ".\cmd\simulator_setcpu.cmd"
HCS12_SUPPORT=1
FCS=MC9S12DP256B

342
Demo/HCS12_CodeWarrior_banked/Sources/Start12.c Normal file
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/*****************************************************
start12.c - standard startup code
The startup code may be optimized to special user requests
----------------------------------------------------
Copyright (c) Metrowerks, Basel, Switzerland
All rights reserved
Do not modify!
Note: ROM libraries are not implemented in this startup code
Note: C++ destructors of global objects are NOT yet supported in the HIWARE Object File Format.
To use this feature, please build your application with the ELF object file format.
*****************************************************/
#include "hidef.h"
#include "start12.h"
/* Macros to control how the startup code handles the COP: */
/* #define _DO_FEED_COP_ : do feed the COP */
/* #define _DO_ENABLE_COP_: do enable the COP */
/* #define _DO_DISABLE_COP_: disable the COP */
/* Without defining any of these, the startup code does NOT handle the COP */
#pragma DATA_SEG __NEAR_SEG STARTUP_DATA /* _startupData can be accessed using 16 bit accesses. This is needed because it contains the stack top, and without stack, far data cannot be accessed */
struct _tagStartup _startupData; /* read-only: */
/* _startupData is allocated in ROM and */
/* initialized by the linker */
#pragma DATA_SEG DEFAULT
#if defined(FAR_DATA)
#include "non_bank.sgm"
/* the init function must be in non banked memory if banked variables are used */
/* because _SET_PAGE is called, which may change any page register. */
#ifdef __cplusplus
extern "C"
#endif
void _SET_PAGE(void); /* the inline assembler needs a prototype */
/* this is a runtime routine with a special */
/* calling convention, dont use it in c code! */
static void Init(void);
static void Fini(void);
#else
#include "default.sgm"
#if defined( __BANKED__) || defined(__LARGE__)
static void __far Init(void);
static void __far Fini(void);
#endif /* defined( __BANKED__) || defined(__LARGE__) */
#endif /* FAR_DATA */
/* define value and bits for Windef Register */
#ifdef HC812A4
#define WINDEF (*(volatile unsigned char*) 0x37)
#if defined( __BANKED__) || defined(__LARGE__) || defined(__PPAGE__)
#define __ENABLE_PPAGE__ 0x40
#else
#define __ENABLE_PPAGE__ 0x0
#endif
#if defined(__DPAGE__)
#define __ENABLE_DPAGE__ 0x80
#else
#define __ENABLE_DPAGE__ 0x0
#endif
#if defined(__EPAGE__)
#define __ENABLE_EPAGE__ 0x20
#else
#define __ENABLE_EPAGE__ 0x0
#endif
#endif /* HC812A4 */
#ifdef _HCS12_SERIALMON
/* for Monitor based software remap the RAM & EEPROM to adhere
to EB386. Edit RAM and EEPROM sections in PRM file to match these. */
#define ___INITRM (*(volatile unsigned char *) 0x0010)
#define ___INITRG (*(volatile unsigned char *) 0x0011)
#define ___INITEE (*(volatile unsigned char *) 0x0012)
#endif
#if defined(_DO_FEED_COP_)
#define __FEED_COP_IN_HLI() } __asm movb #0x55, _COP_RST_ADR; __asm movb #0xAA, _COP_RST_ADR; __asm {
#else
#define __FEED_COP_IN_HLI() /* do nothing */
#endif
#if !defined(FAR_DATA) && (defined( __BANKED__) || defined(__LARGE__))
static void __far Init(void)
#else
static void Init(void)
#endif
{
/* purpose: 1) zero out RAM-areas where data is allocated */
/* 2) copy initialization data from ROM to RAM */
/* 3) call global constructors in C++ */
/* called from: _Startup, LibInits */
__asm {
ZeroOut:
#if defined(__HIWARE_OBJECT_FILE_FORMAT__) && defined(__LARGE__)
LDX _startupData.pZeroOut:1 ; in the large memory model in the HIWARE format, pZeroOut is a 24 bit pointer
#else
LDX _startupData.pZeroOut ; *pZeroOut
#endif
LDY _startupData.nofZeroOuts ; nofZeroOuts
BEQ CopyDown ; if nothing to zero out
NextZeroOut: PSHY ; save nofZeroOuts
#ifdef FAR_DATA
LDAB 1,X+ ; load page of destination address
LDY 2,X+ ; load offset of destination address
__PIC_JSR(_SET_PAGE) ; sets the page in the correct page register
#else /* FAR_DATA */
LDY 2,X+ ; start address and advance *pZeroOut (X = X+4)
#endif /* FAR_DATA */
LDD 2,X+ ; byte count
#ifdef __OPTIMIZE_FOR_SIZE__ /* -os, default */
NextWord: CLR 1,Y+ ; clear memory byte
__FEED_COP_IN_HLI() ; feed the COP if necessary /*lint !e505 !e522 asm code */
DBNE D, NextWord ; dec byte count
#else
LSRD ; /2 and save bit 0 in the carry
PSHX
LDX #0
LoopClrW: STX 2,Y+ ; Word-Clear
__FEED_COP_IN_HLI() ; feed the COP if necessary /*lint !e505 !e522 asm code */
DBNE D, LoopClrW
PULX
BCC LastClr ; handle last byte
CLR 1,Y+
LastClr:
#endif
PULY ; restore nofZeroOuts
DEY ; dec nofZeroOuts
BNE NextZeroOut
CopyDown:
#ifdef __ELF_OBJECT_FILE_FORMAT__
LDX _startupData.toCopyDownBeg ; load address of copy down desc.
#else
LDX _startupData.toCopyDownBeg:2 ; load address of copy down desc.
#endif
NextBlock:
LDD 2,X+ ; size of init-data -> D
BEQ funcInits ; end of copy down desc.
#ifdef FAR_DATA
PSHD ; save counter
LDAB 1,X+ ; load destination page
LDY 2,X+ ; destination address
__PIC_JSR(_SET_PAGE) ; sets the destinations page register
PULD ; restore counter
#else /* FAR_DATA */
LDY 2,X+ ; load destination address
#endif /* FAR_DATA */
#ifdef __OPTIMIZE_FOR_SIZE__ /* -os, default */
Copy: MOVB 1,X+,1,Y+ ; move a byte from ROM to the data area
__FEED_COP_IN_HLI() ; feed the COP if necessary /*lint !e505 !e522 asm code */
DBNE D,Copy ; copy-byte loop
#else
LSRD ; /2 and save bit 0 in the carry
Copy: MOVW 2,X+,2,Y+ ; move a word from ROM to the data area
__FEED_COP_IN_HLI() ; feed the COP if necessary /*lint !e505 !e522 asm code */
DBNE D,Copy ; copy-word loop
BCC NextBlock ; handle last byte?
MOVB 1,X+,1,Y+ ; copy the last byte
#endif
BRA NextBlock
funcInits: ; call of global construtors is only in c++ necessary
#if defined(__cplusplus)
#if defined(__ELF_OBJECT_FILE_FORMAT__)
#if defined( __BANKED__) || defined(__LARGE__)
LDY _startupData.nofInitBodies; load number of cpp.
BEQ done ; if cppcount == 0, goto done
LDX _startupData.initBodies ; load address of first module to initialize
nextInit:
LEAX 3,X ; increment to next init
PSHX ; save address of next function to initialize
PSHY ; save cpp counter
CALL [-3,X] ; use double indirect call to load the page register also
PULY ; restore cpp counter
PULX ; restore actual address
DEY ; decrement cpp counter
BNE nextInit
#else /* defined( __BANKED__) || defined(__LARGE__) */
LDD _startupData.nofInitBodies; load number of cpp.
BEQ done ; if cppcount == 0, goto done
LDX _startupData.initBodies ; load address of first module to initialize
nextInit:
LDY 2,X+ ; load address of first module to initialize
PSHD
PSHX ; save actual address
JSR 0,Y ; call initialization function
PULX ; restore actual address
PULD ; restore cpp counter
DBNE D, nextInit
#endif /* defined( __BANKED__) || defined(__LARGE__) */
#else /* __ELF_OBJECT_FILE_FORMAT__ */
LDX _startupData.mInits ; load address of first module to initialize
#if defined( __BANKED__) || defined(__LARGE__)
nextInit: LDY 3,X+ ; load address of initialization function
BEQ done ; stop when address == 0
; in common environments the offset of a function is never 0, so this test could be avoided
#ifdef __InitFunctionsMayHaveOffset0__
BRCLR -1,X, done, 0xff ; stop when address == 0
#endif /* __InitFunctionsMayHaveOffset0__ */
PSHX ; save address of next function to initialize
CALL [-3,X] ; use double indirect call to load the page register also
#else /* defined( __BANKED__) || defined(__LARGE__) */
nextInit:
LDY 2,X+ ; load address of first module to initialize
BEQ done ; stop when address of function == 0
PSHX ; save actual address
JSR 0,Y ; call initialization function
#endif /* defined( __BANKED__) || defined(__LARGE__) */
PULX ; restore actual address
BRA nextInit
#endif /* __ELF_OBJECT_FILE_FORMAT__ */
done:
#endif /* __cplusplus */
}
}
#if defined( __ELF_OBJECT_FILE_FORMAT__) && defined(__cplusplus )
#if !defined(FAR_DATA) && (defined( __BANKED__) || defined(__LARGE__))
static void __far Fini(void)
#else
static void Fini(void)
#endif
{
/* purpose: 1) call global destructors in C++ */
__asm {
#if defined( __BANKED__) || defined(__LARGE__)
LDY _startupData.nofFiniBodies; load number of cpp.
BEQ done ; if cppcount == 0, goto done
LDX _startupData.finiBodies ; load address of first module to finalize
nextInit2:
LEAX 3,X ; increment to next init
PSHX ; save address of next function to finalize
PSHY ; save cpp counter
CALL [-3,X] ; use double indirect call to load the page register also
PULY ; restore cpp counter
PULX ; restore actual address
DEY ; decrement cpp counter
BNE nextInit2
#else /* defined( __BANKED__) || defined(__LARGE__) */
LDD _startupData.nofFiniBodies; load number of cpp.
BEQ done ; if cppcount == 0, goto done
LDX _startupData.finiBodies ; load address of first module to finalize
nextInit2:
LDY 2,X+ ; load address of first module to finalize
PSHD
PSHX ; save actual address
JSR 0,Y ; call finalize function
PULX ; restore actual address
PULD ; restore cpp counter
DBNE D, nextInit2
#endif /* defined( __BANKED__) || defined(__LARGE__) */
done:;
}
}
#endif
#include "non_bank.sgm"
#pragma MESSAGE DISABLE C12053 /* Stack-pointer change not in debugging-information */
#pragma NO_FRAME
#pragma NO_ENTRY
#pragma NO_EXIT
#ifdef __cplusplus
extern "C"
#endif
/* The function _Startup must be called in order to initialize global variables and to call main */
/* You can adapt this function or call it from your startup code to implement a different startup */
/* functionality. */
/* You should also setup the needed IO registers as WINDEF (HC12A4 only) or the COP registers to run */
/* on hardware */
/* to set the reset vector several ways are possible : */
/* 1. define the function with "interrupt 0" as done below in the first case */
/* 2. add the following line to your prm file : VECTOR ADDRESS 0xfffe _Startup */
/* of course, even more posibilities exists */
/* the reset vector must be set so that the application has a defined entry point */
#define STARTUP_FLAGS_NOT_INIT_SP (1<<1)
#if defined(__SET_RESET_VECTOR__)
void __interrupt 0 _Startup(void) {
#else
void _Startup(void) {
#endif
/* purpose: 1) initialize the stack
2) initialize the RAM, copy down init data etc (Init)
3) call main;
parameters: NONE
called from: _PRESTART-code generated by the Linker
or directly referenced by the reset vector */
for(;;) { /* forever: initialize the program; call the root-procedure */
if (!(_startupData.flags&STARTUP_FLAGS_NOT_INIT_SP)) {
/* initialize the stack pointer */
INIT_SP_FROM_STARTUP_DESC(); /*lint !e522 asm code */ /* HLI macro definition in hidef.h */
}
#ifdef _HCS12_SERIALMON
/* for Monitor based software remap the RAM & EEPROM to adhere
to EB386. Edit RAM and EEPROM sections in PRM file to match these. */
___INITRG = 0x00; /* lock registers block to 0x0000 */
___INITRM = 0x39; /* lock Ram to end at 0x3FFF */
___INITEE = 0x09; /* lock EEPROM block to end at 0x0fff */
#endif
/* Here user defined code could be inserted, the stack could be used */
#if defined(_DO_DISABLE_COP_)
_DISABLE_COP();
#endif
/* Example : Set up WinDef Register to allow Paging */
#ifdef HC812A4 /* HC12 A4 derivative needs WINDEF to configure which pages are available */
#if (__ENABLE_EPAGE__ != 0 || __ENABLE_DPAGE__ != 0 || __ENABLE_PPAGE__ != 0)
WINDEF= __ENABLE_EPAGE__ | __ENABLE_DPAGE__ | __ENABLE_PPAGE__;
#endif
#endif
Init(); /* zero out, copy down, call constructors */
/* Here user defined code could be inserted, all global variables are initilized */
#if defined(_DO_ENABLE_COP_)
_ENABLE_COP(1);
#endif
/* call main() */
(*_startupData.main)();
/* call destructors. Only done when this file is compiled as C++ and for the ELF object file format */
/* the HIWARE object file format does not support this */
#if defined( __ELF_OBJECT_FILE_FORMAT__) && defined(__cplusplus )
Fini();
#endif
} /* end loop forever */
}

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/******************************************************************************
FILE : datapage.c
PURPOSE : paged data access runtime routines
MACHINE : Motorola 68HC12 (Target)
LANGUAGE : ANSI-C
HISTORY : 21.7.96 first version created
******************************************************************************/
/*
According to the -Cp option of the compiler the
__DPAGE__, __PPAGE__ and __EPAGE__ macros are defined.
If none of them is given as argument, then no page accesses should occur and
this runtime routine should not be used !
To be on the save side, the runtime routines are created anyway.
If some of the -Cp options are given an adapted versions which only covers the
needed cases is produced.
*/
/* if no compiler option -Cp is given, it is assumed that all possible are given : */
/* Compile with option -DHCS12 to activate this code */
#if defined(HCS12) || defined(_HCS12) /* HCS12 family has PPAGE register only at 0x30 */
#define PPAGE_ADDR (0x30+REGISTER_BASE)
#ifndef __PPAGE__ /* may be set already by option -CPPPAGE */
#define __PPAGE__
#endif
/* Compile with option -DDG128 to activate this code */
#elif defined DG128 /* HC912DG128 derivative has PPAGE register only at 0xFF */
#define PPAGE_ADDR (0xFF+REGISTER_BASE)
#ifndef __PPAGE__ /* may be set already by option -CPPPAGE */
#define __PPAGE__
#endif
#elif defined(HC812A4)
/* all setting default to A4 already */
#endif
#if !defined(__EPAGE__) && !defined(__PPAGE__) && !defined(__DPAGE__)
/* as default use all page registers */
#define __DPAGE__
#define __EPAGE__
#define __PPAGE__
#endif
/* modify the following defines to your memory configuration */
#define EPAGE_LOW_BOUND 0x400u
#define EPAGE_HIGH_BOUND 0x7ffu
#define DPAGE_LOW_BOUND 0x7000u
#define DPAGE_HIGH_BOUND 0x7fffu
#define PPAGE_LOW_BOUND (DPAGE_HIGH_BOUND+1)
#define PPAGE_HIGH_BOUND 0xBFFFu
#define REGISTER_BASE 0x0u
#ifndef DPAGE_ADDR
#define DPAGE_ADDR (0x34u+REGISTER_BASE)
#endif
#ifndef EPAGE_ADDR
#define EPAGE_ADDR (0x36u+REGISTER_BASE)
#endif
#ifndef PPAGE_ADDR
#define PPAGE_ADDR (0x35u+REGISTER_BASE)
#endif
/*
The following parts about the defines are assumed in the code of _GET_PAGE_REG :
- the memory region controlled by DPAGE is above the area controlled by the EPAGE and
below the area controlled by the PPAGE.
- the lower bound of the PPAGE area is equal to be the higher bound of the DPAGE area + 1
*/
#if EPAGE_LOW_BOUND >= EPAGE_HIGH_BOUND || EPAGE_HIGH_BOUND >= DPAGE_LOW_BOUND || DPAGE_LOW_BOUND >= DPAGE_HIGH_BOUND || DPAGE_HIGH_BOUND >= PPAGE_LOW_BOUND || PPAGE_LOW_BOUND >= PPAGE_HIGH_BOUND
#error /* please adapt _GET_PAGE_REG for this non default page configuration */
#endif
#if DPAGE_HIGH_BOUND+1 != PPAGE_LOW_BOUND
#error /* please adapt _GET_PAGE_REG for this non default page configuration */
#endif
#include "hidef.h"
#include "non_bank.sgm"
#include "runtime.sgm"
/* this module does either control if any access is in the bounds of the specified page or */
/* ,if only one page is specified, just use this page. */
/* This behavior is controlled by the define USE_SEVERAL_PAGES. */
/* If !USE_SEVERAL_PAGES does increase the performance significantly */
/* NOTE : When !USE_SEVERAL_PAGES, the page is also set for accesses outside of the area controlled */
/* by this single page. But this is usually no problem because the page is set again before any other access */
#if !defined(__DPAGE__) && !defined(__EPAGE__) && !defined(__PPAGE__)
/* no page at all is specified */
/* only specifing the right pages will speed up these functions a lot */
#define USE_SEVERAL_PAGES 1
#elif defined(__DPAGE__) && defined(__EPAGE__) || defined(__DPAGE__) && defined(__PPAGE__) || defined(__EPAGE__) && defined(__PPAGE__)
/* more than one page register is used */
#define USE_SEVERAL_PAGES 1
#else
#define USE_SEVERAL_PAGES 0
#if defined(__DPAGE__) /* check which pages are used */
#define PAGE_ADDR PPAGE_ADDR
#elif defined(__EPAGE__)
#define PAGE_ADDR EPAGE_ADDR
#elif defined(__PPAGE__)
#define PAGE_ADDR PPAGE_ADDR
#else /* we dont know which page, decide it at runtime */
#error /* must not happen */
#endif
#endif
#if USE_SEVERAL_PAGES /* only needed for several pages support */
/*--------------------------- _GET_PAGE_REG --------------------------------
Runtime routine to detect the right register depending on the 16 bit offset part
of an address.
This function is only used by the functions below.
Depending on the compiler options -Cp different versions of _GET_PAGE_REG are produced.
Arguments :
- Y : offset part of an address
Result :
if address Y is controlled by a page register :
- X : address of page register if Y is controlled by an page register
- Zero flag cleared
- all other registers remain unchanged
if address Y is not controlled by a page register :
- Zero flag is set
- all registers remain unchanged
--------------------------- _GET_PAGE_REG ----------------------------------*/
#if defined(__DPAGE__)
#ifdef __cplusplus
extern "C"
#endif
#pragma NO_ENTRY
#pragma NO_EXIT
#pragma NO_FRAME
static void NEAR _GET_PAGE_REG(void) { /*lint -esym(528, _GET_PAGE_REG) used in asm code */
asm {
L_DPAGE:
CPY #DPAGE_LOW_BOUND ; test of lower bound of DPAGE
#if defined(__EPAGE__)
BLO L_EPAGE ; EPAGE accesses are possible
#else
BLO L_NOPAGE ; no paged memory below accesses
#endif
CPY #DPAGE_HIGH_BOUND ; test of higher bound DPAGE/lower bound PPAGE
#if defined(__PPAGE__)
BHI L_PPAGE ; EPAGE accesses are possible
#else
BHI L_NOPAGE ; no paged memory above accesses
#endif
FOUND_DPAGE:
LDX #DPAGE_ADDR ; load page register address and clear zero flag
RTS
#if defined(__PPAGE__)
L_PPAGE:
CPY #PPAGE_HIGH_BOUND ; test of higher bound of PPAGE
BHI L_NOPAGE
FOUND_PPAGE:
LDX #PPAGE_ADDR ; load page register address and clear zero flag
RTS
#endif
#if defined(__EPAGE__)
L_EPAGE:
CPY #EPAGE_LOW_BOUND ; test of lower bound of EPAGE
BLO L_NOPAGE
CPY #EPAGE_HIGH_BOUND ; test of higher bound of EPAGE
BHI L_NOPAGE
FOUND_EPAGE:
LDX #EPAGE_ADDR ; load page register address and clear zero flag
RTS
#endif
L_NOPAGE:
ORCC #0x04 ; sets zero flag
RTS
}
}
#else /* !defined(__DPAGE__) */
#if defined( __PPAGE__ )
#ifdef __cplusplus
extern "C"
#endif
#pragma NO_ENTRY
#pragma NO_EXIT
#pragma NO_FRAME
static void NEAR _GET_PAGE_REG(void) { /*lint -esym(528, _GET_PAGE_REG) used in asm code */
asm {
L_PPAGE:
CPY #PPAGE_LOW_BOUND ; test of lower bound of PPAGE
#if defined( __EPAGE__ )
BLO L_EPAGE
#else
BLO L_NOPAGE ; no paged memory below
#endif
CPY #PPAGE_HIGH_BOUND ; test of higher bound PPAGE
BHI L_NOPAGE
FOUND_PPAGE:
LDX #PPAGE_ADDR ; load page register address and clear zero flag
RTS
#if defined( __EPAGE__ )
L_EPAGE:
CPY #EPAGE_LOW_BOUND ; test of lower bound of EPAGE
BLO L_NOPAGE
CPY #EPAGE_HIGH_BOUND ; test of higher bound of EPAGE
BHI L_NOPAGE
FOUND_EPAGE:
LDX #EPAGE_ADDR ; load page register address and clear zero flag
RTS
#endif
L_NOPAGE: ; not in any allowed page area
; its a far access to a non paged variable
ORCC #0x04 ; sets zero flag
RTS
}
}
#else /* !defined(__DPAGE__ ) && !defined( __PPAGE__) */
#if defined(__EPAGE__)
#ifdef __cplusplus
extern "C"
#endif
#pragma NO_ENTRY
#pragma NO_EXIT
#pragma NO_FRAME
static void NEAR _GET_PAGE_REG(void) { /*lint -esym(528, _GET_PAGE_REG) used in asm code */
asm {
L_EPAGE:
CPY #EPAGE_LOW_BOUND ; test of lower bound of EPAGE
BLO L_NOPAGE
CPY #EPAGE_HIGH_BOUND ; test of higher bound of EPAGE
BHI L_NOPAGE
FOUND_EPAGE:
LDX #EPAGE_ADDR ; load page register address and clear zero flag
RTS
L_NOPAGE: ; not in any allowed page area
; its a far access to a non paged variable
ORCC #0x04 ; sets zero flag
RTS
}
}
#endif /* defined(__EPAGE__) */
#endif /* defined(__PPAGE__) */
#endif /* defined(__DPAGE__) */
#endif /* USE_SEVERAL_PAGES */
/*--------------------------- _SET_PAGE --------------------------------
Runtime routine to set the right page register. This routine is used if the compiler
does not know the right page register, i.e. if the option -Cp is used for more than
one pageregister or if the runtime option is used for one of the -Cp options.
Arguments :
- offset part of an address in the Y register
- page part of an address in the B register
Result :
- page part written into the correct page register.
- the old page register content is destroyed
- all processor registers remains unchanged
--------------------------- _SET_PAGE ----------------------------------*/
#ifdef __cplusplus
extern "C"
#endif
#pragma NO_ENTRY
#pragma NO_EXIT
#pragma NO_FRAME
void NEAR _SET_PAGE(void) {
#if USE_SEVERAL_PAGES
asm {
PSHX ; save X register
__PIC_JSR(_GET_PAGE_REG)
BEQ L_NOPAGE
STAB 0,X ; set page register
L_NOPAGE:
PULX ; restore X register
RTS
}
#else /* USE_SEVERAL_PAGES */
asm {
STAB PAGE_ADDR ; set page register
RTS
}
#endif /* USE_SEVERAL_PAGES */
}
/*--------------------------- _LOAD_FAR_8 --------------------------------
This runtime routine is used to access paged memory via a runtime function.
It may also be used if the compiler option -Cp is not used with the runtime argument.
Arguments :
- offset part of an address in the Y register
- page part of an address in the B register
Result :
- value to be read in the B register
- all other registers remains unchanged
- all page register still contain the same value
--------------------------- _LOAD_FAR_8 ----------------------------------*/
#ifdef __cplusplus
extern "C"
#endif
#pragma NO_ENTRY
#pragma NO_EXIT
#pragma NO_FRAME
void NEAR _LOAD_FAR_8(void) {
#if USE_SEVERAL_PAGES
asm {
PSHX ; save X register
__PIC_JSR(_GET_PAGE_REG)
BEQ L_NOPAGE
PSHA ; save A register
LDAA 0,X ; save page register
STAB 0,X ; set page register
LDAB 0,Y ; actual load, overwrites page
STAA 0,X ; restore page register
PULA ; restore A register
PULX ; restore X register
RTS
L_NOPAGE:
LDAB 0,Y ; actual load, overwrites page
PULX ; restore X register
RTS
}
#else /* USE_SEVERAL_PAGES */
asm {
PSHA ; save A register
LDAA PAGE_ADDR ; save page register
STAB PAGE_ADDR ; set page register
LDAB 0,Y ; actual load, overwrites page
STAA PAGE_ADDR ; restore page register
PULA ; restore A register
RTS
}
#endif /* USE_SEVERAL_PAGES */
}
/*--------------------------- _LOAD_FAR_16 --------------------------------
This runtime routine is used to access paged memory via a runtime function.
It may also be used if the compiler option -Cp is not used with the runtime argument.
Arguments :
- offset part of an address in the Y register
- page part of an address in the B register
Result :
- value to be read in the Y register
- all other registers remains unchanged
- all page register still contain the same value
--------------------------- _LOAD_FAR_16 ----------------------------------*/
#ifdef __cplusplus
extern "C"
#endif
#pragma NO_ENTRY
#pragma NO_EXIT
#pragma NO_FRAME
void NEAR _LOAD_FAR_16(void) {
#if USE_SEVERAL_PAGES
asm {
PSHX ; save X register
__PIC_JSR(_GET_PAGE_REG)
BEQ L_NOPAGE
PSHA ; save A register
LDAA 0,X ; save page register
STAB 0,X ; set page register
LDY 0,Y ; actual load, overwrites address
STAA 0,X ; restore page register
PULA ; restore A register
PULX ; restore X register
RTS
L_NOPAGE:
LDY 0,Y ; actual load, overwrites address
PULX ; restore X register
RTS
}
#else /* USE_SEVERAL_PAGES */
asm {
PSHA ; save A register
LDAA PAGE_ADDR ; save page register
STAB PAGE_ADDR ; set page register
LDY 0,Y ; actual load, overwrites address
STAA PAGE_ADDR ; restore page register
PULA ; restore A register
RTS
}
#endif /* USE_SEVERAL_PAGES */
}
/*--------------------------- _LOAD_FAR_24 --------------------------------
This runtime routine is used to access paged memory via a runtime function.
It may also be used if the compiler option -Cp is not used with the runtime argument.
Arguments :
- offset part of an address in the Y register
- page part of an address in the B register
Result :
- value to be read in the Y:B registers
- all other registers remains unchanged
- all page register still contain the same value
--------------------------- _LOAD_FAR_24 ----------------------------------*/
#ifdef __cplusplus
extern "C"
#endif
#pragma NO_ENTRY
#pragma NO_EXIT
#pragma NO_FRAME
void NEAR _LOAD_FAR_24(void) {
#if USE_SEVERAL_PAGES
asm {
PSHX ; save X register
__PIC_JSR(_GET_PAGE_REG)
BEQ L_NOPAGE
PSHA ; save A register
LDAA 0,X ; save page register
STAB 0,X ; set page register
LDAB 0,Y ; actual load, overwrites page of address
LDY 1,Y ; actual load, overwrites offset of address
STAA 0,X ; restore page register
PULA ; restore A register
PULX ; restore X register
RTS
L_NOPAGE:
LDAB 0,Y ; actual load, overwrites page of address
LDY 1,Y ; actual load, overwrites offset of address
PULX ; restore X register
RTS
}
#else /* USE_SEVERAL_PAGES */
asm {
PSHA ; save A register
LDAA PAGE_ADDR ; save page register
STAB PAGE_ADDR ; set page register
LDAB 0,Y ; actual load, overwrites page of address
LDY 1,Y ; actual load, overwrites offset of address
STAA PAGE_ADDR ; restore page register
PULA ; restore A register
RTS
}
#endif /* USE_SEVERAL_PAGES */
}
/*--------------------------- _LOAD_FAR_32 --------------------------------
This runtime routine is used to access paged memory via a runtime function.
It may also be used if the compiler option -Cp is not used with the runtime argument.
Arguments :
- offset part of an address in the Y register
- page part of an address in the B register
Result :
- low 16 bit of value to be read in the D registers
- high 16 bit of value to be read in the Y registers
- all other registers remains unchanged
- all page register still contain the same value
--------------------------- _LOAD_FAR_32 ----------------------------------*/
#ifdef __cplusplus
extern "C"
#endif
#pragma NO_ENTRY
#pragma NO_EXIT
#pragma NO_FRAME
void NEAR _LOAD_FAR_32(void) {
#if USE_SEVERAL_PAGES
asm {
PSHX ; save X register
__PIC_JSR(_GET_PAGE_REG)
BEQ L_NOPAGE
LDAA 0,X ; save page register
PSHA ; put it onto the stack
STAB 0,X ; set page register
LDD 2,Y ; actual load, low word
LDY 0,Y ; actual load, high word
MOVB 1,SP+,0,X ; restore page register
PULX ; restore X register
RTS
L_NOPAGE:
LDD 2,Y ; actual load, low word
LDY 0,Y ; actual load, high word
PULX ; restore X register
RTS
}
#else /* USE_SEVERAL_PAGES */
asm {
LDAA PAGE_ADDR ; save page register
PSHA ; put it onto the stack
STAB PAGE_ADDR ; set page register
LDD 2,Y ; actual load, low word
LDY 0,Y ; actual load, high word
MOVB 1,SP+,PAGE_ADDR; restore page register
RTS
}
#endif /* USE_SEVERAL_PAGES */
}
/*--------------------------- _STORE_FAR_8 --------------------------------
This runtime routine is used to access paged memory via a runtime function.
It may also be used if the compiler option -Cp is not used with the runtime argument.
Arguments :
- offset part of an address in the Y register
- page part of an address in the B register
- value to be stored in the B register
Result :
- value stored at the address
- all registers remains unchanged
- all page register still contain the same value
--------------------------- _STORE_FAR_8 ----------------------------------*/
#ifdef __cplusplus
extern "C"
#endif
#pragma NO_ENTRY
#pragma NO_EXIT
#pragma NO_FRAME
void NEAR _STORE_FAR_8(void) {
#if USE_SEVERAL_PAGES
asm {
PSHX ; save X register
__PIC_JSR(_GET_PAGE_REG)
BEQ L_NOPAGE
PSHB ; save B register
LDAB 0,X ; save page register
MOVB 0,SP, 0,X ; set page register
STAA 0,Y ; store the value passed in A
STAB 0,X ; restore page register
PULB ; restore B register
PULX ; restore X register
RTS
L_NOPAGE:
STAA 0,Y ; store the value passed in A
PULX ; restore X register
RTS
}
#else /* USE_SEVERAL_PAGES */
asm {
PSHB ; save A register
LDAB PAGE_ADDR ; save page register
MOVB 0,SP,PAGE_ADDR ; set page register
STAA 0,Y ; store the value passed in A
STAB PAGE_ADDR ; restore page register
PULB ; restore B register
RTS
}
#endif /* USE_SEVERAL_PAGES */
}
/*--------------------------- _STORE_FAR_16 --------------------------------
This runtime routine is used to access paged memory via a runtime function.
It may also be used if the compiler option -Cp is not used with the runtime argument.
Arguments :
- offset part of an address in the Y register
- page part of an address in the B register
- value to be stored in the X register
Result :
- value stored at the address
- all registers remains unchanged
- all page register still contain the same value
--------------------------- _STORE_FAR_16 ----------------------------------*/
#ifdef __cplusplus
extern "C"
#endif
#pragma NO_ENTRY
#pragma NO_EXIT
#pragma NO_FRAME
void NEAR _STORE_FAR_16(void) {
#if USE_SEVERAL_PAGES
asm {
PSHX ; save X register
__PIC_JSR(_GET_PAGE_REG)
BEQ L_NOPAGE
PSHA
LDAA 0,X ; save page register
STAB 0,X ; set page register
MOVW 1,SP, 0,Y ; store the value passed in X
STAA 0,X ; restore page register
PULA ; restore A register
PULX ; restore X register
RTS
L_NOPAGE:
STX 0,Y ; store the value passed in X
PULX ; restore X register
RTS
}
#else /* USE_SEVERAL_PAGES */
asm {
PSHA ; save A register
LDAA PAGE_ADDR ; save page register
STAB PAGE_ADDR ; set page register
STX 0,Y ; store the value passed in X
STAA PAGE_ADDR ; restore page register
PULA ; restore A register
RTS
}
#endif /* USE_SEVERAL_PAGES */
}
/*--------------------------- _STORE_FAR_24 --------------------------------
This runtime routine is used to access paged memory via a runtime function.
It may also be used if the compiler option -Cp is not used with the runtime argument.
Arguments :
- offset part of an address in the Y register
- page part of an address in the B register
- value to be stored in the X:A registers (X : low 16 bit, A : high 8 bit)
Result :
- value stored at the address
- all registers remains unchanged
- all page register still contain the same value
--------------------------- _STORE_FAR_24 ----------------------------------*/
#ifdef __cplusplus
extern "C"
#endif
#pragma NO_ENTRY
#pragma NO_EXIT
#pragma NO_FRAME
void NEAR _STORE_FAR_24(void) {
#if USE_SEVERAL_PAGES
asm {
PSHX ; save X register
__PIC_JSR(_GET_PAGE_REG)
BEQ L_NOPAGE
PSHA
LDAA 0,X ; save page register
STAB 0,X ; set page register
MOVW 1,SP, 1,Y ; store the value passed in X
MOVB 0,SP, 0,Y ; store the value passed in A
STAA 0,X ; restore page register
PULA ; restore A register
PULX ; restore X register
RTS
L_NOPAGE:
STX 1,Y ; store the value passed in X
STAA 0,Y ; store the value passed in X
PULX ; restore X register
RTS
}
#else /* USE_SEVERAL_PAGES */
asm {
PSHA ; save A register
LDAA PAGE_ADDR ; save page register
STAB PAGE_ADDR ; set page register
MOVB 0,SP, 0,Y ; store the value passed in A
STX 1,Y ; store the value passed in X
STAA PAGE_ADDR ; restore page register
PULA ; restore A register
RTS
}
#endif /* USE_SEVERAL_PAGES */
}
/*--------------------------- _STORE_FAR_32 --------------------------------
This runtime routine is used to access paged memory via a runtime function.
It may also be used if the compiler option -Cp is not used with the runtime argument.
Arguments :
- offset part of an address in the Y register
- page part of an address is on the stack at 3,SP (just below the return address)
- value to be stored in the X:D registers (D : low 16 bit, X : high 16 bit)
Result :
- value stored at the address
- all registers remains unchanged
- the page part is removed from the stack
- all page register still contain the same value
--------------------------- _STORE_FAR_32 ----------------------------------*/
#ifdef __cplusplus
extern "C"
#endif
#pragma NO_ENTRY
#pragma NO_EXIT
#pragma NO_FRAME
void NEAR _STORE_FAR_32(void) {
#if USE_SEVERAL_PAGES
asm {
PSHX ; save X register
__PIC_JSR(_GET_PAGE_REG)
BEQ L_NOPAGE
PSHD
LDAA 0,X ; save page register
MOVB 6,SP, 0,X ; set page register
MOVW 2,SP, 0,Y ; store the value passed in X (high word)
MOVW 0,SP, 2,Y ; store the value passed in D (low word)
STAA 0,X ; restore page register
PULD ; restore A register
BRA done
L_NOPAGE:
MOVW 0,SP, 0,Y ; store the value passed in X (high word)
STD 2,Y ; store the value passed in D (low word)
done:
PULX ; restore X register
MOVW 0,SP, 1,+SP ; move return address
RTS
}
#else /* USE_SEVERAL_PAGES */
asm {
PSHD ; save D register
LDAA PAGE_ADDR ; save page register
LDAB 4,SP ; load page part of address
STAB PAGE_ADDR ; set page register
STX 0,Y ; store the value passed in X
MOVW 0,SP, 2,Y ; store the value passed in D (low word)
STAA PAGE_ADDR ; restore page register
PULD ; restore D register
MOVW 0,SP, 1,+SP ; move return address
RTS
}
#endif /* USE_SEVERAL_PAGES */
}
/*--------------------------- _FAR_COPY --------------------------------
This runtime routine is used to access paged memory via a runtime function.
It may also be used if the compiler option -Cp is not used with the runtime argument.
Arguments :
- offset part of the source int the X register
- page part of the source in the A register
- offset part of the dest int the Y register
- page part of the dest in the B register
- number of bytes to be copied at 2,SP. The number of bytes is always > 0
Result :
- memory area copied
- no registers are saved, i.e. all registers may be destroied
- all page register still contain the same value
stack-structure at the loop-label:
0,SP : destination offset
2,SP : source page
3,SP : destination page
4,SP : source offset
6,SP : return address
8,SP : counter, > 0
--------------------------- _FAR_COPY ----------------------------------*/
#ifdef __cplusplus
extern "C"
#endif
#pragma NO_ENTRY
#pragma NO_EXIT
#pragma NO_FRAME
void NEAR _FAR_COPY(void) {
#if USE_SEVERAL_PAGES
asm {
DEX ; source addr-=1, because loop counter ends at 1
PSHX ; save source offset
PSHD ; save both pages
DEY ; destination addr-=1, because loop counter ends at 1
PSHY ; save destination offset
LDX 8,SP ; load counter, assuming counter > 0
loop:
LDD 4,SP ; load source offset
LEAY D,X ; calcutate actual source address
LDAB 2,SP ; load source page
__PIC_JSR (_LOAD_FAR_8); load 1 source byte
PSHB ; save value
LDD 0+1,SP ; load destination offset
LEAY D,X ; calcutate acual destination address
PULA ; restore value
LDAB 3,SP ; load destination page
__PIC_JSR (_STORE_FAR_8); store one byte
DEX
BNE loop
LDX 6,SP ; load return address
LEAS 10,SP ; release stack
JMP 0,X ; return
}
#else
asm {
PSHD ; store page registers
TFR X,D
ADDD 4,SP ; calculate source end address
STD 4,SP
PULB ; reload source page
LDAA PAGE_ADDR ; save page register
PSHA
loop:
STAB PAGE_ADDR ; set source page
LDAA 1,X+ ; load value
MOVB 1,SP, PAGE_ADDR ; set destination page
STAA 1,Y+
CPX 4,SP
BNE loop
LDAA 2,SP+ ; restore old page value and release stack
STAA PAGE_ADDR ; store it into page register
LDX 4,SP+ ; release stack and load return address
JMP 0,X ; return
}
#endif
}

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// HCS12 Core erasing + unsecuring command file:
// These commands mass erase the chip then program the security byte to 0xFE (unsecured state).
// Evaluate the clock divider to set in ECLKDIV/FCLKDIV registers:
// An average programming clock of 175 kHz is chosen.
// If the oscillator frequency is less than 10 MHz, the value to store
// in ECLKDIV/FCLKDIV is equal to " oscillator frequency (kHz) / 175 ".
// If the oscillator frequency is higher than 10 MHz, the value to store
// in ECLKDIV/FCLKDIV is equal to " oscillator frequency (kHz) / 1400 + 0x40 (to set PRDIV8 flag)".
// Datasheet proposed values:
//
// oscillator frequency ECLKDIV/FCLKDIV value (hexadecimal)
//
// 16 MHz $49
// 8 MHz $27
// 4 MHz $13
// 2 MHz $9
// 1 MHz $4
define CLKDIV 0x49
FLASH MEMUNMAP // do not interact with regular flash programming monitor
//mass erase flash
wb 0x100 CLKDIV // set FCLKDIV clock divider
wb 0x103 0 // FCFNG select block 0
wb 0x102 0x10 // set the WRALL bit in FTSTMOD to affect all blocks
wb 0x104 0xFF // FPROT all protection disabled
wb 0x105 0x30 // clear PVIOL and ACCERR in FSTAT register
ww 0x108 0xD000 // write to FADDR address register
ww 0x10A 0x0000 // write to FDATA data register
wb 0x106 0x41 // write MASS ERASE command in FCMD register
wb 0x105 0x80 // clear CBEIF in FSTAT register to execute the command
wait 20 // wait for command to complete
//mass erase eeprom
wb 0x110 CLKDIV // set ECLKDV clock divider
wb 0x114 0xFF // EPROT all protection disabled
wb 0x115 0x30 // clear PVIOL and ACCERR in ESTAT register
ww 0x118 0x0400 // write to EADDR eeprom address register
ww 0x11A 0x0000 // write to EDATA eeprom data register
wb 0x116 0x41 // write MASS ERASE command in ECMD register
wb 0x115 0x80 // clear CBEIF in ESTAT register to execute the command
wait 20 // wait for command to complete
reset
//reprogram Security byte to Unsecure state
wb 0x100 CLKDIV // set FCLKDIV clock divider
wb 0x103 0 // FCFNG select block 0
wb 0x104 0xFF // FPROT all protection disabled
wb 0x105 0x30 // clear PVIOL and ACCERR in FSTAT register
ww 0xFF0E 0xFFFE // write security byte to "Unsecured" state
wb 0x106 0x20 // write MEMORY PROGRAM command in FCMD register
wb 0x105 0x80 // clear CBEIF in FSTAT register to execute the command
wait 20 // wait for command to complete
reset
FLASH MEMMAP // restore regular flash programming monitor
undef CLKDIV // undefine variable

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// After load the commands written below will be executed
// Show main function at startup
FindProc main

1
Demo/HCS12_CodeWarrior_banked/cmd/P&E_ICD_Preload.cmd Normal file
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// Before load the commands written below will be executed

1
Demo/HCS12_CodeWarrior_banked/cmd/P&E_ICD_Reset.cmd Normal file
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@ -0,0 +1 @@
// After reset the commands written below will be executed

1
Demo/HCS12_CodeWarrior_banked/cmd/P&E_ICD_Startup.cmd Normal file
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@ -0,0 +1 @@
// At startup the commands written below will be executed

1
Demo/HCS12_CodeWarrior_banked/cmd/P&E_ICD_Vppoff.cmd Normal file
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@ -0,0 +1 @@
// After programming the flash, the commands written below will be executed

1
Demo/HCS12_CodeWarrior_banked/cmd/P&E_ICD_Vppon.cmd Normal file
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@ -0,0 +1 @@
// Before programming the flash, the commands written below will be executed

3
Demo/HCS12_CodeWarrior_banked/cmd/Simulator_Postload.cmd Normal file
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// After load the commands written below will be executed
// Show main function at startup
FindProc main

1
Demo/HCS12_CodeWarrior_banked/cmd/Simulator_Preload.cmd Normal file
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@ -0,0 +1 @@
// Before load the commands written below will be executed

1
Demo/HCS12_CodeWarrior_banked/cmd/Simulator_Reset.cmd Normal file
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@ -0,0 +1 @@
// After reset the commands written below will be executed

1
Demo/HCS12_CodeWarrior_banked/cmd/Simulator_SetCPU.cmd Normal file
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@ -0,0 +1 @@
// At startup the commands written below will be executed

1
Demo/HCS12_CodeWarrior_banked/cmd/Simulator_Startup.cmd Normal file
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@ -0,0 +1 @@
// At startup the commands written below will be executed

291
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/*
FreeRTOS V4.0.1 - Copyright (C) 2003-2006 Richard Barry.
This file is part of the FreeRTOS distribution.
FreeRTOS is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or
(at your option) any later version.
FreeRTOS is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with FreeRTOS; if not, write to the Free Software
Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
A special exception to the GPL can be applied should you wish to distribute
a combined work that includes FreeRTOS, without being obliged to provide
the source code for any proprietary components. See the licensing section
of http://www.FreeRTOS.org for full details of how and when the exception
can be applied.
***************************************************************************
See http://www.FreeRTOS.org for documentation, latest information, license
and contact details. Please ensure to read the configuration and relevant
port sections of the online documentation.
***************************************************************************
*/
/*
*
* vMain() is effectively the demo application entry point. It is called by
* the main() function generated by the Processor Expert application.
*
* vMain() creates all the demo application tasks, then starts the scheduler.
* The WEB documentation provides more details of the demo application tasks.
*
* Main.c also creates a task called "Check". This only executes every three
* seconds but has the highest priority so is guaranteed to get processor time.
* Its main function is to check that all the other tasks are still operational.
* Each task (other than the "flash" tasks) maintains a unique count that is
* incremented each time the task successfully completes its function. Should
* any error occur within such a task the count is permanently halted. The
* check task inspects the count of each task to ensure it has changed since
* the last time the check task executed. If all the count variables have
* changed all the tasks are still executing error free, and the check task
* toggles the onboard LED. Should any task contain an error at any time
* the LED toggle rate will change from 3 seconds to 500ms.
*
* This file also includes the functionality implemented within the
* standard demo application file integer.c. This is done to demonstrate the
* use of an idle hook. See the documentation within integer.c for the
* rationale of the integer task functionality.
* */
/* Kernel includes. */
#include "FreeRTOS.h"
#include "task.h"
#include "queue.h"
/* Demo application includes. */
#include "flash.h"
#include "PollQ.h"
#include "dynamic.h"
#include "partest.h"
#include "comtest2.h"
#include "BlockQ.h"
#include "integer.h"
#include "death.h"
/*-----------------------------------------------------------
Definitions.
-----------------------------------------------------------*/
/* Priorities assigned to demo application tasks. */
#define mainFLASH_PRIORITY ( tskIDLE_PRIORITY + 2 )
#define mainCHECK_TASK_PRIORITY ( tskIDLE_PRIORITY + 3 )
#define mainQUEUE_POLL_PRIORITY ( tskIDLE_PRIORITY + 1 )
#define mainCOM_TEST_PRIORITY ( tskIDLE_PRIORITY + 2 )
#define mainBLOCK_Q_PRIORITY ( tskIDLE_PRIORITY + 2 )
#define mainDEATH_PRIORITY ( tskIDLE_PRIORITY + 1 )
/* LED that is toggled by the check task. The check task periodically checks
that all the other tasks are operating without error. If no errors are found
the LED is toggled with mainCHECK_PERIOD frequency. If an error is found
then the toggle rate increases to mainERROR_CHECK_PERIOD. */
#define mainCHECK_TASK_LED ( 7 )
#define mainCHECK_PERIOD ( ( portTickType ) 3000 / portTICK_RATE_MS )
#define mainERROR_CHECK_PERIOD ( ( portTickType ) 500 / portTICK_RATE_MS )
/* The constants used in the idle task calculation. */
#define intgCONST1 ( ( portLONG ) 123 )
#define intgCONST2 ( ( portLONG ) 234567 )
#define intgCONST3 ( ( portLONG ) -3 )
#define intgCONST4 ( ( portLONG ) 7 )
#define intgEXPECTED_ANSWER ( ( ( intgCONST1 + intgCONST2 ) * intgCONST3 ) / intgCONST4 )
/* Baud rate used by the serial port tasks (ComTest tasks).
IMPORTANT: The function COM0_SetBaudRateValue() which is generated by the
Processor Expert is used to set the baud rate. As configured in the FreeRTOS
download this value must be one of the following:
0 to configure for 38400 baud.
1 to configure for 19200 baud.
2 to configure for 9600 baud.
3 to configure for 4800 baud. */
#define mainCOM_TEST_BAUD_RATE ( ( unsigned portLONG ) 2 )
/* LED used by the serial port tasks. This is toggled on each character Tx,
and mainCOM_TEST_LED + 1 is toggles on each character Rx. */
#define mainCOM_TEST_LED ( 3 )
/*-----------------------------------------------------------
Local functions prototypes.
-----------------------------------------------------------*/
/*
* The 'Check' task function. See the explanation at the top of the file.
*/
static void vErrorChecks( void* pvParameters );
/*
* The idle task hook - in which the integer task is implemented. See the
* explanation at the top of the file.
*/
void vApplicationIdleHook( void );
/*
* Checks the unique counts of other tasks to ensure they are still operational.
*/
static portLONG prvCheckOtherTasksAreStillRunning( void );
/*-----------------------------------------------------------
Local variables.
-----------------------------------------------------------*/
/* A few tasks are defined within this file. This flag is used to indicate
their status. If an error is detected in one of the locally defined tasks then
this flag is set to pdTRUE. */
portBASE_TYPE xLocalError = pdFALSE;
/*-----------------------------------------------------------*/
/*
* This is called from the main() function generated by the Processor Expert.
*/
void vMain( void )
{
/* Start some of the standard demo tasks. */
vStartLEDFlashTasks( mainFLASH_PRIORITY );
vStartPolledQueueTasks( mainQUEUE_POLL_PRIORITY );
vStartDynamicPriorityTasks();
vAltStartComTestTasks( mainCOM_TEST_PRIORITY, mainCOM_TEST_BAUD_RATE, mainCOM_TEST_LED );
vStartBlockingQueueTasks( mainBLOCK_Q_PRIORITY );
vStartIntegerMathTasks( tskIDLE_PRIORITY );
/* Start the locally defined tasks. There is also a task implemented as
the idle hook. */
xTaskCreate( vErrorChecks, "Check", configMINIMAL_STACK_SIZE, NULL, mainCHECK_TASK_PRIORITY, NULL );
/* Must be the last demo created. */
vCreateSuicidalTasks( mainDEATH_PRIORITY );
/* All the tasks have been created - start the scheduler. */
vTaskStartScheduler();
/* Should not reach here! */
for( ;; );
}
/*-----------------------------------------------------------*/
static void vErrorChecks( void *pvParameters )
{
portTickType xDelayPeriod = mainCHECK_PERIOD;
portTickType xLastWakeTime;
/* Initialise xLastWakeTime to ensure the first call to vTaskDelayUntil()
functions correctly. */
xLastWakeTime = xTaskGetTickCount();
for( ;; )
{
/* Delay until it is time to execute again. The delay period is
shorter following an error. */
vTaskDelayUntil( &xLastWakeTime, xDelayPeriod );
/* Check all the demo application tasks are executing without
error. If an error is found the delay period is shortened - this
has the effect of increasing the flash rate of the 'check' task
LED. */
if( prvCheckOtherTasksAreStillRunning() == pdFAIL )
{
/* An error has been detected in one of the tasks - flash faster. */
xDelayPeriod = mainERROR_CHECK_PERIOD;
}
/* Toggle the LED each cycle round. */
vParTestToggleLED( mainCHECK_TASK_LED );
}
}
/*-----------------------------------------------------------*/
static portLONG prvCheckOtherTasksAreStillRunning( void )
{
portBASE_TYPE xAllTasksPassed = pdPASS;
if( xArePollingQueuesStillRunning() != pdTRUE )
{
xAllTasksPassed = pdFAIL;
}
if( xAreDynamicPriorityTasksStillRunning() != pdTRUE )
{
xAllTasksPassed = pdFAIL;
}
if( xAreComTestTasksStillRunning() != pdTRUE )
{
xAllTasksPassed = pdFALSE;
}
if( xAreIntegerMathsTaskStillRunning() != pdTRUE )
{
xAllTasksPassed = pdFALSE;
}
if( xAreBlockingQueuesStillRunning() != pdTRUE )
{
xAllTasksPassed = pdFALSE;
}
if( xIsCreateTaskStillRunning() != pdTRUE )
{
xAllTasksPassed = pdFALSE;
}
/* Also check the status flag for the tasks defined within this function. */
if( xLocalError != pdFALSE )
{
xAllTasksPassed = pdFAIL;
}
return xAllTasksPassed;
}
/*-----------------------------------------------------------*/
void vApplicationIdleHook( void )
{
/* This variable is effectively set to a constant so it is made volatile to
ensure the compiler does not just get rid of it. */
volatile portLONG lValue;
/* Keep performing a calculation and checking the result against a constant. */
/* Perform the calculation. This will store partial value in
registers, resulting in a good test of the context switch mechanism. */
lValue = intgCONST1;
lValue += intgCONST2;
lValue *= intgCONST3;
lValue /= intgCONST4;
/* Did we perform the calculation correctly with no corruption? */
if( lValue != intgEXPECTED_ANSWER )
{
/* Error! */
portENTER_CRITICAL();
xLocalError = pdTRUE;
portEXIT_CRITICAL();
}
/* Yield in case cooperative scheduling is being used. */
#if configUSE_PREEMPTION == 0
{
taskYIELD();
}
#endif
}
/*-----------------------------------------------------------*/

223
Demo/HCS12_CodeWarrior_banked/prm/burner.bbl Normal file
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/* logical s-record file */
OPENFILE "%ABS_FILE%.s19"
format=motorola
busWidth=1
origin=0
len=0x1000000
destination=0
SRECORD=Sx
SENDBYTE 1 "%ABS_FILE%"
CLOSE
/* physical s-record file */
OPENFILE "%ABS_FILE%.phy"
format = motorola
busWidth = 1
len = 0x4000
origin = 0x008000
destination = 0x000000
SENDBYTE 1 "%ABS_FILE%"
origin = 0x018000
destination = 0x004000
SENDBYTE 1 "%ABS_FILE%"
origin = 0x028000
destination = 0x008000
SENDBYTE 1 "%ABS_FILE%"
origin = 0x038000
destination = 0x00C000
SENDBYTE 1 "%ABS_FILE%"
origin = 0x048000
destination = 0x010000
SENDBYTE 1 "%ABS_FILE%"
origin = 0x058000
destination = 0x014000
SENDBYTE 1 "%ABS_FILE%"
origin = 0x068000
destination = 0x018000
SENDBYTE 1 "%ABS_FILE%"
origin = 0x078000
destination = 0x01C000
SENDBYTE 1 "%ABS_FILE%"
origin = 0x088000
destination = 0x020000
SENDBYTE 1 "%ABS_FILE%"
origin = 0x098000
destination = 0x024000
SENDBYTE 1 "%ABS_FILE%"
origin = 0x0A8000
destination = 0x028000
SENDBYTE 1 "%ABS_FILE%"
origin = 0x0B8000
destination = 0x02C000
SENDBYTE 1 "%ABS_FILE%"
origin = 0x0C8000
destination = 0x030000
SENDBYTE 1 "%ABS_FILE%"
origin = 0x0D8000
destination = 0x034000
SENDBYTE 1 "%ABS_FILE%"
origin = 0x0E8000
destination = 0x038000
SENDBYTE 1 "%ABS_FILE%"
origin = 0x0F8000
destination = 0x03C000
SENDBYTE 1 "%ABS_FILE%"
origin = 0x108000
destination = 0x040000
SENDBYTE 1 "%ABS_FILE%"
origin = 0x018000
destination = 0x044000
SENDBYTE 1 "%ABS_FILE%"
origin = 0x128000
destination = 0x048000
SENDBYTE 1 "%ABS_FILE%"
origin = 0x138000
destination = 0x04C000
SENDBYTE 1 "%ABS_FILE%"
origin = 0x148000
destination = 0x050000
SENDBYTE 1 "%ABS_FILE%"
origin = 0x158000
destination = 0x054000
SENDBYTE 1 "%ABS_FILE%"
origin = 0x168000
destination = 0x058000
SENDBYTE 1 "%ABS_FILE%"
origin = 0x178000
destination = 0x05C000
SENDBYTE 1 "%ABS_FILE%"
origin = 0x188000
destination = 0x060000
SENDBYTE 1 "%ABS_FILE%"
origin = 0x198000
destination = 0x064000
SENDBYTE 1 "%ABS_FILE%"
origin = 0x1A8000
destination = 0x068000
SENDBYTE 1 "%ABS_FILE%"
origin = 0x1B8000
destination = 0x06C000
SENDBYTE 1 "%ABS_FILE%"
origin = 0x1C8000
destination = 0x070000
SENDBYTE 1 "%ABS_FILE%"
origin = 0x1D8000
destination = 0x074000
SENDBYTE 1 "%ABS_FILE%"
origin = 0x1E8000
destination = 0x078000
SENDBYTE 1 "%ABS_FILE%"
origin = 0x1F8000
destination = 0x07C000
SENDBYTE 1 "%ABS_FILE%"
origin = 0x208000
destination = 0x080000
SENDBYTE 1 "%ABS_FILE%"
origin = 0x218000
destination = 0x084000
SENDBYTE 1 "%ABS_FILE%"
origin = 0x228000
destination = 0x088000
SENDBYTE 1 "%ABS_FILE%"
origin = 0x238000
destination = 0x08C000
SENDBYTE 1 "%ABS_FILE%"
origin = 0x248000
destination = 0x090000
SENDBYTE 1 "%ABS_FILE%"
origin = 0x258000
destination = 0x094000
SENDBYTE 1 "%ABS_FILE%"
origin = 0x268000
destination = 0x098000
SENDBYTE 1 "%ABS_FILE%"
origin = 0x278000
destination = 0x09C000
SENDBYTE 1 "%ABS_FILE%"
origin = 0x288000
destination = 0x0A0000
SENDBYTE 1 "%ABS_FILE%"
origin = 0x298000
destination = 0x0A4000
SENDBYTE 1 "%ABS_FILE%"
origin = 0x2A8000
destination = 0x0A8000
SENDBYTE 1 "%ABS_FILE%"
origin = 0x2B8000
destination = 0x0AC000
SENDBYTE 1 "%ABS_FILE%"
origin = 0x2C8000
destination = 0x0B0000
SENDBYTE 1 "%ABS_FILE%"
origin = 0x2D8000
destination = 0x0B4000
SENDBYTE 1 "%ABS_FILE%"
origin = 0x2E8000
destination = 0x0B8000
SENDBYTE 1 "%ABS_FILE%"
origin = 0x2F8000
destination = 0x0BC000
SENDBYTE 1 "%ABS_FILE%"
origin = 0x308000
destination = 0x0C0000
SENDBYTE 1 "%ABS_FILE%"
origin = 0x318000
destination = 0x0C4000
SENDBYTE 1 "%ABS_FILE%"
origin = 0x328000
destination = 0x0C8000
SENDBYTE 1 "%ABS_FILE%"
origin = 0x338000
destination = 0x0CC000
SENDBYTE 1 "%ABS_FILE%"
origin = 0x348000
destination = 0x0D0000
SENDBYTE 1 "%ABS_FILE%"
origin = 0x358000
destination = 0x0D4000
SENDBYTE 1 "%ABS_FILE%"
origin = 0x368000
destination = 0x0D8000
SENDBYTE 1 "%ABS_FILE%"
origin = 0x378000
destination = 0x0DC000
SENDBYTE 1 "%ABS_FILE%"
origin = 0x388000
destination = 0x0E0000
SENDBYTE 1 "%ABS_FILE%"
origin = 0x398000
destination = 0x0E4000
SENDBYTE 1 "%ABS_FILE%"
origin = 0x3A8000
destination = 0x0E8000
SENDBYTE 1 "%ABS_FILE%"
origin = 0x3B8000
destination = 0x0EC000
SENDBYTE 1 "%ABS_FILE%"
origin = 0x3C8000
destination = 0x0F0000
SENDBYTE 1 "%ABS_FILE%"
origin = 0x3D8000
destination = 0x0F4000
SENDBYTE 1 "%ABS_FILE%"
origin = 0x3E8000
destination = 0x0F8000
SENDBYTE 1 "%ABS_FILE%"
origin = 0x004000
destination = 0x0F8000
SENDBYTE 1 "%ABS_FILE%"
origin = 0x3F8000
destination = 0x0FC000
SENDBYTE 1 "%ABS_FILE%"
origin = 0x00C000
destination = 0x0FC000
SENDBYTE 1 "%ABS_FILE%"
CLOSE

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//------------------------------------------------------------------------
// Readme.txt
//------------------------------------------------------------------------
This project stationery is designed to get you up and running
quickly with CodeWarrior for MC9S12DP256B.
It is set up for the selected CPU and target connection,
but can be easily modified.
Sample code for the following language(s) is at your disposal:
- C
The wizard has prepared CodeWarrior target(s) with the connection methods of
your choice:
- Simulator:
This interface/target is prepared to use the FCS (Full Chip Simulation).
- P&E ICD12:
This enables to debug with the P&E ICD12 target interface.
The P&E ICD12 target interface allows to debug using the
BDM connector with P&E BDM Multilink or Cable12 hardware.
The BDM Multilink and Cable12 connect to the host parallel port.
Please consult your hardware documentation for additional details.
Additional connections can be chosen in the simulator/debugger,
use the menu Component > Set Target.
//------------------------------------------------------------------------
// Processor Expert
//------------------------------------------------------------------------
This project is prepared to be designed with Processor Expert.
The project has an additional 'tab' named 'Processor Expert' where you
can configure the CPU and its beans.
The CPU selected is inserted into the Processor Expert project panel, in
the Debug and Release configurations.
Change of the configuration is possible by the mouse double-click on it.
All the installed Embedded Beans are accessible in the Bean Selector
window, grouped into folders according to their function. The mouse
double-click on selected Embedded Bean in the Bean Selector window adds
the Bean to the project. The mouse double-click on the Bean icon in the
Project panel opens the Bean Inspector window, which is used to set the
Bean properties. Source code is generated after selecting the
(Code Design 'Project_name.mcp') menu command from the CodeWarrior main
window (Processor Expert > Code design 'Project_name.mcp').
Use the bean methods and events to write your code in the main module
'Project_name'.c and the event module Events.c.
For more help please read Processor Expert help:
(Processor Expert > Help > 'Topic').
The following folders are used in CodeWarrior project window for
ProcessorExpert:
- User modules: contains your sources. The main module 'Project_name'.c
and event module Events.c are located here after the Processor Expert
code generation.
- Prm: Linker parameter file used for linking. Note that the file used
for the linker is specified in the Linker Preference Panel. To open
the Preference Panel, please press <ALT-F7> or open the
(Edit > 'Current Build Target Name' Settings...) menu item in the
CodeWarrior main window menu, while the project window is opened).
After Processor Expert code generation 'Project_name'.prm file
will be placed here. You can switch off the .prm file generation in
Processor Expert if you want (in the CPU bean, Build Options)
- Generated code: this folder appears after the Processor Expert code
generation and contains generated code from Processor Expert.
- Doc: other files generated from the Processor Expert (documentation)
//------------------------------------------------------------------------
// Getting Started
//------------------------------------------------------------------------
To build/debug your project, use the menu Project > Debug or press F5.
This will open the simulator/debugger.
Press again F5 in the debugger (or menu Run > Start/Continue) to start
the application. The menu Run > Halt or F6 stops the application.
In the debugger menu Component > Open you can load additional components.
//------------------------------------------------------------------------
// Project structure
//------------------------------------------------------------------------
The project generated contains various files/folders:
- readme.txt: this file
- Sources: folder with the application source code
- Startup Code: C/C++ startup code
- Prm:
- burner.bbl file to generate S-Records
- Linker Map: the .map file generated by the linker
- Libraries: needed library files (ANSI, derivative header/implementation files)
- Debugger Project File: contains a .ini file for the debugger for each
connection
- Debugger Cmd Files: contains sub-folders for each connection with command
files
//------------------------------------------------------------------------
// Adding your own code
//------------------------------------------------------------------------
Once everything is working as expected, you can begin adding your own code
to the project. Keep in mind that we provide this as an example of how to
get up and running quickly with CodeWarrior. There are certainly other
ways to handle interrupts and set up your linker command file. Feel free
to modify any of the source files provided.
//------------------------------------------------------------------------
// Simulator/Debugger: Additional components
//------------------------------------------------------------------------
In the simulator/debugger, you can load additional components. Try the menu
Component > Open.
//------------------------------------------------------------------------
// Additional documentation
//------------------------------------------------------------------------
Check out the online documentation provided. Use in CodeWarrior IDE the
menu Help > Online Manuals.
//------------------------------------------------------------------------
// Contacting Metrowerks
//------------------------------------------------------------------------
For bug reports, technical questions, and suggestions, please use the
forms installed in the Release_Notes folder and send them to:
USA: support@metrowerks.com
EUROPE: support_europe@metrowerks.com
ASIA/PACIFIC: j-emb-sup@metrowerks.com

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/*
FreeRTOS V4.0.1 - Copyright (C) 2003-2006 Richard Barry.
This file is part of the FreeRTOS distribution.
FreeRTOS is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or
(at your option) any later version.
FreeRTOS is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with FreeRTOS; if not, write to the Free Software
Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
A special exception to the GPL can be applied should you wish to distribute
a combined work that includes FreeRTOS, without being obliged to provide
the source code for any proprietary components. See the licensing section
of http://www.FreeRTOS.org for full details of how and when the exception
can be applied.
***************************************************************************
See http://www.FreeRTOS.org for documentation, latest information, license
and contact details. Please ensure to read the configuration and relevant
port sections of the online documentation.
***************************************************************************
*/
/* BASIC INTERRUPT DRIVEN SERIAL PORT DRIVER for port 1.
Note that this driver is written to test the RTOS port and is not intended
to represent an optimised solution. */
/* Processor Expert generated includes. */
#include "com0.h"
/* Scheduler include files. */
#include "FreeRTOS.h"
#include "queue.h"
#include "task.h"
/* Demo application include files. */
#include "serial.h"
/* The queues used to communicate between the task code and the interrupt
service routines. */
static xQueueHandle xRxedChars;
static xQueueHandle xCharsForTx;
/* Interrupt identification bits. */
#define serOVERRUN_INTERRUPT ( 0x08 )
#define serRX_INTERRUPT ( 0x20 )
#define serTX_INTERRUPT ( 0x80 )
/*-----------------------------------------------------------*/
/*
* Initialise port for interrupt driven communications.
*/
xComPortHandle xSerialPortInitMinimal( unsigned portLONG ulWantedBaud, unsigned portBASE_TYPE uxQueueLength )
{
/* Hardware setup is performed by the Processor Expert generated code.
This function just creates the queues used to communicate between the
interrupt code and the task code - then sets the required baud rate. */
xRxedChars = xQueueCreate( uxQueueLength, ( unsigned portBASE_TYPE ) sizeof( signed portCHAR ) );
xCharsForTx = xQueueCreate( uxQueueLength, ( unsigned portBASE_TYPE ) sizeof( signed portCHAR ) );
COM0_SetBaudRateMode( ( portCHAR ) ulWantedBaud );
return NULL;
}
/*-----------------------------------------------------------*/
signed portBASE_TYPE xSerialGetChar( xComPortHandle pxPort, signed portCHAR *pcRxedChar, portTickType xBlockTime )
{
/* Get the next character from the buffer queue. Return false if no characters
are available, or arrive before xBlockTime expires. */
if( xQueueReceive( xRxedChars, pcRxedChar, xBlockTime ) )
{
return pdTRUE;
}
else
{
return pdFALSE;
}
}
/*-----------------------------------------------------------*/
signed portBASE_TYPE xSerialPutChar( xComPortHandle pxPort, signed portCHAR cOutChar, portTickType xBlockTime )
{
/* Place the character in the queue of characters to be transmitted. */
if( xQueueSend( xCharsForTx, &cOutChar, xBlockTime ) != pdPASS )
{
return pdFAIL;
}
/* Turn on the Tx interrupt so the ISR will remove the character from the
queue and send it. This does not need to be in a critical section as
if the interrupt has already removed the character the next interrupt
will simply turn off the Tx interrupt again. */
SCI0CR2_SCTIE = 1;;
return pdPASS;
}
/*-----------------------------------------------------------*/
void vSerialClose( xComPortHandle xPort )
{
/* Not supported. */
( void ) xPort;
}
/*-----------------------------------------------------------*/
/*
* Interrupt service routine for the serial port. Must be in non-banked
* memory.
*/
#pragma CODE_SEG __NEAR_SEG NON_BANKED
__interrupt void vCOM0_ISR( void )
{
volatile unsigned portCHAR ucByte, ucStatus;
portBASE_TYPE xTaskWokenByPost = pdFALSE, xTaskWokenByTx = pdFALSE;
/* What caused the interrupt? */
ucStatus = SCI0SR1;
if( ucStatus & serOVERRUN_INTERRUPT )
{
/* The interrupt was caused by an overrun. Clear the error by reading
the data register. */
ucByte = SCI0DRL;
}
if( ucStatus & serRX_INTERRUPT )
{
/* The interrupt was caused by a character being received.
Read the received byte. */
ucByte = SCI0DRL;
/* Post the character onto the queue of received characters - noting
whether or not this wakes a task. */
xTaskWokenByPost = xQueueSendFromISR( xRxedChars, ( void * ) &ucByte, pdFALSE );
}
if( ( ucStatus & serTX_INTERRUPT ) && ( SCI0CR2_SCTIE ) )
{
/* The interrupt was caused by a character being transmitted. */
if( xQueueReceiveFromISR( xCharsForTx, ( void * ) &ucByte, &xTaskWokenByTx ) == pdTRUE )
{
/* Clear the SCRF bit. */
SCI0DRL = ucByte;
}
else
{
/* Disable transmit interrupt */
SCI0CR2_SCTIE = 0;
}
}
if( ( xTaskWokenByPost ) || ( xTaskWokenByTx ) )
{
portYIELD();
}
}
#pragma CODE_SEG DEFAULT