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First version under SVN is V4.0.1
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132
Demo/CORTEX_LM3S102_Rowley/hw_include/pdc.c
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132
Demo/CORTEX_LM3S102_Rowley/hw_include/pdc.c
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//*****************************************************************************
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//
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// pdc.c - Driver for the Peripheral Device Controller (PDC) on the Stellaris
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// development board.
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//
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// Copyright (c) 2005,2006 Luminary Micro, Inc. All rights reserved.
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//
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// Software License Agreement
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//
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// Luminary Micro, Inc. (LMI) is supplying this software for use solely and
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// exclusively on LMI's Stellaris Family of microcontroller products.
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//
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// The software is owned by LMI and/or its suppliers, and is protected under
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// applicable copyright laws. All rights are reserved. Any use in violation
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// of the foregoing restrictions may subject the user to criminal sanctions
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// under applicable laws, as well as to civil liability for the breach of the
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// terms and conditions of this license.
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//
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// THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
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// OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
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// MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
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// LMI SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
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// CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
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//
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// This is part of revision 523 of the Stellaris Driver Library.
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//
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//*****************************************************************************
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//*****************************************************************************
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//
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//! \addtogroup utilities_api
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//! @{
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//
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//*****************************************************************************
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#include "hw_memmap.h"
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#include "hw_types.h"
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#include "gpio.h"
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#include "ssi.h"
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#include "sysctl.h"
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#include "pdc.h"
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//*****************************************************************************
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//
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//! Initializes the connection to the PDC.
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//!
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//! This function will enable clocking to the SSI and GPIO A modules, configure
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//! the GPIO pins to be used for an SSI interface, and it will configure the
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//! SSI as a 1Mb master device, operating in MOTO mode. It will also enable
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//! the SSI module, and will enable the chip select for the PDC on the
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//! Stellaris development board.
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//!
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//! This function is contained in <tt>utils/pdc.c</tt>, with
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//! <tt>utils/pdc.h</tt> containing the API definition for use by applications.
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//!
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//! \return None.
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//
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//*****************************************************************************
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void
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PDCInit(void)
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{
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//
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// Enable the peripherals used to drive the PDC.
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//
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SysCtlPeripheralEnable(SYSCTL_PERIPH_SSI);
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SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOA);
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//
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// Configure the appropriate pins to be SSI instead of GPIO.
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//
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GPIODirModeSet(GPIO_PORTA_BASE, SSI_CLK | SSI_TX | SSI_RX,
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GPIO_DIR_MODE_HW);
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GPIODirModeSet(GPIO_PORTA_BASE, SSI_CS, GPIO_DIR_MODE_OUT);
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GPIOPadConfigSet(GPIO_PORTA_BASE, SSI_CLK, GPIO_STRENGTH_4MA,
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GPIO_PIN_TYPE_STD_WPU);
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//
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// Configure the SSI port.
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//
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SSIConfig(SSI_BASE, SSI_FRF_MOTO_MODE_0, SSI_MODE_MASTER, 1000000, 8);
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SSIEnable(SSI_BASE);
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//
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// Reset the PDC SSI state machine. The chip select needs to be held low
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// for 100ns; the procedure call overhead more than accounts for this time.
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//
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GPIOPinWrite(GPIO_PORTA_BASE, PDC_CS, 0);
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GPIOPinWrite(GPIO_PORTA_BASE, PDC_CS, PDC_CS);
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}
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//*****************************************************************************
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//
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//! Write a PDC register.
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//!
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//! \param ucAddr specifies the PDC register to write.
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//! \param ucData specifies the data to write.
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//!
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//! This function will perform the SSI transfers required to write a register
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//! in the PDC on the Stellaris development board.
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//!
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//! This function is contained in <tt>utils/pdc.c</tt>, with
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//! <tt>utils/pdc.h</tt> containing the API definition for use by applications.
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//!
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//! \return None.
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//
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//*****************************************************************************
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void
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PDCWrite(unsigned char ucAddr, unsigned char ucData)
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{
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unsigned long ulTemp;
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//
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// Send address and write command.
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//
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SSIDataPut(SSI_BASE, (ucAddr & 0x0F) | PDC_WR);
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//
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// Write the data.
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//
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SSIDataPut(SSI_BASE, ucData);
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//
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// Flush data read during address write.
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//
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SSIDataGet(SSI_BASE, &ulTemp);
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//
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// Flush data read during data write.
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//
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SSIDataGet(SSI_BASE, &ulTemp);
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}
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