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First version under SVN is V4.0.1
This commit is contained in:
Richard Barry
parent
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918 changed files with 269038 additions and 0 deletions
228
Demo/ARM7_AT91FR40008_GCC/serial/serial.c
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228
Demo/ARM7_AT91FR40008_GCC/serial/serial.c
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/*
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FreeRTOS V4.0.1 - Copyright (C) 2003-2006 Richard Barry.
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This file is part of the FreeRTOS distribution.
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FreeRTOS is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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FreeRTOS is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with FreeRTOS; if not, write to the Free Software
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Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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A special exception to the GPL can be applied should you wish to distribute
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a combined work that includes FreeRTOS, without being obliged to provide
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the source code for any proprietary components. See the licensing section
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of http://www.FreeRTOS.org for full details of how and when the exception
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can be applied.
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***************************************************************************
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See http://www.FreeRTOS.org for documentation, latest information, license
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and contact details. Please ensure to read the configuration and relevant
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port sections of the online documentation.
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***************************************************************************
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*/
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/*
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BASIC INTERRUPT DRIVEN SERIAL PORT DRIVER FOR USART0.
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This file contains all the serial port components that can be compiled to
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either ARM or THUMB mode. Components that must be compiled to ARM mode are
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contained in serialISR.c.
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*/
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/* Standard includes. */
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#include <stdlib.h>
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/* Scheduler includes. */
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#include "FreeRTOS.h"
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#include "queue.h"
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#include "task.h"
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/* Demo application includes. */
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#include "serial.h"
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#include "AT91R40008.h"
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#include "usart.h"
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#include "pio.h"
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#include "aic.h"
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/*-----------------------------------------------------------*/
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/* Constants to setup and access the UART. */
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#define portUSART0_AIC_CHANNEL ( ( unsigned portLONG ) 2 )
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#define serINVALID_QUEUE ( ( xQueueHandle ) 0 )
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#define serHANDLE ( ( xComPortHandle ) 1 )
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#define serNO_BLOCK ( ( portTickType ) 0 )
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/*-----------------------------------------------------------*/
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/* Queues used to hold received characters, and characters waiting to be
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transmitted. */
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static xQueueHandle xRxedChars;
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static xQueueHandle xCharsForTx;
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/*-----------------------------------------------------------*/
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/*
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* The queues are created in serialISR.c as they are used from the ISR.
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* Obtain references to the queues and THRE Empty flag.
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*/
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extern void vSerialISRCreateQueues( unsigned portBASE_TYPE uxQueueLength, xQueueHandle *pxRxedChars, xQueueHandle *pxCharsForTx );
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/*-----------------------------------------------------------*/
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xComPortHandle xSerialPortInitMinimal( unsigned portLONG ulWantedBaud, unsigned portBASE_TYPE uxQueueLength )
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{
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unsigned portLONG ulSpeed;
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unsigned portLONG ulCD;
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xComPortHandle xReturn = serHANDLE;
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extern void ( vUART_ISR )( void );
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/* The queues are used in the serial ISR routine, so are created from
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serialISR.c (which is always compiled to ARM mode. */
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vSerialISRCreateQueues( uxQueueLength, &xRxedChars, &xCharsForTx );
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if(
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( xRxedChars != serINVALID_QUEUE ) &&
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( xCharsForTx != serINVALID_QUEUE ) &&
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( ulWantedBaud != ( unsigned portLONG ) 0 )
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)
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{
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portENTER_CRITICAL();
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{
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/* Enable clock to USART0... */
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AT91C_BASE_PS->PS_PCER = AT91C_PS_US0;
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/* Disable all USART0 interrupt sources to begin... */
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AT91C_BASE_US0->US_IDR = 0xFFFFFFFF;
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/* Reset various status bits (just in case)... */
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AT91C_BASE_US0->US_CR = US_RSTSTA;
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AT91C_BASE_PIO->PIO_PDR = TXD0 | RXD0; /* Enable RXD and TXD pins */
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AT91C_BASE_US0->US_CR = US_RSTRX | US_RSTTX | US_RXDIS | US_TXDIS;
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/* Clear Transmit and Receive Counters */
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AT91C_BASE_US0->US_RCR = 0;
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AT91C_BASE_US0->US_TCR = 0;
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/* Input clock to baud rate generator is MCK */
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ulSpeed = configCPU_CLOCK_HZ * 10;
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ulSpeed = ulSpeed / 16;
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ulSpeed = ulSpeed / ulWantedBaud;
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/* compute the error */
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ulCD = ulSpeed / 10;
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if ((ulSpeed - (ulCD * 10)) >= 5)
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ulCD++;
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/* Define the baud rate divisor register */
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AT91C_BASE_US0->US_BRGR = ulCD;
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/* Define the USART mode */
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AT91C_BASE_US0->US_MR = US_CLKS_MCK | US_CHRL_8 | US_PAR_NO | US_NBSTOP_1 | US_CHMODE_NORMAL;
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/* Write the Timeguard Register */
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AT91C_BASE_US0->US_TTGR = 0;
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/* Setup the interrupt for USART0.
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Store interrupt handler function address in USART0 vector register... */
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AT91C_BASE_AIC->AIC_SVR[ portUSART0_AIC_CHANNEL ] = (unsigned long)vUART_ISR;
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/* USART0 interrupt level-sensitive, priority 1... */
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AT91C_BASE_AIC->AIC_SMR[ portUSART0_AIC_CHANNEL ] = AIC_SRCTYPE_INT_LEVEL_SENSITIVE | 1;
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/* Clear some pending USART0 interrupts (just in case)... */
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AT91C_BASE_US0->US_CR = US_RSTSTA;
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/* Enable USART0 interrupt sources (but not Tx for now)... */
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AT91C_BASE_US0->US_IER = US_RXRDY;
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/* Enable USART0 interrupts in the AIC... */
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AT91C_BASE_AIC->AIC_IECR = ( 1 << portUSART0_AIC_CHANNEL );
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/* Enable receiver and transmitter... */
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AT91C_BASE_US0->US_CR = US_RXEN | US_TXEN;
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}
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portEXIT_CRITICAL();
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}
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else
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{
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xReturn = ( xComPortHandle ) 0;
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}
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return xReturn;
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}
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/*-----------------------------------------------------------*/
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signed portBASE_TYPE xSerialGetChar( xComPortHandle pxPort, signed portCHAR *pcRxedChar, portTickType xBlockTime )
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{
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/* The port handle is not required as this driver only supports UART0. */
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( void ) pxPort;
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/* Get the next character from the buffer. Return false if no characters
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are available, or arrive before xBlockTime expires. */
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if( xQueueReceive( xRxedChars, pcRxedChar, xBlockTime ) )
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{
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return pdTRUE;
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}
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else
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{
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return pdFALSE;
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}
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}
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/*-----------------------------------------------------------*/
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void vSerialPutString( xComPortHandle pxPort, const signed portCHAR * const pcString, unsigned portSHORT usStringLength )
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{
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signed portCHAR *pxNext;
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/* NOTE: This implementation does not handle the queue being full as no
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block time is used! */
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/* The port handle is not required as this driver only supports UART0. */
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( void ) pxPort;
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/* Send each character in the string, one at a time. */
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pxNext = ( signed portCHAR * ) pcString;
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while( *pxNext )
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{
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xSerialPutChar( pxPort, *pxNext, serNO_BLOCK );
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pxNext++;
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}
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}
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/*-----------------------------------------------------------*/
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signed portBASE_TYPE xSerialPutChar( xComPortHandle pxPort, signed portCHAR cOutChar, portTickType xBlockTime )
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{
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/* Place the character in the queue of characters to be transmitted. */
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if( xQueueSend( xCharsForTx, &cOutChar, xBlockTime ) != pdPASS )
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{
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return pdFAIL;
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}
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/* Turn on the Tx interrupt so the ISR will remove the character from the
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queue and send it. This does not need to be in a critical section as
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if the interrupt has already removed the character the next interrupt
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will simply turn off the Tx interrupt again. */
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AT91C_BASE_US0->US_IER = US_TXRDY;
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return pdPASS;
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}
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/*-----------------------------------------------------------*/
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void vSerialClose( xComPortHandle xPort )
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{
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/* Not supported as not required by the demo application. */
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}
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/*-----------------------------------------------------------*/
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144
Demo/ARM7_AT91FR40008_GCC/serial/serialISR.c
Normal file
144
Demo/ARM7_AT91FR40008_GCC/serial/serialISR.c
Normal file
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@ -0,0 +1,144 @@
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/*
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FreeRTOS V4.0.1 - Copyright (C) 2003-2006 Richard Barry.
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This file is part of the FreeRTOS distribution.
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FreeRTOS is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
|
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the Free Software Foundation; either version 2 of the License, or
|
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(at your option) any later version.
|
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|
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FreeRTOS is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
|
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
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GNU General Public License for more details.
|
||||
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You should have received a copy of the GNU General Public License
|
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along with FreeRTOS; if not, write to the Free Software
|
||||
Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
|
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|
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A special exception to the GPL can be applied should you wish to distribute
|
||||
a combined work that includes FreeRTOS, without being obliged to provide
|
||||
the source code for any proprietary components. See the licensing section
|
||||
of http://www.FreeRTOS.org for full details of how and when the exception
|
||||
can be applied.
|
||||
|
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***************************************************************************
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See http://www.FreeRTOS.org for documentation, latest information, license
|
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and contact details. Please ensure to read the configuration and relevant
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||||
port sections of the online documentation.
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***************************************************************************
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*/
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/*
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BASIC INTERRUPT DRIVEN SERIAL PORT DRIVER FOR USART0.
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This file contains all the serial port components that must be compiled
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to ARM mode. The components that can be compiled to either ARM or THUMB
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mode are contained in serial.c.
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*/
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/* Standard includes. */
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#include <stdlib.h>
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/* Scheduler includes. */
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#include "FreeRTOS.h"
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#include "queue.h"
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#include "task.h"
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/* Demo application includes. */
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#include "serial.h"
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#include "AT91R40008.h"
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#include "usart.h"
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/*-----------------------------------------------------------*/
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/* Constant to access the AIC. */
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#define serCLEAR_AIC_INTERRUPT ( ( unsigned portLONG ) 0 )
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/* Constants to determine the ISR source. */
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#define serSOURCE_THRE ( ( unsigned portCHAR ) 0x02 )
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#define serSOURCE_RX_TIMEOUT ( ( unsigned portCHAR ) 0x0c )
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#define serSOURCE_ERROR ( ( unsigned portCHAR ) 0x06 )
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#define serSOURCE_RX ( ( unsigned portCHAR ) 0x04 )
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#define serINTERRUPT_SOURCE_MASK ( ( unsigned portLONG ) (US_RXRDY | US_TXRDY | US_RXBRK | US_OVRE | US_FRAME | US_PARE) )
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/* Queues used to hold received characters, and characters waiting to be
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transmitted. */
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static xQueueHandle xRxedChars;
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static xQueueHandle xCharsForTx;
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/*-----------------------------------------------------------*/
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/* UART0 interrupt service routine. This can cause a context switch so MUST
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be declared "naked". */
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void vUART_ISR( void ) __attribute__ ((naked));
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/*-----------------------------------------------------------*/
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void vSerialISRCreateQueues( unsigned portBASE_TYPE uxQueueLength, xQueueHandle *pxRxedChars, xQueueHandle *pxCharsForTx )
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{
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/* Create the queues used to hold Rx and Tx characters. */
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xRxedChars = xQueueCreate( uxQueueLength, ( unsigned portBASE_TYPE ) sizeof( signed portCHAR ) );
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xCharsForTx = xQueueCreate( uxQueueLength + 1, ( unsigned portBASE_TYPE ) sizeof( signed portCHAR ) );
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/* Pass back a reference to the queues so the serial API file can
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post/receive characters. */
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*pxRxedChars = xRxedChars;
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*pxCharsForTx = xCharsForTx;
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}
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/*-----------------------------------------------------------*/
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void vUART_ISR( void )
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{
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/* This ISR can cause a context switch, so the first statement must be a
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call to the portENTER_SWITCHING_ISR() macro. This must be BEFORE any
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variable declarations. */
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portENTER_SWITCHING_ISR();
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/* Now we can declare the local variables. */
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signed portCHAR cChar;
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portBASE_TYPE xTaskWokenByTx = pdFALSE, xTaskWokenByRx = pdFALSE;
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unsigned portLONG ulStatus;
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/* What caused the interrupt? */
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ulStatus = AT91C_BASE_US0->US_CSR & AT91C_BASE_US0->US_IMR;
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if (ulStatus & US_TXRDY)
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{
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/* The interrupt was caused by the THR becoming empty. Are there any
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more characters to transmit? */
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if( xQueueReceiveFromISR( xCharsForTx, &cChar, &xTaskWokenByTx ) == pdTRUE )
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{
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/* A character was retrieved from the queue so can be sent to the
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THR now. */
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AT91C_BASE_US0->US_THR = cChar;
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}
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else
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{
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/* Queue empty, nothing to send so turn off the Tx interrupt. */
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AT91C_BASE_US0->US_IDR = US_TXRDY;
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}
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}
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if (ulStatus & US_RXRDY)
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{
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/* The interrupt was caused by the receiver getting data. */
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cChar = AT91C_BASE_US0->US_RHR;
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if (xQueueSendFromISR(xRxedChars, &cChar, pdFALSE))
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{
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xTaskWokenByRx = pdTRUE;
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}
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}
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// Acknowledge the interrupt at AIC level...
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AT91C_BASE_AIC->AIC_EOICR = serCLEAR_AIC_INTERRUPT;
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/* Exit the ISR. If a task was woken by either a character being received
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or transmitted then a context switch will occur. */
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portEXIT_SWITCHING_ISR( ( xTaskWokenByTx || xTaskWokenByRx ) );
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}
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/*-----------------------------------------------------------*/
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