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Cleanup license text in Xtensa XCC and Xtensa ESP32 GCC ports.

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Add SPXD license identifiers.
This commit is contained in:
Paul Bartell 2021-05-26 19:47:29 -07:00 committed by Paul Bartell
parent 1041b63586
commit b5e9896ad7
37 changed files with 964 additions and 783 deletions
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49
portable/ThirdParty/GCC/Xtensa_ESP32/include/portbenchmark.h vendored
View file

@ -1,25 +1,30 @@
/******************************************************************************* /*
* // Copyright (c) 2003-2015 Cadence Design Systems, Inc. * FreeRTOS Kernel <DEVELOPMENT BRANCH>
* // * Copyright (C) 2003-2015 Cadence Design Systems, Inc.
* // Permission is hereby granted, free of charge, to any person obtaining * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
* // a copy of this software and associated documentation files (the *
* // "Software"), to deal in the Software without restriction, including * SPDX-License-Identifier: MIT
* // without limitation the rights to use, copy, modify, merge, publish, *
* // distribute, sublicense, and/or sell copies of the Software, and to * Permission is hereby granted, free of charge, to any person obtaining a copy of
* // permit persons to whom the Software is furnished to do so, subject to * this software and associated documentation files (the "Software"), to deal in
* // the following conditions: * the Software without restriction, including without limitation the rights to
* // * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
* // The above copyright notice and this permission notice shall be included * the Software, and to permit persons to whom the Software is furnished to do so,
* // in all copies or substantial portions of the Software. * subject to the following conditions:
* // *
* // THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, * The above copyright notice and this permission notice shall be included in all
* // EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF * copies or substantial portions of the Software.
* // MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. *
* // IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* // CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
* // TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
* // SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
* -------------------------------------------------------------------------------- * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*
* https://www.FreeRTOS.org
* https://github.com/FreeRTOS
*
*/ */
/* /*

26
portable/ThirdParty/GCC/Xtensa_ESP32/include/portmacro.h vendored
View file

@ -2,6 +2,8 @@
* FreeRTOS V8.2.0 - Copyright (C) 2015 Real Time Engineers Ltd. * FreeRTOS V8.2.0 - Copyright (C) 2015 Real Time Engineers Ltd.
* All rights reserved * All rights reserved
* *
* SPDX-License-Identifier: GPL-2.0 WITH freertos-exception-2.0
*
* VISIT https://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION. * VISIT https://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
* *
*************************************************************************** ***************************************************************************
@ -353,11 +355,11 @@
uint32_t compare, uint32_t compare,
uint32_t * set ); uint32_t * set );
#else #else
static inline void uxPortCompareSetExtram(volatile uint32_t *addr, uint32_t compare, uint32_t *set) static inline void uxPortCompareSetExtram(volatile uint32_t *addr, uint32_t compare, uint32_t *set)
{ {
#if defined(CONFIG_ESP32_SPIRAM_SUPPORT) #if defined(CONFIG_ESP32_SPIRAM_SUPPORT)
compare_and_set_extram(addr, compare, set); compare_and_set_extram(addr, compare, set);
#endif #endif
} }
#endif #endif
@ -437,30 +439,30 @@
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
#if (ESP_IDF_VERSION >= ESP_IDF_VERSION_VAL(4, 2, 0)) #if (ESP_IDF_VERSION >= ESP_IDF_VERSION_VAL(4, 2, 0))
/* Architecture specific optimisations. */ /* Architecture specific optimisations. */
#if configUSE_PORT_OPTIMISED_TASK_SELECTION == 1 #if configUSE_PORT_OPTIMISED_TASK_SELECTION == 1
/* Check the configuration. */ /* Check the configuration. */
#if( configMAX_PRIORITIES > 32 ) #if( configMAX_PRIORITIES > 32 )
#error configUSE_PORT_OPTIMISED_TASK_SELECTION can only be set to 1 when configMAX_PRIORITIES is less than or equal to 32. It is very rare that a system requires more than 10 to 15 different priorities as tasks that share a priority will time slice. #error configUSE_PORT_OPTIMISED_TASK_SELECTION can only be set to 1 when configMAX_PRIORITIES is less than or equal to 32. It is very rare that a system requires more than 10 to 15 different priorities as tasks that share a priority will time slice.
#endif #endif
/* Store/clear the ready priorities in a bit map. */ /* Store/clear the ready priorities in a bit map. */
#define portRECORD_READY_PRIORITY( uxPriority, uxReadyPriorities ) ( uxReadyPriorities ) |= ( 1UL << ( uxPriority ) ) #define portRECORD_READY_PRIORITY( uxPriority, uxReadyPriorities ) ( uxReadyPriorities ) |= ( 1UL << ( uxPriority ) )
#define portRESET_READY_PRIORITY( uxPriority, uxReadyPriorities ) ( uxReadyPriorities ) &= ~( 1UL << ( uxPriority ) ) #define portRESET_READY_PRIORITY( uxPriority, uxReadyPriorities ) ( uxReadyPriorities ) &= ~( 1UL << ( uxPriority ) )
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
#define portGET_HIGHEST_PRIORITY( uxTopPriority, uxReadyPriorities ) uxTopPriority = ( 31 - __builtin_clz( ( uxReadyPriorities ) ) ) #define portGET_HIGHEST_PRIORITY( uxTopPriority, uxReadyPriorities ) uxTopPriority = ( 31 - __builtin_clz( ( uxReadyPriorities ) ) )
#endif /* configUSE_PORT_OPTIMISED_TASK_SELECTION */ #endif /* configUSE_PORT_OPTIMISED_TASK_SELECTION */
#endif /* ESP_IDF_VERSION >= ESP_IDF_VERSION_VAL(4, 2, 0) */ #endif /* ESP_IDF_VERSION >= ESP_IDF_VERSION_VAL(4, 2, 0) */
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
void _xt_coproc_release( volatile void * coproc_sa_base ); void _xt_coproc_release( volatile void * coproc_sa_base );

4
portable/ThirdParty/GCC/Xtensa_ESP32/include/xt_asm_utils.h vendored
View file

@ -19,7 +19,7 @@
* limitations under the License. * limitations under the License.
*/ */
/* File adapted to use on IDF FreeRTOS component, extracted /* File adapted to use on IDF FreeRTOS component, extracted
* originally from zephyr RTOS code base: * originally from zephyr RTOS code base:
* https://github.com/zephyrproject-rtos/zephyr/blob/dafd348/arch/xtensa/include/xtensa-asm2-s.h * https://github.com/zephyrproject-rtos/zephyr/blob/dafd348/arch/xtensa/include/xtensa-asm2-s.h
*/ */
@ -58,7 +58,7 @@
* just a little bit, it's MUCH faster. With a mostly full register * just a little bit, it's MUCH faster. With a mostly full register
* file on an LX6 core (ESP-32) I'm measuring 145 cycles to spill * file on an LX6 core (ESP-32) I'm measuring 145 cycles to spill
* registers with this vs. 279 (!) to do it with * registers with this vs. 279 (!) to do it with
* xthal_spill_windows(). * xthal_spill_windows().
*/ */
.macro SPILL_ALL_WINDOWS .macro SPILL_ALL_WINDOWS

44
portable/ThirdParty/GCC/Xtensa_ESP32/include/xtensa_api.h vendored
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@ -1,25 +1,31 @@
/******************************************************************************* /*
* Copyright (c) 2006-2015 Cadence Design Systems Inc. * FreeRTOS Kernel <DEVELOPMENT BRANCH>
* Copyright (C) 2006-2015 Cadence Design Systems, Inc.
* Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
* *
* Permission is hereby granted, free of charge, to any person obtaining * SPDX-License-Identifier: MIT
* a copy of this software and associated documentation files (the
* "Software"), to deal in the Software without restriction, including
* without limitation the rights to use, copy, modify, merge, publish,
* distribute, sublicense, and/or sell copies of the Software, and to
* permit persons to whom the Software is furnished to do so, subject to
* the following conditions:
* *
* The above copyright notice and this permission notice shall be included * Permission is hereby granted, free of charge, to any person obtaining a copy of
* in all copies or substantial portions of the Software. * this software and associated documentation files (the "Software"), to deal in
* the Software without restriction, including without limitation the rights to
* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
* the Software, and to permit persons to whom the Software is furnished to do so,
* subject to the following conditions:
* *
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, * The above copyright notice and this permission notice shall be included in all
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF * copies or substantial portions of the Software.
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. *
* IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
* TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
* SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
******************************************************************************/ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*
* https://www.FreeRTOS.org
* https://github.com/FreeRTOS
*
*/
/****************************************************************************** /******************************************************************************
* Xtensa-specific API for RTOS ports. * Xtensa-specific API for RTOS ports.

50
portable/ThirdParty/GCC/Xtensa_ESP32/include/xtensa_config.h vendored
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@ -1,25 +1,33 @@
/*
* FreeRTOS Kernel <DEVELOPMENT BRANCH>
* Copyright (C) 2003-2015 Cadence Design Systems, Inc.
* Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* SPDX-License-Identifier: MIT
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
* this software and associated documentation files (the "Software"), to deal in
* the Software without restriction, including without limitation the rights to
* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
* the Software, and to permit persons to whom the Software is furnished to do so,
* subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in all
* copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*
* https://www.FreeRTOS.org
* https://github.com/FreeRTOS
*
*/
/******************************************************************************* /*******************************************************************************
* // Copyright (c) 2003-2015 Cadence Design Systems, Inc.
* //
* // Permission is hereby granted, free of charge, to any person obtaining
* // a copy of this software and associated documentation files (the
* // "Software"), to deal in the Software without restriction, including
* // without limitation the rights to use, copy, modify, merge, publish,
* // distribute, sublicense, and/or sell copies of the Software, and to
* // permit persons to whom the Software is furnished to do so, subject to
* // the following conditions:
* //
* // The above copyright notice and this permission notice shall be included
* // in all copies or substantial portions of the Software.
* //
* // THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* // EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
* // MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
* // IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
* // CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
* // TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
* // SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
* --------------------------------------------------------------------------------
* *
* Configuration-specific information for Xtensa build. This file must be * Configuration-specific information for Xtensa build. This file must be
* included in FreeRTOSConfig.h to properly set up the config-dependent * included in FreeRTOSConfig.h to properly set up the config-dependent

80
portable/ThirdParty/GCC/Xtensa_ESP32/include/xtensa_context.h vendored
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@ -1,25 +1,33 @@
/*
* FreeRTOS Kernel <DEVELOPMENT BRANCH>
* Copyright (C) 2006-2015 Cadence Design Systems, Inc.
* Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* SPDX-License-Identifier: MIT
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
* this software and associated documentation files (the "Software"), to deal in
* the Software without restriction, including without limitation the rights to
* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
* the Software, and to permit persons to whom the Software is furnished to do so,
* subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in all
* copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*
* https://www.FreeRTOS.org
* https://github.com/FreeRTOS
*
*/
/******************************************************************************* /*******************************************************************************
Copyright (c) 2006-2015 Cadence Design Systems Inc.
Permission is hereby granted, free of charge, to any person obtaining
a copy of this software and associated documentation files (the
"Software"), to deal in the Software without restriction, including
without limitation the rights to use, copy, modify, merge, publish,
distribute, sublicense, and/or sell copies of the Software, and to
permit persons to whom the Software is furnished to do so, subject to
the following conditions:
The above copyright notice and this permission notice shall be included
in all copies or substantial portions of the Software.
THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
--------------------------------------------------------------------------------
XTENSA CONTEXT FRAMES AND MACROS FOR RTOS ASSEMBLER SOURCES XTENSA CONTEXT FRAMES AND MACROS FOR RTOS ASSEMBLER SOURCES
@ -87,16 +95,16 @@ NOTE: The Xtensa architecture requires stack pointer alignment to 16 bytes.
INTERRUPT/EXCEPTION STACK FRAME FOR A THREAD OR NESTED INTERRUPT INTERRUPT/EXCEPTION STACK FRAME FOR A THREAD OR NESTED INTERRUPT
A stack frame of this structure is allocated for any interrupt or exception. A stack frame of this structure is allocated for any interrupt or exception.
It goes on the current stack. If the RTOS has a system stack for handling It goes on the current stack. If the RTOS has a system stack for handling
interrupts, every thread stack must allow space for just one interrupt stack interrupts, every thread stack must allow space for just one interrupt stack
frame, then nested interrupt stack frames go on the system stack. frame, then nested interrupt stack frames go on the system stack.
The frame includes basic registers (explicit) and "extra" registers introduced The frame includes basic registers (explicit) and "extra" registers introduced
by user TIE or the use of the MAC16 option in the user's Xtensa config. by user TIE or the use of the MAC16 option in the user's Xtensa config.
The frame size is minimized by omitting regs not applicable to user's config. The frame size is minimized by omitting regs not applicable to user's config.
For Windowed ABI, this stack frame includes the interruptee's base save area, For Windowed ABI, this stack frame includes the interruptee's base save area,
another base save area to manage gcc nested functions, and a little temporary another base save area to manage gcc nested functions, and a little temporary
space to help manage the spilling of the register windows. space to help manage the spilling of the register windows.
------------------------------------------------------------------------------- -------------------------------------------------------------------------------
*/ */
@ -164,7 +172,7 @@ STRUCT_END(XtExcFrame)
#else #else
#define XT_STK_NEXT2 XT_STK_NEXT1 #define XT_STK_NEXT2 XT_STK_NEXT1
#endif #endif
@ -181,12 +189,12 @@ STRUCT_END(XtExcFrame)
------------------------------------------------------------------------------- -------------------------------------------------------------------------------
SOLICITED STACK FRAME FOR A THREAD SOLICITED STACK FRAME FOR A THREAD
A stack frame of this structure is allocated whenever a thread enters the A stack frame of this structure is allocated whenever a thread enters the
RTOS kernel intentionally (and synchronously) to submit to thread scheduling. RTOS kernel intentionally (and synchronously) to submit to thread scheduling.
It goes on the current thread's stack. It goes on the current thread's stack.
The solicited frame only includes registers that are required to be preserved The solicited frame only includes registers that are required to be preserved
by the callee according to the compiler's ABI conventions, some space to save by the callee according to the compiler's ABI conventions, some space to save
the return address for returning to the caller, and the caller's PS register. the return address for returning to the caller, and the caller's PS register.
For Windowed ABI, this stack frame includes the caller's base save area. For Windowed ABI, this stack frame includes the caller's base save area.
@ -194,7 +202,7 @@ STRUCT_END(XtExcFrame)
Note on XT_SOL_EXIT field: Note on XT_SOL_EXIT field:
It is necessary to distinguish a solicited from an interrupt stack frame. It is necessary to distinguish a solicited from an interrupt stack frame.
This field corresponds to XT_STK_EXIT in the interrupt stack frame and is This field corresponds to XT_STK_EXIT in the interrupt stack frame and is
always at the same offset (0). It can be written with a code (usually 0) always at the same offset (0). It can be written with a code (usually 0)
to distinguish a solicted frame from an interrupt frame. An RTOS port may to distinguish a solicted frame from an interrupt frame. An RTOS port may
opt to ignore this field if it has another way of distinguishing frames. opt to ignore this field if it has another way of distinguishing frames.
------------------------------------------------------------------------------- -------------------------------------------------------------------------------
@ -239,7 +247,7 @@ STRUCT_END(XtSolFrame)
and the context switch of that co-processor is then peformed by the handler. and the context switch of that co-processor is then peformed by the handler.
Ownership represents which thread's state is currently in the co-processor. Ownership represents which thread's state is currently in the co-processor.
Co-processors may not be used by interrupt or exception handlers. If an Co-processors may not be used by interrupt or exception handlers. If an
co-processor instruction is executed by an interrupt or exception handler, co-processor instruction is executed by an interrupt or exception handler,
the co-processor exception handler will trigger a kernel panic and freeze. the co-processor exception handler will trigger a kernel panic and freeze.
This restriction is introduced to reduce the overhead of saving and restoring This restriction is introduced to reduce the overhead of saving and restoring
@ -250,7 +258,7 @@ STRUCT_END(XtSolFrame)
such as in the thread control block or above the thread stack area. It need such as in the thread control block or above the thread stack area. It need
not be in the interrupt stack frame since interrupts don't use co-processors. not be in the interrupt stack frame since interrupts don't use co-processors.
Along with the save area for each co-processor, two bitmasks with flags per Along with the save area for each co-processor, two bitmasks with flags per
co-processor (laid out as in the CPENABLE reg) help manage context-switching co-processor (laid out as in the CPENABLE reg) help manage context-switching
co-processors as efficiently as possible: co-processors as efficiently as possible:
@ -266,10 +274,10 @@ STRUCT_END(XtSolFrame)
XT_CPSTORED XT_CPSTORED
A bitmask with the same layout as CPENABLE, a bit per co-processor. A bitmask with the same layout as CPENABLE, a bit per co-processor.
Indicates whether the state of each co-processor is saved in the state Indicates whether the state of each co-processor is saved in the state
save area. When a thread enters the kernel, only the state of co-procs save area. When a thread enters the kernel, only the state of co-procs
still enabled in CPENABLE is saved. When the co-processor exception still enabled in CPENABLE is saved. When the co-processor exception
handler assigns ownership of a co-processor to a thread, it restores handler assigns ownership of a co-processor to a thread, it restores
the saved state only if this bit is set, and clears this bit. the saved state only if this bit is set, and clears this bit.
XT_CP_CS_ST XT_CP_CS_ST
@ -352,7 +360,7 @@ STRUCT_END(XtSolFrame)
For framed functions the frame is created and the return address saved at For framed functions the frame is created and the return address saved at
base of frame (Call0 ABI) or as determined by hardware (Windowed ABI). base of frame (Call0 ABI) or as determined by hardware (Windowed ABI).
For frameless functions, there is no frame and return address remains in a0. For frameless functions, there is no frame and return address remains in a0.
Note: Because CPP macros expand to a single line, macros requiring multi-line Note: Because CPP macros expand to a single line, macros requiring multi-line
expansions are implemented as assembler macros. expansions are implemented as assembler macros.
------------------------------------------------------------------------------- -------------------------------------------------------------------------------
*/ */
@ -365,7 +373,7 @@ STRUCT_END(XtSolFrame)
addi sp, sp, -\size addi sp, sp, -\size
s32i a0, sp, 0 s32i a0, sp, 0
.endm .endm
#define ENTRY0 #define ENTRY0
#define RET(sz) ret1 sz #define RET(sz) ret1 sz
.macro ret1 size=0x10 .macro ret1 size=0x10
l32i a0, sp, 0 l32i a0, sp, 0

50
portable/ThirdParty/GCC/Xtensa_ESP32/include/xtensa_rtos.h vendored
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@ -1,25 +1,33 @@
/*
* FreeRTOS Kernel <DEVELOPMENT BRANCH>
* Copyright (C) 2003-2015 Cadence Design Systems, Inc.
* Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* SPDX-License-Identifier: MIT
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
* this software and associated documentation files (the "Software"), to deal in
* the Software without restriction, including without limitation the rights to
* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
* the Software, and to permit persons to whom the Software is furnished to do so,
* subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in all
* copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*
* https://www.FreeRTOS.org
* https://github.com/FreeRTOS
*
*/
/******************************************************************************* /*******************************************************************************
* // Copyright (c) 2003-2015 Cadence Design Systems, Inc.
* //
* // Permission is hereby granted, free of charge, to any person obtaining
* // a copy of this software and associated documentation files (the
* // "Software"), to deal in the Software without restriction, including
* // without limitation the rights to use, copy, modify, merge, publish,
* // distribute, sublicense, and/or sell copies of the Software, and to
* // permit persons to whom the Software is furnished to do so, subject to
* // the following conditions:
* //
* // The above copyright notice and this permission notice shall be included
* // in all copies or substantial portions of the Software.
* //
* // THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* // EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
* // MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
* // IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
* // CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
* // TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
* // SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
* --------------------------------------------------------------------------------
* *
* RTOS-SPECIFIC INFORMATION FOR XTENSA RTOS ASSEMBLER SOURCES * RTOS-SPECIFIC INFORMATION FOR XTENSA RTOS ASSEMBLER SOURCES
* (FreeRTOS Port) * (FreeRTOS Port)

50
portable/ThirdParty/GCC/Xtensa_ESP32/include/xtensa_timer.h vendored
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@ -1,25 +1,33 @@
/*
* FreeRTOS Kernel <DEVELOPMENT BRANCH>
* Copyright (C) 2003-2015 Cadence Design Systems, Inc.
* Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* SPDX-License-Identifier: MIT
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
* this software and associated documentation files (the "Software"), to deal in
* the Software without restriction, including without limitation the rights to
* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
* the Software, and to permit persons to whom the Software is furnished to do so,
* subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in all
* copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*
* https://www.FreeRTOS.org
* https://github.com/FreeRTOS
*
*/
/******************************************************************************* /*******************************************************************************
* // Copyright (c) 2003-2015 Cadence Design Systems, Inc.
* //
* // Permission is hereby granted, free of charge, to any person obtaining
* // a copy of this software and associated documentation files (the
* // "Software"), to deal in the Software without restriction, including
* // without limitation the rights to use, copy, modify, merge, publish,
* // distribute, sublicense, and/or sell copies of the Software, and to
* // permit persons to whom the Software is furnished to do so, subject to
* // the following conditions:
* //
* // The above copyright notice and this permission notice shall be included
* // in all copies or substantial portions of the Software.
* //
* // THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* // EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
* // MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
* // IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
* // CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
* // TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
* // SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
* --------------------------------------------------------------------------------
* *
* XTENSA INFORMATION FOR RTOS TICK TIMER AND CLOCK FREQUENCY * XTENSA INFORMATION FOR RTOS TICK TIMER AND CLOCK FREQUENCY
* *

2
portable/ThirdParty/GCC/Xtensa_ESP32/port.c vendored
View file

@ -2,6 +2,8 @@
* FreeRTOS V8.2.0 - Copyright (C) 2015 Real Time Engineers Ltd. * FreeRTOS V8.2.0 - Copyright (C) 2015 Real Time Engineers Ltd.
* All rights reserved * All rights reserved
* *
* SPDX-License-Identifier: MIT AND (GPL-2.0 WITH freertos-exception-2.0)
*
* VISIT https://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION. * VISIT https://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
* *
* This file is part of the FreeRTOS distribution. * This file is part of the FreeRTOS distribution.

56
portable/ThirdParty/GCC/Xtensa_ESP32/portasm.S vendored
View file

@ -1,27 +1,31 @@
/* /*
//----------------------------------------------------------------------------- * FreeRTOS Kernel <DEVELOPMENT BRANCH>
// Copyright (c) 2003-2015 Cadence Design Systems, Inc. * Copyright (C) 2003-2015 Cadence Design Systems, Inc.
// * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
// Permission is hereby granted, free of charge, to any person obtaining *
// a copy of this software and associated documentation files (the * SPDX-License-Identifier: MIT
// "Software"), to deal in the Software without restriction, including *
// without limitation the rights to use, copy, modify, merge, publish, * Permission is hereby granted, free of charge, to any person obtaining a copy of
// distribute, sublicense, and/or sell copies of the Software, and to * this software and associated documentation files (the "Software"), to deal in
// permit persons to whom the Software is furnished to do so, subject to * the Software without restriction, including without limitation the rights to
// the following conditions: * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
// * the Software, and to permit persons to whom the Software is furnished to do so,
// The above copyright notice and this permission notice shall be included * subject to the following conditions:
// in all copies or substantial portions of the Software. *
// * The above copyright notice and this permission notice shall be included in all
// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, * copies or substantial portions of the Software.
// EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF *
// MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
// IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
// CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
// TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
// SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
//----------------------------------------------------------------------------- * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*/ *
* https://www.FreeRTOS.org
* https://github.com/FreeRTOS
*
*/
#include "xtensa_rtos.h" #include "xtensa_rtos.h"
#include "sdkconfig.h" #include "sdkconfig.h"
@ -57,10 +61,10 @@ port_switch_flag:
******************************************************************************* *******************************************************************************
* _frxt_setup_switch * _frxt_setup_switch
* void _frxt_setup_switch(void); * void _frxt_setup_switch(void);
* *
* Sets an internal flag indicating that a task switch is required on return * Sets an internal flag indicating that a task switch is required on return
* from interrupt handling. * from interrupt handling.
* *
******************************************************************************* *******************************************************************************
*/ */
.global _frxt_setup_switch .global _frxt_setup_switch
@ -198,7 +202,7 @@ _frxt_int_exit:
bnez a2, .Lnesting /* !=0 after decr so still nested */ bnez a2, .Lnesting /* !=0 after decr so still nested */
#if (ESP_IDF_VERSION >= ESP_IDF_VERSION_VAL(4, 2, 0)) #if (ESP_IDF_VERSION >= ESP_IDF_VERSION_VAL(4, 2, 0))
#ifdef CONFIG_FREERTOS_FPU_IN_ISR #ifdef CONFIG_FREERTOS_FPU_IN_ISR
#if XCHAL_CP_NUM > 0 #if XCHAL_CP_NUM > 0
l32i a3, sp, 0 /* Grab last CPENABLE before leave ISR */ l32i a3, sp, 0 /* Grab last CPENABLE before leave ISR */
addi sp, sp, 4 addi sp, sp, 4

2
portable/ThirdParty/GCC/Xtensa_ESP32/portmux_impl.h vendored
View file

@ -4,6 +4,8 @@
* *
* All rights reserved * All rights reserved
* *
* SPDX-License-Identifier: GPL-2.0 WITH freertos-exception-2.0
*
* FreeRTOS is free software; you can redistribute it and/or modify it under * FreeRTOS is free software; you can redistribute it and/or modify it under
* the terms of the GNU General Public License (version 2) as published by the * the terms of the GNU General Public License (version 2) as published by the
* Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception. * Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.

2
portable/ThirdParty/GCC/Xtensa_ESP32/portmux_impl.inc.h vendored
View file

@ -4,6 +4,8 @@
* *
* All rights reserved * All rights reserved
* *
* SPDX-License-Identifier: GPL-2.0 WITH freertos-exception-2.0
*
* FreeRTOS is free software; you can redistribute it and/or modify it under * FreeRTOS is free software; you can redistribute it and/or modify it under
* the terms of the GNU General Public License (version 2) as published by the * the terms of the GNU General Public License (version 2) as published by the
* Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception. * Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.

80
portable/ThirdParty/GCC/Xtensa_ESP32/xtensa_context.S vendored
View file

@ -1,25 +1,33 @@
/*
* FreeRTOS Kernel <DEVELOPMENT BRANCH>
* Copyright (C) 2006-2015 Cadence Design Systems, Inc.
* Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* SPDX-License-Identifier: MIT
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
* this software and associated documentation files (the "Software"), to deal in
* the Software without restriction, including without limitation the rights to
* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
* the Software, and to permit persons to whom the Software is furnished to do so,
* subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in all
* copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*
* https://www.FreeRTOS.org
* https://github.com/FreeRTOS
*
*/
/******************************************************************************* /*******************************************************************************
Copyright (c) 2006-2015 Cadence Design Systems Inc.
Permission is hereby granted, free of charge, to any person obtaining
a copy of this software and associated documentation files (the
"Software"), to deal in the Software without restriction, including
without limitation the rights to use, copy, modify, merge, publish,
distribute, sublicense, and/or sell copies of the Software, and to
permit persons to whom the Software is furnished to do so, subject to
the following conditions:
The above copyright notice and this permission notice shall be included
in all copies or substantial portions of the Software.
THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
--------------------------------------------------------------------------------
XTENSA CONTEXT SAVE AND RESTORE ROUTINES XTENSA CONTEXT SAVE AND RESTORE ROUTINES
@ -73,7 +81,7 @@ interrupt stack frame defined in xtensa_rtos.h.
Its counterpart is _xt_context_restore (which also restores A12, A13). Its counterpart is _xt_context_restore (which also restores A12, A13).
Caller is expected to have saved PC, PS, A0, A1 (SP), A12, A13 in the frame. Caller is expected to have saved PC, PS, A0, A1 (SP), A12, A13 in the frame.
This function preserves A12 & A13 in order to provide the caller with 2 scratch This function preserves A12 & A13 in order to provide the caller with 2 scratch
regs that need not be saved over the call to this function. The choice of which regs that need not be saved over the call to this function. The choice of which
2 regs to provide is governed by xthal_window_spill_nw and xthal_save_extra_nw, 2 regs to provide is governed by xthal_window_spill_nw and xthal_save_extra_nw,
to avoid moving data more than necessary. Caller can assign regs accordingly. to avoid moving data more than necessary. Caller can assign regs accordingly.
@ -82,7 +90,7 @@ Entry Conditions:
A0 = Return address in caller. A0 = Return address in caller.
A1 = Stack pointer of interrupted thread or handler ("interruptee"). A1 = Stack pointer of interrupted thread or handler ("interruptee").
Original A12, A13 have already been saved in the interrupt stack frame. Original A12, A13 have already been saved in the interrupt stack frame.
Other processor state except PC, PS, A0, A1 (SP), A12, A13, is as at the Other processor state except PC, PS, A0, A1 (SP), A12, A13, is as at the
point of interruption. point of interruption.
If windowed ABI, PS.EXCM = 1 (exceptions disabled). If windowed ABI, PS.EXCM = 1 (exceptions disabled).
@ -155,8 +163,8 @@ _xt_context_save:
and underflow exceptions disabled (assured by PS.EXCM == 1). and underflow exceptions disabled (assured by PS.EXCM == 1).
*/ */
s32i a12, sp, XT_STK_TMP0 /* temp. save stuff in stack frame */ s32i a12, sp, XT_STK_TMP0 /* temp. save stuff in stack frame */
s32i a13, sp, XT_STK_TMP1 s32i a13, sp, XT_STK_TMP1
s32i a9, sp, XT_STK_TMP2 s32i a9, sp, XT_STK_TMP2
/* /*
Save the overlay state if we are supporting overlays. Since we just saved Save the overlay state if we are supporting overlays. Since we just saved
@ -176,8 +184,8 @@ _xt_context_save:
call0 xthal_window_spill_nw /* preserves only a4,5,8,9,12,13 */ call0 xthal_window_spill_nw /* preserves only a4,5,8,9,12,13 */
addi sp, sp, -XT_STK_FRMSZ addi sp, sp, -XT_STK_FRMSZ
l32i a12, sp, XT_STK_TMP0 /* recover stuff from stack frame */ l32i a12, sp, XT_STK_TMP0 /* recover stuff from stack frame */
l32i a13, sp, XT_STK_TMP1 l32i a13, sp, XT_STK_TMP1
l32i a9, sp, XT_STK_TMP2 l32i a9, sp, XT_STK_TMP2
#endif #endif
#endif /* (ESP_IDF_VERSION < ESP_IDF_VERSION_VAL(4, 2, 0)) */ #endif /* (ESP_IDF_VERSION < ESP_IDF_VERSION_VAL(4, 2, 0)) */
@ -262,7 +270,7 @@ _xt_context_restore
!! MUST BE CALLED ONLY BY 'CALL0' INSTRUCTION !! !! MUST BE CALLED ONLY BY 'CALL0' INSTRUCTION !!
Restores all Xtensa processor state except PC, PS, A0, A1 (SP) (and in Call0 Restores all Xtensa processor state except PC, PS, A0, A1 (SP) (and in Call0
ABI, A14, A15 which are preserved by all interrupt handlers) from an interrupt ABI, A14, A15 which are preserved by all interrupt handlers) from an interrupt
stack frame defined in xtensa_rtos.h . stack frame defined in xtensa_rtos.h .
Its counterpart is _xt_context_save (whose caller saved A12, A13). Its counterpart is _xt_context_save (whose caller saved A12, A13).
@ -275,7 +283,7 @@ Entry Conditions:
Exit conditions: Exit conditions:
A0 = Return address in caller. A0 = Return address in caller.
A1 = Stack pointer of interrupted thread or handler ("interruptee"). A1 = Stack pointer of interrupted thread or handler ("interruptee").
Other processor state except PC, PS, A0, A1 (SP), is as at the point Other processor state except PC, PS, A0, A1 (SP), is as at the point
of interruption. of interruption.
*******************************************************************************/ *******************************************************************************/
@ -288,7 +296,7 @@ Exit conditions:
_xt_context_restore: _xt_context_restore:
#if XCHAL_EXTRA_SA_SIZE > 0 #if XCHAL_EXTRA_SA_SIZE > 0
/* /*
NOTE: Normally the xthal_restore_extra_nw macro only affects address NOTE: Normally the xthal_restore_extra_nw macro only affects address
registers a2-a5. It is theoretically possible for Xtensa processor registers a2-a5. It is theoretically possible for Xtensa processor
designers to write TIE that causes more address registers to be designers to write TIE that causes more address registers to be
@ -358,7 +366,7 @@ _xt_context_restore:
/* /*
Call0 ABI callee-saved regs a12-15 do not need to be restored here. Call0 ABI callee-saved regs a12-15 do not need to be restored here.
However a12-13 were saved for scratch before XT_RTOS_INT_ENTER(), However a12-13 were saved for scratch before XT_RTOS_INT_ENTER(),
so need to be restored anyway, despite being callee-saved in Call0. so need to be restored anyway, despite being callee-saved in Call0.
*/ */
l32i a12, sp, XT_STK_A12 l32i a12, sp, XT_STK_A12
@ -381,7 +389,7 @@ to "unowned". Leaves CPENABLE as it found it (does NOT clear it).
Called during initialization of the RTOS, before any threads run. Called during initialization of the RTOS, before any threads run.
This may be called from normal Xtensa single-threaded application code which This may be called from normal Xtensa single-threaded application code which
might use co-processors. The Xtensa run-time initialization enables all might use co-processors. The Xtensa run-time initialization enables all
co-processors. They must remain enabled here, else a co-processor exception co-processors. They must remain enabled here, else a co-processor exception
might occur outside of a thread, which the exception handler doesn't expect. might occur outside of a thread, which the exception handler doesn't expect.
@ -424,13 +432,13 @@ _xt_coproc_init:
_xt_coproc_release _xt_coproc_release
Releases any and all co-processors owned by a given thread. The thread is Releases any and all co-processors owned by a given thread. The thread is
identified by it's co-processor state save area defined in xtensa_context.h . identified by it's co-processor state save area defined in xtensa_context.h .
Must be called before a thread's co-proc save area is deleted to avoid Must be called before a thread's co-proc save area is deleted to avoid
memory corruption when the exception handler tries to save the state. memory corruption when the exception handler tries to save the state.
May be called when a thread terminates or completes but does not delete May be called when a thread terminates or completes but does not delete
the co-proc save area, to avoid the exception handler having to save the the co-proc save area, to avoid the exception handler having to save the
thread's co-proc state before another thread can use it (optimization). thread's co-proc state before another thread can use it (optimization).
Needs to be called on the processor the thread was running on. Unpinned threads Needs to be called on the processor the thread was running on. Unpinned threads
@ -630,13 +638,13 @@ _xt_coproc_restorecs:
s32i a3, a15, XT_CP_CS_ST /* update saved CP mask */ s32i a3, a15, XT_CP_CS_ST /* update saved CP mask */
movi a13, _xt_coproc_sa_offset /* array of CP save offsets */ movi a13, _xt_coproc_sa_offset /* array of CP save offsets */
l32i a15, a15, XT_CP_ASA /* a15 = base of aligned save area */ l32i a15, a15, XT_CP_ASA /* a15 = base of aligned save area */
#if XCHAL_CP0_SA_SIZE #if XCHAL_CP0_SA_SIZE
bbci.l a2, 0, 2f /* CP 0 not enabled */ bbci.l a2, 0, 2f /* CP 0 not enabled */
l32i a14, a13, 0 /* a14 = _xt_coproc_sa_offset[0] */ l32i a14, a13, 0 /* a14 = _xt_coproc_sa_offset[0] */
add a3, a14, a15 /* a3 = save area for CP 0 */ add a3, a14, a15 /* a3 = save area for CP 0 */
xchal_cp0_load a3, a4, a5, a6, a7 continue=0 ofs=-1 select=XTHAL_SAS_TIE|XTHAL_SAS_NOCC|XTHAL_SAS_CALE alloc=XTHAL_SAS_ALL xchal_cp0_load a3, a4, a5, a6, a7 continue=0 ofs=-1 select=XTHAL_SAS_TIE|XTHAL_SAS_NOCC|XTHAL_SAS_CALE alloc=XTHAL_SAS_ALL
2: 2:
#endif #endif
#if XCHAL_CP1_SA_SIZE #if XCHAL_CP1_SA_SIZE

50
portable/ThirdParty/GCC/Xtensa_ESP32/xtensa_init.c vendored
View file

@ -1,25 +1,33 @@
/*
* FreeRTOS Kernel <DEVELOPMENT BRANCH>
* Copyright (C) 2003-2015 Cadence Design Systems, Inc.
* Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* SPDX-License-Identifier: MIT
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
* this software and associated documentation files (the "Software"), to deal in
* the Software without restriction, including without limitation the rights to
* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
* the Software, and to permit persons to whom the Software is furnished to do so,
* subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in all
* copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*
* https://www.FreeRTOS.org
* https://github.com/FreeRTOS
*
*/
/******************************************************************************* /*******************************************************************************
* // Copyright (c) 2003-2015 Cadence Design Systems, Inc.
* //
* // Permission is hereby granted, free of charge, to any person obtaining
* // a copy of this software and associated documentation files (the
* // "Software"), to deal in the Software without restriction, including
* // without limitation the rights to use, copy, modify, merge, publish,
* // distribute, sublicense, and/or sell copies of the Software, and to
* // permit persons to whom the Software is furnished to do so, subject to
* // the following conditions:
* //
* // The above copyright notice and this permission notice shall be included
* // in all copies or substantial portions of the Software.
* //
* // THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* // EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
* // MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
* // IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
* // CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
* // TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
* // SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
* --------------------------------------------------------------------------------
* *
* XTENSA INITIALIZATION ROUTINES CODED IN C * XTENSA INITIALIZATION ROUTINES CODED IN C
* *

44
portable/ThirdParty/GCC/Xtensa_ESP32/xtensa_intr.c vendored
View file

@ -1,25 +1,31 @@
/******************************************************************************* /*
* Copyright (c) 2006-2015 Cadence Design Systems Inc. * FreeRTOS Kernel <DEVELOPMENT BRANCH>
* Copyright (C) 2006-2015 Cadence Design Systems, Inc.
* Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
* *
* Permission is hereby granted, free of charge, to any person obtaining * SPDX-License-Identifier: MIT
* a copy of this software and associated documentation files (the
* "Software"), to deal in the Software without restriction, including
* without limitation the rights to use, copy, modify, merge, publish,
* distribute, sublicense, and/or sell copies of the Software, and to
* permit persons to whom the Software is furnished to do so, subject to
* the following conditions:
* *
* The above copyright notice and this permission notice shall be included * Permission is hereby granted, free of charge, to any person obtaining a copy of
* in all copies or substantial portions of the Software. * this software and associated documentation files (the "Software"), to deal in
* the Software without restriction, including without limitation the rights to
* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
* the Software, and to permit persons to whom the Software is furnished to do so,
* subject to the following conditions:
* *
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, * The above copyright notice and this permission notice shall be included in all
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF * copies or substantial portions of the Software.
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. *
* IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
* TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
* SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
******************************************************************************/ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*
* https://www.FreeRTOS.org
* https://github.com/FreeRTOS
*
*/
/****************************************************************************** /******************************************************************************
* Xtensa-specific interrupt and exception functions for RTOS ports. * Xtensa-specific interrupt and exception functions for RTOS ports.

50
portable/ThirdParty/GCC/Xtensa_ESP32/xtensa_intr_asm.S vendored
View file

@ -1,25 +1,31 @@
/******************************************************************************* /*
Copyright (c) 2006-2015 Cadence Design Systems Inc. * FreeRTOS Kernel <DEVELOPMENT BRANCH>
* Copyright (C) 2006-2015 Cadence Design Systems, Inc.
Permission is hereby granted, free of charge, to any person obtaining * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
a copy of this software and associated documentation files (the *
"Software"), to deal in the Software without restriction, including * SPDX-License-Identifier: MIT
without limitation the rights to use, copy, modify, merge, publish, *
distribute, sublicense, and/or sell copies of the Software, and to * Permission is hereby granted, free of charge, to any person obtaining a copy of
permit persons to whom the Software is furnished to do so, subject to * this software and associated documentation files (the "Software"), to deal in
the following conditions: * the Software without restriction, including without limitation the rights to
* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
The above copyright notice and this permission notice shall be included * the Software, and to permit persons to whom the Software is furnished to do so,
in all copies or substantial portions of the Software. * subject to the following conditions:
*
THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, * The above copyright notice and this permission notice shall be included in all
EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF * copies or substantial portions of the Software.
MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. *
IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
******************************************************************************/ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*
* https://www.FreeRTOS.org
* https://github.com/FreeRTOS
*
*/
/****************************************************************************** /******************************************************************************
Xtensa interrupt handling data and assembly routines. Xtensa interrupt handling data and assembly routines.

53
portable/ThirdParty/GCC/Xtensa_ESP32/xtensa_loadstore_handler.S vendored
View file

@ -1,18 +1,43 @@
/* /*
Copyright 2019 Espressif Systems (Shanghai) PTE LTD * FreeRTOS Kernel <DEVELOPMENT BRANCH>
* Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
Licensed under the Apache License, Version 2.0 (the "License"); *
you may not use this file except in compliance with the License. * SPDX-License-Identifier: MIT AND Apache-2.0
You may obtain a copy of the License at *
* Permission is hereby granted, free of charge, to any person obtaining a copy of
http://www.apache.org/licenses/LICENSE-2.0 * this software and associated documentation files (the "Software"), to deal in
* the Software without restriction, including without limitation the rights to
Unless required by applicable law or agreed to in writing, software * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
distributed under the License is distributed on an "AS IS" BASIS, * the Software, and to permit persons to whom the Software is furnished to do so,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. * subject to the following conditions:
See the License for the specific language governing permissions and *
limitations under the License. * The above copyright notice and this permission notice shall be included in all
*/ * copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*
* https://www.FreeRTOS.org
* https://github.com/FreeRTOS
*
* Copyright 2019 Espressif Systems (Shanghai) PTE LTD
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
/* /*
* LoadStoreErrorCause: Occurs when trying to access 32 bit addressable memory region as 8 bit or 16 bit * LoadStoreErrorCause: Occurs when trying to access 32 bit addressable memory region as 8 bit or 16 bit

51
portable/ThirdParty/GCC/Xtensa_ESP32/xtensa_overlay_os_hook.c vendored
View file

@ -1,27 +1,34 @@
/*
* FreeRTOS Kernel <DEVELOPMENT BRANCH>
* Copyright (C) 2015-2015 Cadence Design Systems, Inc.
* Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* SPDX-License-Identifier: MIT
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
* this software and associated documentation files (the "Software"), to deal in
* the Software without restriction, including without limitation the rights to
* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
* the Software, and to permit persons to whom the Software is furnished to do so,
* subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in all
* copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*
* https://www.FreeRTOS.org
* https://github.com/FreeRTOS
*
*/
/* xtensa_overlay_os_hook.c -- Overlay manager OS hooks for FreeRTOS. */ /* xtensa_overlay_os_hook.c -- Overlay manager OS hooks for FreeRTOS. */
/* Copyright (c) 2015-2015 Cadence Design Systems Inc. */
/* */
/* Permission is hereby granted, free of charge, to any person obtaining */
/* a copy of this software and associated documentation files (the */
/* "Software"), to deal in the Software without restriction, including */
/* without limitation the rights to use, copy, modify, merge, publish, */
/* distribute, sublicense, and/or sell copies of the Software, and to */
/* permit persons to whom the Software is furnished to do so, subject to */
/* the following conditions: */
/* */
/* The above copyright notice and this permission notice shall be included */
/* in all copies or substantial portions of the Software. */
/* */
/* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, */
/* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF */
/* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. */
/* IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY */
/* CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, */
/* TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE */
/* SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. */
#include "FreeRTOS.h" #include "FreeRTOS.h"
#include "semphr.h" #include "semphr.h"

55
portable/ThirdParty/GCC/Xtensa_ESP32/xtensa_vector_defaults.S vendored
View file

@ -1,16 +1,43 @@
// Copyright 2015-2017 Espressif Systems (Shanghai) PTE LTD /*
// * FreeRTOS Kernel <DEVELOPMENT BRANCH>
// Licensed under the Apache License, Version 2.0 (the "License"); * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
// you may not use this file except in compliance with the License. *
// You may obtain a copy of the License at * SPDX-License-Identifier: MIT AND Apache-2.0
*
// http://www.apache.org/licenses/LICENSE-2.0 * Permission is hereby granted, free of charge, to any person obtaining a copy of
// * this software and associated documentation files (the "Software"), to deal in
// Unless required by applicable law or agreed to in writing, software * the Software without restriction, including without limitation the rights to
// distributed under the License is distributed on an "AS IS" BASIS, * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. * the Software, and to permit persons to whom the Software is furnished to do so,
// See the License for the specific language governing permissions and * subject to the following conditions:
// limitations under the License. *
* The above copyright notice and this permission notice shall be included in all
* copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*
* https://www.FreeRTOS.org
* https://github.com/FreeRTOS
*
* Copyright 2015-2017 Espressif Systems (Shanghai) PTE LTD
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#include "xtensa_rtos.h" #include "xtensa_rtos.h"
#include "esp_idf_version.h" #include "esp_idf_version.h"
@ -23,7 +50,7 @@
#include "soc/soc.h" #include "soc/soc.h"
/* /*
This file contains the default handlers for the high interrupt levels as well as some specialized exceptions. This file contains the default handlers for the high interrupt levels as well as some specialized exceptions.
The default behaviour is to just exit the interrupt or call the panic handler on the exceptions The default behaviour is to just exit the interrupt or call the panic handler on the exceptions
*/ */

99
portable/ThirdParty/GCC/Xtensa_ESP32/xtensa_vectors.S vendored
View file

@ -1,24 +1,33 @@
/*
* FreeRTOS Kernel <DEVELOPMENT BRANCH>
* Copyright (C) 2006-2015 Cadence Design Systems, Inc.
* Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* SPDX-License-Identifier: MIT
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
* this software and associated documentation files (the "Software"), to deal in
* the Software without restriction, including without limitation the rights to
* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
* the Software, and to permit persons to whom the Software is furnished to do so,
* subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in all
* copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*
* https://www.FreeRTOS.org
* https://github.com/FreeRTOS
*
*/
/******************************************************************************* /*******************************************************************************
Copyright (c) 2006-2015 Cadence Design Systems Inc.
Permission is hereby granted, free of charge, to any person obtaining
a copy of this software and associated documentation files (the
"Software"), to deal in the Software without restriction, including
without limitation the rights to use, copy, modify, merge, publish,
distribute, sublicense, and/or sell copies of the Software, and to
permit persons to whom the Software is furnished to do so, subject to
the following conditions:
The above copyright notice and this permission notice shall be included
in all copies or substantial portions of the Software.
THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
-------------------------------------------------------------------------------- --------------------------------------------------------------------------------
XTENSA VECTORS AND LOW LEVEL HANDLERS FOR AN RTOS XTENSA VECTORS AND LOW LEVEL HANDLERS FOR AN RTOS
@ -34,14 +43,14 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
medium level interrupts, by calling xt_set_interrupt_handler(). These medium level interrupts, by calling xt_set_interrupt_handler(). These
handlers can be written in C, and must obey C calling convention. The handlers can be written in C, and must obey C calling convention. The
handler table is indexed by the interrupt number. Each handler may be handler table is indexed by the interrupt number. Each handler may be
provided with an argument. provided with an argument.
Note that the system timer interrupt is handled specially, and is Note that the system timer interrupt is handled specially, and is
dispatched to the RTOS-specific handler. This timer cannot be hooked dispatched to the RTOS-specific handler. This timer cannot be hooked
by application code. by application code.
Optional hooks are also provided to install a handler per level at Optional hooks are also provided to install a handler per level at
run-time, made available by compiling this source file with run-time, made available by compiling this source file with
'-DXT_INTEXC_HOOKS' (useful for automated testing). '-DXT_INTEXC_HOOKS' (useful for automated testing).
!! This file is a template that usually needs to be modified to handle !! !! This file is a template that usually needs to be modified to handle !!
@ -81,10 +90,10 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
This allows more flexibility in locating code without the performance This allows more flexibility in locating code without the performance
overhead of the 'l32r' literal data load in cases where the destination overhead of the 'l32r' literal data load in cases where the destination
is in range of 'call0'. There is an additional benefit in that 'call0' is in range of 'call0'. There is an additional benefit in that 'call0'
has a longer range than 'j' due to the target being word-aligned, so has a longer range than 'j' due to the target being word-aligned, so
the 'l32r' sequence is less likely needed. the 'l32r' sequence is less likely needed.
3. The use of 'call0' with -mlongcalls requires that register a0 not be 3. The use of 'call0' with -mlongcalls requires that register a0 not be
live at the time of the call, which is always the case for a function live at the time of the call, which is always the case for a function
call but needs to be ensured if 'call0' is used as a jump in lieu of 'j'. call but needs to be ensured if 'call0' is used as a jump in lieu of 'j'.
4. This use of 'call0' is independent of the C function call ABI. 4. This use of 'call0' is independent of the C function call ABI.
@ -371,7 +380,7 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
/* /*
-------------------------------------------------------------------------------- --------------------------------------------------------------------------------
Panic handler. Panic handler.
Should be reached by call0 (preferable) or jump only. If call0, a0 says where Should be reached by call0 (preferable) or jump only. If call0, a0 says where
from. If on simulator, display panic message and abort, else loop indefinitely. from. If on simulator, display panic message and abort, else loop indefinitely.
-------------------------------------------------------------------------------- --------------------------------------------------------------------------------
*/ */
@ -443,7 +452,7 @@ panic_print_hex_a:
panic_print_hex_ok: panic_print_hex_ok:
s32i a5,a3,0 s32i a5,a3,0
slli a2,a2,4 slli a2,a2,4
addi a4,a4,-1 addi a4,a4,-1
bnei a4,0,panic_print_hex_loop bnei a4,0,panic_print_hex_loop
movi a5,' ' movi a5,' '
@ -462,12 +471,12 @@ panic_print_hex_ok:
-------------------------------------------------------------------------------- --------------------------------------------------------------------------------
Hooks to dynamically install handlers for exceptions and interrupts. Hooks to dynamically install handlers for exceptions and interrupts.
Allows automated regression frameworks to install handlers per test. Allows automated regression frameworks to install handlers per test.
Consists of an array of function pointers indexed by interrupt level, Consists of an array of function pointers indexed by interrupt level,
with index 0 containing the entry for user exceptions. with index 0 containing the entry for user exceptions.
Initialized with all 0s, meaning no handler is installed at each level. Initialized with all 0s, meaning no handler is installed at each level.
See comment in xtensa_rtos.h for more details. See comment in xtensa_rtos.h for more details.
*WARNING* This array is for all CPUs, that is, installing a hook for *WARNING* This array is for all CPUs, that is, installing a hook for
one CPU will install it for all others as well! one CPU will install it for all others as well!
-------------------------------------------------------------------------------- --------------------------------------------------------------------------------
*/ */
@ -497,7 +506,7 @@ _xt_intexc_hooks:
the appropriate stack frame, saves a few vector-specific registers and the appropriate stack frame, saves a few vector-specific registers and
calls XT_RTOS_INT_ENTER to save the rest of the interrupted context calls XT_RTOS_INT_ENTER to save the rest of the interrupted context
and enter the RTOS, then sets up a C environment. It then calls the and enter the RTOS, then sets up a C environment. It then calls the
user's interrupt handler code (which may be coded in C) and finally user's interrupt handler code (which may be coded in C) and finally
calls XT_RTOS_INT_EXIT to transfer control to the RTOS for scheduling. calls XT_RTOS_INT_EXIT to transfer control to the RTOS for scheduling.
While XT_RTOS_INT_EXIT does not return directly to the interruptee, While XT_RTOS_INT_EXIT does not return directly to the interruptee,
@ -903,7 +912,7 @@ _xt_syscall_exc:
-------------------------------------------------------------------------------- --------------------------------------------------------------------------------
Co-Processor Exception Handler (jumped to from User Exception Handler). Co-Processor Exception Handler (jumped to from User Exception Handler).
These exceptions are generated by co-processor instructions, which are only These exceptions are generated by co-processor instructions, which are only
allowed in thread code (not in interrupts or kernel code). This restriction is allowed in thread code (not in interrupts or kernel code). This restriction is
deliberately imposed to reduce the burden of state-save/restore in interrupts. deliberately imposed to reduce the burden of state-save/restore in interrupts.
-------------------------------------------------------------------------------- --------------------------------------------------------------------------------
*/ */
@ -995,7 +1004,7 @@ _xt_coproc_exc:
#if (ESP_IDF_VERSION < ESP_IDF_VERSION_VAL(4, 2, 0)) #if (ESP_IDF_VERSION < ESP_IDF_VERSION_VAL(4, 2, 0))
beqz a15, .L_goto_invalid /* not in a thread (invalid) */ beqz a15, .L_goto_invalid /* not in a thread (invalid) */
#else #else
#ifndef CONFIG_FREERTOS_FPU_IN_ISR #ifndef CONFIG_FREERTOS_FPU_IN_ISR
beqz a15, .L_goto_invalid beqz a15, .L_goto_invalid
#endif #endif
#endif /* ESP_IDF_VERSION < ESP_IDF_VERSION_VAL(4, 2, 0) */ #endif /* ESP_IDF_VERSION < ESP_IDF_VERSION_VAL(4, 2, 0) */
@ -1028,7 +1037,7 @@ _xt_coproc_exc:
or a4, a4, a2 /* a4 = CPENABLE | (1 << n) */ or a4, a4, a2 /* a4 = CPENABLE | (1 << n) */
wsr a4, CPENABLE wsr a4, CPENABLE
/* /*
Keep loading _xt_coproc_owner_sa[n] atomic (=load once, then use that value Keep loading _xt_coproc_owner_sa[n] atomic (=load once, then use that value
everywhere): _xt_coproc_release assumes it works like this in order not to need everywhere): _xt_coproc_release assumes it works like this in order not to need
locking. locking.
@ -1084,8 +1093,8 @@ locking.
/* /*
The config-specific HAL macro invoked below destroys a2-5, preserves a0-1. The config-specific HAL macro invoked below destroys a2-5, preserves a0-1.
It is theoretically possible for Xtensa processor designers to write TIE It is theoretically possible for Xtensa processor designers to write TIE
that causes more address registers to be affected, but it is generally that causes more address registers to be affected, but it is generally
unlikely. If that ever happens, more registers needs to be saved/restored unlikely. If that ever happens, more registers needs to be saved/restored
around this macro invocation, and the value in a15 needs to be recomputed. around this macro invocation, and the value in a15 needs to be recomputed.
*/ */
@ -1113,8 +1122,8 @@ locking.
/* /*
The config-specific HAL macro invoked below destroys a2-5, preserves a0-1. The config-specific HAL macro invoked below destroys a2-5, preserves a0-1.
It is theoretically possible for Xtensa processor designers to write TIE It is theoretically possible for Xtensa processor designers to write TIE
that causes more address registers to be affected, but it is generally that causes more address registers to be affected, but it is generally
unlikely. If that ever happens, more registers needs to be saved/restored unlikely. If that ever happens, more registers needs to be saved/restored
around this macro invocation. around this macro invocation.
*/ */
@ -1197,12 +1206,12 @@ _xt_lowint1:
/* Save rest of interrupt context and enter RTOS. */ /* Save rest of interrupt context and enter RTOS. */
call0 XT_RTOS_INT_ENTER /* common RTOS interrupt entry */ call0 XT_RTOS_INT_ENTER /* common RTOS interrupt entry */
/* !! We are now on the RTOS system stack !! */ /* !! We are now on the RTOS system stack !! */
/* Set up PS for C, enable interrupts above this level and clear EXCM. */ /* Set up PS for C, enable interrupts above this level and clear EXCM. */
#ifdef __XTENSA_CALL0_ABI__ #ifdef __XTENSA_CALL0_ABI__
movi a0, PS_INTLEVEL(1) | PS_UM movi a0, PS_INTLEVEL(1) | PS_UM
#else #else
movi a0, PS_INTLEVEL(1) | PS_UM | PS_WOE movi a0, PS_INTLEVEL(1) | PS_UM | PS_WOE
#endif #endif
wsr a0, PS wsr a0, PS
@ -1234,7 +1243,7 @@ _xt_lowint1:
the appropriate stack frame, saves a few vector-specific registers and the appropriate stack frame, saves a few vector-specific registers and
calls XT_RTOS_INT_ENTER to save the rest of the interrupted context calls XT_RTOS_INT_ENTER to save the rest of the interrupted context
and enter the RTOS, then sets up a C environment. It then calls the and enter the RTOS, then sets up a C environment. It then calls the
user's interrupt handler code (which may be coded in C) and finally user's interrupt handler code (which may be coded in C) and finally
calls XT_RTOS_INT_EXIT to transfer control to the RTOS for scheduling. calls XT_RTOS_INT_EXIT to transfer control to the RTOS for scheduling.
While XT_RTOS_INT_EXIT does not return directly to the interruptee, While XT_RTOS_INT_EXIT does not return directly to the interruptee,
@ -1674,7 +1683,7 @@ and used for purposes requiring very short service times.
Here are templates for high priority (level 2+) interrupt vectors. Here are templates for high priority (level 2+) interrupt vectors.
They assume only one interrupt per level to avoid the burden of identifying They assume only one interrupt per level to avoid the burden of identifying
which interrupts at this level are pending and enabled. This allows for which interrupts at this level are pending and enabled. This allows for
minimum latency and avoids having to save/restore a2 in addition to a0. minimum latency and avoids having to save/restore a2 in addition to a0.
If more than one interrupt per high priority level is configured, this burden If more than one interrupt per high priority level is configured, this burden
is on the handler which in any case must provide a way to save and restore is on the handler which in any case must provide a way to save and restore
@ -1799,12 +1808,12 @@ _NMIExceptionVector:
WINDOW OVERFLOW AND UNDERFLOW EXCEPTION VECTORS AND ALLOCA EXCEPTION HANDLER WINDOW OVERFLOW AND UNDERFLOW EXCEPTION VECTORS AND ALLOCA EXCEPTION HANDLER
Here is the code for each window overflow/underflow exception vector and Here is the code for each window overflow/underflow exception vector and
(interspersed) efficient code for handling the alloca exception cause. (interspersed) efficient code for handling the alloca exception cause.
Window exceptions are handled entirely in the vector area and are very Window exceptions are handled entirely in the vector area and are very
tight for performance. The alloca exception is also handled entirely in tight for performance. The alloca exception is also handled entirely in
the window vector area so comes at essentially no cost in code size. the window vector area so comes at essentially no cost in code size.
Users should never need to modify them and Cadence Design Systems recommends Users should never need to modify them and Cadence Design Systems recommends
they do not. they do not.
Window handlers go at predetermined vector locations according to the Window handlers go at predetermined vector locations according to the

31
portable/ThirdParty/XCC/Xtensa/port.c vendored
View file

@ -1,10 +1,10 @@
/* /*
* FreeRTOS Kernel <DEVELOPMENT BRANCH> * FreeRTOS Kernel <DEVELOPMENT BRANCH>
* Copyright (C) 2015-2019 Cadence Design Systems, Inc.
* Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
* *
* SPDX-License-Identifier: MIT * SPDX-License-Identifier: MIT
* *
* Permission is hereby granted, free of charge, to any person obtaining a copy of * Permission is hereby granted, free of charge, to any person obtaining a copy of
* this software and associated documentation files (the "Software"), to deal in * this software and associated documentation files (the "Software"), to deal in
* the Software without restriction, including without limitation the rights to * the Software without restriction, including without limitation the rights to
@ -27,29 +27,6 @@
* *
*/ */
/*
* Copyright (c) 2015-2019 Cadence Design Systems, Inc.
*
* Permission is hereby granted, free of charge, to any person obtaining
* a copy of this software and associated documentation files (the
* "Software"), to deal in the Software without restriction, including
* without limitation the rights to use, copy, modify, merge, publish,
* distribute, sublicense, and/or sell copies of the Software, and to
* permit persons to whom the Software is furnished to do so, subject to
* the following conditions:
*
* The above copyright notice and this permission notice shall be included
* in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
* IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
* CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
* TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
* SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*/
#include <stdlib.h> #include <stdlib.h>
#include <xtensa/config/core.h> #include <xtensa/config/core.h>
@ -81,7 +58,7 @@ unsigned port_interruptNesting = 0; // Interrupt nesting level
// User exception dispatcher when exiting // User exception dispatcher when exiting
void _xt_user_exit(void); void _xt_user_exit(void);
/* /*
* Stack initialization * Stack initialization
*/ */
#if portUSING_MPU_WRAPPERS #if portUSING_MPU_WRAPPERS

45
portable/ThirdParty/XCC/Xtensa/portasm.S vendored
View file

@ -1,25 +1,30 @@
/* /*
* Copyright (c) 2015-2019 Cadence Design Systems, Inc. * FreeRTOS Kernel <DEVELOPMENT BRANCH>
* Copyright (C) 2015-2019 Cadence Design Systems, Inc.
* Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
* *
* Permission is hereby granted, free of charge, to any person obtaining * SPDX-License-Identifier: MIT
* a copy of this software and associated documentation files (the
* "Software"), to deal in the Software without restriction, including
* without limitation the rights to use, copy, modify, merge, publish,
* distribute, sublicense, and/or sell copies of the Software, and to
* permit persons to whom the Software is furnished to do so, subject to
* the following conditions:
* *
* The above copyright notice and this permission notice shall be included * Permission is hereby granted, free of charge, to any person obtaining a copy of
* in all copies or substantial portions of the Software. * this software and associated documentation files (the "Software"), to deal in
* the Software without restriction, including without limitation the rights to
* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
* the Software, and to permit persons to whom the Software is furnished to do so,
* subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in all
* copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*
* https://www.FreeRTOS.org
* https://github.com/FreeRTOS
* *
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
* IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
* CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
* TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
* SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*/ */
#include "xtensa_rtos.h" #include "xtensa_rtos.h"
@ -51,10 +56,10 @@ port_switch_flag:
******************************************************************************* *******************************************************************************
* _frxt_setup_switch * _frxt_setup_switch
* void _frxt_setup_switch(void); * void _frxt_setup_switch(void);
* *
* Sets an internal flag indicating that a task switch is required on return * Sets an internal flag indicating that a task switch is required on return
* from interrupt handling. * from interrupt handling.
* *
******************************************************************************* *******************************************************************************
*/ */
.global _frxt_setup_switch .global _frxt_setup_switch

41
portable/ThirdParty/XCC/Xtensa/portbenchmark.h vendored
View file

@ -1,25 +1,30 @@
/* /*
* Copyright (c) 2015-2019 Cadence Design Systems, Inc. * FreeRTOS Kernel <DEVELOPMENT BRANCH>
* Copyright (C) 2015-2019 Cadence Design Systems, Inc.
* Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
* *
* Permission is hereby granted, free of charge, to any person obtaining * SPDX-License-Identifier: MIT
* a copy of this software and associated documentation files (the
* "Software"), to deal in the Software without restriction, including
* without limitation the rights to use, copy, modify, merge, publish,
* distribute, sublicense, and/or sell copies of the Software, and to
* permit persons to whom the Software is furnished to do so, subject to
* the following conditions:
* *
* The above copyright notice and this permission notice shall be included * Permission is hereby granted, free of charge, to any person obtaining a copy of
* in all copies or substantial portions of the Software. * this software and associated documentation files (the "Software"), to deal in
* the Software without restriction, including without limitation the rights to
* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
* the Software, and to permit persons to whom the Software is furnished to do so,
* subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in all
* copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*
* https://www.FreeRTOS.org
* https://github.com/FreeRTOS
* *
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
* IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
* CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
* TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
* SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*/ */
/* /*

41
portable/ThirdParty/XCC/Xtensa/portclib.c vendored
View file

@ -1,25 +1,30 @@
/* /*
* Copyright (c) 2015-2019 Cadence Design Systems, Inc. * FreeRTOS Kernel <DEVELOPMENT BRANCH>
* Copyright (C) 2015-2019 Cadence Design Systems, Inc.
* Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
* *
* Permission is hereby granted, free of charge, to any person obtaining * SPDX-License-Identifier: MIT
* a copy of this software and associated documentation files (the
* "Software"), to deal in the Software without restriction, including
* without limitation the rights to use, copy, modify, merge, publish,
* distribute, sublicense, and/or sell copies of the Software, and to
* permit persons to whom the Software is furnished to do so, subject to
* the following conditions:
* *
* The above copyright notice and this permission notice shall be included * Permission is hereby granted, free of charge, to any person obtaining a copy of
* in all copies or substantial portions of the Software. * this software and associated documentation files (the "Software"), to deal in
* the Software without restriction, including without limitation the rights to
* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
* the Software, and to permit persons to whom the Software is furnished to do so,
* subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in all
* copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*
* https://www.FreeRTOS.org
* https://github.com/FreeRTOS
* *
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
* IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
* CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
* TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
* SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*/ */
#include "FreeRTOS.h" #include "FreeRTOS.h"

28
portable/ThirdParty/XCC/Xtensa/portmacro.h vendored
View file

@ -1,9 +1,10 @@
/* /*
* FreeRTOS Kernel <DEVELOPMENT BRANCH> * FreeRTOS Kernel <DEVELOPMENT BRANCH>
* Copyright (C) 2015-2019 Cadence Design Systems, Inc.
* Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
* *
* SPDX-License-Identifier: MIT * SPDX-License-Identifier: MIT
* *
* Permission is hereby granted, free of charge, to any person obtaining a copy of * Permission is hereby granted, free of charge, to any person obtaining a copy of
* this software and associated documentation files (the "Software"), to deal in * this software and associated documentation files (the "Software"), to deal in
* the Software without restriction, including without limitation the rights to * the Software without restriction, including without limitation the rights to
@ -26,29 +27,6 @@
* *
*/ */
/*
* Copyright (c) 2015-2019 Cadence Design Systems, Inc.
*
* Permission is hereby granted, free of charge, to any person obtaining
* a copy of this software and associated documentation files (the
* "Software"), to deal in the Software without restriction, including
* without limitation the rights to use, copy, modify, merge, publish,
* distribute, sublicense, and/or sell copies of the Software, and to
* permit persons to whom the Software is furnished to do so, subject to
* the following conditions:
*
* The above copyright notice and this permission notice shall be included
* in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
* IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
* CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
* TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
* SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*/
#ifndef PORTMACRO_H #ifndef PORTMACRO_H
#define PORTMACRO_H #define PORTMACRO_H

45
portable/ThirdParty/XCC/Xtensa/porttrace.h vendored
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@ -1,32 +1,37 @@
/*
/* * FreeRTOS Kernel <DEVELOPMENT BRANCH>
* Copyright (c) 2015-2019 Cadence Design Systems, Inc. * Copyright (C) 2015-2019 Cadence Design Systems, Inc.
* Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
* *
* Permission is hereby granted, free of charge, to any person obtaining * SPDX-License-Identifier: MIT
* a copy of this software and associated documentation files (the
* "Software"), to deal in the Software without restriction, including
* without limitation the rights to use, copy, modify, merge, publish,
* distribute, sublicense, and/or sell copies of the Software, and to
* permit persons to whom the Software is furnished to do so, subject to
* the following conditions:
* *
* The above copyright notice and this permission notice shall be included * Permission is hereby granted, free of charge, to any person obtaining a copy of
* in all copies or substantial portions of the Software. * this software and associated documentation files (the "Software"), to deal in
* the Software without restriction, including without limitation the rights to
* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
* the Software, and to permit persons to whom the Software is furnished to do so,
* subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in all
* copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*
* https://www.FreeRTOS.org
* https://github.com/FreeRTOS
* *
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
* IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
* CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
* TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
* SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*/ */
/* /*
* This utility helps tracing the entering and exiting from tasks. * This utility helps tracing the entering and exiting from tasks.
* It maintains a circular buffer of tasks in the order they execute, * It maintains a circular buffer of tasks in the order they execute,
* and their execution time. To enable it, set configUSE_TRACE_FACILITY_2 * and their execution time. To enable it, set configUSE_TRACE_FACILITY_2
* to 1 in FreeRTOSConfig.h. You will also need to download the * to 1 in FreeRTOSConfig.h. You will also need to download the
* FreeRTOS_trace patch that contains porttrace.c and the complete version * FreeRTOS_trace patch that contains porttrace.c and the complete version
* of porttrace.h. * of porttrace.h.
*/ */

45
portable/ThirdParty/XCC/Xtensa/xtensa_api.h vendored
View file

@ -1,25 +1,30 @@
/*
/* * FreeRTOS Kernel <DEVELOPMENT BRANCH>
* Copyright (c) 2015-2019 Cadence Design Systems, Inc. * Copyright (C) 2015-2019 Cadence Design Systems, Inc.
* Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
* *
* Permission is hereby granted, free of charge, to any person obtaining * SPDX-License-Identifier: MIT
* a copy of this software and associated documentation files (the
* "Software"), to deal in the Software without restriction, including
* without limitation the rights to use, copy, modify, merge, publish,
* distribute, sublicense, and/or sell copies of the Software, and to
* permit persons to whom the Software is furnished to do so, subject to
* the following conditions:
* *
* The above copyright notice and this permission notice shall be included * Permission is hereby granted, free of charge, to any person obtaining a copy of
* in all copies or substantial portions of the Software. * this software and associated documentation files (the "Software"), to deal in
* the Software without restriction, including without limitation the rights to
* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
* the Software, and to permit persons to whom the Software is furnished to do so,
* subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in all
* copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*
* https://www.FreeRTOS.org
* https://github.com/FreeRTOS
* *
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
* IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
* CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
* TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
* SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*/ */
/* /*
@ -63,7 +68,7 @@ extern xt_exc_handler xt_set_exception_handler(int n, xt_exc_handler f);
/* /*
------------------------------------------------------------------------------- -------------------------------------------------------------------------------
Call this function to set a handler for the specified interrupt. Call this function to set a handler for the specified interrupt.
n - Interrupt number. n - Interrupt number.
f - Handler function address, NULL to uninstall handler. f - Handler function address, NULL to uninstall handler.
arg - Argument to be passed to handler. arg - Argument to be passed to handler.

53
portable/ThirdParty/XCC/Xtensa/xtensa_config.h vendored
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@ -1,25 +1,30 @@
/*
/* * FreeRTOS Kernel <DEVELOPMENT BRANCH>
* Copyright (c) 2015-2019 Cadence Design Systems, Inc. * Copyright (C) 2015-2019 Cadence Design Systems, Inc.
* Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
* *
* Permission is hereby granted, free of charge, to any person obtaining * SPDX-License-Identifier: MIT
* a copy of this software and associated documentation files (the
* "Software"), to deal in the Software without restriction, including
* without limitation the rights to use, copy, modify, merge, publish,
* distribute, sublicense, and/or sell copies of the Software, and to
* permit persons to whom the Software is furnished to do so, subject to
* the following conditions:
* *
* The above copyright notice and this permission notice shall be included * Permission is hereby granted, free of charge, to any person obtaining a copy of
* in all copies or substantial portions of the Software. * this software and associated documentation files (the "Software"), to deal in
* the Software without restriction, including without limitation the rights to
* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
* the Software, and to permit persons to whom the Software is furnished to do so,
* subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in all
* copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*
* https://www.FreeRTOS.org
* https://github.com/FreeRTOS
* *
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
* IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
* CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
* TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
* SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*/ */
/* /*
@ -60,26 +65,26 @@ extern "C" {
* If this is not true, i.e. one or more interrupt handlers make deep calls then * If this is not true, i.e. one or more interrupt handlers make deep calls then
* the minimum must be increased. * the minimum must be increased.
* *
* If the Xtensa processor configuration includes coprocessors, then space is * If the Xtensa processor configuration includes coprocessors, then space is
* allocated to save the coprocessor state on the stack. * allocated to save the coprocessor state on the stack.
* *
* If thread safety is enabled for the C runtime library, (XT_USE_THREAD_SAFE_CLIB * If thread safety is enabled for the C runtime library, (XT_USE_THREAD_SAFE_CLIB
* is defined) then space is allocated to save the C library context in the TCB. * is defined) then space is allocated to save the C library context in the TCB.
* *
* Allocating insufficient stack space is a common source of hard-to-find errors. * Allocating insufficient stack space is a common source of hard-to-find errors.
* During development, it is best to enable the FreeRTOS stack checking features. * During development, it is best to enable the FreeRTOS stack checking features.
* *
* Usage: * Usage:
* *
* XT_USE_THREAD_SAFE_CLIB -- Define this to a nonzero value to enable thread-safe * XT_USE_THREAD_SAFE_CLIB -- Define this to a nonzero value to enable thread-safe
* use of the C library. This will require extra stack * use of the C library. This will require extra stack
* space to be allocated for tasks that use the C library * space to be allocated for tasks that use the C library
* reentrant functions. See below for more information. * reentrant functions. See below for more information.
* *
* NOTE: The Xtensa toolchain supports multiple C libraries and not all of them * NOTE: The Xtensa toolchain supports multiple C libraries and not all of them
* support thread safety. Check your core configuration to see which C library * support thread safety. Check your core configuration to see which C library
* was chosen for your system. * was chosen for your system.
* *
* XT_STACK_MIN_SIZE -- The minimum stack size for any task. It is recommended * XT_STACK_MIN_SIZE -- The minimum stack size for any task. It is recommended
* that you do not use a stack smaller than this for any * that you do not use a stack smaller than this for any
* task. In case you want to use stacks smaller than this * task. In case you want to use stacks smaller than this

75
portable/ThirdParty/XCC/Xtensa/xtensa_context.S vendored
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@ -1,25 +1,30 @@
/*
/* * FreeRTOS Kernel <DEVELOPMENT BRANCH>
* Copyright (c) 2015-2019 Cadence Design Systems, Inc. * Copyright (C) 2015-2019 Cadence Design Systems, Inc.
* Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
* *
* Permission is hereby granted, free of charge, to any person obtaining * SPDX-License-Identifier: MIT
* a copy of this software and associated documentation files (the
* "Software"), to deal in the Software without restriction, including
* without limitation the rights to use, copy, modify, merge, publish,
* distribute, sublicense, and/or sell copies of the Software, and to
* permit persons to whom the Software is furnished to do so, subject to
* the following conditions:
* *
* The above copyright notice and this permission notice shall be included * Permission is hereby granted, free of charge, to any person obtaining a copy of
* in all copies or substantial portions of the Software. * this software and associated documentation files (the "Software"), to deal in
* the Software without restriction, including without limitation the rights to
* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
* the Software, and to permit persons to whom the Software is furnished to do so,
* subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in all
* copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*
* https://www.FreeRTOS.org
* https://github.com/FreeRTOS
* *
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
* IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
* CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
* TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
* SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*/ */
/* /*
@ -69,7 +74,7 @@ interrupt stack frame defined in xtensa_rtos.h.
Its counterpart is _xt_context_restore (which also restores A12, A13). Its counterpart is _xt_context_restore (which also restores A12, A13).
Caller is expected to have saved PC, PS, A0, A1 (SP), A12, A13 in the frame. Caller is expected to have saved PC, PS, A0, A1 (SP), A12, A13 in the frame.
This function preserves A12 & A13 in order to provide the caller with 2 scratch This function preserves A12 & A13 in order to provide the caller with 2 scratch
regs that need not be saved over the call to this function. The choice of which regs that need not be saved over the call to this function. The choice of which
2 regs to provide is governed by xthal_window_spill_nw and xthal_save_extra_nw, 2 regs to provide is governed by xthal_window_spill_nw and xthal_save_extra_nw,
to avoid moving data more than necessary. Caller can assign regs accordingly. to avoid moving data more than necessary. Caller can assign regs accordingly.
@ -78,7 +83,7 @@ Entry Conditions:
A0 = Return address in caller. A0 = Return address in caller.
A1 = Stack pointer of interrupted thread or handler ("interruptee"). A1 = Stack pointer of interrupted thread or handler ("interruptee").
Original A12, A13 have already been saved in the interrupt stack frame. Original A12, A13 have already been saved in the interrupt stack frame.
Other processor state except PC, PS, A0, A1 (SP), A12, A13, is as at the Other processor state except PC, PS, A0, A1 (SP), A12, A13, is as at the
point of interruption. point of interruption.
If windowed ABI, PS.EXCM = 1 (exceptions disabled). If windowed ABI, PS.EXCM = 1 (exceptions disabled).
@ -147,8 +152,8 @@ _xt_context_save:
and underflow exceptions disabled (assured by PS.EXCM == 1). and underflow exceptions disabled (assured by PS.EXCM == 1).
*/ */
s32i a12, sp, XT_STK_TMP0 /* temp. save stuff in stack frame */ s32i a12, sp, XT_STK_TMP0 /* temp. save stuff in stack frame */
s32i a13, sp, XT_STK_TMP1 s32i a13, sp, XT_STK_TMP1
s32i a9, sp, XT_STK_TMP2 s32i a9, sp, XT_STK_TMP2
/* /*
Save the overlay state if we are supporting overlays. Since we just saved Save the overlay state if we are supporting overlays. Since we just saved
@ -168,12 +173,12 @@ _xt_context_save:
call0 xthal_window_spill_nw /* preserves only a4,5,8,9,12,13 */ call0 xthal_window_spill_nw /* preserves only a4,5,8,9,12,13 */
addi sp, sp, -XT_STK_FRMSZ addi sp, sp, -XT_STK_FRMSZ
l32i a12, sp, XT_STK_TMP0 /* recover stuff from stack frame */ l32i a12, sp, XT_STK_TMP0 /* recover stuff from stack frame */
l32i a13, sp, XT_STK_TMP1 l32i a13, sp, XT_STK_TMP1
l32i a9, sp, XT_STK_TMP2 l32i a9, sp, XT_STK_TMP2
#endif #endif
#if XCHAL_EXTRA_SA_SIZE > 0 #if XCHAL_EXTRA_SA_SIZE > 0
/* /*
NOTE: Normally the xthal_save_extra_nw macro only affects address NOTE: Normally the xthal_save_extra_nw macro only affects address
registers a2-a5. It is theoretically possible for Xtensa processor registers a2-a5. It is theoretically possible for Xtensa processor
designers to write TIE that causes more address registers to be designers to write TIE that causes more address registers to be
@ -203,7 +208,7 @@ _xt_context_restore
!! MUST BE CALLED ONLY BY 'CALL0' INSTRUCTION !! !! MUST BE CALLED ONLY BY 'CALL0' INSTRUCTION !!
Restores all Xtensa processor state except PC, PS, A0, A1 (SP) (and in Call0 Restores all Xtensa processor state except PC, PS, A0, A1 (SP) (and in Call0
ABI, A14, A15 which are preserved by all interrupt handlers) from an interrupt ABI, A14, A15 which are preserved by all interrupt handlers) from an interrupt
stack frame defined in xtensa_rtos.h . stack frame defined in xtensa_rtos.h .
Its counterpart is _xt_context_save (whose caller saved A12, A13). Its counterpart is _xt_context_save (whose caller saved A12, A13).
@ -216,7 +221,7 @@ Entry Conditions:
Exit conditions: Exit conditions:
A0 = Return address in caller. A0 = Return address in caller.
A1 = Stack pointer of interrupted thread or handler ("interruptee"). A1 = Stack pointer of interrupted thread or handler ("interruptee").
Other processor state except PC, PS, A0, A1 (SP), is as at the point Other processor state except PC, PS, A0, A1 (SP), is as at the point
of interruption. of interruption.
*******************************************************************************/ *******************************************************************************/
@ -227,7 +232,7 @@ Exit conditions:
_xt_context_restore: _xt_context_restore:
#if XCHAL_EXTRA_SA_SIZE > 0 #if XCHAL_EXTRA_SA_SIZE > 0
/* /*
NOTE: Normally the xthal_restore_extra_nw macro only affects address NOTE: Normally the xthal_restore_extra_nw macro only affects address
registers a2-a5. It is theoretically possible for Xtensa processor registers a2-a5. It is theoretically possible for Xtensa processor
designers to write TIE that causes more address registers to be designers to write TIE that causes more address registers to be
@ -297,7 +302,7 @@ _xt_context_restore:
/* /*
Call0 ABI callee-saved regs a12-15 do not need to be restored here. Call0 ABI callee-saved regs a12-15 do not need to be restored here.
However a12-13 were saved for scratch before XT_RTOS_INT_ENTER(), However a12-13 were saved for scratch before XT_RTOS_INT_ENTER(),
so need to be restored anyway, despite being callee-saved in Call0. so need to be restored anyway, despite being callee-saved in Call0.
*/ */
l32i a12, sp, XT_STK_A12 l32i a12, sp, XT_STK_A12
@ -320,7 +325,7 @@ to "unowned". Leaves CPENABLE as it found it (does NOT clear it).
Called during initialization of the RTOS, before any threads run. Called during initialization of the RTOS, before any threads run.
This may be called from normal Xtensa single-threaded application code which This may be called from normal Xtensa single-threaded application code which
might use co-processors. The Xtensa run-time initialization enables all might use co-processors. The Xtensa run-time initialization enables all
co-processors. They must remain enabled here, else a co-processor exception co-processors. They must remain enabled here, else a co-processor exception
might occur outside of a thread, which the exception handler doesn't expect. might occur outside of a thread, which the exception handler doesn't expect.
@ -361,13 +366,13 @@ _xt_coproc_init:
_xt_coproc_release _xt_coproc_release
Releases any and all co-processors owned by a given thread. The thread is Releases any and all co-processors owned by a given thread. The thread is
identified by it's co-processor state save area defined in xtensa_context.h . identified by it's co-processor state save area defined in xtensa_context.h .
Must be called before a thread's co-proc save area is deleted to avoid Must be called before a thread's co-proc save area is deleted to avoid
memory corruption when the exception handler tries to save the state. memory corruption when the exception handler tries to save the state.
May be called when a thread terminates or completes but does not delete May be called when a thread terminates or completes but does not delete
the co-proc save area, to avoid the exception handler having to save the the co-proc save area, to avoid the exception handler having to save the
thread's co-proc state before another thread can use it (optimization). thread's co-proc state before another thread can use it (optimization).
Entry Conditions: Entry Conditions:
@ -553,13 +558,13 @@ _xt_coproc_restorecs:
s32i a3, a15, XT_CP_CS_ST /* update saved CP mask */ s32i a3, a15, XT_CP_CS_ST /* update saved CP mask */
movi a13, _xt_coproc_sa_offset /* array of CP save offsets */ movi a13, _xt_coproc_sa_offset /* array of CP save offsets */
l32i a15, a15, XT_CP_ASA /* a15 = base of aligned save area */ l32i a15, a15, XT_CP_ASA /* a15 = base of aligned save area */
#if XCHAL_CP0_SA_SIZE #if XCHAL_CP0_SA_SIZE
bbci.l a2, 0, 2f /* CP 0 not enabled */ bbci.l a2, 0, 2f /* CP 0 not enabled */
l32i a14, a13, 0 /* a14 = _xt_coproc_sa_offset[0] */ l32i a14, a13, 0 /* a14 = _xt_coproc_sa_offset[0] */
add a3, a14, a15 /* a3 = save area for CP 0 */ add a3, a14, a15 /* a3 = save area for CP 0 */
xchal_cp0_load a3, a4, a5, a6, a7 continue=0 ofs=-1 select=XTHAL_SAS_TIE|XTHAL_SAS_NOCC|XTHAL_SAS_CALE alloc=XTHAL_SAS_ALL xchal_cp0_load a3, a4, a5, a6, a7 continue=0 ofs=-1 select=XTHAL_SAS_TIE|XTHAL_SAS_NOCC|XTHAL_SAS_CALE alloc=XTHAL_SAS_ALL
2: 2:
#endif #endif
#if XCHAL_CP1_SA_SIZE #if XCHAL_CP1_SA_SIZE

73
portable/ThirdParty/XCC/Xtensa/xtensa_context.h vendored
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@ -1,25 +1,30 @@
/*
/* * FreeRTOS Kernel <DEVELOPMENT BRANCH>
* Copyright (c) 2015-2019 Cadence Design Systems, Inc. * Copyright (C) 2015-2019 Cadence Design Systems, Inc.
* Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
* *
* Permission is hereby granted, free of charge, to any person obtaining * SPDX-License-Identifier: MIT
* a copy of this software and associated documentation files (the
* "Software"), to deal in the Software without restriction, including
* without limitation the rights to use, copy, modify, merge, publish,
* distribute, sublicense, and/or sell copies of the Software, and to
* permit persons to whom the Software is furnished to do so, subject to
* the following conditions:
* *
* The above copyright notice and this permission notice shall be included * Permission is hereby granted, free of charge, to any person obtaining a copy of
* in all copies or substantial portions of the Software. * this software and associated documentation files (the "Software"), to deal in
* the Software without restriction, including without limitation the rights to
* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
* the Software, and to permit persons to whom the Software is furnished to do so,
* subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in all
* copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*
* https://www.FreeRTOS.org
* https://github.com/FreeRTOS
* *
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
* IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
* CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
* TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
* SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*/ */
/* /*
@ -78,16 +83,16 @@
INTERRUPT/EXCEPTION STACK FRAME FOR A THREAD OR NESTED INTERRUPT INTERRUPT/EXCEPTION STACK FRAME FOR A THREAD OR NESTED INTERRUPT
A stack frame of this structure is allocated for any interrupt or exception. A stack frame of this structure is allocated for any interrupt or exception.
It goes on the current stack. If the RTOS has a system stack for handling It goes on the current stack. If the RTOS has a system stack for handling
interrupts, every thread stack must allow space for just one interrupt stack interrupts, every thread stack must allow space for just one interrupt stack
frame, then nested interrupt stack frames go on the system stack. frame, then nested interrupt stack frames go on the system stack.
The frame includes basic registers (explicit) and "extra" registers introduced The frame includes basic registers (explicit) and "extra" registers introduced
by user TIE or the use of the MAC16 option in the user's Xtensa config. by user TIE or the use of the MAC16 option in the user's Xtensa config.
The frame size is minimized by omitting regs not applicable to user's config. The frame size is minimized by omitting regs not applicable to user's config.
For Windowed ABI, this stack frame includes the interruptee's base save area, For Windowed ABI, this stack frame includes the interruptee's base save area,
another base save area to manage gcc nested functions, and a little temporary another base save area to manage gcc nested functions, and a little temporary
space to help manage the spilling of the register windows. space to help manage the spilling of the register windows.
------------------------------------------------------------------------------- -------------------------------------------------------------------------------
*/ */
@ -155,7 +160,7 @@ STRUCT_END(XtExcFrame)
#else #else
#define XT_STK_NEXT2 XT_STK_NEXT1 #define XT_STK_NEXT2 XT_STK_NEXT1
#endif #endif
@ -172,12 +177,12 @@ STRUCT_END(XtExcFrame)
------------------------------------------------------------------------------- -------------------------------------------------------------------------------
SOLICITED STACK FRAME FOR A THREAD SOLICITED STACK FRAME FOR A THREAD
A stack frame of this structure is allocated whenever a thread enters the A stack frame of this structure is allocated whenever a thread enters the
RTOS kernel intentionally (and synchronously) to submit to thread scheduling. RTOS kernel intentionally (and synchronously) to submit to thread scheduling.
It goes on the current thread's stack. It goes on the current thread's stack.
The solicited frame only includes registers that are required to be preserved The solicited frame only includes registers that are required to be preserved
by the callee according to the compiler's ABI conventions, some space to save by the callee according to the compiler's ABI conventions, some space to save
the return address for returning to the caller, and the caller's PS register. the return address for returning to the caller, and the caller's PS register.
For Windowed ABI, this stack frame includes the caller's base save area. For Windowed ABI, this stack frame includes the caller's base save area.
@ -185,7 +190,7 @@ STRUCT_END(XtExcFrame)
Note on XT_SOL_EXIT field: Note on XT_SOL_EXIT field:
It is necessary to distinguish a solicited from an interrupt stack frame. It is necessary to distinguish a solicited from an interrupt stack frame.
This field corresponds to XT_STK_EXIT in the interrupt stack frame and is This field corresponds to XT_STK_EXIT in the interrupt stack frame and is
always at the same offset (0). It can be written with a code (usually 0) always at the same offset (0). It can be written with a code (usually 0)
to distinguish a solicted frame from an interrupt frame. An RTOS port may to distinguish a solicted frame from an interrupt frame. An RTOS port may
opt to ignore this field if it has another way of distinguishing frames. opt to ignore this field if it has another way of distinguishing frames.
------------------------------------------------------------------------------- -------------------------------------------------------------------------------
@ -230,7 +235,7 @@ STRUCT_END(XtSolFrame)
and the context switch of that co-processor is then peformed by the handler. and the context switch of that co-processor is then peformed by the handler.
Ownership represents which thread's state is currently in the co-processor. Ownership represents which thread's state is currently in the co-processor.
Co-processors may not be used by interrupt or exception handlers. If an Co-processors may not be used by interrupt or exception handlers. If an
co-processor instruction is executed by an interrupt or exception handler, co-processor instruction is executed by an interrupt or exception handler,
the co-processor exception handler will trigger a kernel panic and freeze. the co-processor exception handler will trigger a kernel panic and freeze.
This restriction is introduced to reduce the overhead of saving and restoring This restriction is introduced to reduce the overhead of saving and restoring
@ -241,7 +246,7 @@ STRUCT_END(XtSolFrame)
such as in the thread control block or above the thread stack area. It need such as in the thread control block or above the thread stack area. It need
not be in the interrupt stack frame since interrupts don't use co-processors. not be in the interrupt stack frame since interrupts don't use co-processors.
Along with the save area for each co-processor, two bitmasks with flags per Along with the save area for each co-processor, two bitmasks with flags per
co-processor (laid out as in the CPENABLE reg) help manage context-switching co-processor (laid out as in the CPENABLE reg) help manage context-switching
co-processors as efficiently as possible: co-processors as efficiently as possible:
@ -257,10 +262,10 @@ STRUCT_END(XtSolFrame)
XT_CPSTORED XT_CPSTORED
A bitmask with the same layout as CPENABLE, a bit per co-processor. A bitmask with the same layout as CPENABLE, a bit per co-processor.
Indicates whether the state of each co-processor is saved in the state Indicates whether the state of each co-processor is saved in the state
save area. When a thread enters the kernel, only the state of co-procs save area. When a thread enters the kernel, only the state of co-procs
still enabled in CPENABLE is saved. When the co-processor exception still enabled in CPENABLE is saved. When the co-processor exception
handler assigns ownership of a co-processor to a thread, it restores handler assigns ownership of a co-processor to a thread, it restores
the saved state only if this bit is set, and clears this bit. the saved state only if this bit is set, and clears this bit.
XT_CP_CS_ST XT_CP_CS_ST
@ -316,7 +321,7 @@ STRUCT_END(XtSolFrame)
For framed functions the frame is created and the return address saved at For framed functions the frame is created and the return address saved at
base of frame (Call0 ABI) or as determined by hardware (Windowed ABI). base of frame (Call0 ABI) or as determined by hardware (Windowed ABI).
For frameless functions, there is no frame and return address remains in a0. For frameless functions, there is no frame and return address remains in a0.
Note: Because CPP macros expand to a single line, macros requiring multi-line Note: Because CPP macros expand to a single line, macros requiring multi-line
expansions are implemented as assembler macros. expansions are implemented as assembler macros.
------------------------------------------------------------------------------- -------------------------------------------------------------------------------
*/ */
@ -329,7 +334,7 @@ STRUCT_END(XtSolFrame)
addi sp, sp, -\size addi sp, sp, -\size
s32i a0, sp, 0 s32i a0, sp, 0
.endm .endm
#define ENTRY0 #define ENTRY0
#define RET(sz) ret1 sz #define RET(sz) ret1 sz
.macro ret1 size=0x10 .macro ret1 size=0x10
l32i a0, sp, 0 l32i a0, sp, 0

45
portable/ThirdParty/XCC/Xtensa/xtensa_init.c vendored
View file

@ -1,25 +1,30 @@
/*
/* * FreeRTOS Kernel <DEVELOPMENT BRANCH>
* Copyright (c) 2015-2019 Cadence Design Systems, Inc. * Copyright (C) 2015-2019 Cadence Design Systems, Inc.
* Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
* *
* Permission is hereby granted, free of charge, to any person obtaining * SPDX-License-Identifier: MIT
* a copy of this software and associated documentation files (the
* "Software"), to deal in the Software without restriction, including
* without limitation the rights to use, copy, modify, merge, publish,
* distribute, sublicense, and/or sell copies of the Software, and to
* permit persons to whom the Software is furnished to do so, subject to
* the following conditions:
* *
* The above copyright notice and this permission notice shall be included * Permission is hereby granted, free of charge, to any person obtaining a copy of
* in all copies or substantial portions of the Software. * this software and associated documentation files (the "Software"), to deal in
* the Software without restriction, including without limitation the rights to
* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
* the Software, and to permit persons to whom the Software is furnished to do so,
* subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in all
* copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*
* https://www.FreeRTOS.org
* https://github.com/FreeRTOS
* *
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
* IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
* CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
* TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
* SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*/ */
/* /*
@ -41,7 +46,7 @@
unsigned _xt_tick_divisor = 0; /* cached number of cycles per tick */ unsigned _xt_tick_divisor = 0; /* cached number of cycles per tick */
/* /*
Compute and initialize at run-time the tick divisor (the number of Compute and initialize at run-time the tick divisor (the number of
processor clock cycles in an RTOS tick, used to set the tick timer). processor clock cycles in an RTOS tick, used to set the tick timer).
Called when the processor clock frequency is not known at compile-time. Called when the processor clock frequency is not known at compile-time.
*/ */

43
portable/ThirdParty/XCC/Xtensa/xtensa_intr.c vendored
View file

@ -1,25 +1,30 @@
/*
/* * FreeRTOS Kernel <DEVELOPMENT BRANCH>
* Copyright (c) 2015-2019 Cadence Design Systems, Inc. * Copyright (C) 2015-2019 Cadence Design Systems, Inc.
* Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
* *
* Permission is hereby granted, free of charge, to any person obtaining * SPDX-License-Identifier: MIT
* a copy of this software and associated documentation files (the
* "Software"), to deal in the Software without restriction, including
* without limitation the rights to use, copy, modify, merge, publish,
* distribute, sublicense, and/or sell copies of the Software, and to
* permit persons to whom the Software is furnished to do so, subject to
* the following conditions:
* *
* The above copyright notice and this permission notice shall be included * Permission is hereby granted, free of charge, to any person obtaining a copy of
* in all copies or substantial portions of the Software. * this software and associated documentation files (the "Software"), to deal in
* the Software without restriction, including without limitation the rights to
* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
* the Software, and to permit persons to whom the Software is furnished to do so,
* subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in all
* copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*
* https://www.FreeRTOS.org
* https://github.com/FreeRTOS
* *
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
* IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
* CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
* TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
* SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*/ */
/* /*

43
portable/ThirdParty/XCC/Xtensa/xtensa_intr_asm.S vendored
View file

@ -1,25 +1,30 @@
/*
/* * FreeRTOS Kernel <DEVELOPMENT BRANCH>
* Copyright (c) 2015-2019 Cadence Design Systems, Inc. * Copyright (C) 2015-2019 Cadence Design Systems, Inc.
* Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
* *
* Permission is hereby granted, free of charge, to any person obtaining * SPDX-License-Identifier: MIT
* a copy of this software and associated documentation files (the
* "Software"), to deal in the Software without restriction, including
* without limitation the rights to use, copy, modify, merge, publish,
* distribute, sublicense, and/or sell copies of the Software, and to
* permit persons to whom the Software is furnished to do so, subject to
* the following conditions:
* *
* The above copyright notice and this permission notice shall be included * Permission is hereby granted, free of charge, to any person obtaining a copy of
* in all copies or substantial portions of the Software. * this software and associated documentation files (the "Software"), to deal in
* the Software without restriction, including without limitation the rights to
* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
* the Software, and to permit persons to whom the Software is furnished to do so,
* subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in all
* copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*
* https://www.FreeRTOS.org
* https://github.com/FreeRTOS
* *
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
* IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
* CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
* TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
* SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*/ */
/* /*

43
portable/ThirdParty/XCC/Xtensa/xtensa_overlay_os_hook.c vendored
View file

@ -1,25 +1,30 @@
/*
/* * FreeRTOS Kernel <DEVELOPMENT BRANCH>
* Copyright (c) 2015-2019 Cadence Design Systems, Inc. * Copyright (C) 2015-2019 Cadence Design Systems, Inc.
* Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
* *
* Permission is hereby granted, free of charge, to any person obtaining * SPDX-License-Identifier: MIT
* a copy of this software and associated documentation files (the
* "Software"), to deal in the Software without restriction, including
* without limitation the rights to use, copy, modify, merge, publish,
* distribute, sublicense, and/or sell copies of the Software, and to
* permit persons to whom the Software is furnished to do so, subject to
* the following conditions:
* *
* The above copyright notice and this permission notice shall be included * Permission is hereby granted, free of charge, to any person obtaining a copy of
* in all copies or substantial portions of the Software. * this software and associated documentation files (the "Software"), to deal in
* the Software without restriction, including without limitation the rights to
* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
* the Software, and to permit persons to whom the Software is furnished to do so,
* subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in all
* copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*
* https://www.FreeRTOS.org
* https://github.com/FreeRTOS
* *
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
* IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
* CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
* TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
* SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*/ */
/* /*

59
portable/ThirdParty/XCC/Xtensa/xtensa_rtos.h vendored
View file

@ -1,25 +1,30 @@
/*
/* * FreeRTOS Kernel <DEVELOPMENT BRANCH>
* Copyright (c) 2015-2019 Cadence Design Systems, Inc. * Copyright (C) 2015-2019 Cadence Design Systems, Inc.
* Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
* *
* Permission is hereby granted, free of charge, to any person obtaining * SPDX-License-Identifier: MIT
* a copy of this software and associated documentation files (the
* "Software"), to deal in the Software without restriction, including
* without limitation the rights to use, copy, modify, merge, publish,
* distribute, sublicense, and/or sell copies of the Software, and to
* permit persons to whom the Software is furnished to do so, subject to
* the following conditions:
* *
* The above copyright notice and this permission notice shall be included * Permission is hereby granted, free of charge, to any person obtaining a copy of
* in all copies or substantial portions of the Software. * this software and associated documentation files (the "Software"), to deal in
* the Software without restriction, including without limitation the rights to
* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
* the Software, and to permit persons to whom the Software is furnished to do so,
* subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in all
* copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*
* https://www.FreeRTOS.org
* https://github.com/FreeRTOS
* *
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
* IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
* CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
* TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
* SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*/ */
/* /*
@ -33,10 +38,10 @@
* Macros in this header map callouts from generic Xtensa files to specific * Macros in this header map callouts from generic Xtensa files to specific
* RTOS functions. It may also be included in C source files. * RTOS functions. It may also be included in C source files.
* *
* Xtensa RTOS ports support all RTOS-compatible configurations of the Xtensa * Xtensa RTOS ports support all RTOS-compatible configurations of the Xtensa
* architecture, using the Xtensa hardware abstraction layer (HAL) to deal * architecture, using the Xtensa hardware abstraction layer (HAL) to deal
* with configuration specifics. * with configuration specifics.
* *
* Should be included by all Xtensa generic and RTOS port-specific sources. * Should be included by all Xtensa generic and RTOS port-specific sources.
*/ */
@ -118,7 +123,7 @@ Some of these functions may call back to generic functions in xtensa_context.h .
*******************************************************************************/ *******************************************************************************/
/* /*
Inform RTOS of entry into an interrupt handler that will affect it. Inform RTOS of entry into an interrupt handler that will affect it.
Allows RTOS to manage switch to any system stack and count nesting level. Allows RTOS to manage switch to any system stack and count nesting level.
Called after minimal context has been saved, with interrupts disabled. Called after minimal context has been saved, with interrupts disabled.
RTOS port can call0 _xt_context_save to save the rest of the context. RTOS port can call0 _xt_context_save to save the rest of the context.
@ -151,12 +156,12 @@ RTOS may optionally define XT_TICK_PER_SEC in its own way (eg. macro).
#define XT_TICK_PER_SEC configTICK_RATE_HZ #define XT_TICK_PER_SEC configTICK_RATE_HZ
/* /*
Return in a15 the base address of the co-processor state save area for the Return in a15 the base address of the co-processor state save area for the
thread that triggered a co-processor exception, or 0 if no thread was running. thread that triggered a co-processor exception, or 0 if no thread was running.
The state save area is structured as defined in xtensa_context.h and has size The state save area is structured as defined in xtensa_context.h and has size
XT_CP_SIZE. Co-processor instructions should only be used in thread code, never XT_CP_SIZE. Co-processor instructions should only be used in thread code, never
in interrupt handlers or the RTOS kernel. May only be called from assembly code in interrupt handlers or the RTOS kernel. May only be called from assembly code
and by the 'call0' instruction. A result of 0 indicates an unrecoverable error. and by the 'call0' instruction. A result of 0 indicates an unrecoverable error.
The implementation may use only a2-4, a15 (all other regs must be preserved). The implementation may use only a2-4, a15 (all other regs must be preserved).
*/ */
// void* XT_RTOS_CP_STATE(void) // void* XT_RTOS_CP_STATE(void)
@ -172,7 +177,7 @@ and interrupt handlers to facilitate automated testing where each test
case can install its own handler for user exceptions and each interrupt case can install its own handler for user exceptions and each interrupt
priority (level). This consists of an array of function pointers indexed priority (level). This consists of an array of function pointers indexed
by interrupt priority, with index 0 being the user exception handler hook. by interrupt priority, with index 0 being the user exception handler hook.
Each entry in the array is initially 0, and may be replaced by a function Each entry in the array is initially 0, and may be replaced by a function
pointer of type XT_INTEXC_HOOK. A handler may be uninstalled by installing 0. pointer of type XT_INTEXC_HOOK. A handler may be uninstalled by installing 0.
The handler for low and medium priority obeys ABI conventions so may be coded The handler for low and medium priority obeys ABI conventions so may be coded

53
portable/ThirdParty/XCC/Xtensa/xtensa_timer.h vendored
View file

@ -1,25 +1,30 @@
/*
/* * FreeRTOS Kernel <DEVELOPMENT BRANCH>
* Copyright (c) 2015-2019 Cadence Design Systems, Inc. * Copyright (C) 2015-2019 Cadence Design Systems, Inc.
* Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
* *
* Permission is hereby granted, free of charge, to any person obtaining * SPDX-License-Identifier: MIT
* a copy of this software and associated documentation files (the
* "Software"), to deal in the Software without restriction, including
* without limitation the rights to use, copy, modify, merge, publish,
* distribute, sublicense, and/or sell copies of the Software, and to
* permit persons to whom the Software is furnished to do so, subject to
* the following conditions:
* *
* The above copyright notice and this permission notice shall be included * Permission is hereby granted, free of charge, to any person obtaining a copy of
* in all copies or substantial portions of the Software. * this software and associated documentation files (the "Software"), to deal in
* the Software without restriction, including without limitation the rights to
* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
* the Software, and to permit persons to whom the Software is furnished to do so,
* subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in all
* copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*
* https://www.FreeRTOS.org
* https://github.com/FreeRTOS
* *
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
* IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
* CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
* TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
* SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*/ */
/* /*
@ -53,9 +58,9 @@
#include <FreeRTOSConfig.h> #include <FreeRTOSConfig.h>
/* /*
Select timer to use for periodic tick, and determine its interrupt number Select timer to use for periodic tick, and determine its interrupt number
and priority. User may specify a timer by defining XT_TIMER_INDEX with -D, and priority. User may specify a timer by defining XT_TIMER_INDEX with -D,
in which case its validity is checked (it must exist in this core and must in which case its validity is checked (it must exist in this core and must
not be on a high priority interrupt - an error will be reported in invalid). not be on a high priority interrupt - an error will be reported in invalid).
Otherwise select the first low or medium priority interrupt timer available. Otherwise select the first low or medium priority interrupt timer available.
*/ */
@ -112,16 +117,16 @@ Otherwise select the first low or medium priority interrupt timer available.
Set processor clock frequency, used to determine clock divisor for timer tick. Set processor clock frequency, used to determine clock divisor for timer tick.
User should BE SURE TO ADJUST THIS for the Xtensa platform being used. User should BE SURE TO ADJUST THIS for the Xtensa platform being used.
If using a supported board via the board-independent API defined in xtbsp.h, If using a supported board via the board-independent API defined in xtbsp.h,
this may be left undefined and frequency and tick divisor will be computed this may be left undefined and frequency and tick divisor will be computed
and cached during run-time initialization. and cached during run-time initialization.
NOTE ON SIMULATOR: NOTE ON SIMULATOR:
Under the Xtensa instruction set simulator, the frequency can only be estimated Under the Xtensa instruction set simulator, the frequency can only be estimated
because it depends on the speed of the host and the version of the simulator. because it depends on the speed of the host and the version of the simulator.
Also because it runs much slower than hardware, it is not possible to achieve Also because it runs much slower than hardware, it is not possible to achieve
real-time performance for most applications under the simulator. A frequency real-time performance for most applications under the simulator. A frequency
too low does not allow enough time between timer interrupts, starving threads. too low does not allow enough time between timer interrupts, starving threads.
To obtain a more convenient but non-real-time tick duration on the simulator, To obtain a more convenient but non-real-time tick duration on the simulator,
compile with xt-xcc option "-DXT_SIMULATOR". compile with xt-xcc option "-DXT_SIMULATOR".
Adjust this frequency to taste (it's not real-time anyway!). Adjust this frequency to taste (it's not real-time anyway!).
*/ */

87
portable/ThirdParty/XCC/Xtensa/xtensa_vectors.S vendored
View file

@ -1,25 +1,30 @@
/*
/* * FreeRTOS Kernel <DEVELOPMENT BRANCH>
* Copyright (c) 2015-2019 Cadence Design Systems, Inc. * Copyright (C) 2015-2019 Cadence Design Systems, Inc.
* Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
* *
* Permission is hereby granted, free of charge, to any person obtaining * SPDX-License-Identifier: MIT
* a copy of this software and associated documentation files (the
* "Software"), to deal in the Software without restriction, including
* without limitation the rights to use, copy, modify, merge, publish,
* distribute, sublicense, and/or sell copies of the Software, and to
* permit persons to whom the Software is furnished to do so, subject to
* the following conditions:
* *
* The above copyright notice and this permission notice shall be included * Permission is hereby granted, free of charge, to any person obtaining a copy of
* in all copies or substantial portions of the Software. * this software and associated documentation files (the "Software"), to deal in
* the Software without restriction, including without limitation the rights to
* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
* the Software, and to permit persons to whom the Software is furnished to do so,
* subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in all
* copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*
* https://www.FreeRTOS.org
* https://github.com/FreeRTOS
* *
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
* IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
* CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
* TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
* SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*/ */
/* /*
@ -36,14 +41,14 @@
medium level interrupts, by calling xt_set_interrupt_handler(). These medium level interrupts, by calling xt_set_interrupt_handler(). These
handlers can be written in C, and must obey C calling convention. The handlers can be written in C, and must obey C calling convention. The
handler table is indexed by the interrupt number. Each handler may be handler table is indexed by the interrupt number. Each handler may be
provided with an argument. provided with an argument.
Note that the system timer interrupt is handled specially, and is Note that the system timer interrupt is handled specially, and is
dispatched to the RTOS-specific handler. This timer cannot be hooked dispatched to the RTOS-specific handler. This timer cannot be hooked
by application code. by application code.
Optional hooks are also provided to install a handler per level at Optional hooks are also provided to install a handler per level at
run-time, made available by compiling this source file with run-time, made available by compiling this source file with
'-DXT_INTEXC_HOOKS' (useful for automated testing). '-DXT_INTEXC_HOOKS' (useful for automated testing).
!! This file is a template that usually needs to be modified to handle !! !! This file is a template that usually needs to be modified to handle !!
@ -83,10 +88,10 @@
This allows more flexibility in locating code without the performance This allows more flexibility in locating code without the performance
overhead of the 'l32r' literal data load in cases where the destination overhead of the 'l32r' literal data load in cases where the destination
is in range of 'call0'. There is an additional benefit in that 'call0' is in range of 'call0'. There is an additional benefit in that 'call0'
has a longer range than 'j' due to the target being word-aligned, so has a longer range than 'j' due to the target being word-aligned, so
the 'l32r' sequence is less likely needed. the 'l32r' sequence is less likely needed.
3. The use of 'call0' with -mlongcalls requires that register a0 not be 3. The use of 'call0' with -mlongcalls requires that register a0 not be
live at the time of the call, which is always the case for a function live at the time of the call, which is always the case for a function
call but needs to be ensured if 'call0' is used as a jump in lieu of 'j'. call but needs to be ensured if 'call0' is used as a jump in lieu of 'j'.
4. This use of 'call0' is independent of the C function call ABI. 4. This use of 'call0' is independent of the C function call ABI.
@ -292,7 +297,7 @@
/* /*
-------------------------------------------------------------------------------- --------------------------------------------------------------------------------
Panic handler. Panic handler.
Should be reached by call0 (preferable) or jump only. If call0, a0 says where Should be reached by call0 (preferable) or jump only. If call0, a0 says where
from. If on simulator, display panic message and abort, else loop indefinitely. from. If on simulator, display panic message and abort, else loop indefinitely.
-------------------------------------------------------------------------------- --------------------------------------------------------------------------------
*/ */
@ -326,7 +331,7 @@ _xt_panic_message:
-------------------------------------------------------------------------------- --------------------------------------------------------------------------------
Hooks to dynamically install handlers for exceptions and interrupts. Hooks to dynamically install handlers for exceptions and interrupts.
Allows automated regression frameworks to install handlers per test. Allows automated regression frameworks to install handlers per test.
Consists of an array of function pointers indexed by interrupt level, Consists of an array of function pointers indexed by interrupt level,
with index 0 containing the entry for user exceptions. with index 0 containing the entry for user exceptions.
Initialized with all 0s, meaning no handler is installed at each level. Initialized with all 0s, meaning no handler is installed at each level.
See comment in xtensa_rtos.h for more details. See comment in xtensa_rtos.h for more details.
@ -358,7 +363,7 @@ _xt_intexc_hooks:
the appropriate stack frame, saves a few vector-specific registers and the appropriate stack frame, saves a few vector-specific registers and
calls XT_RTOS_INT_ENTER to save the rest of the interrupted context calls XT_RTOS_INT_ENTER to save the rest of the interrupted context
and enter the RTOS, then sets up a C environment. It then calls the and enter the RTOS, then sets up a C environment. It then calls the
user's interrupt handler code (which may be coded in C) and finally user's interrupt handler code (which may be coded in C) and finally
calls XT_RTOS_INT_EXIT to transfer control to the RTOS for scheduling. calls XT_RTOS_INT_EXIT to transfer control to the RTOS for scheduling.
While XT_RTOS_INT_EXIT does not return directly to the interruptee, While XT_RTOS_INT_EXIT does not return directly to the interruptee,
@ -734,7 +739,7 @@ _xt_syscall_exc:
-------------------------------------------------------------------------------- --------------------------------------------------------------------------------
Co-Processor Exception Handler (jumped to from User Exception Handler). Co-Processor Exception Handler (jumped to from User Exception Handler).
These exceptions are generated by co-processor instructions, which are only These exceptions are generated by co-processor instructions, which are only
allowed in thread code (not in interrupts or kernel code). This restriction is allowed in thread code (not in interrupts or kernel code). This restriction is
deliberately imposed to reduce the burden of state-save/restore in interrupts. deliberately imposed to reduce the burden of state-save/restore in interrupts.
-------------------------------------------------------------------------------- --------------------------------------------------------------------------------
*/ */
@ -874,8 +879,8 @@ _xt_coproc_exc:
/* /*
The config-specific HAL macro invoked below destroys a2-5, preserves a0-1. The config-specific HAL macro invoked below destroys a2-5, preserves a0-1.
It is theoretically possible for Xtensa processor designers to write TIE It is theoretically possible for Xtensa processor designers to write TIE
that causes more address registers to be affected, but it is generally that causes more address registers to be affected, but it is generally
unlikely. If that ever happens, more registers needs to be saved/restored unlikely. If that ever happens, more registers needs to be saved/restored
around this macro invocation, and the value in a15 needs to be recomputed. around this macro invocation, and the value in a15 needs to be recomputed.
*/ */
@ -900,8 +905,8 @@ _xt_coproc_exc:
/* /*
The config-specific HAL macro invoked below destroys a2-5, preserves a0-1. The config-specific HAL macro invoked below destroys a2-5, preserves a0-1.
It is theoretically possible for Xtensa processor designers to write TIE It is theoretically possible for Xtensa processor designers to write TIE
that causes more address registers to be affected, but it is generally that causes more address registers to be affected, but it is generally
unlikely. If that ever happens, more registers needs to be saved/restored unlikely. If that ever happens, more registers needs to be saved/restored
around this macro invocation. around this macro invocation.
*/ */
@ -953,7 +958,7 @@ _xt_coproc_exc:
------------------------------------------------------------------------------- -------------------------------------------------------------------------------
*/ */
.text .text
.type _xt_lowint1,@function .type _xt_lowint1,@function
.align 4 .align 4
@ -973,12 +978,12 @@ _xt_lowint1:
/* Save rest of interrupt context and enter RTOS. */ /* Save rest of interrupt context and enter RTOS. */
call0 XT_RTOS_INT_ENTER /* common RTOS interrupt entry */ call0 XT_RTOS_INT_ENTER /* common RTOS interrupt entry */
/* !! We are now on the RTOS system stack !! */ /* !! We are now on the RTOS system stack !! */
/* Set up PS for C, enable interrupts above this level and clear EXCM. */ /* Set up PS for C, enable interrupts above this level and clear EXCM. */
#ifdef __XTENSA_CALL0_ABI__ #ifdef __XTENSA_CALL0_ABI__
movi a0, PS_INTLEVEL(1) | PS_UM movi a0, PS_INTLEVEL(1) | PS_UM
#else #else
movi a0, PS_INTLEVEL(1) | PS_UM | PS_WOE movi a0, PS_INTLEVEL(1) | PS_UM | PS_WOE
#endif #endif
wsr a0, PS wsr a0, PS
@ -1010,7 +1015,7 @@ _xt_lowint1:
the appropriate stack frame, saves a few vector-specific registers and the appropriate stack frame, saves a few vector-specific registers and
calls XT_RTOS_INT_ENTER to save the rest of the interrupted context calls XT_RTOS_INT_ENTER to save the rest of the interrupted context
and enter the RTOS, then sets up a C environment. It then calls the and enter the RTOS, then sets up a C environment. It then calls the
user's interrupt handler code (which may be coded in C) and finally user's interrupt handler code (which may be coded in C) and finally
calls XT_RTOS_INT_EXIT to transfer control to the RTOS for scheduling. calls XT_RTOS_INT_EXIT to transfer control to the RTOS for scheduling.
While XT_RTOS_INT_EXIT does not return directly to the interruptee, While XT_RTOS_INT_EXIT does not return directly to the interruptee,
@ -1392,7 +1397,7 @@ and used for purposes requiring very short service times.
Here are templates for high priority (level 2+) interrupt vectors. Here are templates for high priority (level 2+) interrupt vectors.
They assume only one interrupt per level to avoid the burden of identifying They assume only one interrupt per level to avoid the burden of identifying
which interrupts at this level are pending and enabled. This allows for which interrupts at this level are pending and enabled. This allows for
minimum latency and avoids having to save/restore a2 in addition to a0. minimum latency and avoids having to save/restore a2 in addition to a0.
If more than one interrupt per high priority level is configured, this burden If more than one interrupt per high priority level is configured, this burden
is on the handler which in any case must provide a way to save and restore is on the handler which in any case must provide a way to save and restore
@ -1655,12 +1660,12 @@ _xt_nmi:
WINDOW OVERFLOW AND UNDERFLOW EXCEPTION VECTORS AND ALLOCA EXCEPTION HANDLER WINDOW OVERFLOW AND UNDERFLOW EXCEPTION VECTORS AND ALLOCA EXCEPTION HANDLER
Here is the code for each window overflow/underflow exception vector and Here is the code for each window overflow/underflow exception vector and
(interspersed) efficient code for handling the alloca exception cause. (interspersed) efficient code for handling the alloca exception cause.
Window exceptions are handled entirely in the vector area and are very Window exceptions are handled entirely in the vector area and are very
tight for performance. The alloca exception is also handled entirely in tight for performance. The alloca exception is also handled entirely in
the window vector area so comes at essentially no cost in code size. the window vector area so comes at essentially no cost in code size.
Users should never need to modify them and Cadence Design Systems recommends Users should never need to modify them and Cadence Design Systems recommends
they do not. they do not.
Window handlers go at predetermined vector locations according to the Window handlers go at predetermined vector locations according to the