mirror of
https://github.com/FreeRTOS/FreeRTOS-Kernel.git
synced 2025-04-20 05:21:59 -04:00
Tidy up an comment.
This commit is contained in:
Richard Barry
parent
b8104d386f
commit
b56d2c8d6b
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@ -35,7 +35,7 @@
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#include "semphr.h"
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#include "task.h"
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/* Demo includes. */
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/* Hardware includes. */
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#include "fecbd.h"
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#include "mii.h"
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#include "eth_phy.h"
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@ -45,9 +45,6 @@
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#include "uip.h"
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#include "uip_arp.h"
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#define MCF_FEC_MSCR_MII_SPEED(x) (((x)&0x3F)<<0x1)
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#define MCF_FEC_RCR_MAX_FL(x) (((x)&0x7FF)<<0x10)
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/* Delay between polling the PHY to see if a link has been established. */
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#define fecLINK_DELAY ( 500 / portTICK_RATE_MS )
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@ -55,15 +52,12 @@
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#define fecMII_DELAY ( 10 / portTICK_RATE_MS )
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#define fecMAX_POLLS ( 20 )
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/* Delay between looking for incoming packets. In ideal world this would be
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infinite. */
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#define netifBLOCK_TIME_WAITING_FOR_INPUT fecLINK_DELAY
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/* Constants used to delay while waiting for a tx descriptor to be free. */
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#define fecTX_BUFFER_WAIT ( 200 / portTICK_RATE_MS )
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#define fecMAX_WAIT_FOR_TX_BUFFER ( 200 / portTICK_RATE_MS )
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/* We only use a single Tx descriptor - the duplicate send silicon errata
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actually assists in this case. */
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/* We only use a single Tx descriptor which can lead to Txed packets being sent
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twice (due to a bug in the FEC silicon). However, in this case the bug is used
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to our advantage in that it means the uip-split mechanism is not required. */
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#define fecNUM_FEC_TX_BUFFERS ( 1 )
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#define fecTX_BUFFER_TO_USE ( 0 )
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/*-----------------------------------------------------------*/
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@ -72,7 +66,7 @@ actually assists in this case. */
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xSemaphoreHandle xFECSemaphore = NULL, xTxSemaphore = NULL;
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/* The buffer used by the uIP stack. In this case the pointer is used to
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point to one of the Rx buffers. */
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point to one of the Rx buffers to effect a zero copy policy. */
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unsigned portCHAR *uip_buf;
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/* The DMA descriptors. This is a char array to allow us to align it correctly. */
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@ -81,17 +75,27 @@ static unsigned portCHAR xFECRxDescriptors_unaligned[ ( configNUM_FEC_RX_BUFFERS
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static FECBD *xFECTxDescriptors;
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static FECBD *xFECRxDescriptors;
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/* The DMA buffers. These are char arrays to allow them to be alligned correctly. */
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/* The DMA buffers. These are char arrays to allow them to be aligned correctly. */
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static unsigned portCHAR ucFECRxBuffers[ ( configNUM_FEC_RX_BUFFERS * configFEC_BUFFER_SIZE ) + 16 ];
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static unsigned portBASE_TYPE uxNextRxBuffer = 0, uxIndexToBufferOwner = 0;
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/*-----------------------------------------------------------*/
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/*
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* Enable all the required interrupts in the FEC and in the interrupt controller.
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*/
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static void prvEnableFECInterrupts( void );
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/*
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* Reset the FEC if we get into an unrecoverable state.
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*/
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static void prvResetFEC( portBASE_TYPE xCalledFromISR );
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/********************************************************************/
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/*
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* FUNCTION ADAPTED FROM FREESCALE SUPPLIED SOURCE
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*
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* Write a value to a PHY's MII register.
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*
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* Parameters:
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@ -157,6 +161,8 @@ uint32 eimr;
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/********************************************************************/
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/*
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* FUNCTION ADAPTED FROM FREESCALE SUPPLIED SOURCE
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*
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* Read a value from a PHY's MII register.
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*
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* Parameters:
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@ -225,6 +231,8 @@ uint32 eimr;
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/********************************************************************/
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/*
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* FUNCTION ADAPTED FROM FREESCALE SUPPLIED SOURCE
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*
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* Generate the hash table settings for the given address
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*
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* Parameters:
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@ -264,6 +272,8 @@ int i, j;
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/********************************************************************/
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/*
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* FUNCTION ADAPTED FROM FREESCALE SUPPLIED SOURCE
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*
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* Set the Physical (Hardware) Address and the Individual Address
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* Hash in the selected FEC
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*
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@ -303,6 +313,7 @@ static void prvInitialiseFECBuffers( void )
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unsigned portBASE_TYPE ux;
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unsigned portCHAR *pcBufPointer;
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/* Correctly align the Tx descriptor pointer. */
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pcBufPointer = &( xFECTxDescriptors_unaligned[ 0 ] );
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while( ( ( unsigned portLONG ) pcBufPointer & 0x0fUL ) != 0 )
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{
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@ -311,6 +322,7 @@ unsigned portCHAR *pcBufPointer;
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xFECTxDescriptors = ( FECBD * ) pcBufPointer;
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/* Likewise the Rx descriptor pointer. */
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pcBufPointer = &( xFECRxDescriptors_unaligned[ 0 ] );
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while( ( ( unsigned portLONG ) pcBufPointer & 0x0fUL ) != 0 )
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{
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@ -320,9 +332,9 @@ unsigned portCHAR *pcBufPointer;
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xFECRxDescriptors = ( FECBD * ) pcBufPointer;
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/* Setup the buffers and descriptors. The data member does not point
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anywhere yet as there is not yet anything to send and a zero copy policy
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is used. */
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/* Setup the Tx buffers and descriptors. There is no separate Tx buffer
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to point to (the Rx buffers are actually used) so the data member is
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set to NULL for now. */
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for( ux = 0; ux < fecNUM_FEC_TX_BUFFERS; ux++ )
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{
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xFECTxDescriptors[ ux ].status = TX_BD_TC;
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@ -330,6 +342,8 @@ unsigned portCHAR *pcBufPointer;
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xFECTxDescriptors[ ux ].length = 0;
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}
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/* Setup the Rx buffers and descriptors, having first ensured correct
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alignment. */
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pcBufPointer = &( ucFECRxBuffers[ 0 ] );
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while( ( ( unsigned portLONG ) pcBufPointer & 0x0fUL ) != 0 )
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{
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@ -352,10 +366,12 @@ unsigned portCHAR *pcBufPointer;
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}
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/*-----------------------------------------------------------*/
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void vInitFEC( void )
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void vFECInit( void )
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{
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unsigned portSHORT usData;
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struct uip_eth_addr xAddr;
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/* The MAC address is set at the foot of FreeRTOSConfig.h. */
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const unsigned portCHAR ucMACAddress[6] =
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{
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configMAC_0, configMAC_1,configMAC_2, configMAC_3, configMAC_4, configMAC_5
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@ -363,8 +379,12 @@ const unsigned portCHAR ucMACAddress[6] =
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/* Create the semaphore used by the ISR to wake the uIP task. */
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vSemaphoreCreateBinary( xFECSemaphore );
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/* Create the semaphore used to unblock any tasks that might be waiting
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for a Tx descriptor. */
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vSemaphoreCreateBinary( xTxSemaphore );
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/* Initialise all the buffers and descriptors used by the DMA. */
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prvInitialiseFECBuffers();
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for( usData = 0; usData < 6; usData++ )
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@ -498,6 +518,7 @@ const unsigned portCHAR ucMACAddress[6] =
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prvEnableFECInterrupts();
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/* Finally... enable. */
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MCF_FEC_ECR = MCF_FEC_ECR_ETHER_EN;
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MCF_FEC_RDAR = MCF_FEC_RDAR_R_DES_ACTIVE;
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}
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@ -512,6 +533,7 @@ unsigned portBASE_TYPE ux;
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#error configFEC_INTERRUPT_PRIORITY must be less than or equal to configMAX_SYSCALL_INTERRUPT_PRIORITY
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#endif
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/* Set the priority of each of the FEC interrupts. */
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for( ux = uxFirstFECVector; ux <= uxLastFECVector; ux++ )
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{
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MCF_INTC0_ICR( ux ) = MCF_INTC_ICR_IL( configFEC_INTERRUPT_PRIORITY );
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@ -536,12 +558,15 @@ static void prvResetFEC( portBASE_TYPE xCalledFromISR )
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{
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portBASE_TYPE x;
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/* A critical section is used unless this function is being called from
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an ISR. */
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if( xCalledFromISR == pdFALSE )
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{
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taskENTER_CRITICAL();
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}
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{
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/* Reset all buffers and descriptors. */
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prvInitialiseFECBuffers();
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/* Set the Reset bit and clear the Enable bit */
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@ -553,6 +578,7 @@ portBASE_TYPE x;
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asm( "NOP" );
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}
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/* Re-enable. */
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MCF_FEC_ECR = MCF_FEC_ECR_ETHER_EN;
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MCF_FEC_RDAR = MCF_FEC_RDAR_R_DES_ACTIVE;
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}
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@ -564,7 +590,7 @@ portBASE_TYPE x;
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}
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/*-----------------------------------------------------------*/
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unsigned short usGetFECRxData( void )
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unsigned short usFECGetRxedData( void )
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{
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unsigned portSHORT usLen;
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@ -584,7 +610,7 @@ unsigned portSHORT usLen;
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}
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/*-----------------------------------------------------------*/
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void vDiscardRxData( void )
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void vFECRxProcessingCompleted( void )
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{
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/* Free the descriptor as the buffer it points to is no longer in use. */
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xFECRxDescriptors[ uxNextRxBuffer ].status |= RX_BD_E;
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@ -597,10 +623,10 @@ void vDiscardRxData( void )
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}
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/*-----------------------------------------------------------*/
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void vSendBufferToFEC( void )
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void vFECSendData( void )
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{
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/* Ensure no Tx frames are outstanding. */
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if( xSemaphoreTake( xTxSemaphore, fecTX_BUFFER_WAIT ) == pdPASS )
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if( xSemaphoreTake( xTxSemaphore, fecMAX_WAIT_FOR_TX_BUFFER ) == pdPASS )
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{
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/* Get a DMA buffer into which we can write the data to send. */
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if( xFECTxDescriptors[ fecTX_BUFFER_TO_USE ].status & TX_BD_R )
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@ -615,7 +641,7 @@ void vSendBufferToFEC( void )
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else
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{
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/* Setup the buffer descriptor for transmission. The data being
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sent is actually stored in one of the Rx descripter buffers,
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sent is actually stored in one of the Rx descriptor buffers,
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pointed to by uip_buf. */
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xFECTxDescriptors[ fecTX_BUFFER_TO_USE ].length = uip_len;
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xFECTxDescriptors[ fecTX_BUFFER_TO_USE ].status |= ( TX_BD_R | TX_BD_L );
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@ -637,7 +663,8 @@ void vSendBufferToFEC( void )
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}
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else
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{
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vDiscardRxData();
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/* Gave up waiting. Free the buffer back to the DMA. */
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vFECRxProcessingCompleted();
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}
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}
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/*-----------------------------------------------------------*/
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@ -647,6 +674,10 @@ void vFEC_ISR( void )
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unsigned portLONG ulEvent;
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portBASE_TYPE xHighPriorityTaskWoken = pdFALSE;
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/* This handler is called in response to any of the many separate FEC
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interrupt. */
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/* Find the cause of the interrupt, then clear the interrupt. */
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ulEvent = MCF_FEC_EIR & MCF_FEC_EIMR;
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MCF_FEC_EIR = ulEvent;
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@ -675,6 +706,8 @@ portBASE_TYPE xHighPriorityTaskWoken = pdFALSE;
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}
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/*-----------------------------------------------------------*/
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/* Install the many different interrupt vectors, all of which call the same
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handler function. */
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void __attribute__ ((interrupt)) __cs3_isr_interrupt_87( void ) { vFEC_ISR(); }
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void __attribute__ ((interrupt)) __cs3_isr_interrupt_88( void ) { vFEC_ISR(); }
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void __attribute__ ((interrupt)) __cs3_isr_interrupt_89( void ) { vFEC_ISR(); }
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@ -70,10 +70,10 @@ typedef struct {
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int rfsw_tr; /* RFSW Truncated */
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} FEC_EVENT_LOG;
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void vInitFEC( void );
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unsigned short usGetFECRxData( void );
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void vSendBufferToFEC( void );
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void vDiscardRxData( void );
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void vFECInit( void );
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unsigned short usFECGetRxedData( void );
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void vFECSendData( void );
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void vFECRxProcessingCompleted( void );
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/********************************************************************/
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@ -265,6 +265,33 @@ static PT_THREAD(led_io(struct httpd_state *s, char *ptr))
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PSOCK_GENERATOR_SEND(&s->sout, generate_io_state, NULL);
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PSOCK_END(&s->sout);
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}
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/*---------------------------------------------------------------------------*/
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void vApplicationProcessFormInput( char *pcInputString )
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{
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char *c = pcInputString;
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/* Process the form input sent by the IO page of the served HTML.
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This just contains an instruction to either turn on or off the LED. */
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while( ( *c != '?' ) && ( *c != 0x00 ) )
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{
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c++;
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}
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if( *c == '?' )
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{
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c++;
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if( strcmp( c, "LED0=1" ) == 0 )
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{
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vParTestSetLED( 3, 1 );
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}
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else
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{
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vParTestSetLED( 3, 0 );
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}
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}
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}
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/** @} */
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@ -29,6 +29,11 @@
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port sections of the online documentation.
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***************************************************************************
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*/
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/* Task that controls the uIP TCP/IP stack. */
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/* Standard includes. */
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#include <string.h>
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@ -48,23 +53,12 @@
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#include "FEC.h"
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#include "partest.h"
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//struct timer {
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// clock_time_t start;
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// clock_time_t interval;
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//};
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/*-----------------------------------------------------------*/
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/* How long to wait before attempting to connect the MAC again. */
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#define uipINIT_WAIT 100
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/* Shortcut to the header within the Rx buffer. */
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#define xHeader ((struct uip_eth_hdr *) &uip_buf[ 0 ])
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/* Standard constant. */
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#define uipTOTAL_FRAME_HEADER_SIZE 54
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/*-----------------------------------------------------------*/
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/*
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@ -72,6 +66,9 @@
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*/
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void clock_init( void );
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clock_time_t clock_time( void );
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extern void timer_set(struct timer *t, clock_time_t interval);
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extern int timer_expired(struct timer *t);
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extern void timer_reset(struct timer *t);
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/*-----------------------------------------------------------*/
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@ -92,19 +89,13 @@ clock_time_t clock_time( void )
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{
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return xTaskGetTickCount();
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}
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extern void timer_set(struct timer *t, clock_time_t interval);
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extern int timer_expired(struct timer *t);
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extern void timer_reset(struct timer *t);
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/*-----------------------------------------------------------*/
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void vuIP_Task( void *pvParameters )
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{
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portBASE_TYPE i;
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uip_ipaddr_t xIPAddr;
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struct timer periodic_timer, arp_timer;
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extern void ( vEMAC_ISR )( void );
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/* To prevent compiler warnings. */
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( void ) pvParameters;
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@ -115,14 +106,17 @@ extern void ( vEMAC_ISR )( void );
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uip_init();
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uip_ipaddr( xIPAddr, configIP_ADDR0, configIP_ADDR1, configIP_ADDR2, configIP_ADDR3 );
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uip_sethostaddr( xIPAddr );
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/* Initialise the WEB server. */
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httpd_init();
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vInitFEC();
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/* Initialise the Ethernet controller peripheral. */
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vFECInit();
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for( ;; )
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{
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/* Is there received data ready to be processed? */
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uip_len = usGetFECRxData();
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uip_len = usFECGetRxedData();
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if( uip_len > 0 )
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{
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@ -139,11 +133,13 @@ extern void ( vEMAC_ISR )( void );
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if( uip_len > 0 )
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{
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uip_arp_out();
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vSendBufferToFEC();
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vFECSendData();
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}
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else
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{
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vDiscardRxData();
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/* If we are not sending data then let the FEC driver know
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the buffer is no longer required. */
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vFECRxProcessingCompleted();
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}
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}
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else if( xHeader->type == htons( UIP_ETHTYPE_ARP ) )
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@ -155,16 +151,20 @@ extern void ( vEMAC_ISR )( void );
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uip_len is set to a value > 0. */
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if( uip_len > 0 )
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{
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vSendBufferToFEC();
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vFECSendData();
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}
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else
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{
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vDiscardRxData();
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/* If we are not sending data then let the FEC driver know
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the buffer is no longer required. */
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vFECRxProcessingCompleted();
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}
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}
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else
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{
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vDiscardRxData();
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/* If we are not sending data then let the FEC driver know
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the buffer is no longer required. */
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vFECRxProcessingCompleted();
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}
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}
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else
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|
@ -182,7 +182,7 @@ extern void ( vEMAC_ISR )( void );
|
|||
if( uip_len > 0 )
|
||||
{
|
||||
uip_arp_out();
|
||||
vSendBufferToFEC();
|
||||
vFECSendData();
|
||||
}
|
||||
}
|
||||
|
||||
|
|
@ -206,29 +206,5 @@ extern void ( vEMAC_ISR )( void );
|
|||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
void vApplicationProcessFormInput( portCHAR *pcInputString )
|
||||
{
|
||||
char *c = pcInputString;
|
||||
|
||||
/* Process the form input sent by the IO page of the served HTML. */
|
||||
while( ( *c != '?' ) && ( *c != 0x00 ) )
|
||||
{
|
||||
c++;
|
||||
}
|
||||
|
||||
if( *c == '?' )
|
||||
{
|
||||
c++;
|
||||
if( strcmp( c, "LED0=1" ) == 0 )
|
||||
{
|
||||
vParTestSetLED( 3, 1 );
|
||||
}
|
||||
else
|
||||
{
|
||||
vParTestSetLED( 3, 0 );
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
|
|
|||
Loading…
Reference in a new issue