Work in progress.

Demo/CORTEX_LPC1766_GCC_RedSuite/RTOSDemo/.cproject

@@ -393,7 +393,10 @@
 <projectStorage>&lt;?xml version="1.0" encoding="UTF-8"?&gt;&#13;
 &lt;TargetConfig&gt;&#13;
 &lt;Properties property_0="" property_1="" property_2="" property_3="NXP" property_4="LPC1766ENG" property_count="5" version="1"/&gt;&#13;
-&lt;infoList vendor="NXP"&gt;&lt;info chip="LPC1766ENG" match_id="0x00033f33" name="LPC1766ENG"&gt;&lt;chip&gt;&lt;name&gt;LPC1766ENG&lt;/name&gt;&#13;
+&lt;infoList vendor="NXP"&gt;&#13;
+&lt;info chip="LPC1766ENG" match_id="0x00033f33" name="LPC1766ENG"&gt;&#13;
+&lt;chip&gt;&#13;
+&lt;name&gt;LPC1766ENG&lt;/name&gt;&#13;
 &lt;family&gt;LPC17xx&lt;/family&gt;&#13;
 &lt;vendor&gt;NXP (formerly Philips)&lt;/vendor&gt;&#13;
 &lt;reset board="None" core="Real" sys="Real"/&gt;&#13;
@@ -445,7 +448,8 @@
 &lt;peripheralInstance derived_from="MPU" determined="infoFile" id="MPU" location="0xE000ED90"/&gt;&#13;
 &lt;peripheralInstance derived_from="LPC1x_WDT" determined="infoFile" id="WDT" location="0x40000000"/&gt;&#13;
 &lt;/chip&gt;&#13;
-&lt;processor&gt;&lt;name gcc_name="cortex-m3"&gt;Cortex-M3&lt;/name&gt;&#13;
+&lt;processor&gt;&#13;
+&lt;name gcc_name="cortex-m3"&gt;Cortex-M3&lt;/name&gt;&#13;
 &lt;family&gt;Cortex-M&lt;/family&gt;&#13;
 &lt;/processor&gt;&#13;
 &lt;link href="nxp_lpcxxxx_peripheral.xme" show="embed" type="simple"/&gt;&#13;

Demo/CORTEX_LPC1766_GCC_RedSuite/RTOSDemo/FreeRTOSConfig.h

@@ -97,6 +97,26 @@ to exclude the API function. */
 #define INCLUDE_uxTaskGetStackHighWaterMark	1
 
 
+/* MAC address configuration. */
+#define configMAC_ADDR0	0x00
+#define configMAC_ADDR1	0x12
+#define configMAC_ADDR2	0x13
+#define configMAC_ADDR3	0x10
+#define configMAC_ADDR4	0x15
+#define configMAC_ADDR5	0x11
+
+/* IP address configuration. */
+#define configIP_ADDR0		192
+#define configIP_ADDR1		168
+#define configIP_ADDR2		0
+#define configIP_ADDR3		200	
+
+/* Netmask configuration. */
+#define configNET_MASK0		255
+#define configNET_MASK1		255
+#define configNET_MASK2		255
+#define configNET_MASK3		0
+
 /* Use the system definition, if there is one */
 #ifdef __NVIC_PRIO_BITS
 	#define configPRIO_BITS       __NVIC_PRIO_BITS

Demo/CORTEX_LPC1766_GCC_RedSuite/RTOSDemo/Makefile

@@ -108,7 +108,6 @@ FreeRTOS_OBJS=			$(OUTPUT_DIR)/port.o \
 # The demo app source files.
 Demo_OBJS=				$(OUTPUT_DIR)/main.o \
 						$(OUTPUT_DIR)/BlockQ.o \
-						$(OUTPUT_DIR)/death.o \
 						$(OUTPUT_DIR)/integer.o \
 						$(OUTPUT_DIR)/PollQ.o \
 						$(OUTPUT_DIR)/semtest.o \

Demo/CORTEX_LPC1766_GCC_RedSuite/RTOSDemo/main.c

@@ -69,7 +69,6 @@
 
 /* Demo app includes. */
 #include "BlockQ.h"
-#include "death.h"
 #include "integer.h"
 #include "blocktim.h"
 #include "flash.h"
@@ -162,12 +161,7 @@ long l;
 	xLCDQueue = xQueueCreate( mainQUEUE_SIZE, sizeof( xLCDMessage ) );
 
 	/* Start the tasks defined within this file/specific to this demo. */
-	xTaskCreate( vLCDTask, ( signed portCHAR * ) "LCD", configMINIMAL_STACK_SIZE, NULL, mainCHECK_TASK_PRIORITY - 1, NULL );
+	xTaskCreate( vLCDTask, ( signed portCHAR * ) "LCD", configMINIMAL_STACK_SIZE * 2, NULL, mainCHECK_TASK_PRIORITY - 1, NULL );
-    
-	/* The suicide tasks must be created last as they need to know how many
-	tasks were running prior to their creation in order to ascertain whether
-	or not the correct/expected number of tasks are running at any given time. */
-    vCreateSuicidalTasks( mainCREATOR_TASK_PRIORITY );
     
     /* Start the scheduler. */
 	vTaskStartScheduler();
@@ -292,6 +286,7 @@ void vConfigureTimerForRunTimeStats( void )
 void vLCDTask( void *pvParameters )
 {
 xLCDMessage xMessage;
+char cIPAddr[ 17 ]; /* To fit max IP address length of xxx.xxx.xxx.xxx\0 */
 
 	( void ) pvParameters;
 
@@ -301,6 +296,9 @@ xLCDMessage xMessage;
     LCD_cls();    
     LCD_gotoxy( 1, 1 );
     LCD_puts( "www.FreeRTOS.org" );
+    LCD_gotoxy( 1, 2 );
+    sprintf( cIPAddr, "%d.%d.%d.%d", configIP_ADDR0, configIP_ADDR1, configIP_ADDR2, configIP_ADDR3 );
+    LCD_puts( cIPAddr );
 
 	for( ;; )
 	{

Demo/CORTEX_LPC1766_GCC_RedSuite/RTOSDemo/webserver/emac.c

@@ -43,16 +43,18 @@ static unsigned short SwapBytes(unsigned short Data)
 void write_PHY (int PhyReg, int Value)
 {
   unsigned int tout;
+  const unsigned int uiMaxTime = 10;
 
   MAC_MADR = DP83848C_DEF_ADR | PhyReg;
   MAC_MWTD = Value;
 
   /* Wait utill operation completed */
   tout = 0;
-  for (tout = 0; tout < MII_WR_TOUT; tout++) {
+  for (tout = 0; tout < uiMaxTime; tout++) {
     if ((MAC_MIND & MIND_BUSY) == 0) {
       break;
     }
+    vTaskDelay( 2 );
   }
 }
 
@@ -61,16 +63,18 @@ void write_PHY (int PhyReg, int Value)
 unsigned short read_PHY (unsigned char PhyReg) 
 {
   unsigned int tout;
+  const unsigned int uiMaxTime = 10;
 
   MAC_MADR = DP83848C_DEF_ADR | PhyReg;
   MAC_MCMD = MCMD_READ;
 
   /* Wait until operation completed */
   tout = 0;
-  for (tout = 0; tout < MII_RD_TOUT; tout++) {
+  for (tout = 0; tout < uiMaxTime; tout++) {
     if ((MAC_MIND & MIND_BUSY) == 0) {
       break;
     }
+    vTaskDelay( 2 );
   }
   MAC_MCMD = 0;
   return (MAC_MRDD);
@@ -135,15 +139,15 @@ portBASE_TYPE xReturn = pdPASS;
   PINSEL3 = (PINSEL3 & ~0x0000000F) | 0x00000005;
 
   /* Power Up the EMAC controller. */
-  PCONP |= 0x40000000;
+  PCONP |= PCONP_PCENET;
-  vTaskDelay( 1 );
+  vTaskDelay( 2 );
 
   /* Reset all EMAC internal modules. */
   MAC_MAC1 = MAC1_RES_TX | MAC1_RES_MCS_TX | MAC1_RES_RX | MAC1_RES_MCS_RX | MAC1_SIM_RES | MAC1_SOFT_RES;
-  MAC_COMMAND = CR_REG_RES | CR_TX_RES | CR_RX_RES;
+  MAC_COMMAND = CR_REG_RES | CR_TX_RES | CR_RX_RES | CR_PASS_RUNT_FRM;
 
   /* A short delay after reset. */
-  vTaskDelay( 1 );
+  vTaskDelay( 2 );
 
   /* Initialize MAC control registers. */
   MAC_MAC1 = MAC1_PASS_ALL;
@@ -157,9 +161,10 @@ portBASE_TYPE xReturn = pdPASS;
 
   /* Reset Reduced MII Logic. */
   MAC_SUPP = SUPP_RES_RMII;
+  vTaskDelay( 2 );
   MAC_SUPP = 0;
 
-  /* Put the DP83848C in reset mode */
+  /* Put the PHY in reset mode */
   write_PHY (PHY_REG_BMCR, 0x8000);
   write_PHY (PHY_REG_BMCR, 0x8000);
 
@@ -173,6 +178,21 @@ portBASE_TYPE xReturn = pdPASS;
     }
   }
 
+  /* Set the Ethernet MAC Address registers */
+  MAC_SA0 = (emacETHADDR0 << 8) | emacETHADDR1;
+  MAC_SA1 = (emacETHADDR2 << 8) | emacETHADDR3;
+  MAC_SA2 = (emacETHADDR4 << 8) | emacETHADDR5;
+
+  /* Initialize Tx and Rx DMA Descriptors */
+  rx_descr_init ();
+  tx_descr_init ();
+
+  /* Receive Broadcast and Perfect Match Packets */
+  MAC_RXFILTERCTRL = RFC_UCAST_EN | RFC_BCAST_EN | RFC_PERFECT_EN;
+
+  /* Create the semaphore used ot wake the uIP task. */
+  vSemaphoreCreateBinary( xEMACSemaphore );  
+  
   /* Check if this is a DP83848C PHY. */
   id1 = read_PHY (PHY_REG_IDR1);
   id2 = read_PHY (PHY_REG_IDR2);
@@ -235,21 +255,6 @@ portBASE_TYPE xReturn = pdPASS;
       MAC_SUPP = SUPP_SPEED;
     }
 
-    /* Set the Ethernet MAC Address registers */
-    MAC_SA0 = (emacETHADDR0 << 8) | emacETHADDR1;
-    MAC_SA1 = (emacETHADDR2 << 8) | emacETHADDR3;
-    MAC_SA2 = (emacETHADDR4 << 8) | emacETHADDR5;
-
-    /* Initialize Tx and Rx DMA Descriptors */
-    rx_descr_init ();
-    tx_descr_init ();
-
-    /* Receive Broadcast and Perfect Match Packets */
-    MAC_RXFILTERCTRL = RFC_UCAST_EN | RFC_BCAST_EN | RFC_PERFECT_EN;
-
-    /* Create the semaphore used ot wake the uIP task. */
-    vSemaphoreCreateBinary( xEMACSemaphore );
-
     /* Reset all interrupts */
     MAC_INTCLEAR  = 0xFFFF;
 

Demo/CORTEX_LPC1766_GCC_RedSuite/RTOSDemo/webserver/uIP_Task.c

@@ -72,20 +72,6 @@
 #include "core_cm3.h"
 /*-----------------------------------------------------------*/
 
-/* MAC address configuration. */
-#define uipMAC_ADDR0	0x00
-#define uipMAC_ADDR1	0x12
-#define uipMAC_ADDR2	0x13
-#define uipMAC_ADDR3	0x10
-#define uipMAC_ADDR4	0x15
-#define uipMAC_ADDR5	0x11
-
-/* IP address configuration. */
-#define uipIP_ADDR0		192
-#define uipIP_ADDR1		168
-#define uipIP_ADDR2		0
-#define uipIP_ADDR3		200	
-
 /* How long to wait before attempting to connect the MAC again. */
 #define uipINIT_WAIT    100
 
@@ -150,8 +136,10 @@ extern void ( vEMAC_ISR_Wrapper )( void );
 	timer_set( &periodic_timer, configTICK_RATE_HZ / 2 );
 	timer_set( &arp_timer, configTICK_RATE_HZ * 10 );
 	uip_init();
-	uip_ipaddr( xIPAddr, uipIP_ADDR0, uipIP_ADDR1, uipIP_ADDR2, uipIP_ADDR3 );
+	uip_ipaddr( xIPAddr, configIP_ADDR0, configIP_ADDR1, configIP_ADDR2, configIP_ADDR3 );
 	uip_sethostaddr( xIPAddr );
+	uip_ipaddr( xIPAddr, configNET_MASK0, configNET_MASK1, configNET_MASK2, configNET_MASK3 );
+	uip_setnetmask( xIPAddr );	
 	httpd_init();
 
 	/* Initialise the MAC. */
@@ -277,12 +265,12 @@ static void prvSetMACAddress( void )
 struct uip_eth_addr xAddr;
 
 	/* Configure the MAC address in the uIP stack. */
-	xAddr.addr[ 0 ] = uipMAC_ADDR0;
+	xAddr.addr[ 0 ] = configMAC_ADDR0;
-	xAddr.addr[ 1 ] = uipMAC_ADDR1;
+	xAddr.addr[ 1 ] = configMAC_ADDR1;
-	xAddr.addr[ 2 ] = uipMAC_ADDR2;
+	xAddr.addr[ 2 ] = configMAC_ADDR2;
-	xAddr.addr[ 3 ] = uipMAC_ADDR3;
+	xAddr.addr[ 3 ] = configMAC_ADDR3;
-	xAddr.addr[ 4 ] = uipMAC_ADDR4;
+	xAddr.addr[ 4 ] = configMAC_ADDR4;
-	xAddr.addr[ 5 ] = uipMAC_ADDR5;
+	xAddr.addr[ 5 ] = configMAC_ADDR5;
 	uip_setethaddr( xAddr );
 }
 /*-----------------------------------------------------------*/