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Cortex-A5 IAR port baseline prior to removing all SAMA5 specifics to make it generic.:

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- Slight improvement to the save context macro.
- Remove some #warning remarks.
- Enable interrupts before calling the ISR handler rather than in the ISR handler.
This commit is contained in:
Richard Barry 2014-08-03 18:37:58 +00:00
parent 3a3d061cc5
commit b2e739495a
4 changed files with 16 additions and 15 deletions
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4
FreeRTOS/Source/portable/IAR/ARM_CA5_No_GIC/port.c
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@ -139,10 +139,6 @@ uint32_t ulPortInterruptNesting = 0UL;
/*-----------------------------------------------------------*/
#warning What about branch distance in asm file.
#warning Does not support flop use in ISRs.
#warning Level interrupts must be cleared in their handling function.
/*
* See header file for description.
*/

3
FreeRTOS/Source/portable/IAR/ARM_CA5_No_GIC/portASM.h
View file

@ -99,9 +99,6 @@ portSAVE_CONTEXT macro
portRESTORE_CONTEXT macro
; Switch to system mode
CPS #SYS_MODE
; Set the SP to point to the stack of the task being restored.
LDR R0, =pxCurrentTCB
LDR R1, [R0]

18
FreeRTOS/Source/portable/IAR/ARM_CA5_No_GIC/portASM.s
View file

@ -73,7 +73,7 @@ IRQ_MODE EQU 0x12
INCLUDE portASM.h
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
; SVC handler is used to start the scheduler and yield a task.
; SVC handler is used to yield a task.
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
FreeRTOS_SWI_Handler
@ -83,10 +83,15 @@ FreeRTOS_SWI_Handler
portSAVE_CONTEXT
LDR R0, =vTaskSwitchContext
BLX R0
vPortRestoreTaskContext
portRESTORE_CONTEXT
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
; vPortRestoreTaskContext is used to start the scheduler.
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
vPortRestoreTaskContext
; Switch to system mode
CPS #SYS_MODE
portRESTORE_CONTEXT
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
; IRQ interrupt handler used when individual priorities cannot be masked
@ -121,11 +126,14 @@ FreeRTOS_IRQ_Handler
AND r2, r2, #4
SUB sp, sp, r2
; Call the interrupt handler
; Obtain the address of the interrupt handler, then call it.
PUSH {r0-r3, lr}
LDR r1, =configINTERRUPT_VECTOR_ADDRESS
LDR r0, [r1]
STR r1, [r1] ; Write to IVR in case protect mode is being used.
STR r1, [r1] ; [SAMA5] Write to IVR in case protect mode is being used.
DSB
ISB
CPSIE i
BLX r0
POP {r0-r3, lr}
ADD sp, sp, r2

6
FreeRTOS/Source/portable/IAR/ARM_CA5_No_GIC/portmacro.h
View file

@ -124,7 +124,7 @@
}
#define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x )
#define portYIELD() __asm( "SWI 0" );
#define portYIELD() __asm( "SWI 0" ); __ISB()
/*-----------------------------------------------------------
@ -138,9 +138,9 @@
#define portENTER_CRITICAL() vPortEnterCritical();
#define portEXIT_CRITICAL() vPortExitCritical();
#define portDISABLE_INTERRUPTS() __disable_irq() /* No priority mask register so global disable is used. */
#define portDISABLE_INTERRUPTS() __disable_irq(); __DSB(); __ISB() /* No priority mask register so global disable is used. */
#define portENABLE_INTERRUPTS() __enable_irq()
#define portSET_INTERRUPT_MASK_FROM_ISR() __get_interrupt_state()
#define portSET_INTERRUPT_MASK_FROM_ISR() __get_interrupt_state(); __disable_irq() /* No priority mask register so global disable is used. */
#define portCLEAR_INTERRUPT_MASK_FROM_ISR(x) __set_interrupt_state(x)
/*-----------------------------------------------------------*/