Fix bug in core_cm3.c atomic macros.

Rename the portable/GCC/RISC-V-RV32 directory to just RISC-V as also adding support for 64-bit cores.
This commit is contained in:
Richard Barry 2019-02-16 01:08:38 +00:00
parent 3153131fa7
commit b2b1b09ea5
33 changed files with 8363 additions and 6092 deletions

View file

@ -69,11 +69,6 @@ interrupt stack after the scheduler has started. */
*/
void vPortSetupTimerInterrupt( void ) __attribute__(( weak ));
/*
* Used to catch tasks that attempt to return from their implementing function.
*/
static void prvTaskExitError( void );
/*-----------------------------------------------------------*/
/* Used to program the machine timer compare register. */
@ -108,22 +103,6 @@ task stack, not the ISR stack). */
/*-----------------------------------------------------------*/
static void prvTaskExitError( void )
{
volatile uint32_t ulx = 0;
#warning Not currently used
/* A function that implements a task must not exit or attempt to return to
its caller as there is nothing to return to. If a task wants to exit it
should instead call vTaskDelete( NULL ).
Artificially force an assert() to be triggered if configASSERT() is
defined, then stop here so application writers can catch the error. */
configASSERT( ulx == ~0UL );
portDISABLE_INTERRUPTS();
for( ;; );
}
/*-----------------------------------------------------------*/
#if( configCLINT_BASE_ADDRESS != 0 )
void vPortSetupTimerInterrupt( void )