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Simplify the Cortus port - removing the interrupt stack and interrupt nesting capability.

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This commit is contained in:
Richard Barry 2010-03-28 17:44:06 +00:00
parent f8b7288033
commit afe2d4fc38
2 changed files with 41 additions and 133 deletions
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55
Source/portable/GCC/CORTUS_APS3/port.c
View file

@ -74,19 +74,12 @@
static void prvSetupTimerInterrupt( void ); static void prvSetupTimerInterrupt( void );
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
/* Variables used to hold interrupt and critical nesting depths, with variables
that provide a convenient method of obtaining their addresses. */
volatile unsigned portBASE_TYPE uxInterruptNestingCount = 999UL;
const volatile unsigned portBASE_TYPE *puxInterruptNestingCount = &uxInterruptNestingCount;
volatile unsigned portBASE_TYPE uxInterruptStack[ configMINIMAL_STACK_SIZE ];
const volatile unsigned portBASE_TYPE *puxTopOfInterruptStack = &( uxInterruptStack[ configMINIMAL_STACK_SIZE - 1 ] );
/*-----------------------------------------------------------*/
portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE * pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters ) portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE * pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )
{ {
/* For the time being, mimic the stack when using the /* For the time being, mimic the stack when using the
__attribute__((interrupt)) plus the extra caller saved registers. */ __attribute__((interrupt)) plus the extra caller saved registers. */
pxTopOfStack -= 17; This leaves a buffer of two works unused. */
pxTopOfStack -= 18;
/* RTT */ /* RTT */
pxTopOfStack[ 16 ] = ( portSTACK_TYPE )pxCode; pxTopOfStack[ 16 ] = ( portSTACK_TYPE )pxCode;
@ -132,14 +125,12 @@ portBASE_TYPE xPortStartScheduler( void )
/* Integrated Interrupt Controller: Enable all interrupts. */ /* Integrated Interrupt Controller: Enable all interrupts. */
ic->ien = 1; ic->ien = 1;
uxInterruptNestingCount = 1UL;
/* Restore calleree saved registers. */ /* Restore callee saved registers. */
portRESTORE_CONTEXT_REDUCED(); portRESTORE_CONTEXT();
/* Mimic an ISR epilogue to start the task executing. */ /* Mimic an ISR epilogue to start the task executing. */
asm __volatile__( \ asm __volatile__( \
"mov r1, r14 \n" \
"ldd r6, [r1]+0x20 \n" \ "ldd r6, [r1]+0x20 \n" \
"mov psr, r6 \n" \ "mov psr, r6 \n" \
"mov rtt, r7 \n" \ "mov rtt, r7 \n" \
@ -171,49 +162,31 @@ static void prvSetupTimerInterrupt( void )
void interrupt_handler( portIRQ_TRAP_YIELD ) void interrupt_handler( portIRQ_TRAP_YIELD )
{ {
/* Save remaining registers. */ /* Save remaining registers. */
portSAVE_CONTEXT_REDUCED(); portSAVE_CONTEXT();
/* Perform the actual Yield. */ vTaskSwitchContext();
portYIELD_FROM_ISR();
/* Restore the first lot of registers, the remains will be resotred when /* Restore the first lot of registers, the remains will be restored when
this function exits. */ this function exits. */
portRESTORE_CONTEXT_REDUCED(); portRESTORE_CONTEXT();
} }
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
/* Timer tick interrupt handler */ /* Timer tick interrupt handler */
void interrupt_handler( IRQ_COUNTER1 ) void interrupt_handler( IRQ_COUNTER1 )
{ {
portSAVE_CONTEXT_REDUCED(); portSAVE_CONTEXT();
asm __volatile__( vTaskIncrementTick();
" sub r1, #4 \n" /* Make space on the stack. r1 is stack pointer. */
" movhi r2, #16384 \n" /* Load the pointer to the IC. */
" ldub r3, [r2]+2 \n" /* Copy the Current Priority Level. */
" st r3, [r1] \n" /* Store it on the stack. */
" mov r3, #%0 \n" /* Load the highest priority level. */
" stb r3, [r2]+2 \n" /* Set the CPL to the highest level. */
" call vTaskIncrementTick \n" /* Increment the tick. */
" ld r3, [r1] \n" /* Load the previous CPL from the stack. */
" movhi r2, #16384 \n" /* Load the pointer to the IC. */
" stb r3, [r2]+2 \n" /* Set the CPL to the previous CPL. */
" add r1, #4 "
:
:"i"( portSYSTEM_INTERRUPT_PRIORITY_LEVEL + 1 )
:"r2","r3" /* Fix the stack. */
);
#if configUSE_PREEMPTION == 1 #if configUSE_PREEMPTION == 1
portYIELD_FROM_ISR(); vTaskSwitchContext();
#endif #endif
{ /* Clear the Tick Interrupt. */
/* Clear the Tick Interrupt. */ counter1->expired = 0;
counter1->expired = 0;
}
portRESTORE_CONTEXT_REDUCED(); portRESTORE_CONTEXT();
} }
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/

119
Source/portable/GCC/CORTUS_APS3/portmacro.h
View file

@ -96,19 +96,13 @@ extern "C" {
#define portCRITICAL_NESTING_IN_TCB 1 #define portCRITICAL_NESTING_IN_TCB 1
#define portIRQ_TRAP_YIELD 31 #define portIRQ_TRAP_YIELD 31
#define portKERNEL_INTERRUPT_PRIORITY_LEVEL 0 #define portKERNEL_INTERRUPT_PRIORITY_LEVEL 0
#define portSYSTEM_INTERRUPT_PRIORITY_LEVEL 1 #define portSYSTEM_INTERRUPT_PRIORITY_LEVEL 0
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
/* Task utilities. */ /* Task utilities. */
extern void vPortYield( void ); extern void vPortYield( void );
/**
* Interrupt Handlers that access RTOS API functions use a separate interrupt stack
* and so the nesting depth needs to be recorded to know when to switch from the
* interrupt stack back to the Task stack.
*/
extern volatile unsigned portBASE_TYPE uxInterruptNestingCount;
/*---------------------------------------------------------------------------*/ /*---------------------------------------------------------------------------*/
#define portYIELD() asm __volatile__( " trap #%0 "::"i"(portIRQ_TRAP_YIELD):"memory") #define portYIELD() asm __volatile__( " trap #%0 "::"i"(portIRQ_TRAP_YIELD):"memory")
@ -124,98 +118,39 @@ extern void vTaskExitCritical( void );
#define portDISABLE_INTERRUPTS() ic->cpl = ( portSYSTEM_INTERRUPT_PRIORITY_LEVEL + 1 ) #define portDISABLE_INTERRUPTS() ic->cpl = ( portSYSTEM_INTERRUPT_PRIORITY_LEVEL + 1 )
#define portENABLE_INTERRUPTS() ic->cpl = portKERNEL_INTERRUPT_PRIORITY_LEVEL #define portENABLE_INTERRUPTS() ic->cpl = portKERNEL_INTERRUPT_PRIORITY_LEVEL
#define portSET_INTERRUPT_MASK_FROM_ISR() ic->cpl; portDISABLE_INTERRUPTS()
#define portRESTORE_INTERRUPT_MASK_FROM_ISR( uxSavedInterruptStatus ) ic->cpl = uxSavedInterruptStatus
/*---------------------------------------------------------------------------*/ /*---------------------------------------------------------------------------*/
#define portYIELD_FROM_ISR() \ #define portYIELD_FROM_ISR() vTaskSwitchContext()
{ \
asm __volatile__( \
" sub r1, #4 \n" /* Make space on the stack. */ \
" movhi r2, #16384 \n" /* Load the pointer to the IC. */ \
" ldub r3, [r2]+2 \n" /* Copy the Current Priority Level. */ \
" st r3, [r1] \n" /* Store it on the stack. */ \
" mov r3, #%0 \n" /* Load the highest priority level. */ \
" stb r3, [r2]+2 \n" /* Set the CPL to the highest level. */ \
" call vTaskSwitchContext \n" /* Select a new pxCurrentTCB. */ \
" ld r3, [r1] \n" /* Load the previous CPL from the stack. */ \
" movhi r2, #16384 \n" /* Load the pointer to the IC. */ \
" stb r3, [r2]+2 \n" /* Set the CPL to the previous CPL. */ \
" add r1, #4 " /* Fix the stack. */ \
: \
:"i"(portSYSTEM_INTERRUPT_PRIORITY_LEVEL+1) \
:"r2","r3"); \
}
/*---------------------------------------------------------------------------*/ /*---------------------------------------------------------------------------*/
#define portSAVE_CONTEXT_REDUCED() \ #define portSAVE_CONTEXT() \
{ \ asm __volatile__( \
asm __volatile__( \ "sub r1, #0x1c \n" /* Make space on the stack. */ \
/* "sub r1, #0x28" */ /* Prologue generated by the compiler. */ \ "stq r8, [r1] \n" /* Store the remaining context registers. */ \
/* "stq r4, [r1]+0x8" */ \ "std r12, [r1]+0x10 \n" \
/* "mov r6, psr" */ \ "movhi r2, #16384 \n" /* Set the pointer to the IC. */ \
/* "mov r7, rtt" */ \ "ldub r3, [r2]+2 \n" /* Load the current interrupt mask. */ \
/* "std r6, [r1]+0x20" */ \ "st r3, [r1]+0x18 \n" /* Store the interrupt mask on the stack. */ \
/* "std r14, [r1]+0x18" */ \ "ld r2, [r0]+short(pxCurrentTCB) \n" /* Load the pointer to the TCB. */ \
/* "std r2, [r1]" */ \ "st r1, [r2] \n" /* Save the stack pointer into the TCB. */ \
/* "mov r14, r1" */ \ "mov r14, r1 \n" /* Compiler expects r14 to be set to the function stack. */ \
"sub r1, #0x1c \n" /* Make space on the stack. */ \ :::"r2","r3","r4","r5","r15" ); /* Clobber list includes all of the caller saved registers so that they are saved as part of the Interrupt handler pre-amble. */
"stq r8, [r1] \n" /* Store the remaining context registers. */ \
"std r12, [r1]+0x10 \n" \
"movhi r2, #16384 \n" /* Set the pointer to the IC. */ \
"ldub r3, [r2]+2 \n" /* Load the current priority level. */ \
"st r3, [r1]+0x18 \n" /* Store the current priority level on the stack. */ \
"ldub r3, [r2]+3 \n" /* Load the interrupt priority level. */ \
"add r3, #1 \n" /* Increase the priority by one. */ \
"stb r3, [r2]+2 \n" /* Set the current priority level to be above this one. */ \
"ld r4, [r0]+short(puxInterruptNestingCount) \n" /*[r0]+short(puxInterruptNestingCount) */ \
"ld r5, [r4] \n" \
"add r5, #1 \n" /* Increment the interrupt nesting count. */ \
"st r5, [r4] \n" \
"cmp r5, #1 \n" /* Is this the first interrupt? */ \
"bne.s 12 \n" /* If it is then save the stack pointer to the current TCB? */ \
"ld r2, [r0]+short(pxCurrentTCB) \n" /* Load the pointer to the TCB. */ \
"st r1, [r2] \n" /* Save the stack pointer into the TCB. */ \
"ld r1, [r0]+short(puxTopOfInterruptStack) \n" /* Switch to the dedicated interrupt stack. */ /* [r0]+short(uxInterruptStack) */ \
"mov r14, r1 \n" /* Compiler expects r14 to be set to the function stack. */ \
"movhi r2, #3 \n" /* Re-enable interrupts (re-enable breakpoints). */ \
"mov psr, r2 \n" \
:::"r2","r3","r4","r5","r15" ); /* Clobber list includes all of the caller saved registers so that they are saved as part of the Interrupt handler pre-amble. */ \
}
/*---------------------------------------------------------------------------*/ /*---------------------------------------------------------------------------*/
#define portRESTORE_CONTEXT_REDUCED() \ #define portRESTORE_CONTEXT() \
{ \ asm __volatile__( \
asm __volatile__( \ "ld r2, [r0]+short(pxCurrentTCB) \n" /* Load the TCB to find the stack pointer and context. */ \
"movhi r2, #2 \n" /* Disable interrupts (disable breakpoints). */ \ "ld r1, [r2] \n" \
"mov psr, r2 \n" \ "movhi r2, #16384 \n" /* Set the pointer to the IC. */ \
"ld r2, [r0]+short(puxInterruptNestingCount) \n" \ "ld r3, [r1]+0x18 \n" /* Load the previous interrupt mask. */ \
"ld r3, [r2] \n" \ "stb r3, [r2]+2 \n" /* Set the current interrupt mask to be the previous. */ \
"sub r3, #1 \n" /* Decrement the interrupt nesting count. */ \ "ldd r12, [r1]+0x10 \n" /* Restore the callee saved registers. Caller saved registers are restored by the function exit. */ \
"st r3, [r2] \n" \ "ldq r8, [r1] \n" \
"cmp r3, r0 \n" /* Is this the first interrupt? */ \ "add r1, #0x1c \n" \
"bne.s 8 \n" /* Are we at the end of unrolling the interrupt nesting? */ \ "mov r14, r1 \n" \
"ld r2, [r0]+short(pxCurrentTCB) \n" /* Load the TCB to find the stack pointer and context. */ \ );
"ld r1, [r2] \n" \
"movhi r2, #16384 \n" /* Set the pointer to the IC. */ \
"ld r3, [r1]+0x18 \n" /* Load the previous current priority level. */ \
"stb r3, [r2]+2 \n" /* Set the current priority level to be the previous. */ \
"ldd r12, [r1]+0x10 \n" /* Restore the callee saved registers. Caller saved registers are restored by the function exit. */ \
"ldq r8, [r1] \n" \
"add r1, #0x1c \n" \
"mov r14, r1 \n" \
/* "mov r1, r14" */ /* Epilogue generated by the compiler. */ \
/* "ldd r6, [r1]+0x20" */ \
/* "mov psr, r6" */ \
/* "mov rtt, r7" */ \
/* "ldd r14, [r1]+0x18" */ \
/* "ldq r4, [r1]+0x8" */ \
/* "ldd r2, [r1]" */ \
/* "add r1, #0x28" */ \
/* "rti" */ \
); \
}
/*---------------------------------------------------------------------------*/ /*---------------------------------------------------------------------------*/
/* Task function macros as described on the FreeRTOS.org WEB site. */ /* Task function macros as described on the FreeRTOS.org WEB site. */