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Changed the way the ARM7/9 GCC ports enter interrupts that can cause a context switch.

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This commit is contained in:
Richard Barry 2007-10-28 13:55:35 +00:00
parent c54ec1c639
commit ada7fa862d
24 changed files with 322 additions and 275 deletions
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4
Demo/WizNET_DEMO_GCC_ARM7/i2c.c
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@ -182,7 +182,7 @@ signed portBASE_TYPE xReturn;
void i2cInit( void )
{
extern void ( vI2C_ISR )( void );
extern void ( vI2C_ISR_Wrapper )( void );
/* Create the queue used to send messages to the ISR. */
vI2CISRCreateQueues( i2cQUEUE_LENGTH, &xMessagesForTx, &pulBusFree );
@ -203,7 +203,7 @@ extern void ( vI2C_ISR )( void );
/* Setup the VIC for the i2c interrupt. */
VICIntSelect &= ~( i2cI2C_VIC_CHANNEL_BIT );
VICIntEnable |= i2cI2C_VIC_CHANNEL_BIT;
VICVectAddr2 = ( portLONG ) vI2C_ISR;
VICVectAddr2 = ( portLONG ) vI2C_ISR_Wrapper;
VICVectCntl2 = i2cI2C_VIC_CHANNEL | i2cI2C_VIC_ENABLE;
}