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https://github.com/FreeRTOS/FreeRTOS-Kernel.git
synced 2025-08-20 01:58:32 -04:00
Changed the way the ARM7/9 GCC ports enter interrupts that can cause a context switch.
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c54ec1c639
commit
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24 changed files with 322 additions and 275 deletions
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@ -96,6 +96,8 @@
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#define mainLED_DELAY ( ( portTickType ) 500 / portTICK_RATE_MS )
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#define mainCHECK_DELAY ( ( portTickType ) 5000 / portTICK_RATE_MS )
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#define mainLIST_BUFFER_SIZE 2048
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#define mainNO_DELAY ( 0 )
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#define mainSHORT_DELAY ( 150 / portTICK_RATE_MS )
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/* Task priorities. */
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#define mainLED_TASK_PRIORITY ( tskIDLE_PRIORITY + 2 )
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@ -178,7 +180,7 @@ int main( void )
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/* Start the scheduler. */
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vTaskStartScheduler();
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/* The scheduler should now running, so we will only ever reach here if we
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/* The scheduler should now be running, so we will only ever reach here if we
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ran out of heap space. */
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return 0;
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@ -290,7 +292,7 @@ static void vButtonHandlerTask( void *pvParameters )
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static portCHAR cListBuffer[ mainLIST_BUFFER_SIZE ];
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const portCHAR *pcList = &( cListBuffer[ 0 ] );
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const portCHAR * const pcHeader = "\nTask State Priority Stack #\n************************************************";
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extern void (vButtonISR) ( void );
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extern void (vButtonISRWrapper) ( void );
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/* Configure the interrupt. */
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portENTER_CRITICAL();
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@ -303,15 +305,19 @@ extern void (vButtonISR) ( void );
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/* Setup the VIC for EINT 1. */
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VICIntSelect &= ~mainEINT_1_VIC_CHANNEL_BIT;
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VICIntEnable |= mainEINT_1_VIC_CHANNEL_BIT;
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VICVectAddr1 = ( portLONG ) vButtonISR;
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VICVectAddr1 = ( portLONG ) vButtonISRWrapper;
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VICVectCntl1 = mainEINT_1_ENABLE_BIT | mainEINT_1_CHANNEL;
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}
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portEXIT_CRITICAL();
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for( ;; )
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{
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/* For debouncing, wait a while then clear the semaphore. */
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vTaskDelay( mainSHORT_DELAY );
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xSemaphoreTake( xButtonSemaphore, mainNO_DELAY );
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/* Wait for an interrupt. */
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while( xSemaphoreTake( xButtonSemaphore, portMAX_DELAY ) != pdPASS );
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xSemaphoreTake( xButtonSemaphore, portMAX_DELAY );
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/* Send the column headers to the print task for display. */
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xQueueSend( xPrintQueue, &pcHeader, portMAX_DELAY );
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