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Changed the way the ARM7/9 GCC ports enter interrupts that can cause a context switch.

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This commit is contained in:
Richard Barry 2007-10-28 13:55:35 +00:00
parent c54ec1c639
commit ada7fa862d
24 changed files with 322 additions and 275 deletions
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4
Demo/ARM7_LPC2106_GCC/serial/serial.c
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@ -118,7 +118,7 @@ xComPortHandle xSerialPortInitMinimal( unsigned portLONG ulWantedBaud, unsigned
{
unsigned portLONG ulDivisor, ulWantedClock;
xComPortHandle xReturn = serHANDLE;
extern void ( vUART_ISR )( void );
extern void ( vUART_ISR_Wrapper )( void );
/* The queues are used in the serial ISR routine, so are created from
serialISR.c (which is always compiled to ARM mode. */
@ -153,7 +153,7 @@ extern void ( vUART_ISR )( void );
/* Setup the VIC for the UART. */
VICIntSelect &= ~( serUART0_VIC_CHANNEL_BIT );
VICIntEnable |= serUART0_VIC_CHANNEL_BIT;
VICVectAddr1 = ( portLONG ) vUART_ISR;
VICVectAddr1 = ( portLONG ) vUART_ISR_Wrapper;
VICVectCntl1 = serUART0_VIC_CHANNEL | serUART0_VIC_ENABLE;
/* Enable UART0 interrupts. */