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Just tidy up the RX port files.
This commit is contained in:
Richard Barry
parent
a33e3b3979
commit
ac19e40336
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@ -63,45 +63,44 @@
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#include "string.h"
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/* Hardware specifics. */
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#include <machine.h>
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#include "iodefine.h"
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/*-----------------------------------------------------------*/
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/* Tasks should start with interrupts enabled, therefore PSW is set with U,I,PM
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flags set and IPL clear. */
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/*
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U = 1 User stack pointer.
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I = 1 Interrupts enabled.
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PM = 0 Supervisor mode.
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IPL = 0 All interrupt priorities enabled.
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*/
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/* Tasks should start with interrupts enabled and in Supervisor mode, therefore
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PSW is set with U and I set, and PM and IPL clear. */
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#define portINITIAL_PSW ( ( portSTACK_TYPE ) 0x00030000 )
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#define portINITIAL_FPSW ( ( portSTACK_TYPE ) 0x00000100 )
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/*-----------------------------------------------------------*/
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/*
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*
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* Function to start the first task executing - written in asm code as direct
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* access to registers is required.
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*/
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void vPortYield( void );
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/*
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* Function to start the first task executing.
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*/
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void vPortStartFirstTask( void );
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void vPortPendContextSwitch( void );
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static void prvStartFirstTask( void );
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/*
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* Software interrupt handler. Performs the actual context switch (saving and
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* restoring of registers). Written in asm code as direct register access is
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* required.
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*/
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static void prvYieldHandler( void );
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/*
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* The entry point for the software interrupt handler. This is the function
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* that calls the inline asm function prvYieldHandler(). It is installed in
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* the vector table, but the code that installs it is in prvYieldHandler rather
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* than using a #pragma.
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*/
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void vSoftwareInterruptISR( void );
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/*-----------------------------------------------------------*/
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/* This is accessed by the inline assembler functions so is file scope for
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convenience. */
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extern void *pxCurrentTCB;
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extern void vTaskSwitchContext( void );
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/*-----------------------------------------------------------*/
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@ -117,6 +116,12 @@ portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE
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*pxTopOfStack = portINITIAL_PSW;
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pxTopOfStack--;
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*pxTopOfStack = ( portSTACK_TYPE ) pxCode;
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/* When debugging it can be useful if every register is set to a known
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value. Otherwise code space can be saved by just setting the registers
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that need to be set. */
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#ifdef USE_FULL_REGISTER_INITIALISATION
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{
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pxTopOfStack--;
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*pxTopOfStack = 0xffffffff; /* r15. */
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pxTopOfStack--;
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@ -146,6 +151,13 @@ portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE
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pxTopOfStack--;
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*pxTopOfStack = 0x22222222;
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pxTopOfStack--;
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}
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#else
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{
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pxTopOfStack -= 15;
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}
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#endif
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*pxTopOfStack = ( portSTACK_TYPE ) pvParameters; /* R1 */
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pxTopOfStack--;
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*pxTopOfStack = portINITIAL_FPSW;
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@ -223,9 +235,11 @@ static void prvStartFirstTask( void )
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#pragma interrupt ( vTickISR( vect = _VECT( configTICK_VECTOR ), enable ) )
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void vTickISR( void )
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{
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/* Clear the interrupt. */
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/* Increment the tick, and perform any processing the new tick value
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necessitates. */
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vTaskIncrementTick();
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/* Only select a new task if the preemptive scheduler is being used. */
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#if( configUSE_PREEMPTION == 1 )
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taskYIELD();
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#endif
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@ -250,7 +264,7 @@ static void prvYieldHandler( void )
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/* Move the data that was automatically pushed onto the interrupt stack when
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the interrupt occurred from the interrupt stack to the user stack.
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R15 is saved before it is used. */
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R15 is saved before it is clobbered. */
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PUSH.L R15
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/* Read the user stack pointer. */
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@ -260,7 +274,7 @@ static void prvYieldHandler( void )
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SUB #12, R15
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MVTC R15, USP
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/* Copy the data accross. */
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/* Copy the data across. */
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MOV.L [ R0 ], [ R15 ] ; R15
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MOV.L 4[ R0 ], 4[ R15 ] ; PC
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MOV.L 8[ R0 ], 8[ R15 ] ; PSW
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@ -271,14 +285,16 @@ static void prvYieldHandler( void )
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/* All the rest of the registers are saved directly to the user stack. */
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SETPSW U
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/* Save the rest of the registers (R15 has been saved already. */
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PUSHM R1-R14 ; General purpose registers.
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MVFC FPSW, R15 ; Floating point status word.
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/* Save the rest of the general registers (R15 has been saved already). */
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PUSHM R1-R14
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/* Save the FPSW and accumulator. */
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MVFC FPSW, R15
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PUSH.L R15
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MVFACHI R15 ; Accumulator
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MVFACHI R15
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PUSH.L R15
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MVFACMI R15 ; Accumulator
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SHLL #16, R15
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MVFACMI R15 ; Middle order word.
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SHLL #16, R15 ; Shifted left as it is restored to the low order word.
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PUSH.L R15
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/* Save the stack pointer to the TCB. */
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@ -293,7 +309,7 @@ static void prvYieldHandler( void )
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/* Select the next task to run. */
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BSR.A _vTaskSwitchContext
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/* Reset the interrupt mask. */
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/* Reset the interrupt mask as no more data structure access is required. */
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MVTIPL #configKERNEL_INTERRUPT_PRIORITY
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/* Load the stack pointer of the task that is now selected as the Running
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@ -92,19 +92,15 @@ portSTACK_TYPE and portBASE_TYPE. */
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/*-----------------------------------------------------------*/
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/* Hardware specifics. */
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#define portBYTE_ALIGNMENT 8
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#define portBYTE_ALIGNMENT 8 /* Could make four, according to manual. */
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#define portSTACK_GROWTH -1
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#define portTICK_RATE_MS ( ( portTickType ) 1000 / configTICK_RATE_HZ )
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#define portNOP() nop()
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#define portSTART_SCHEDULER_TRAP_NO ( 32 )
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#define portKERNEL_INTERRUPT_PRIORITY ( 1 )
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/* The location of the software interrupt register. Software interrupts use
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vector 27. */
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#define portITU_SWINTR ( ( unsigned char * ) 0x000872E0 )
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#define portYIELD() *portITU_SWINTR = 0x01; nop(); nop(); nop(); nop(); nop()
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extern void vTaskSwitchContext( void );
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#define portYIELD_FROM_ISR( x ) if( x != pdFALSE ) portYIELD()
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/*
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@ -114,9 +110,6 @@ extern void vTaskSwitchContext( void );
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#define portENABLE_INTERRUPTS() set_ipl( 0 )
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#define portDISABLE_INTERRUPTS() set_ipl( configMAX_SYSCALL_INTERRUPT_PRIORITY )
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#define portSET_INTERRUPT_MASK_FROM_ISR() get_ipl(); set_ipl( configMAX_SYSCALL_INTERRUPT_PRIORITY )
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#define portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedInterruptStatus ) set_ipl( uxSavedInterruptStatus )
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/* Critical nesting counts are stored in the TCB. */
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#define portCRITICAL_NESTING_IN_TCB ( 1 )
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@ -126,6 +119,9 @@ extern void vTaskExitCritical( void );
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#define portENTER_CRITICAL() vTaskEnterCritical();
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#define portEXIT_CRITICAL() vTaskExitCritical();
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/* As this port allows interrupt nesting... */
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#define portSET_INTERRUPT_MASK_FROM_ISR() get_ipl(); set_ipl( configMAX_SYSCALL_INTERRUPT_PRIORITY )
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#define portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedInterruptStatus ) set_ipl( uxSavedInterruptStatus )
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/*-----------------------------------------------------------*/
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