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Interrupt priority assert improvements for CM3/4/7 (#602)
* Interrupt priority assert improvements for CM3/4/7 In the ARM_CM3, ARM_CM4, and ARM_CM7 ports, change the assertion that `configMAX_SYSCALL_INTERRUPT_PRIORITY` is nonzero to account for the number of priority bits implemented by the hardware. Change these ports to also use the lowest priority for PendSV and SysTick, ignoring `configKERNEL_INTERRUPT_PRIORITY`. * Remove not needed configKERNEL_INTERRUPT_PRIORITY define Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com> --------- Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com> Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com> Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com>
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18 changed files with 180 additions and 116 deletions
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@ -34,13 +34,6 @@
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#include "FreeRTOS.h"
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#include "task.h"
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/* For backward compatibility, ensure configKERNEL_INTERRUPT_PRIORITY is
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* defined. The value should also ensure backward compatibility.
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* FreeRTOS.org versions prior to V4.4.0 did not include this definition. */
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#ifndef configKERNEL_INTERRUPT_PRIORITY
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#define configKERNEL_INTERRUPT_PRIORITY 255
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#endif
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/* Constants required to manipulate the core. Registers first... */
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#define portNVIC_SYSTICK_CTRL_REG ( *( ( volatile uint32_t * ) 0xe000e010 ) )
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#define portNVIC_SYSTICK_LOAD_REG ( *( ( volatile uint32_t * ) 0xe000e014 ) )
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@ -55,8 +48,9 @@
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#define portNVIC_PEND_SYSTICK_SET_BIT ( 1UL << 26UL )
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#define portNVIC_PEND_SYSTICK_CLEAR_BIT ( 1UL << 25UL )
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#define portNVIC_PENDSV_PRI ( ( ( uint32_t ) configKERNEL_INTERRUPT_PRIORITY ) << 16UL )
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#define portNVIC_SYSTICK_PRI ( ( ( uint32_t ) configKERNEL_INTERRUPT_PRIORITY ) << 24UL )
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#define portMIN_INTERRUPT_PRIORITY ( 255UL )
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#define portNVIC_PENDSV_PRI ( ( ( uint32_t ) portMIN_INTERRUPT_PRIORITY ) << 16UL )
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#define portNVIC_SYSTICK_PRI ( ( ( uint32_t ) portMIN_INTERRUPT_PRIORITY ) << 24UL )
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/* Constants required to check the validity of an interrupt priority. */
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#define portFIRST_USER_INTERRUPT_NUMBER ( 16 )
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@ -265,10 +259,6 @@ static void prvPortStartFirstTask( void )
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*/
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BaseType_t xPortStartScheduler( void )
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{
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/* configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to 0.
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* See https://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html */
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configASSERT( configMAX_SYSCALL_INTERRUPT_PRIORITY );
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#if ( configASSERT_DEFINED == 1 )
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{
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volatile uint32_t ulOriginalPriority;
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@ -293,6 +283,14 @@ BaseType_t xPortStartScheduler( void )
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/* Use the same mask on the maximum system call priority. */
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ucMaxSysCallPriority = configMAX_SYSCALL_INTERRUPT_PRIORITY & ucMaxPriorityValue;
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/* Check that the maximum system call priority is nonzero after
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* accounting for the number of priority bits supported by the
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* hardware. A priority of 0 is invalid because setting the BASEPRI
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* register to 0 unmasks all interrupts, and interrupts with priority 0
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* cannot be masked using BASEPRI.
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* See https://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html */
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configASSERT( ucMaxSysCallPriority );
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/* Calculate the maximum acceptable priority group value for the number
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* of bits read back. */
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ulMaxPRIGROUPValue = portMAX_PRIGROUP_BITS;
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@ -83,8 +83,9 @@
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/* Constants required to access and manipulate the SysTick. */
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#define portNVIC_SYSTICK_INT ( 0x00000002UL )
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#define portNVIC_SYSTICK_ENABLE ( 0x00000001UL )
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#define portNVIC_PENDSV_PRI ( ( ( uint32_t ) configKERNEL_INTERRUPT_PRIORITY ) << 16UL )
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#define portNVIC_SYSTICK_PRI ( ( ( uint32_t ) configKERNEL_INTERRUPT_PRIORITY ) << 24UL )
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#define portMIN_INTERRUPT_PRIORITY ( 255UL )
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#define portNVIC_PENDSV_PRI ( ( ( uint32_t ) portMIN_INTERRUPT_PRIORITY ) << 16UL )
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#define portNVIC_SYSTICK_PRI ( ( ( uint32_t ) portMIN_INTERRUPT_PRIORITY ) << 24UL )
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#define portNVIC_SVC_PRI ( ( ( uint32_t ) configMAX_SYSCALL_INTERRUPT_PRIORITY - 1UL ) << 24UL )
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/* Constants required to set up the initial stack. */
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@ -381,10 +382,6 @@ static void prvRestoreContextOfFirstTask( void )
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*/
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BaseType_t xPortStartScheduler( void )
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{
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/* configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to 0. See
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* https://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html */
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configASSERT( ( configMAX_SYSCALL_INTERRUPT_PRIORITY ) );
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#if ( configASSERT_DEFINED == 1 )
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{
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volatile uint32_t ulOriginalPriority;
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@ -409,6 +406,14 @@ BaseType_t xPortStartScheduler( void )
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/* Use the same mask on the maximum system call priority. */
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ucMaxSysCallPriority = configMAX_SYSCALL_INTERRUPT_PRIORITY & ucMaxPriorityValue;
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/* Check that the maximum system call priority is nonzero after
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* accounting for the number of priority bits supported by the
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* hardware. A priority of 0 is invalid because setting the BASEPRI
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* register to 0 unmasks all interrupts, and interrupts with priority 0
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* cannot be masked using BASEPRI.
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* See https://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html */
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configASSERT( ucMaxSysCallPriority );
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/* Calculate the maximum acceptable priority group value for the number
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* of bits read back. */
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ulMaxPRIGROUPValue = portMAX_PRIGROUP_BITS;
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@ -58,8 +58,9 @@
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#define portCORTEX_M7_r0p1_ID ( 0x410FC271UL )
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#define portCORTEX_M7_r0p0_ID ( 0x410FC270UL )
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#define portNVIC_PENDSV_PRI ( ( ( uint32_t ) configKERNEL_INTERRUPT_PRIORITY ) << 16UL )
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#define portNVIC_SYSTICK_PRI ( ( ( uint32_t ) configKERNEL_INTERRUPT_PRIORITY ) << 24UL )
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#define portMIN_INTERRUPT_PRIORITY ( 255UL )
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#define portNVIC_PENDSV_PRI ( ( ( uint32_t ) portMIN_INTERRUPT_PRIORITY ) << 16UL )
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#define portNVIC_SYSTICK_PRI ( ( ( uint32_t ) portMIN_INTERRUPT_PRIORITY ) << 24UL )
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/* Constants required to check the validity of an interrupt priority. */
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#define portFIRST_USER_INTERRUPT_NUMBER ( 16 )
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@ -295,10 +296,6 @@ static void prvPortStartFirstTask( void )
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*/
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BaseType_t xPortStartScheduler( void )
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{
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/* configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to 0.
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* See https://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html */
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configASSERT( configMAX_SYSCALL_INTERRUPT_PRIORITY );
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/* This port can be used on all revisions of the Cortex-M7 core other than
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* the r0p1 parts. r0p1 parts should use the port from the
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* /source/portable/GCC/ARM_CM7/r0p1 directory. */
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@ -329,6 +326,14 @@ BaseType_t xPortStartScheduler( void )
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/* Use the same mask on the maximum system call priority. */
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ucMaxSysCallPriority = configMAX_SYSCALL_INTERRUPT_PRIORITY & ucMaxPriorityValue;
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/* Check that the maximum system call priority is nonzero after
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* accounting for the number of priority bits supported by the
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* hardware. A priority of 0 is invalid because setting the BASEPRI
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* register to 0 unmasks all interrupts, and interrupts with priority 0
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* cannot be masked using BASEPRI.
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* See https://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html */
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configASSERT( ucMaxSysCallPriority );
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/* Calculate the maximum acceptable priority group value for the number
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* of bits read back. */
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ulMaxPRIGROUPValue = portMAX_PRIGROUP_BITS;
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@ -93,8 +93,9 @@
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/* Constants required to access and manipulate the SysTick. */
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#define portNVIC_SYSTICK_INT ( 0x00000002UL )
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#define portNVIC_SYSTICK_ENABLE ( 0x00000001UL )
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#define portNVIC_PENDSV_PRI ( ( ( uint32_t ) configKERNEL_INTERRUPT_PRIORITY ) << 16UL )
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#define portNVIC_SYSTICK_PRI ( ( ( uint32_t ) configKERNEL_INTERRUPT_PRIORITY ) << 24UL )
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#define portMIN_INTERRUPT_PRIORITY ( 255UL )
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#define portNVIC_PENDSV_PRI ( ( ( uint32_t ) portMIN_INTERRUPT_PRIORITY ) << 16UL )
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#define portNVIC_SYSTICK_PRI ( ( ( uint32_t ) portMIN_INTERRUPT_PRIORITY ) << 24UL )
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#define portNVIC_SVC_PRI ( ( ( uint32_t ) configMAX_SYSCALL_INTERRUPT_PRIORITY - 1UL ) << 24UL )
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/* Constants required to manipulate the VFP. */
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@ -412,10 +413,6 @@ static void prvRestoreContextOfFirstTask( void )
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*/
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BaseType_t xPortStartScheduler( void )
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{
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/* configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to 0. See
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* https://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html */
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configASSERT( ( configMAX_SYSCALL_INTERRUPT_PRIORITY ) );
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/* Errata 837070 workaround must only be enabled on Cortex-M7 r0p0
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* and r0p1 cores. */
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#if ( configENABLE_ERRATA_837070_WORKAROUND == 1 )
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@ -452,6 +449,14 @@ BaseType_t xPortStartScheduler( void )
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/* Use the same mask on the maximum system call priority. */
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ucMaxSysCallPriority = configMAX_SYSCALL_INTERRUPT_PRIORITY & ucMaxPriorityValue;
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/* Check that the maximum system call priority is nonzero after
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* accounting for the number of priority bits supported by the
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* hardware. A priority of 0 is invalid because setting the BASEPRI
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* register to 0 unmasks all interrupts, and interrupts with priority 0
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* cannot be masked using BASEPRI.
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* See https://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html */
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configASSERT( ucMaxSysCallPriority );
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/* Calculate the maximum acceptable priority group value for the number
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* of bits read back. */
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ulMaxPRIGROUPValue = portMAX_PRIGROUP_BITS;
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@ -52,8 +52,9 @@
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#define portNVIC_PEND_SYSTICK_SET_BIT ( 1UL << 26UL )
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#define portNVIC_PEND_SYSTICK_CLEAR_BIT ( 1UL << 25UL )
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#define portNVIC_PENDSV_PRI ( ( ( uint32_t ) configKERNEL_INTERRUPT_PRIORITY ) << 16UL )
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#define portNVIC_SYSTICK_PRI ( ( ( uint32_t ) configKERNEL_INTERRUPT_PRIORITY ) << 24UL )
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#define portMIN_INTERRUPT_PRIORITY ( 255UL )
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#define portNVIC_PENDSV_PRI ( ( ( uint32_t ) portMIN_INTERRUPT_PRIORITY ) << 16UL )
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#define portNVIC_SYSTICK_PRI ( ( ( uint32_t ) portMIN_INTERRUPT_PRIORITY ) << 24UL )
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/* Constants required to check the validity of an interrupt priority. */
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#define portFIRST_USER_INTERRUPT_NUMBER ( 16 )
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@ -289,10 +290,6 @@ static void prvPortStartFirstTask( void )
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*/
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BaseType_t xPortStartScheduler( void )
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{
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/* configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to 0.
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* See https://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html */
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configASSERT( configMAX_SYSCALL_INTERRUPT_PRIORITY );
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#if ( configASSERT_DEFINED == 1 )
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{
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volatile uint32_t ulOriginalPriority;
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@ -317,6 +314,14 @@ BaseType_t xPortStartScheduler( void )
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/* Use the same mask on the maximum system call priority. */
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ucMaxSysCallPriority = configMAX_SYSCALL_INTERRUPT_PRIORITY & ucMaxPriorityValue;
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/* Check that the maximum system call priority is nonzero after
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* accounting for the number of priority bits supported by the
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* hardware. A priority of 0 is invalid because setting the BASEPRI
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* register to 0 unmasks all interrupts, and interrupts with priority 0
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* cannot be masked using BASEPRI.
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* See https://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html */
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configASSERT( ucMaxSysCallPriority );
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/* Calculate the maximum acceptable priority group value for the number
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* of bits read back. */
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ulMaxPRIGROUPValue = portMAX_PRIGROUP_BITS;
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