mirror of
https://github.com/FreeRTOS/FreeRTOS-Kernel.git
synced 2025-08-19 09:38:32 -04:00
Update to AVR_Mega0 and AVR_Dx GCC ports + addition of their IAR equivalents (#106)
* Removed TICK_stop() macro from portable/GCC/{AVR_AVRDx, AVR_Mega0}/porthardware.h because it is not used anywhere.
* Updated indentation in portable/GCC/{AVR_AVRDx, AVR_Mega0}/* files.
* Added portable/IAR/{AVR_AVRDx, AVR_Mega0 folders.
This commit is contained in:
m17336
GitHub
parent
bda9869271
commit
a2e00f0c6b
14 changed files with 1922 additions and 516 deletions
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@ -38,7 +38,7 @@
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*----------------------------------------------------------*/
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/* Start tasks with interrupts enables. */
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#define portFLAGS_INT_ENABLED ((StackType_t) 0x80)
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#define portFLAGS_INT_ENABLED ((StackType_t) 0x80)
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/*-----------------------------------------------------------*/
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@ -63,103 +63,102 @@ extern volatile RTOS_TCB_t *volatile pxCurrentTCB;
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*
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* The interrupts will have been disabled during the call to portSAVE_CONTEXT()
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* so we need not worry about reading/writing to the stack pointer.
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*/
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#define portSAVE_CONTEXT() \
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asm volatile("push r0 \n\t" \
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"in r0, __SREG__ \n\t" \
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"cli \n\t" \
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"push r0 \n\t" \
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"in r0, __RAMPZ__ \n\t" \
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"push r0 \n\t" \
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"push r1 \n\t" \
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"clr r1 \n\t" \
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"push r2 \n\t" \
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"push r3 \n\t" \
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"push r4 \n\t" \
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"push r5 \n\t" \
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"push r6 \n\t" \
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"push r7 \n\t" \
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"push r8 \n\t" \
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"push r9 \n\t" \
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"push r10 \n\t" \
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"push r11 \n\t" \
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"push r12 \n\t" \
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"push r13 \n\t" \
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"push r14 \n\t" \
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"push r15 \n\t" \
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"push r16 \n\t" \
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"push r17 \n\t" \
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"push r18 \n\t" \
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"push r19 \n\t" \
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"push r20 \n\t" \
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"push r21 \n\t" \
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"push r22 \n\t" \
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"push r23 \n\t" \
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"push r24 \n\t" \
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"push r25 \n\t" \
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"push r26 \n\t" \
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"push r27 \n\t" \
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"push r28 \n\t" \
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"push r29 \n\t" \
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"push r30 \n\t" \
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"push r31 \n\t" \
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"lds r26, pxCurrentTCB \n\t" \
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"lds r27, pxCurrentTCB + 1 \n\t" \
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"in r0, __SP_L__ \n\t" \
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"st x+, r0 \n\t" \
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"in r0, __SP_H__ \n\t" \
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"st x+, r0 \n\t");
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#define portSAVE_CONTEXT() \
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asm volatile("push r0 \n\t" \
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"in r0, __SREG__ \n\t" \
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"cli \n\t" \
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"push r0 \n\t" \
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"in r0, __RAMPZ__ \n\t" \
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"push r0 \n\t" \
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"push r1 \n\t" \
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"clr r1 \n\t" \
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"push r2 \n\t" \
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"push r3 \n\t" \
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"push r4 \n\t" \
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"push r5 \n\t" \
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"push r6 \n\t" \
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"push r7 \n\t" \
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"push r8 \n\t" \
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"push r9 \n\t" \
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"push r10 \n\t" \
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"push r11 \n\t" \
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"push r12 \n\t" \
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"push r13 \n\t" \
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"push r14 \n\t" \
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"push r15 \n\t" \
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"push r16 \n\t" \
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"push r17 \n\t" \
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"push r18 \n\t" \
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"push r19 \n\t" \
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"push r20 \n\t" \
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"push r21 \n\t" \
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"push r22 \n\t" \
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"push r23 \n\t" \
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"push r24 \n\t" \
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"push r25 \n\t" \
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"push r26 \n\t" \
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"push r27 \n\t" \
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"push r28 \n\t" \
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"push r29 \n\t" \
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"push r30 \n\t" \
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"push r31 \n\t" \
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"lds r26, pxCurrentTCB \n\t" \
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"lds r27, pxCurrentTCB + 1 \n\t" \
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"in r0, __SP_L__ \n\t" \
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"st x+, r0 \n\t" \
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"in r0, __SP_H__ \n\t" \
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"st x+, r0 \n\t");
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/*
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* Opposite to portSAVE_CONTEXT(). Interrupts will have been disabled during
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* the context save so we can write to the stack pointer.
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*/
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#define portRESTORE_CONTEXT() \
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asm volatile("lds r26, pxCurrentTCB \n\t" \
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"lds r27, pxCurrentTCB + 1 \n\t" \
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"ld r28, x+ \n\t" \
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"out __SP_L__, r28 \n\t" \
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"ld r29, x+ \n\t" \
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"out __SP_H__, r29 \n\t" \
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"pop r31 \n\t" \
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"pop r30 \n\t" \
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"pop r29 \n\t" \
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"pop r28 \n\t" \
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"pop r27 \n\t" \
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"pop r26 \n\t" \
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"pop r25 \n\t" \
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"pop r24 \n\t" \
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"pop r23 \n\t" \
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"pop r22 \n\t" \
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"pop r21 \n\t" \
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"pop r20 \n\t" \
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"pop r19 \n\t" \
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"pop r18 \n\t" \
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"pop r17 \n\t" \
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"pop r16 \n\t" \
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"pop r15 \n\t" \
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"pop r14 \n\t" \
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"pop r13 \n\t" \
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"pop r12 \n\t" \
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"pop r11 \n\t" \
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"pop r10 \n\t" \
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"pop r9 \n\t" \
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"pop r8 \n\t" \
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"pop r7 \n\t" \
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"pop r6 \n\t" \
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"pop r5 \n\t" \
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"pop r4 \n\t" \
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"pop r3 \n\t" \
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"pop r2 \n\t" \
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"pop r1 \n\t" \
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"pop r0 \n\t" \
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"out __RAMPZ__, r0 \n\t" \
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"pop r0 \n\t" \
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"out __SREG__, r0 \n\t" \
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"pop r0 \n\t");
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#define portRESTORE_CONTEXT() \
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asm volatile("lds r26, pxCurrentTCB \n\t" \
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"lds r27, pxCurrentTCB + 1 \n\t" \
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"ld r28, x+ \n\t" \
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"out __SP_L__, r28 \n\t" \
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"ld r29, x+ \n\t" \
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"out __SP_H__, r29 \n\t" \
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"pop r31 \n\t" \
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"pop r30 \n\t" \
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"pop r29 \n\t" \
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"pop r28 \n\t" \
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"pop r27 \n\t" \
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"pop r26 \n\t" \
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"pop r25 \n\t" \
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"pop r24 \n\t" \
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"pop r23 \n\t" \
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"pop r22 \n\t" \
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"pop r21 \n\t" \
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"pop r20 \n\t" \
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"pop r19 \n\t" \
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"pop r18 \n\t" \
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"pop r17 \n\t" \
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"pop r16 \n\t" \
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"pop r15 \n\t" \
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"pop r14 \n\t" \
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"pop r13 \n\t" \
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"pop r12 \n\t" \
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"pop r11 \n\t" \
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"pop r10 \n\t" \
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"pop r9 \n\t" \
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"pop r8 \n\t" \
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"pop r7 \n\t" \
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"pop r6 \n\t" \
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"pop r5 \n\t" \
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"pop r4 \n\t" \
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"pop r3 \n\t" \
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"pop r2 \n\t" \
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"pop r1 \n\t" \
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"pop r0 \n\t" \
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"out __RAMPZ__, r0 \n\t" \
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"pop r0 \n\t" \
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"out __SREG__, r0 \n\t" \
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"pop r0 \n\t");
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/*-----------------------------------------------------------*/
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@ -174,11 +173,11 @@ static void prvSetupTimerInterrupt(void);
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*/
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StackType_t *pxPortInitialiseStack(StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters)
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{
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uint16_t usAddress;
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uint16_t usAddress;
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/*lint -e950 -e611 -e923 Lint doesn't like this much - but nothing I can do about it. */
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/*lint -e950 -e611 -e923 Lint doesn't like this much - but nothing I can do about it. */
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/* Place a few bytes of known values on the bottom of the stack.
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/* Place a few bytes of known values on the bottom of the stack.
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This is just useful for debugging. Uncomment if needed. */
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// *pxTopOfStack = 0x11;
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// pxTopOfStack--;
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@ -187,70 +186,70 @@ StackType_t *pxPortInitialiseStack(StackType_t *pxTopOfStack, TaskFunction_t pxC
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// *pxTopOfStack = 0x33;
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// pxTopOfStack--;
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/* The start of the task code will be popped off the stack last, so place
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it on first. */
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usAddress = (uint16_t)pxCode;
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*pxTopOfStack = (StackType_t)(usAddress & (uint16_t)0x00ff);
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pxTopOfStack--;
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/* The start of the task code will be popped off the stack last, so place
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it on first. */
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usAddress = (uint16_t)pxCode;
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*pxTopOfStack = (StackType_t)(usAddress & (uint16_t)0x00ff);
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pxTopOfStack--;
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usAddress >>= 8;
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*pxTopOfStack = (StackType_t)(usAddress & (uint16_t)0x00ff);
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pxTopOfStack--;
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usAddress >>= 8;
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*pxTopOfStack = (StackType_t)(usAddress & (uint16_t)0x00ff);
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pxTopOfStack--;
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/* Next simulate the stack as if after a call to portSAVE_CONTEXT().
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portSAVE_CONTEXT places the flags on the stack immediately after r0
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to ensure the interrupts get disabled as soon as possible, and so ensuring
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the stack use is minimal should a context switch interrupt occur. */
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*pxTopOfStack = (StackType_t)0x00; /* R0 */
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pxTopOfStack--;
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*pxTopOfStack = portFLAGS_INT_ENABLED;
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pxTopOfStack--;
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*pxTopOfStack = ( StackType_t ) 0x00; /* RAMPZ */
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pxTopOfStack--;
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/* Now the remaining registers. The compiler expects R1 to be 0. */
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*pxTopOfStack = (StackType_t)0x00; /* R1 */
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/* Next simulate the stack as if after a call to portSAVE_CONTEXT().
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portSAVE_CONTEXT places the flags on the stack immediately after r0
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to ensure the interrupts get disabled as soon as possible, and so ensuring
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the stack use is minimal should a context switch interrupt occur. */
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*pxTopOfStack = (StackType_t)0x00; /* R0 */
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pxTopOfStack--;
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*pxTopOfStack = portFLAGS_INT_ENABLED;
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pxTopOfStack--;
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*pxTopOfStack = ( StackType_t ) 0x00; /* RAMPZ */
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pxTopOfStack--;
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/* Now the remaining registers. The compiler expects R1 to be 0. */
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*pxTopOfStack = (StackType_t)0x00; /* R1 */
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/* Leave R2 - R23 untouched */
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pxTopOfStack -= 23;
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/* Leave R2 - R23 untouched */
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pxTopOfStack -= 23;
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/* Place the parameter on the stack in the expected location. */
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usAddress = (uint16_t)pvParameters;
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*pxTopOfStack = (StackType_t)(usAddress & (uint16_t)0x00ff);
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pxTopOfStack--;
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/* Place the parameter on the stack in the expected location. */
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usAddress = (uint16_t)pvParameters;
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*pxTopOfStack = (StackType_t)(usAddress & (uint16_t)0x00ff);
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pxTopOfStack--;
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usAddress >>= 8;
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*pxTopOfStack = (StackType_t)(usAddress & (uint16_t)0x00ff);
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usAddress >>= 8;
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*pxTopOfStack = (StackType_t)(usAddress & (uint16_t)0x00ff);
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/* Leave register R26 - R31 untouched */
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pxTopOfStack -= 7;
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/* Leave register R26 - R31 untouched */
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pxTopOfStack -= 7;
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/*lint +e950 +e611 +e923 */
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/*lint +e950 +e611 +e923 */
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return pxTopOfStack;
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return pxTopOfStack;
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}
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/*-----------------------------------------------------------*/
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BaseType_t xPortStartScheduler(void)
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{
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/* Setup the hardware to generate the tick. */
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prvSetupTimerInterrupt();
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/* Setup the hardware to generate the tick. */
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prvSetupTimerInterrupt();
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/* Restore the context of the first task that is going to run. */
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portRESTORE_CONTEXT();
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/* Restore the context of the first task that is going to run. */
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portRESTORE_CONTEXT();
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/* Simulate a function call end as generated by the compiler. We will now
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jump to the start of the task the context of which we have just restored. */
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asm volatile("ret");
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/* Simulate a function call end as generated by the compiler. We will now
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jump to the start of the task the context of which we have just restored. */
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asm volatile("ret");
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/* Should not get here. */
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return pdTRUE;
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/* Should not get here. */
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return pdTRUE;
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}
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/*-----------------------------------------------------------*/
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void vPortEndScheduler(void)
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{
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/* vPortEndScheduler is not implemented in this port. */
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/* vPortEndScheduler is not implemented in this port. */
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}
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/*-----------------------------------------------------------*/
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@ -261,10 +260,10 @@ void vPortEndScheduler(void)
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void vPortYield(void) __attribute__((naked));
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void vPortYield(void)
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{
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portSAVE_CONTEXT();
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vTaskSwitchContext();
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portRESTORE_CONTEXT();
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asm volatile("ret");
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portSAVE_CONTEXT();
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vTaskSwitchContext();
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portRESTORE_CONTEXT();
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asm volatile("ret");
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}
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/*-----------------------------------------------------------*/
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@ -275,10 +274,10 @@ void vPortYield(void)
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void vPortYieldFromISR(void) __attribute__((naked));
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void vPortYieldFromISR(void)
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{
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portSAVE_CONTEXT();
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vTaskSwitchContext();
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portRESTORE_CONTEXT();
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asm volatile("reti");
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portSAVE_CONTEXT();
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vTaskSwitchContext();
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portRESTORE_CONTEXT();
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asm volatile("reti");
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}
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/*-----------------------------------------------------------*/
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@ -291,15 +290,14 @@ void vPortYieldFromISR(void)
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void vPortYieldFromTick(void) __attribute__((naked));
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void vPortYieldFromTick(void)
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{
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portSAVE_CONTEXT();
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if (xTaskIncrementTick() != pdFALSE) {
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vTaskSwitchContext();
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}
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portSAVE_CONTEXT();
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if (xTaskIncrementTick() != pdFALSE) {
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vTaskSwitchContext();
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}
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portRESTORE_CONTEXT();
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portRESTORE_CONTEXT();
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asm volatile("reti");
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asm volatile("reti");
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}
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/*-----------------------------------------------------------*/
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@ -308,7 +306,7 @@ void vPortYieldFromTick(void)
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*/
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static void prvSetupTimerInterrupt(void)
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{
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TICK_init();
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TICK_init();
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}
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/*-----------------------------------------------------------*/
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@ -319,17 +317,15 @@ static void prvSetupTimerInterrupt(void)
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* the context is saved at the start of vPortYieldFromTick(). The tick
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* count is incremented after the context is saved.
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*/
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ISR(TICK_INT_vect, ISR_NAKED)
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{
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/* Clear tick interrupt flag. */
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CLR_INT(INT_FLAGS, INT_MASK);
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/* Clear tick interrupt flag. */
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CLR_INT(INT_FLAGS, INT_MASK);
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vPortYieldFromTick();
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vPortYieldFromTick();
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asm volatile("reti");
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asm volatile("reti");
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}
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#else
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/*
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@ -337,14 +333,10 @@ ISR(TICK_INT_vect, ISR_NAKED)
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* tick count. We don't need to switch context, this can only be done by
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* manual calls to taskYIELD();
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*/
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ISR(TICK_INT_vect)
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{
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/* Clear tick interrupt flag. */
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INT_FLAGS = INT_MASK;
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xTaskIncrementTick();
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/* Clear tick interrupt flag. */
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INT_FLAGS = INT_MASK;
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xTaskIncrementTick();
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}
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#endif
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@ -6,126 +6,96 @@
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/*-----------------------------------------------------------*/
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#define CLR_INT(FLAG_REG, FLAG_MASK) \
|
||||
asm volatile( "push r16\n\t" \
|
||||
"ldi r16, %1\n\t" \
|
||||
"sts %0, r16\n\t" \
|
||||
"pop r16\n\t" \
|
||||
: \
|
||||
: "i"(_SFR_MEM_ADDR(FLAG_REG)),"i"((uint8_t)(FLAG_MASK)) \
|
||||
);
|
||||
asm volatile( \
|
||||
"push r16\n\t" \
|
||||
"ldi r16, %1\n\t" \
|
||||
"sts %0, r16\n\t" \
|
||||
"pop r16\n\t" \
|
||||
: \
|
||||
: "i"(_SFR_MEM_ADDR(FLAG_REG)),"i"((uint8_t)(FLAG_MASK)) \
|
||||
);
|
||||
|
||||
#if ( configUSE_TIMER_INSTANCE == 0 )
|
||||
|
||||
#define TICK_INT_vect TCB0_INT_vect
|
||||
#define INT_FLAGS TCB0_INTFLAGS
|
||||
#define INT_MASK TCB_CAPT_bm
|
||||
|
||||
#define TICK_init() { \
|
||||
TCB0.CCMP = configCPU_CLOCK_HZ / configTICK_RATE_HZ; \
|
||||
TCB0.INTCTRL = TCB_CAPT_bm; \
|
||||
TCB0.CTRLA = TCB_ENABLE_bm; \
|
||||
}
|
||||
|
||||
#define TICK_stop() { \
|
||||
TCB0.INTCTRL &= ~TCB_CAPT_bm;\
|
||||
TCB0.CTRLA &= ~TCB_ENABLE_bm; \
|
||||
}
|
||||
#define TICK_INT_vect TCB0_INT_vect
|
||||
#define INT_FLAGS TCB0_INTFLAGS
|
||||
#define INT_MASK TCB_CAPT_bm
|
||||
|
||||
#define TICK_init() { \
|
||||
TCB0.CCMP = configCPU_CLOCK_HZ / configTICK_RATE_HZ; \
|
||||
TCB0.INTCTRL = TCB_CAPT_bm; \
|
||||
TCB0.CTRLA = TCB_ENABLE_bm; \
|
||||
}
|
||||
|
||||
#elif ( configUSE_TIMER_INSTANCE == 1 )
|
||||
|
||||
#define TICK_INT_vect TCB1_INT_vect
|
||||
#define INT_FLAGS TCB1_INTFLAGS
|
||||
#define INT_MASK TCB_CAPT_bm
|
||||
|
||||
#define TICK_init() { \
|
||||
TCB1.CCMP = configCPU_CLOCK_HZ / configTICK_RATE_HZ; \
|
||||
TCB1.INTCTRL = TCB_CAPT_bm; \
|
||||
TCB1.CTRLA = TCB_ENABLE_bm; \
|
||||
}
|
||||
|
||||
#define TICK_stop() { \
|
||||
TCB1.INTCTRL &= ~TCB_CAPT_bm; \
|
||||
TCB1.CTRLA &= ~TCB_ENABLE_bm; \
|
||||
}
|
||||
|
||||
#define TICK_INT_vect TCB1_INT_vect
|
||||
#define INT_FLAGS TCB1_INTFLAGS
|
||||
#define INT_MASK TCB_CAPT_bm
|
||||
|
||||
#define TICK_init() { \
|
||||
TCB1.CCMP = configCPU_CLOCK_HZ / configTICK_RATE_HZ; \
|
||||
TCB1.INTCTRL = TCB_CAPT_bm; \
|
||||
TCB1.CTRLA = TCB_ENABLE_bm; \
|
||||
}
|
||||
|
||||
#elif ( configUSE_TIMER_INSTANCE == 2 )
|
||||
|
||||
#define TICK_INT_vect TCB2_INT_vect
|
||||
#define INT_FLAGS TCB2_INTFLAGS
|
||||
#define INT_MASK TCB_CAPT_bm
|
||||
#define TICK_INT_vect TCB2_INT_vect
|
||||
#define INT_FLAGS TCB2_INTFLAGS
|
||||
#define INT_MASK TCB_CAPT_bm
|
||||
|
||||
#define TICK_init() { \
|
||||
TCB2.CCMP = configCPU_CLOCK_HZ / configTICK_RATE_HZ; \
|
||||
TCB2.INTCTRL = TCB_CAPT_bm; \
|
||||
TCB2.CTRLA = TCB_ENABLE_bm; \
|
||||
}
|
||||
|
||||
#define TICK_stop() { \
|
||||
TCB2.INTCTRL &= ~TCB_CAPT_bm; \
|
||||
TCB2.CTRLA &= ~TCB_ENABLE_bm; \
|
||||
}
|
||||
|
||||
#define TICK_init() { \
|
||||
TCB2.CCMP = configCPU_CLOCK_HZ / configTICK_RATE_HZ; \
|
||||
TCB2.INTCTRL = TCB_CAPT_bm; \
|
||||
TCB2.CTRLA = TCB_ENABLE_bm; \
|
||||
}
|
||||
|
||||
#elif ( configUSE_TIMER_INSTANCE == 3 )
|
||||
|
||||
#define TICK_INT_vect TCB3_INT_vect
|
||||
#define INT_FLAGS TCB3_INTFLAGS
|
||||
#define INT_MASK TCB_CAPT_bm
|
||||
|
||||
#define TICK_init() { \
|
||||
TCB3.CCMP = configCPU_CLOCK_HZ / configTICK_RATE_HZ; \
|
||||
TCB3.INTCTRL = TCB_CAPT_bm; \
|
||||
TCB3.CTRLA = TCB_ENABLE_bm; \
|
||||
}
|
||||
|
||||
#define TICK_stop() { \
|
||||
TCB3.INTCTRL &= ~TCB_CAPT_bm; \
|
||||
TCB3.CTRLA &= ~TCB_ENABLE_bm; \
|
||||
}
|
||||
|
||||
#define TICK_INT_vect TCB3_INT_vect
|
||||
#define INT_FLAGS TCB3_INTFLAGS
|
||||
#define INT_MASK TCB_CAPT_bm
|
||||
|
||||
#define TICK_init() { \
|
||||
TCB3.CCMP = configCPU_CLOCK_HZ / configTICK_RATE_HZ; \
|
||||
TCB3.INTCTRL = TCB_CAPT_bm; \
|
||||
TCB3.CTRLA = TCB_ENABLE_bm; \
|
||||
}
|
||||
|
||||
#elif ( configUSE_TIMER_INSTANCE == 4 )
|
||||
|
||||
#define TICK_INT_vect TCB4_INT_vect
|
||||
#define INT_FLAGS TCB4_INTFLAGS
|
||||
#define INT_MASK TCB_CAPT_bm
|
||||
|
||||
#define TICK_init() { \
|
||||
TCB4.CCMP = configCPU_CLOCK_HZ / configTICK_RATE_HZ; \
|
||||
TCB4.INTCTRL = TCB_CAPT_bm; \
|
||||
TCB4.CTRLA = TCB_ENABLE_bm; \
|
||||
}
|
||||
|
||||
#define TICK_stop() { \
|
||||
TCB4.INTCTRL &= ~TCB_CAPT_bm; \
|
||||
TCB4.CTRLA &= ~TCB_ENABLE_bm; \
|
||||
}
|
||||
|
||||
#define TICK_INT_vect TCB4_INT_vect
|
||||
#define INT_FLAGS TCB4_INTFLAGS
|
||||
#define INT_MASK TCB_CAPT_bm
|
||||
|
||||
#define TICK_init() { \
|
||||
TCB4.CCMP = configCPU_CLOCK_HZ / configTICK_RATE_HZ; \
|
||||
TCB4.INTCTRL = TCB_CAPT_bm; \
|
||||
TCB4.CTRLA = TCB_ENABLE_bm; \
|
||||
}
|
||||
|
||||
#elif ( configUSE_TIMER_INSTANCE == 5 )
|
||||
|
||||
/* Hertz to period for RTC setup */
|
||||
#define RTC_PERIOD_HZ(x) (32768 * ((1.0 / x)))
|
||||
|
||||
#define TICK_INT_vect RTC_CNT_vect
|
||||
#define INT_FLAGS RTC_INTFLAGS
|
||||
#define INT_MASK RTC_OVF_bm
|
||||
|
||||
#define TICK_init() { \
|
||||
while (RTC.STATUS > 0); \
|
||||
RTC.CTRLA = RTC_PRESCALER_DIV1_gc | 1 << RTC_RTCEN_bp; \
|
||||
RTC.PER = RTC_PERIOD_HZ(configTICK_RATE_HZ); \
|
||||
RTC.INTCTRL |= 1 << RTC_OVF_bp; \
|
||||
}
|
||||
|
||||
#define TICK_stop() { \
|
||||
RTC.CTRLA &= ~(1 << RTC_RTCEN_bp); \
|
||||
RTC.INTCTRL &= ~(1 << RTC_OVF_bp); \
|
||||
}
|
||||
|
||||
#define TICK_INT_vect RTC_CNT_vect
|
||||
#define INT_FLAGS RTC_INTFLAGS
|
||||
#define INT_MASK RTC_OVF_bm
|
||||
|
||||
/* Hertz to period for RTC setup */
|
||||
#define RTC_PERIOD_HZ(x) ( 32768 * ( ( 1.0 / x ) ) )
|
||||
#define TICK_init() { \
|
||||
while (RTC.STATUS > 0); \
|
||||
RTC.CTRLA = RTC_PRESCALER_DIV1_gc | 1 << RTC_RTCEN_bp; \
|
||||
RTC.PER = RTC_PERIOD_HZ(configTICK_RATE_HZ); \
|
||||
RTC.INTCTRL |= 1 << RTC_OVF_bp; \
|
||||
}
|
||||
|
||||
#else
|
||||
#undef TICK_INT_vect
|
||||
#undef INT_FLAGS
|
||||
#undef INT_MASK
|
||||
#undef TICK_init()
|
||||
#error Invalid timer setting.
|
||||
#undef TICK_INT_vect
|
||||
#undef INT_FLAGS
|
||||
#undef INT_MASK
|
||||
#undef TICK_init()
|
||||
#error Invalid timer setting.
|
||||
#endif
|
||||
|
||||
/*-----------------------------------------------------------*/
|
||||
|
|
|
|||
|
|
@ -64,18 +64,17 @@ typedef uint16_t TickType_t;
|
|||
typedef uint32_t TickType_t;
|
||||
#define portMAX_DELAY (TickType_t)0xffffffffUL
|
||||
#endif
|
||||
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* Critical section management. */
|
||||
#define portENTER_CRITICAL() \
|
||||
asm volatile("in __tmp_reg__, __SREG__"); \
|
||||
asm volatile("cli"); \
|
||||
asm volatile("push __tmp_reg__")
|
||||
asm volatile("in __tmp_reg__, __SREG__"); \
|
||||
asm volatile("cli"); \
|
||||
asm volatile("push __tmp_reg__")
|
||||
|
||||
#define portEXIT_CRITICAL() \
|
||||
asm volatile("pop __tmp_reg__"); \
|
||||
asm volatile("out __SREG__, __tmp_reg__")
|
||||
asm volatile("pop __tmp_reg__"); \
|
||||
asm volatile("out __SREG__, __tmp_reg__")
|
||||
|
||||
#define portDISABLE_INTERRUPTS() asm volatile("cli" ::);
|
||||
#define portENABLE_INTERRUPTS() asm volatile("sei" ::);
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue