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Add PIC32MEC14xx port and demo application.
This commit is contained in:
Richard Barry
parent
f19497c3d6
commit
a29dc8d6c6
103 changed files with 49682 additions and 6 deletions
387
FreeRTOS/Source/portable/MPLAB/PIC32MEC14xx/port.c
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387
FreeRTOS/Source/portable/MPLAB/PIC32MEC14xx/port.c
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/*
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FreeRTOS V8.2.2 - Copyright (C) 2015 Real Time Engineers Ltd.
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All rights reserved
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VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
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This file is part of the FreeRTOS distribution.
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FreeRTOS is free software; you can redistribute it and/or modify it under
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the terms of the GNU General Public License (version 2) as published by the
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Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.
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***************************************************************************
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>>! NOTE: The modification to the GPL is included to allow you to !<<
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>>! distribute a combined work that includes FreeRTOS without being !<<
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>>! obliged to provide the source code for proprietary components !<<
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>>! outside of the FreeRTOS kernel. !<<
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***************************************************************************
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FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
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WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
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FOR A PARTICULAR PURPOSE. Full license text is available on the following
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link: http://www.freertos.org/a00114.html
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***************************************************************************
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* *
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* FreeRTOS provides completely free yet professionally developed, *
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* robust, strictly quality controlled, supported, and cross *
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* platform software that is more than just the market leader, it *
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* is the industry's de facto standard. *
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* *
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* Help yourself get started quickly while simultaneously helping *
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* to support the FreeRTOS project by purchasing a FreeRTOS *
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* tutorial book, reference manual, or both: *
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* http://www.FreeRTOS.org/Documentation *
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* *
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***************************************************************************
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http://www.FreeRTOS.org/FAQHelp.html - Having a problem? Start by reading
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the FAQ page "My application does not run, what could be wrong?". Have you
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defined configASSERT()?
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http://www.FreeRTOS.org/support - In return for receiving this top quality
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embedded software for free we request you assist our global community by
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participating in the support forum.
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http://www.FreeRTOS.org/training - Investing in training allows your team to
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be as productive as possible as early as possible. Now you can receive
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FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers
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Ltd, and the world's leading authority on the world's leading RTOS.
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http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
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including FreeRTOS+Trace - an indispensable productivity tool, a DOS
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compatible FAT file system, and our tiny thread aware UDP/IP stack.
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http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate.
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Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS.
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http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High
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Integrity Systems ltd. to sell under the OpenRTOS brand. Low cost OpenRTOS
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licenses offer ticketed support, indemnification and commercial middleware.
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http://www.SafeRTOS.com - High Integrity Systems also provide a safety
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engineered and independently SIL3 certified version for use in safety and
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mission critical applications that require provable dependability.
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1 tab == 4 spaces!
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*/
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/*-----------------------------------------------------------
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* Implementation of functions defined in portable.h for the PIC32MEC14xx port.
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*----------------------------------------------------------*/
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/* Scheduler include files. */
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#include "FreeRTOS.h"
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#include "task.h"
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/* Microchip includes. */
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#include <xc.h>
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#include <cp0defs.h>
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#if !defined(__MEC__)
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#error This port is designed to work with XC32 on MEC14xx. Please update your C compiler version or settings.
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#endif
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#if( ( configMAX_SYSCALL_INTERRUPT_PRIORITY >= 0x7 ) || ( configMAX_SYSCALL_INTERRUPT_PRIORITY == 0 ) )
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#error configMAX_SYSCALL_INTERRUPT_PRIORITY must be less than 7 and greater than 0
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#endif
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/* Bits within various registers. */
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#define portIE_BIT ( 0x00000001 )
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#define portEXL_BIT ( 0x00000002 )
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/* The EXL bit is set to ensure interrupts do not occur while the context of
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the first task is being restored. MEC14xx does not have DSP HW. */
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#define portINITIAL_SR ( portIE_BIT | portEXL_BIT )
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/* MEC14xx RTOS Timer MMCR's. */
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#define portMMCR_RTMR_PRELOAD *((volatile uint32_t *)(0xA0007404ul))
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#define portMMCR_RTMR_CONTROL *((volatile uint32_t *)(0xA0007408ul))
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/* MEC14xx JTVIC external interrupt controller is mapped to M14K closely-coupled
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peripheral space. */
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#define portGIRQ23_RTOS_TIMER_BITPOS ( 4 )
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#define portGIRQ23_RTOS_TIMER_MASK ( 1ul << ( portGIRQ23_RTOS_TIMER_BITPOS ) )
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#define portMMCR_JTVIC_GIRQ23_SRC *((volatile uint32_t *)(0xBFFFC0F0ul))
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#define portMMCR_JTVIC_GIRQ23_SETEN *((volatile uint32_t *)(0xBFFFC0F4ul))
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#define portMMCR_JTVIC_GIRQ23_PRIA *((volatile uint32_t *)(0xBFFFC3F0ul))
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/* MIPS Software Interrupts are routed through JTVIC GIRQ24 */
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#define portGIRQ24_M14K_SOFTIRQ0_BITPOS ( 1 )
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#define portGIRQ24_M14K_SOFTIRQ0_MASK ( 1ul << ( portGIRQ24_M14K_SOFTIRQ0_BITPOS ) )
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#define portMMCR_JTVIC_GIRQ24_SRC *((volatile uint32_t *)(0xBFFFC100ul))
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#define portMMCR_JTVIC_GIRQ24_SETEN *((volatile uint32_t *)(0xBFFFC104ul))
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#define portMMCR_JTVIC_GIRQ24_PRIA *((volatile uint32_t *)(0xBFFFC400ul))
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/*
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By default port.c generates its tick interrupt from the RTOS timer. The user
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can override this behaviour by:
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1: Providing their own implementation of vApplicationSetupTickTimerInterrupt(),
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which is the function that configures the timer. The function is defined
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as a weak symbol in this file so if the same function name is used in the
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application code then the version in the application code will be linked
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into the application in preference to the version defined in this file.
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2: Provide a vector implementation in port_asm.S that overrides the default
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behaviour for the specified interrupt vector.
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3: Specify the correct bit to clear the interrupt during the timer interrupt
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handler.
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*/
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#ifndef configTICK_INTERRUPT_VECTOR
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#define configTICK_INTERRUPT_VECTOR girq23_b4
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#define configCLEAR_TICK_TIMER_INTERRUPT() portMMCR_JTVIC_GIRQ23_SRC = portGIRQ23_RTOS_TIMER_MASK
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#else
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#ifndef configCLEAR_TICK_TIMER_INTERRUPT
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#error If configTICK_INTERRUPT_VECTOR is defined in application code then configCLEAR_TICK_TIMER_INTERRUPT must also be defined in application code.
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#endif
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#endif
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/* Let the user override the pre-loading of the initial RA with the address of
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prvTaskExitError() in case it messes up unwinding of the stack in the debugger -
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in which case configTASK_RETURN_ADDRESS can be defined as 0 (NULL). */
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#ifdef configTASK_RETURN_ADDRESS
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#define portTASK_RETURN_ADDRESS configTASK_RETURN_ADDRESS
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#else
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#define portTASK_RETURN_ADDRESS prvTaskExitError
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#endif
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/* Set configCHECK_FOR_STACK_OVERFLOW to 3 to add ISR stack checking to task
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stack checking. A problem in the ISR stack will trigger an assert, not call the
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stack overflow hook function (because the stack overflow hook is specific to a
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task stack, not the ISR stack). */
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#if( configCHECK_FOR_STACK_OVERFLOW > 2 )
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/* Don't use 0xa5 as the stack fill bytes as that is used by the kernel for
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the task stacks, and so will legitimately appear in many positions within
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the ISR stack. */
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#define portISR_STACK_FILL_BYTE 0xee
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static const uint8_t ucExpectedStackBytes[] = {
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portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, \
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portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, \
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portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, \
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portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, \
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portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE }; \
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#define portCHECK_ISR_STACK() configASSERT( ( memcmp( ( void * ) xISRStack, ( void * ) ucExpectedStackBytes, sizeof( ucExpectedStackBytes ) ) == 0 ) )
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#else
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/* Define the function away. */
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#define portCHECK_ISR_STACK()
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#endif /* configCHECK_FOR_STACK_OVERFLOW > 2 */
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/*-----------------------------------------------------------*/
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/*
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* Used to catch tasks that attempt to return from their implementing function.
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*/
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static void prvTaskExitError( void );
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/*-----------------------------------------------------------*/
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/* Records the interrupt nesting depth. This is initialised to one as it is
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decremented to 0 when the first task starts. */
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volatile UBaseType_t uxInterruptNesting = 0x01;
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/* Stores the task stack pointer when a switch is made to use the system stack. */
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UBaseType_t uxSavedTaskStackPointer = 0;
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/* The stack used by interrupt service routines that cause a context switch. */
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StackType_t xISRStack[ configISR_STACK_SIZE ] = { 0 };
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/* The top of stack value ensures there is enough space to store 6 registers on
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the callers stack, as some functions seem to want to do this. */
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const StackType_t * const xISRStackTop = &( xISRStack[ configISR_STACK_SIZE - 7 ] );
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/*-----------------------------------------------------------*/
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/*
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* See header file for description.
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*/
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StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters )
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{
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/* Ensure byte alignment is maintained when leaving this function. */
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pxTopOfStack--;
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*pxTopOfStack = (StackType_t) 0xDEADBEEF;
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pxTopOfStack--;
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*pxTopOfStack = (StackType_t) 0x12345678; /* Word to which the stack pointer will be left pointing after context restore. */
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pxTopOfStack--;
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*pxTopOfStack = (StackType_t) ulPortGetCP0Cause();
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pxTopOfStack--;
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*pxTopOfStack = (StackType_t) portINITIAL_SR; /* CP0_STATUS */
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pxTopOfStack--;
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*pxTopOfStack = (StackType_t) pxCode; /* CP0_EPC */
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pxTopOfStack--;
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*pxTopOfStack = (StackType_t) portTASK_RETURN_ADDRESS; /* ra */
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pxTopOfStack -= 15;
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*pxTopOfStack = (StackType_t) pvParameters; /* Parameters to pass in. */
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pxTopOfStack -= 15;
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return pxTopOfStack;
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}
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/*-----------------------------------------------------------*/
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static __inline uint32_t prvDisableInterrupt( void )
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{
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uint32_t prev_state;
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__asm volatile( "di %0; ehb" : "=r" ( prev_state ) :: "memory" );
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return prev_state;
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}
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/*-----------------------------------------------------------*/
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static void prvTaskExitError( void )
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{
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/* A function that implements a task must not exit or attempt to return to
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its caller as there is nothing to return to. If a task wants to exit it
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should instead call vTaskDelete( NULL ).
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Artificially force an assert() to be triggered if configASSERT() is
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defined, then stop here so application writers can catch the error. */
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configASSERT( uxSavedTaskStackPointer == 0UL );
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portDISABLE_INTERRUPTS();
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for( ;; );
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}
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/*-----------------------------------------------------------*/
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/*
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* Setup a timer for a regular tick. This function uses the RTOS timer.
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* The function is declared weak so an application writer can use a different
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* timer by redefining this implementation. If a different timer is used then
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* configTICK_INTERRUPT_VECTOR must also be defined in FreeRTOSConfig.h to
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* ensure the RTOS provided tick interrupt handler is installed on the correct
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* vector number.
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*/
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__attribute__(( weak )) void vApplicationSetupTickTimerInterrupt( void )
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{
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/* MEC14xx RTOS Timer whose input clock is 32KHz. */
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const uint32_t ulPreload = ( 32768ul / ( configTICK_RATE_HZ ) );
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configASSERT( ulPreload != 0UL );
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/* Configure the RTOS timer. */
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portMMCR_RTMR_CONTROL = 0ul;
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portMMCR_RTMR_PRELOAD = ulPreload;
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/* Configure interrupts from the RTOS timer. */
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portMMCR_JTVIC_GIRQ23_SRC = ( portGIRQ23_RTOS_TIMER_MASK );
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portMMCR_JTVIC_GIRQ23_PRIA &= ~( 0x0Ful << 16 );
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portMMCR_JTVIC_GIRQ23_PRIA |= ( ( portIPL_TO_CODE( configKERNEL_INTERRUPT_PRIORITY ) ) << 16 );
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portMMCR_JTVIC_GIRQ23_SETEN = ( portGIRQ23_RTOS_TIMER_MASK );
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/* Enable the RTOS timer. */
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portMMCR_RTMR_CONTROL = 0x0Fu;
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}
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/*-----------------------------------------------------------*/
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void vPortEndScheduler(void)
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{
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/* Not implemented in ports where there is nothing to return to.
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Artificially force an assert. */
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configASSERT( uxInterruptNesting == 1000UL );
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}
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/*-----------------------------------------------------------*/
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BaseType_t xPortStartScheduler( void )
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{
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extern void vPortStartFirstTask( void );
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extern void *pxCurrentTCB;
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#if ( configCHECK_FOR_STACK_OVERFLOW > 2 )
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{
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/* Fill the ISR stack to make it easy to asses how much is being used. */
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memset( ( void * ) xISRStack, portISR_STACK_FILL_BYTE, sizeof( xISRStack ) );
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}
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#endif /* configCHECK_FOR_STACK_OVERFLOW > 2 */
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/* Clear the software interrupt flag. */
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portMMCR_JTVIC_GIRQ24_SRC = (portGIRQ24_M14K_SOFTIRQ0_MASK);
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/* Set software timer priority. Each GIRQn has one nibble containing its
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priority */
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portMMCR_JTVIC_GIRQ24_PRIA &= ~(0xF0ul);
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portMMCR_JTVIC_GIRQ24_PRIA |= ( portIPL_TO_CODE( configKERNEL_INTERRUPT_PRIORITY ) << 4 );
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/* Enable software interrupt. */
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portMMCR_JTVIC_GIRQ24_SETEN = ( portGIRQ24_M14K_SOFTIRQ0_MASK );
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/* Setup the timer to generate the tick. Interrupts will have been disabled
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by the time we get here. */
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vApplicationSetupTickTimerInterrupt();
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/* Start the highest priority task that has been created so far. Its stack
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location is loaded into uxSavedTaskStackPointer. */
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uxSavedTaskStackPointer = *( UBaseType_t * ) pxCurrentTCB;
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vPortStartFirstTask();
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/* Should never get here as the tasks will now be executing! Call the task
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exit error function to prevent compiler warnings about a static function
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not being called in the case that the application writer overrides this
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functionality by defining configTASK_RETURN_ADDRESS. */
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prvTaskExitError();
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return pdFALSE;
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}
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/*-----------------------------------------------------------*/
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void vPortIncrementTick( void )
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{
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UBaseType_t uxSavedStatus;
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uint32_t ulCause;
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uxSavedStatus = uxPortSetInterruptMaskFromISR();
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{
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if( xTaskIncrementTick() != pdFALSE )
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{
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/* Pend a context switch. */
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ulCause = ulPortGetCP0Cause();
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ulCause |= ( 1ul << 8UL );
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vPortSetCP0Cause( ulCause );
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}
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}
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vPortClearInterruptMaskFromISR( uxSavedStatus );
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/* Look for the ISR stack getting near or past its limit. */
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portCHECK_ISR_STACK();
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/* Clear timer interrupt. */
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configCLEAR_TICK_TIMER_INTERRUPT();
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}
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/*-----------------------------------------------------------*/
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UBaseType_t uxPortSetInterruptMaskFromISR( void )
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{
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UBaseType_t uxSavedStatusRegister;
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prvDisableInterrupt();
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uxSavedStatusRegister = ulPortGetCP0Status() | 0x01;
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/* This clears the IPL bits, then sets them to
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configMAX_SYSCALL_INTERRUPT_PRIORITY. This function should not be called
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from an interrupt that has a priority above
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configMAX_SYSCALL_INTERRUPT_PRIORITY so, when used correctly, the action
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can only result in the IPL being unchanged or raised, and therefore never
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lowered. */
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vPortSetCP0Status( ( ( uxSavedStatusRegister & ( ~portALL_IPL_BITS ) ) ) | ( configMAX_SYSCALL_INTERRUPT_PRIORITY << portIPL_SHIFT ) );
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return uxSavedStatusRegister;
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}
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/*-----------------------------------------------------------*/
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void vPortClearInterruptMaskFromISR( UBaseType_t uxSavedStatusRegister )
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{
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vPortSetCP0Status( uxSavedStatusRegister );
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}
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/*-----------------------------------------------------------*/
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