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Add PIC32MEC14xx port and demo application.
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Richard Barry
parent
f19497c3d6
commit
a29dc8d6c6
103 changed files with 49682 additions and 6 deletions
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/*****************************************************************************
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* (c) 2014 Microchip Technology Inc. and its subsidiaries.
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* You may use this software and any derivatives exclusively with
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* Microchip products.
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* THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS".
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* NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
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* INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
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* AND FITNESS FOR A PARTICULAR PURPOSE, OR ITS INTERACTION WITH MICROCHIP
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* PRODUCTS, COMBINATION WITH ANY OTHER PRODUCTS, OR USE IN ANY APPLICATION.
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* IN NO EVENT WILL MICROCHIP BE LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE,
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* INCIDENTAL OR CONSEQUENTIAL LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND
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* WHATSOEVER RELATED TO THE SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS
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* BEEN ADVISED OF THE POSSIBILITY OR THE DAMAGES ARE FORESEEABLE.
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* TO THE FULLEST EXTENT ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL
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* CLAIMS IN ANY WAY RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF
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* FEES, IF ANY, THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
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* MICROCHIP PROVIDES THIS SOFTWARE CONDITIONALLY UPON YOUR ACCEPTANCE
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* OF THESE TERMS.
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*****************************************************************************/
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/** @file general_exception.c
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*MEC14xx General Exception Handler
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*/
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/** @defgroup MEC14xx Exceptions
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* @{
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*/
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#include "appcfg.h"
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#include "platform.h"
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#include "MEC14xx/mec14xx.h"
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#include "MEC14xx/mec14xx_trace_inline.h"
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typedef struct gen_except_capture
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{
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uint32_t stack_ptr;
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uint32_t cp0_status;
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uint32_t cp0_cause;
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uint32_t cp0_epc;
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uint32_t cp0_error_epc;
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uint32_t cp0_nexc;
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uint32_t cp0_nepc;
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uint32_t cp0_badvaddr;
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uint32_t ahb_err;
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} GEN_EXCEPT_CAPTURE;
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GEN_EXCEPT_CAPTURE gexc_cap;
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void
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__attribute__((nomips16, noreturn)) _general_exception_handler (void)
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{
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/*
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* MEC14xx Application General Exception handler
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*/
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uint32_t e;
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/* Get current Stack Pointer. Note: this is not SP at
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* exception. XC32 wraps _general_exception_handler in
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* assembly code which saves state resulting is a
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* modified SP. Wrapper allocates 88 bytes for context
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* save. Original SP = SPcurrent + 88.
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*/
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__asm__ __volatile (
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"move %0,$sp \n\t"
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"nop \n\t"
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:"=r" (e)
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::);
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gexc_cap.stack_ptr = e;
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gexc_cap.cp0_status = _CP0_GET_STATUS();
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gexc_cap.cp0_cause = _CP0_GET_CAUSE();
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gexc_cap.cp0_epc = _CP0_GET_EPC();
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gexc_cap.cp0_error_epc = _CP0_GET_ERROREPC();
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gexc_cap.cp0_nexc = _CP0_GET_NESTEDEXC();
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gexc_cap.cp0_nepc = _CP0_GET_NESTEDEPC();
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gexc_cap.cp0_badvaddr = _CP0_GET_BADVADDR();
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trace0(0, AP3GENEXCEPT, 0, "Application General Exception Handler (BEV=0)");
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TRACE11(601, AP3GENEXCEPT, 0, "Current SP = 0x%08x",gexc_cap.stack_ptr);
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TRACE11(602, AP3GENEXCEPT, 0, "CP0 STATUS = 0x%08x",gexc_cap.cp0_status);
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TRACE11(603, AP3GENEXCEPT, 0, "CP0 CAUSE = 0x%08x",gexc_cap.cp0_cause);
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TRACE11(604, AP3GENEXCEPT, 0, "CP0 EPC = 0x%08x",gexc_cap.cp0_epc);
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TRACE11(605, AP3GENEXCEPT, 0, "CP0 ERROREPC = 0x%08x",gexc_cap.cp0_error_epc);
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TRACE11(606, AP3GENEXCEPT, 0, "CP0 NEXC = 0x%08x",gexc_cap.cp0_nexc);
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TRACE11(607, AP3GENEXCEPT, 0, "CP0 NEPC = 0x%08x",gexc_cap.cp0_nepc);
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TRACE11(608, AP3GENEXCEPT, 0, "CP0 BADVADDR = 0x%08x",gexc_cap.cp0_badvaddr);
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for (;;) {
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__asm__ __volatile ("%(ssnop%)" : :);
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}
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}
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/* end general_exception.c */
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/** @}
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*/
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@ -0,0 +1,128 @@
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/*********************************************************************
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*
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* General Exception
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*
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*********************************************************************
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* Filename: general-exception.S
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*
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* Processor: PIC32
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*
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* Compiler: MPLAB XC32 v1.00
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* MPLAB X IDE
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* Company: Microchip Technology Inc.
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*
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* Software License Agreement
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*
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* This software is developed by Microchip Technology Inc. and its
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* subsidiaries ("Microchip").
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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*
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* 3. Microchip's name may not be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY MICROCHIP "AS IS" AND ANY EXPRESS OR IMPLIED
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* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS FOR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
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* MICROCHIP BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
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* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING BUT NOT LIMITED TO
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* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA OR PROFITS;
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* OR BUSINESS INTERRUPTION) HOWSOEVER CAUSED AND ON ANY THEORY OF LIABILITY,
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* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
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* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
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* ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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********************************************************************/
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#include <xc.h>
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#ifdef __LIBBUILD__
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.file 1 "general-exception.S"
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.loc 1 0
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#endif
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###################
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# Default general exception handler
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###################
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.extern _general_exception_handler
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.section .text.general_exception, code
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.set noreorder
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.set noat
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.set nomips16
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.globl _general_exception_context
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.ent _general_exception_context
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_general_exception_context:
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# Save off the non-callee saved registers that may get mucked with
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addiu sp, sp, -88
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sw $1, 4(sp)
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sw v0, 8(sp)
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sw v1, 12(sp)
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sw a0, 16(sp)
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sw a1, 20(sp)
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sw a2, 24(sp)
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sw a3, 28(sp)
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sw t0, 32(sp)
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sw t1, 36(sp)
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sw t2, 40(sp)
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sw t3, 44(sp)
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sw t4, 48(sp)
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sw t5, 52(sp)
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sw t6, 56(sp)
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sw t7, 60(sp)
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sw t8, 64(sp)
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sw t9, 68(sp)
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sw ra, 72(sp)
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mflo t0
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sw t0, 76(sp)
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mfhi t0
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sw t0, 80(sp)
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la k0,_general_exception_handler
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nop
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# Pass Cause and Status to the handler function
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mfc0 a0, _CP0_CAUSE
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mfc0 a1, _CP0_STATUS
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jalr k0
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nop
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lw t0, 80(sp)
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mthi t0
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lw t0, 76(sp)
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mtlo t0
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lw $1, 4(sp)
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lw v0, 8(sp)
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lw v1, 12(sp)
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lw a0, 16(sp)
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lw a1, 20(sp)
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lw a2, 24(sp)
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lw a3, 28(sp)
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lw t0, 32(sp)
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lw t1, 36(sp)
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lw t2, 40(sp)
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lw t3, 44(sp)
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lw t4, 48(sp)
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lw t5, 52(sp)
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lw t6, 56(sp)
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lw t7, 60(sp)
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lw t8, 64(sp)
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lw t9, 68(sp)
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lw ra, 72(sp)
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addiu sp, sp, 88
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ehb
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eret
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.end _general_exception_context
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