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Update inaccessible links for TFM FPU Support
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portable/ThirdParty/GCC/ARM_TFM/README.md
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portable/ThirdParty/GCC/ARM_TFM/README.md
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@ -52,13 +52,13 @@ Kernel runs in the Non-Secure Side.
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The setting of this macro is decided by the setting in Secure Side which is platform-specific.
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If the Secure Side enables Non-Secure access to FPU, then this macro can be configured as 0 or 1. Otherwise, this macro can only be configured as 0.
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Please note that Cortex-M23 does not support FPU.
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Please refer to [TF-M documentation](https://tf-m-user-guide.trustedfirmware.org/integration_guide/tfm_fpu_support.html) for FPU usage on the Non-Secure side.
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Please refer to [TF-M documentation](https://trustedfirmware-m.readthedocs.io/en/latest/integration_guide/tfm_fpu_support.html) for FPU usage on the Non-Secure side.
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* `configENABLE_MVE`
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The setting of this macro is decided by the setting in Secure Side which is platform-specific.
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If the Secure Side enables Non-Secure access to MVE, then this macro can be configured as 0 or 1. Otherwise, this macro can only be configured as 0.
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Please note that only Cortex-M55 and Cortex-M85 support MVE.
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Please refer to [TF-M documentation](https://tf-m-user-guide.trustedfirmware.org/integration_guide/tfm_fpu_support.html) for MVE usage on the Non-Secure side.
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Please refer to [TF-M documentation](https://trustedfirmware-m.readthedocs.io/en/latest/integration_guide/tfm_fpu_support.html) for MVE usage on the Non-Secure side.
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* `configENABLE_TRUSTZONE`
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This macro should be configured as 0 because TF-M doesn't use the secure context management function of FreeRTOS. New secure context management might be introduced when TF-M supports multiple secure context.
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