mirror of
https://github.com/FreeRTOS/FreeRTOS-Kernel.git
synced 2025-04-20 05:21:59 -04:00
Fix compiler warning in psp_test.c when compiled with ARM compiler.
Add portYIELD_FROM_ISR() macros to Cortex-M ports. The new macro just calls the exiting portEND_SWITCHING_ISR() macro. Remove code from the MSVC port layer that was left over from a previous implementation and become obsolete.
This commit is contained in:
parent
9b153b3e06
commit
a03b171992
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@ -70,7 +70,7 @@ uint8_t _f_result ( uint8_t testnum, uint32_t result )
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}
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}
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else
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else
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{
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{
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printf( "FAILED! Error code: %u\r\n", result );
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printf( "FAILED! Error code: %u\r\n", ( unsigned int ) result );
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all_tests_passed = 0u;
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all_tests_passed = 0u;
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}
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}
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@ -56,19 +56,19 @@
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***************************************************************************
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***************************************************************************
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http://www.FreeRTOS.org - Documentation, books, training, latest versions,
|
http://www.FreeRTOS.org - Documentation, books, training, latest versions,
|
||||||
license and Real Time Engineers Ltd. contact details.
|
license and Real Time Engineers Ltd. contact details.
|
||||||
|
|
||||||
http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
|
http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
|
||||||
including FreeRTOS+Trace - an indispensable productivity tool, and our new
|
including FreeRTOS+Trace - an indispensable productivity tool, and our new
|
||||||
fully thread aware and reentrant UDP/IP stack.
|
fully thread aware and reentrant UDP/IP stack.
|
||||||
|
|
||||||
http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High
|
http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High
|
||||||
Integrity Systems, who sell the code with commercial support,
|
Integrity Systems, who sell the code with commercial support,
|
||||||
indemnification and middleware, under the OpenRTOS brand.
|
indemnification and middleware, under the OpenRTOS brand.
|
||||||
|
|
||||||
http://www.SafeRTOS.com - High Integrity Systems also provide a safety
|
http://www.SafeRTOS.com - High Integrity Systems also provide a safety
|
||||||
engineered and independently SIL3 certified version for use in safety and
|
engineered and independently SIL3 certified version for use in safety and
|
||||||
mission critical applications that require provable dependability.
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mission critical applications that require provable dependability.
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*/
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*/
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@ -121,6 +121,7 @@ extern void vPortYield( void );
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#define portNVIC_PENDSVSET_BIT ( 1UL << 28UL )
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#define portNVIC_PENDSVSET_BIT ( 1UL << 28UL )
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#define portYIELD() vPortYield()
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#define portYIELD() vPortYield()
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#define portEND_SWITCHING_ISR( xSwitchRequired ) if( xSwitchRequired ) portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT
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#define portEND_SWITCHING_ISR( xSwitchRequired ) if( xSwitchRequired ) portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT
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#define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x )
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/*-----------------------------------------------------------*/
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/*-----------------------------------------------------------*/
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@ -56,19 +56,19 @@
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***************************************************************************
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***************************************************************************
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||||||
|
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||||||
|
|
||||||
http://www.FreeRTOS.org - Documentation, books, training, latest versions,
|
http://www.FreeRTOS.org - Documentation, books, training, latest versions,
|
||||||
license and Real Time Engineers Ltd. contact details.
|
license and Real Time Engineers Ltd. contact details.
|
||||||
|
|
||||||
http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
|
http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
|
||||||
including FreeRTOS+Trace - an indispensable productivity tool, and our new
|
including FreeRTOS+Trace - an indispensable productivity tool, and our new
|
||||||
fully thread aware and reentrant UDP/IP stack.
|
fully thread aware and reentrant UDP/IP stack.
|
||||||
|
|
||||||
http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High
|
http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High
|
||||||
Integrity Systems, who sell the code with commercial support,
|
Integrity Systems, who sell the code with commercial support,
|
||||||
indemnification and middleware, under the OpenRTOS brand.
|
indemnification and middleware, under the OpenRTOS brand.
|
||||||
|
|
||||||
http://www.SafeRTOS.com - High Integrity Systems also provide a safety
|
http://www.SafeRTOS.com - High Integrity Systems also provide a safety
|
||||||
engineered and independently SIL3 certified version for use in safety and
|
engineered and independently SIL3 certified version for use in safety and
|
||||||
mission critical applications that require provable dependability.
|
mission critical applications that require provable dependability.
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||||||
*/
|
*/
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@ -121,6 +121,7 @@ extern void vPortYield( void );
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#define portNVIC_PENDSVSET_BIT ( 1UL << 28UL )
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#define portNVIC_PENDSVSET_BIT ( 1UL << 28UL )
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#define portYIELD() vPortYield()
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#define portYIELD() vPortYield()
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#define portEND_SWITCHING_ISR( xSwitchRequired ) if( xSwitchRequired ) portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT
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#define portEND_SWITCHING_ISR( xSwitchRequired ) if( xSwitchRequired ) portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT
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#define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x )
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/*-----------------------------------------------------------*/
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/*-----------------------------------------------------------*/
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/* Critical section management. */
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/* Critical section management. */
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@ -56,19 +56,19 @@
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***************************************************************************
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***************************************************************************
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|
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||||||
|
|
||||||
http://www.FreeRTOS.org - Documentation, books, training, latest versions,
|
http://www.FreeRTOS.org - Documentation, books, training, latest versions,
|
||||||
license and Real Time Engineers Ltd. contact details.
|
license and Real Time Engineers Ltd. contact details.
|
||||||
|
|
||||||
http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
|
http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
|
||||||
including FreeRTOS+Trace - an indispensable productivity tool, and our new
|
including FreeRTOS+Trace - an indispensable productivity tool, and our new
|
||||||
fully thread aware and reentrant UDP/IP stack.
|
fully thread aware and reentrant UDP/IP stack.
|
||||||
|
|
||||||
http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High
|
http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High
|
||||||
Integrity Systems, who sell the code with commercial support,
|
Integrity Systems, who sell the code with commercial support,
|
||||||
indemnification and middleware, under the OpenRTOS brand.
|
indemnification and middleware, under the OpenRTOS brand.
|
||||||
|
|
||||||
http://www.SafeRTOS.com - High Integrity Systems also provide a safety
|
http://www.SafeRTOS.com - High Integrity Systems also provide a safety
|
||||||
engineered and independently SIL3 certified version for use in safety and
|
engineered and independently SIL3 certified version for use in safety and
|
||||||
mission critical applications that require provable dependability.
|
mission critical applications that require provable dependability.
|
||||||
*/
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*/
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@ -162,6 +162,7 @@ typedef struct MPU_SETTINGS
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#define portNVIC_INT_CTRL ( ( volatile unsigned portLONG *) 0xe000ed04 )
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#define portNVIC_INT_CTRL ( ( volatile unsigned portLONG *) 0xe000ed04 )
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#define portNVIC_PENDSVSET 0x10000000
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#define portNVIC_PENDSVSET 0x10000000
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#define portEND_SWITCHING_ISR( xSwitchRequired ) if( xSwitchRequired ) *(portNVIC_INT_CTRL) = portNVIC_PENDSVSET
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#define portEND_SWITCHING_ISR( xSwitchRequired ) if( xSwitchRequired ) *(portNVIC_INT_CTRL) = portNVIC_PENDSVSET
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#define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x )
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/*-----------------------------------------------------------*/
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/*-----------------------------------------------------------*/
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@ -181,7 +182,7 @@ typedef struct MPU_SETTINGS
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/*
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/*
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* Set basepri back to 0 without effective other registers.
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* Set basepri back to 0 without effective other registers.
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* r0 is clobbered. FAQ: Setting BASEPRI to 0 is not a bug. Please see
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* r0 is clobbered. FAQ: Setting BASEPRI to 0 is not a bug. Please see
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* http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html before disagreeing.
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* http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html before disagreeing.
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*/
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*/
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#define portCLEAR_INTERRUPT_MASK() \
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#define portCLEAR_INTERRUPT_MASK() \
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@ -192,7 +193,7 @@ typedef struct MPU_SETTINGS
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:::"r0" \
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:::"r0" \
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)
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)
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/* FAQ: Setting BASEPRI to 0 is not a bug. Please see
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/* FAQ: Setting BASEPRI to 0 is not a bug. Please see
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http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html before disagreeing. */
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http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html before disagreeing. */
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#define portSET_INTERRUPT_MASK_FROM_ISR() 0;portSET_INTERRUPT_MASK()
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#define portSET_INTERRUPT_MASK_FROM_ISR() 0;portSET_INTERRUPT_MASK()
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#define portCLEAR_INTERRUPT_MASK_FROM_ISR(x) portCLEAR_INTERRUPT_MASK();(void)x
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#define portCLEAR_INTERRUPT_MASK_FROM_ISR(x) portCLEAR_INTERRUPT_MASK();(void)x
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@ -213,7 +214,7 @@ extern void vPortExitCritical( void );
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#define portNOP()
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#define portNOP()
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/* There are an uneven number of items on the initial stack, so
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/* There are an uneven number of items on the initial stack, so
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portALIGNMENT_ASSERT_pxCurrentTCB() will trigger false positive asserts. */
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portALIGNMENT_ASSERT_pxCurrentTCB() will trigger false positive asserts. */
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#define portALIGNMENT_ASSERT_pxCurrentTCB ( void )
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#define portALIGNMENT_ASSERT_pxCurrentTCB ( void )
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@ -121,6 +121,7 @@ extern void vPortYield( void );
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#define portNVIC_PENDSVSET_BIT ( 1UL << 28UL )
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#define portNVIC_PENDSVSET_BIT ( 1UL << 28UL )
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#define portYIELD() vPortYield()
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#define portYIELD() vPortYield()
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#define portEND_SWITCHING_ISR( xSwitchRequired ) if( xSwitchRequired ) portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT
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#define portEND_SWITCHING_ISR( xSwitchRequired ) if( xSwitchRequired ) portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT
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#define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x )
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/*-----------------------------------------------------------*/
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/*-----------------------------------------------------------*/
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/* Critical section management. */
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/* Critical section management. */
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@ -56,19 +56,19 @@
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***************************************************************************
|
***************************************************************************
|
||||||
|
|
||||||
|
|
||||||
http://www.FreeRTOS.org - Documentation, books, training, latest versions,
|
http://www.FreeRTOS.org - Documentation, books, training, latest versions,
|
||||||
license and Real Time Engineers Ltd. contact details.
|
license and Real Time Engineers Ltd. contact details.
|
||||||
|
|
||||||
http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
|
http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
|
||||||
including FreeRTOS+Trace - an indispensable productivity tool, and our new
|
including FreeRTOS+Trace - an indispensable productivity tool, and our new
|
||||||
fully thread aware and reentrant UDP/IP stack.
|
fully thread aware and reentrant UDP/IP stack.
|
||||||
|
|
||||||
http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High
|
http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High
|
||||||
Integrity Systems, who sell the code with commercial support,
|
Integrity Systems, who sell the code with commercial support,
|
||||||
indemnification and middleware, under the OpenRTOS brand.
|
indemnification and middleware, under the OpenRTOS brand.
|
||||||
|
|
||||||
http://www.SafeRTOS.com - High Integrity Systems also provide a safety
|
http://www.SafeRTOS.com - High Integrity Systems also provide a safety
|
||||||
engineered and independently SIL3 certified version for use in safety and
|
engineered and independently SIL3 certified version for use in safety and
|
||||||
mission critical applications that require provable dependability.
|
mission critical applications that require provable dependability.
|
||||||
*/
|
*/
|
||||||
|
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@ -106,13 +106,13 @@ extern "C" {
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typedef unsigned portLONG portTickType;
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typedef unsigned portLONG portTickType;
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#define portMAX_DELAY ( portTickType ) 0xffffffff
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#define portMAX_DELAY ( portTickType ) 0xffffffff
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#endif
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#endif
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/*-----------------------------------------------------------*/
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/*-----------------------------------------------------------*/
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/* Architecture specifics. */
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/* Architecture specifics. */
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#define portSTACK_GROWTH ( -1 )
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#define portSTACK_GROWTH ( -1 )
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#define portTICK_RATE_MS ( ( portTickType ) 1000 / configTICK_RATE_HZ )
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#define portTICK_RATE_MS ( ( portTickType ) 1000 / configTICK_RATE_HZ )
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#define portBYTE_ALIGNMENT 8
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#define portBYTE_ALIGNMENT 8
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/*-----------------------------------------------------------*/
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/*-----------------------------------------------------------*/
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/* Scheduler utilities. */
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/* Scheduler utilities. */
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@ -121,6 +121,7 @@ extern void vPortYield( void );
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#define portNVIC_PENDSVSET 0x10000000
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#define portNVIC_PENDSVSET 0x10000000
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#define portYIELD() vPortYield()
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#define portYIELD() vPortYield()
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#define portEND_SWITCHING_ISR( xSwitchRequired ) if( xSwitchRequired ) *(portNVIC_INT_CTRL) = portNVIC_PENDSVSET
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#define portEND_SWITCHING_ISR( xSwitchRequired ) if( xSwitchRequired ) *(portNVIC_INT_CTRL) = portNVIC_PENDSVSET
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#define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x )
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/*-----------------------------------------------------------*/
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/*-----------------------------------------------------------*/
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@ -56,19 +56,19 @@
|
||||||
***************************************************************************
|
***************************************************************************
|
||||||
|
|
||||||
|
|
||||||
http://www.FreeRTOS.org - Documentation, books, training, latest versions,
|
http://www.FreeRTOS.org - Documentation, books, training, latest versions,
|
||||||
license and Real Time Engineers Ltd. contact details.
|
license and Real Time Engineers Ltd. contact details.
|
||||||
|
|
||||||
http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
|
http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
|
||||||
including FreeRTOS+Trace - an indispensable productivity tool, and our new
|
including FreeRTOS+Trace - an indispensable productivity tool, and our new
|
||||||
fully thread aware and reentrant UDP/IP stack.
|
fully thread aware and reentrant UDP/IP stack.
|
||||||
|
|
||||||
http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High
|
http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High
|
||||||
Integrity Systems, who sell the code with commercial support,
|
Integrity Systems, who sell the code with commercial support,
|
||||||
indemnification and middleware, under the OpenRTOS brand.
|
indemnification and middleware, under the OpenRTOS brand.
|
||||||
|
|
||||||
http://www.SafeRTOS.com - High Integrity Systems also provide a safety
|
http://www.SafeRTOS.com - High Integrity Systems also provide a safety
|
||||||
engineered and independently SIL3 certified version for use in safety and
|
engineered and independently SIL3 certified version for use in safety and
|
||||||
mission critical applications that require provable dependability.
|
mission critical applications that require provable dependability.
|
||||||
*/
|
*/
|
||||||
|
|
||||||
|
@ -106,13 +106,13 @@ extern "C" {
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typedef unsigned portLONG portTickType;
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typedef unsigned portLONG portTickType;
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#define portMAX_DELAY ( portTickType ) 0xffffffff
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#define portMAX_DELAY ( portTickType ) 0xffffffff
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#endif
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#endif
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/*-----------------------------------------------------------*/
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/*-----------------------------------------------------------*/
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/* Architecture specifics. */
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/* Architecture specifics. */
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#define portSTACK_GROWTH ( -1 )
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#define portSTACK_GROWTH ( -1 )
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#define portTICK_RATE_MS ( ( portTickType ) 1000 / configTICK_RATE_HZ )
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#define portTICK_RATE_MS ( ( portTickType ) 1000 / configTICK_RATE_HZ )
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#define portBYTE_ALIGNMENT 8
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#define portBYTE_ALIGNMENT 8
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/*-----------------------------------------------------------*/
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/*-----------------------------------------------------------*/
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/* Scheduler utilities. */
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/* Scheduler utilities. */
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extern void vPortYield( void );
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extern void vPortYield( void );
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@ -120,6 +120,7 @@ extern void vPortYield( void );
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#define portNVIC_PENDSVSET_BIT ( 1UL << 28UL )
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#define portNVIC_PENDSVSET_BIT ( 1UL << 28UL )
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#define portYIELD() vPortYield()
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#define portYIELD() vPortYield()
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#define portEND_SWITCHING_ISR( xSwitchRequired ) if( xSwitchRequired ) portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT
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#define portEND_SWITCHING_ISR( xSwitchRequired ) if( xSwitchRequired ) portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT
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#define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x )
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/*-----------------------------------------------------------*/
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/*-----------------------------------------------------------*/
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/* Architecture specific optimisations. */
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/* Architecture specific optimisations. */
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|
|
|
@ -56,19 +56,19 @@
|
||||||
***************************************************************************
|
***************************************************************************
|
||||||
|
|
||||||
|
|
||||||
http://www.FreeRTOS.org - Documentation, books, training, latest versions,
|
http://www.FreeRTOS.org - Documentation, books, training, latest versions,
|
||||||
license and Real Time Engineers Ltd. contact details.
|
license and Real Time Engineers Ltd. contact details.
|
||||||
|
|
||||||
http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
|
http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
|
||||||
including FreeRTOS+Trace - an indispensable productivity tool, and our new
|
including FreeRTOS+Trace - an indispensable productivity tool, and our new
|
||||||
fully thread aware and reentrant UDP/IP stack.
|
fully thread aware and reentrant UDP/IP stack.
|
||||||
|
|
||||||
http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High
|
http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High
|
||||||
Integrity Systems, who sell the code with commercial support,
|
Integrity Systems, who sell the code with commercial support,
|
||||||
indemnification and middleware, under the OpenRTOS brand.
|
indemnification and middleware, under the OpenRTOS brand.
|
||||||
|
|
||||||
http://www.SafeRTOS.com - High Integrity Systems also provide a safety
|
http://www.SafeRTOS.com - High Integrity Systems also provide a safety
|
||||||
engineered and independently SIL3 certified version for use in safety and
|
engineered and independently SIL3 certified version for use in safety and
|
||||||
mission critical applications that require provable dependability.
|
mission critical applications that require provable dependability.
|
||||||
*/
|
*/
|
||||||
|
|
||||||
|
@ -106,13 +106,13 @@ extern "C" {
|
||||||
typedef unsigned portLONG portTickType;
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typedef unsigned portLONG portTickType;
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#define portMAX_DELAY ( portTickType ) 0xffffffff
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#define portMAX_DELAY ( portTickType ) 0xffffffff
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||||||
#endif
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#endif
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/*-----------------------------------------------------------*/
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/*-----------------------------------------------------------*/
|
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|
|
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/* Architecture specifics. */
|
/* Architecture specifics. */
|
||||||
#define portSTACK_GROWTH ( -1 )
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#define portSTACK_GROWTH ( -1 )
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#define portTICK_RATE_MS ( ( portTickType ) 1000 / configTICK_RATE_HZ )
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#define portTICK_RATE_MS ( ( portTickType ) 1000 / configTICK_RATE_HZ )
|
||||||
#define portBYTE_ALIGNMENT 8
|
#define portBYTE_ALIGNMENT 8
|
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/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
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||||||
|
|
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/* Scheduler utilities. */
|
/* Scheduler utilities. */
|
||||||
extern void vPortYield( void );
|
extern void vPortYield( void );
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||||||
|
@ -120,6 +120,7 @@ extern void vPortYield( void );
|
||||||
#define portNVIC_PENDSVSET_BIT ( 1UL << 28UL )
|
#define portNVIC_PENDSVSET_BIT ( 1UL << 28UL )
|
||||||
#define portYIELD() vPortYield()
|
#define portYIELD() vPortYield()
|
||||||
#define portEND_SWITCHING_ISR( xSwitchRequired ) if( xSwitchRequired ) portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT
|
#define portEND_SWITCHING_ISR( xSwitchRequired ) if( xSwitchRequired ) portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT
|
||||||
|
#define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x )
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
/* Architecture specific optimisations. */
|
/* Architecture specific optimisations. */
|
||||||
|
@ -156,7 +157,7 @@ extern void vPortClearInterruptMask( unsigned long ulNewMask );
|
||||||
#define portCLEAR_INTERRUPT_MASK_FROM_ISR(x) vPortClearInterruptMask( x )
|
#define portCLEAR_INTERRUPT_MASK_FROM_ISR(x) vPortClearInterruptMask( x )
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
/* There are an uneven number of items on the initial stack, so
|
/* There are an uneven number of items on the initial stack, so
|
||||||
portALIGNMENT_ASSERT_pxCurrentTCB() will trigger false positive asserts. */
|
portALIGNMENT_ASSERT_pxCurrentTCB() will trigger false positive asserts. */
|
||||||
#define portALIGNMENT_ASSERT_pxCurrentTCB ( void )
|
#define portALIGNMENT_ASSERT_pxCurrentTCB ( void )
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
|
@ -196,6 +196,7 @@ portTickType xMinimumWindowsBlockTime = ( portTickType ) 20;
|
||||||
portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )
|
portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )
|
||||||
{
|
{
|
||||||
xThreadState *pxThreadState = NULL;
|
xThreadState *pxThreadState = NULL;
|
||||||
|
char *pcTopOfStack = ( char * ) pxTopOfStack;
|
||||||
|
|
||||||
/* In this simulated case a stack is not initialised, but instead a thread
|
/* In this simulated case a stack is not initialised, but instead a thread
|
||||||
is created that will execute the task being created. The thread handles
|
is created that will execute the task being created. The thread handles
|
||||||
|
@ -203,7 +204,7 @@ xThreadState *pxThreadState = NULL;
|
||||||
the stack that was created for the task - so the stack buffer is still
|
the stack that was created for the task - so the stack buffer is still
|
||||||
used, just not in the conventional way. It will not be used for anything
|
used, just not in the conventional way. It will not be used for anything
|
||||||
other than holding this structure. */
|
other than holding this structure. */
|
||||||
pxThreadState = ( xThreadState * ) ( pxTopOfStack - sizeof( xThreadState ) );
|
pxThreadState = ( xThreadState * ) ( pcTopOfStack - sizeof( xThreadState ) );
|
||||||
|
|
||||||
/* Create the thread itself. */
|
/* Create the thread itself. */
|
||||||
pxThreadState->pvThread = CreateThread( NULL, 0, ( LPTHREAD_START_ROUTINE ) pxCode, pvParameters, CREATE_SUSPENDED, NULL );
|
pxThreadState->pvThread = CreateThread( NULL, 0, ( LPTHREAD_START_ROUTINE ) pxCode, pvParameters, CREATE_SUSPENDED, NULL );
|
||||||
|
@ -411,8 +412,6 @@ void vPortEndScheduler( void )
|
||||||
|
|
||||||
void vPortGenerateSimulatedInterrupt( unsigned long ulInterruptNumber )
|
void vPortGenerateSimulatedInterrupt( unsigned long ulInterruptNumber )
|
||||||
{
|
{
|
||||||
xThreadState *pxThreadState;
|
|
||||||
|
|
||||||
if( ( ulInterruptNumber < portMAX_INTERRUPTS ) && ( pvInterruptEventMutex != NULL ) )
|
if( ( ulInterruptNumber < portMAX_INTERRUPTS ) && ( pvInterruptEventMutex != NULL ) )
|
||||||
{
|
{
|
||||||
/* Yield interrupts are processed even when critical nesting is non-zero. */
|
/* Yield interrupts are processed even when critical nesting is non-zero. */
|
||||||
|
@ -424,9 +423,6 @@ xThreadState *pxThreadState;
|
||||||
be in a critical section as calls to wait for mutexes are accumulative. */
|
be in a critical section as calls to wait for mutexes are accumulative. */
|
||||||
if( ulCriticalNesting == 0 )
|
if( ulCriticalNesting == 0 )
|
||||||
{
|
{
|
||||||
/* The event handler needs to know to signal the interrupt acknowledge event
|
|
||||||
the next time this task runs. */
|
|
||||||
pxThreadState = ( xThreadState * ) *( ( unsigned long * ) pxCurrentTCB );
|
|
||||||
SetEvent( pvInterruptEvent );
|
SetEvent( pvInterruptEvent );
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -471,7 +467,6 @@ void vPortEnterCritical( void )
|
||||||
|
|
||||||
void vPortExitCritical( void )
|
void vPortExitCritical( void )
|
||||||
{
|
{
|
||||||
xThreadState *pxThreadState;
|
|
||||||
long lMutexNeedsReleasing;
|
long lMutexNeedsReleasing;
|
||||||
|
|
||||||
/* The interrupt event mutex should already be held by this thread as it was
|
/* The interrupt event mutex should already be held by this thread as it was
|
||||||
|
@ -491,10 +486,6 @@ long lMutexNeedsReleasing;
|
||||||
{
|
{
|
||||||
SetEvent( pvInterruptEvent );
|
SetEvent( pvInterruptEvent );
|
||||||
|
|
||||||
/* The event handler needs to know to signal the interrupt
|
|
||||||
acknowledge event the next time this task runs. */
|
|
||||||
pxThreadState = ( xThreadState * ) *( ( unsigned long * ) pxCurrentTCB );
|
|
||||||
|
|
||||||
/* Mutex will be released now, so does not require releasing
|
/* Mutex will be released now, so does not require releasing
|
||||||
on function exit. */
|
on function exit. */
|
||||||
lMutexNeedsReleasing = pdFALSE;
|
lMutexNeedsReleasing = pdFALSE;
|
||||||
|
|
|
@ -120,6 +120,7 @@ extern void vPortYield( void );
|
||||||
#define portNVIC_PENDSVSET_BIT ( 1UL << 28UL )
|
#define portNVIC_PENDSVSET_BIT ( 1UL << 28UL )
|
||||||
#define portYIELD() vPortYield()
|
#define portYIELD() vPortYield()
|
||||||
#define portEND_SWITCHING_ISR( xSwitchRequired ) if( xSwitchRequired ) portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT
|
#define portEND_SWITCHING_ISR( xSwitchRequired ) if( xSwitchRequired ) portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT
|
||||||
|
#define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x )
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
/* Critical section management. */
|
/* Critical section management. */
|
||||||
|
|
|
@ -56,19 +56,19 @@
|
||||||
***************************************************************************
|
***************************************************************************
|
||||||
|
|
||||||
|
|
||||||
http://www.FreeRTOS.org - Documentation, books, training, latest versions,
|
http://www.FreeRTOS.org - Documentation, books, training, latest versions,
|
||||||
license and Real Time Engineers Ltd. contact details.
|
license and Real Time Engineers Ltd. contact details.
|
||||||
|
|
||||||
http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
|
http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
|
||||||
including FreeRTOS+Trace - an indispensable productivity tool, and our new
|
including FreeRTOS+Trace - an indispensable productivity tool, and our new
|
||||||
fully thread aware and reentrant UDP/IP stack.
|
fully thread aware and reentrant UDP/IP stack.
|
||||||
|
|
||||||
http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High
|
http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High
|
||||||
Integrity Systems, who sell the code with commercial support,
|
Integrity Systems, who sell the code with commercial support,
|
||||||
indemnification and middleware, under the OpenRTOS brand.
|
indemnification and middleware, under the OpenRTOS brand.
|
||||||
|
|
||||||
http://www.SafeRTOS.com - High Integrity Systems also provide a safety
|
http://www.SafeRTOS.com - High Integrity Systems also provide a safety
|
||||||
engineered and independently SIL3 certified version for use in safety and
|
engineered and independently SIL3 certified version for use in safety and
|
||||||
mission critical applications that require provable dependability.
|
mission critical applications that require provable dependability.
|
||||||
*/
|
*/
|
||||||
|
|
||||||
|
@ -81,7 +81,7 @@ extern "C" {
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
/*-----------------------------------------------------------
|
/*-----------------------------------------------------------
|
||||||
* Port specific definitions.
|
* Port specific definitions.
|
||||||
*
|
*
|
||||||
* The settings in this file configure FreeRTOS correctly for the
|
* The settings in this file configure FreeRTOS correctly for the
|
||||||
* given hardware and compiler.
|
* given hardware and compiler.
|
||||||
|
@ -106,13 +106,13 @@ extern "C" {
|
||||||
typedef unsigned portLONG portTickType;
|
typedef unsigned portLONG portTickType;
|
||||||
#define portMAX_DELAY ( portTickType ) 0xffffffff
|
#define portMAX_DELAY ( portTickType ) 0xffffffff
|
||||||
#endif
|
#endif
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
/* Architecture specifics. */
|
/* Architecture specifics. */
|
||||||
#define portSTACK_GROWTH ( -1 )
|
#define portSTACK_GROWTH ( -1 )
|
||||||
#define portTICK_RATE_MS ( ( portTickType ) 1000 / configTICK_RATE_HZ )
|
#define portTICK_RATE_MS ( ( portTickType ) 1000 / configTICK_RATE_HZ )
|
||||||
#define portBYTE_ALIGNMENT 8
|
#define portBYTE_ALIGNMENT 8
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
/* Scheduler utilities. */
|
/* Scheduler utilities. */
|
||||||
extern void vPortYield( void );
|
extern void vPortYield( void );
|
||||||
|
@ -120,6 +120,7 @@ extern void vPortYield( void );
|
||||||
#define portNVIC_PENDSVSET_BIT ( 1UL << 28UL )
|
#define portNVIC_PENDSVSET_BIT ( 1UL << 28UL )
|
||||||
#define portYIELD() vPortYield()
|
#define portYIELD() vPortYield()
|
||||||
#define portEND_SWITCHING_ISR( xSwitchRequired ) if( xSwitchRequired ) portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT
|
#define portEND_SWITCHING_ISR( xSwitchRequired ) if( xSwitchRequired ) portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT
|
||||||
|
#define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x )
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
/* Critical section management. */
|
/* Critical section management. */
|
||||||
|
@ -137,7 +138,7 @@ extern void vPortExitCritical( void );
|
||||||
|
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
/* There are an uneven number of items on the initial stack, so
|
/* There are an uneven number of items on the initial stack, so
|
||||||
portALIGNMENT_ASSERT_pxCurrentTCB() will trigger false positive asserts. */
|
portALIGNMENT_ASSERT_pxCurrentTCB() will trigger false positive asserts. */
|
||||||
#define portALIGNMENT_ASSERT_pxCurrentTCB ( void )
|
#define portALIGNMENT_ASSERT_pxCurrentTCB ( void )
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
|
@ -122,6 +122,7 @@ extern void vPortYield( void );
|
||||||
#define portYIELD() vPortYield()
|
#define portYIELD() vPortYield()
|
||||||
|
|
||||||
#define portEND_SWITCHING_ISR( xSwitchRequired ) if( xSwitchRequired ) *(portNVIC_INT_CTRL) = portNVIC_PENDSVSET
|
#define portEND_SWITCHING_ISR( xSwitchRequired ) if( xSwitchRequired ) *(portNVIC_INT_CTRL) = portNVIC_PENDSVSET
|
||||||
|
#define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x )
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
|
|
||||||
|
|
Loading…
Reference in a new issue