len0rd/FreeRTOS-Kernel
1
0
Fork 0
mirror of https://github.com/FreeRTOS/FreeRTOS-Kernel.git synced 2025-08-19 09:38:32 -04:00
Code Issues Projects Releases Packages Wiki Activity

Style: Make freertos.org = FreeRTOS.org and add https (#134)

Browse source 
* Style: make freertos.org = FreeRTOS.org also add https

* Style: Fix freertos into FreeRTOS

* Style: Fix freertos into FreeRTOS

Co-authored-by: Alfred Gedeon <gedeonag@amazon.com>
This commit is contained in:
alfred gedeon 2020-08-21 11:30:39 -07:00 • committed by GitHub
parent 7cd4a4f276
commit a038146915
No known key found for this signature in database
GPG key ID: 4AEE18F83AFDEB23
52 changed files with 147 additions and 147 deletions
Download patch file Download diff file Expand all files Collapse all files

10
tasks.c
View file

@ -1510,7 +1510,7 @@ static void prvAddNewTaskToReadyList( TCB_t * pxNewTCB )
* separate interrupt safe API to ensure interrupt entry is as fast and as
* simple as possible. More information (albeit Cortex-M specific) is
* provided on the following link:
* https://www.freertos.org/RTOS-Cortex-M3-M4.html */
* https://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html */
portASSERT_IF_INTERRUPT_PRIORITY_INVALID();
uxSavedInterruptState = portSET_INTERRUPT_MASK_FROM_ISR();
@ -1925,7 +1925,7 @@ static void prvAddNewTaskToReadyList( TCB_t * pxNewTCB )
* separate interrupt safe API to ensure interrupt entry is as fast and as
* simple as possible. More information (albeit Cortex-M specific) is
* provided on the following link:
* https://www.freertos.org/RTOS-Cortex-M3-M4.html */
* https://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html */
portASSERT_IF_INTERRUPT_PRIORITY_INVALID();
uxSavedInterruptStatus = portSET_INTERRUPT_MASK_FROM_ISR();
@ -2335,7 +2335,7 @@ TickType_t xTaskGetTickCountFromISR( void )
* system call interrupt priority. FreeRTOS maintains a separate interrupt
* safe API to ensure interrupt entry is as fast and as simple as possible.
* More information (albeit Cortex-M specific) is provided on the following
* link: https://www.freertos.org/RTOS-Cortex-M3-M4.html */
* link: https://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html */
portASSERT_IF_INTERRUPT_PRIORITY_INVALID();
uxSavedInterruptStatus = portTICK_TYPE_SET_INTERRUPT_MASK_FROM_ISR();
@ -4976,7 +4976,7 @@ TickType_t uxTaskResetEventItemValue( void )
* separate interrupt safe API to ensure interrupt entry is as fast and as
* simple as possible. More information (albeit Cortex-M specific) is
* provided on the following link:
* http://www.freertos.org/RTOS-Cortex-M3-M4.html */
* https://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html */
portASSERT_IF_INTERRUPT_PRIORITY_INVALID();
pxTCB = xTaskToNotify;
@ -5111,7 +5111,7 @@ TickType_t uxTaskResetEventItemValue( void )
* separate interrupt safe API to ensure interrupt entry is as fast and as
* simple as possible. More information (albeit Cortex-M specific) is
* provided on the following link:
* http://www.freertos.org/RTOS-Cortex-M3-M4.html */
* https://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html */
portASSERT_IF_INTERRUPT_PRIORITY_INVALID();
pxTCB = xTaskToNotify;