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Work around compiler bug in CCS5 by replacing the _call_swi() function with a #pragma SWI_ALIAS.
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@ -111,11 +111,13 @@ extern void vPortExitCritical(void);
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#define portENABLE_INTERRUPTS() asm( " CPSIE I" )
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#define portENABLE_INTERRUPTS() asm( " CPSIE I" )
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/* Scheduler utilities. */
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/* Scheduler utilities. */
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#define portYIELD() _call_swi( 0 )
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#pragma SWI_ALIAS( vPortYield, 0 )
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extern void vPortYield( void );
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#define portYIELD() vPortYield()
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#define portSYS_SSIR1_REG ( * ( ( volatile unsigned long * ) 0xFFFFFFB0 ) )
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#define portSYS_SSIR1_REG ( * ( ( volatile unsigned long * ) 0xFFFFFFB0 ) )
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#define portSYS_SSIR1_SSKEY ( 0x7500UL )
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#define portSYS_SSIR1_SSKEY ( 0x7500UL )
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#define portYIELD_WITHIN_API() { portSYS_SSIR1_REG = portSYS_SSIR1_SSKEY; ( void ) portSYS_SSIR1_REG; }
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#define portYIELD_WITHIN_API() { portSYS_SSIR1_REG = portSYS_SSIR1_SSKEY; ( void ) portSYS_SSIR1_REG; }
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#define portYIELD_FROM_ISR() { portSYS_SSIR1_REG = portSYS_SSIR1_SSKEY; ( void ) portSYS_SSIR1_REG; }
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#define portYIELD_FROM_ISR( x ) if( x != pdFALSE ){ portSYS_SSIR1_REG = portSYS_SSIR1_SSKEY; ( void ) portSYS_SSIR1_REG; }
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/* Architecture specific optimisations. */
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/* Architecture specific optimisations. */
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#if configUSE_PORT_OPTIMISED_TASK_SELECTION == 1
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#if configUSE_PORT_OPTIMISED_TASK_SELECTION == 1
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