mirror of
https://github.com/FreeRTOS/FreeRTOS-Kernel.git
synced 2025-09-12 00:57:44 -04:00
Add support for GreenWaves-Technologies GAP8 RI5CY core
This commit is contained in:
parent
6199b72fbf
commit
9ea646f213
4 changed files with 639 additions and 0 deletions
|
@ -0,0 +1,67 @@
|
||||||
|
/*
|
||||||
|
* FreeRTOS Kernel V10.2.1
|
||||||
|
* Copyright (C) 2019 Amazon.com, Inc. or its affiliates. All Rights Reserved.
|
||||||
|
*
|
||||||
|
* Permission is hereby granted, free of charge, to any person obtaining a copy of
|
||||||
|
* this software and associated documentation files (the "Software"), to deal in
|
||||||
|
* the Software without restriction, including without limitation the rights to
|
||||||
|
* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
|
||||||
|
* the Software, and to permit persons to whom the Software is furnished to do so,
|
||||||
|
* subject to the following conditions:
|
||||||
|
*
|
||||||
|
* The above copyright notice and this permission notice shall be included in all
|
||||||
|
* copies or substantial portions of the Software.
|
||||||
|
*
|
||||||
|
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||||
|
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
|
||||||
|
* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
|
||||||
|
* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
|
||||||
|
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||||
|
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||||
|
*
|
||||||
|
* http://www.FreeRTOS.org
|
||||||
|
* http://aws.amazon.com/freertos
|
||||||
|
*
|
||||||
|
* 1 tab == 4 spaces!
|
||||||
|
*/
|
||||||
|
|
||||||
|
#if !defined(ASSEMBLY_LANGUAGE)
|
||||||
|
/* Control and Status Registers reset values. */
|
||||||
|
/* Machine mode with IRQ disabled, after MRET stay in MM. */
|
||||||
|
#define portINITIAL_MSTATUS ( 0x1880 )
|
||||||
|
/* Retrieve MTVEC address from linker script. */
|
||||||
|
extern uint8_t __irq_vector_base_m__;
|
||||||
|
#define portINITIAL_MEPC ( &__irq_vector_base_m__ )
|
||||||
|
#define portINITIAL_MCAUSE ( 0x00000000 )
|
||||||
|
#endif /* ASSEMBLY_LANGUAGE */
|
||||||
|
|
||||||
|
/* Size of a word, in bytes. */
|
||||||
|
#define portWORD_SIZE ( 4 )
|
||||||
|
/* Number of chip specific additional extensions. */
|
||||||
|
#define portGAP8_ADDITIONAL_EXTENSIONS ( 6 )
|
||||||
|
|
||||||
|
/* a0 - a7 */
|
||||||
|
#define portGAP8_ARGS_REGS ( 8 )
|
||||||
|
/* t0 - t6 */
|
||||||
|
#define portGAP8_TEMP_REGS ( 7 )
|
||||||
|
/* s0 - s11 */
|
||||||
|
#define portGAP8_SAVE_REGS ( 12 )
|
||||||
|
/* Minimal context size to save for irq handler. */
|
||||||
|
/* a0-a7 + t0-t6 + ra */
|
||||||
|
#define portGAP8_MINIMAL_CONTEXT_SIZE ( portGAP8_ARGS_REGS + portGAP8_TEMP_REGS + 1 )
|
||||||
|
/* General context size. */
|
||||||
|
/* ra + a0-a7 + t0-t6 + s0-s11 + mstatus + mepc */
|
||||||
|
#define portGAP8_CONTEXT_SIZE ( portGAP8_MINIMAL_CONTEXT_SIZE + portGAP8_SAVE_REGS + 2 )
|
||||||
|
/* Chip's additional extensions to save. */
|
||||||
|
#define portGAP8_ADDITIONAL_CONTEXT_SIZE ( portGAP8_ADDITIONAL_EXTENSIONS )
|
||||||
|
/* GAP8 core total context size. */
|
||||||
|
#define portGAP8_FULL_CONTEXT_SIZE ( portGAP8_CONTEXT_SIZE + portGAP8_ADDITIONAL_CONTEXT_SIZE )
|
||||||
|
|
||||||
|
/* Additionnal extensions. */
|
||||||
|
/* Hardware loops. */
|
||||||
|
#define LP_START_0 ( 0x7B0 )
|
||||||
|
#define LP_END_0 ( 0x7B1 )
|
||||||
|
#define LP_COUNT_0 ( 0x7B2 )
|
||||||
|
#define LP_START_1 ( 0x7B4 )
|
||||||
|
#define LP_END_1 ( 0x7B5 )
|
||||||
|
#define LP_COUNT_1 ( 0x7B6 )
|
209
portable/GCC/RI5CY-GAP8/port.c
Normal file
209
portable/GCC/RI5CY-GAP8/port.c
Normal file
|
@ -0,0 +1,209 @@
|
||||||
|
/*
|
||||||
|
* FreeRTOS Kernel V10.2.1
|
||||||
|
* Copyright (C) 2019 Amazon.com, Inc. or its affiliates. All Rights Reserved.
|
||||||
|
*
|
||||||
|
* Permission is hereby granted, free of charge, to any person obtaining a copy of
|
||||||
|
* this software and associated documentation files (the "Software"), to deal in
|
||||||
|
* the Software without restriction, including without limitation the rights to
|
||||||
|
* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
|
||||||
|
* the Software, and to permit persons to whom the Software is furnished to do so,
|
||||||
|
* subject to the following conditions:
|
||||||
|
*
|
||||||
|
* The above copyright notice and this permission notice shall be included in all
|
||||||
|
* copies or substantial portions of the Software.
|
||||||
|
*
|
||||||
|
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||||
|
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
|
||||||
|
* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
|
||||||
|
* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
|
||||||
|
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||||
|
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||||
|
*
|
||||||
|
* http://www.FreeRTOS.org
|
||||||
|
* http://aws.amazon.com/freertos
|
||||||
|
*
|
||||||
|
* 1 tab == 4 spaces!
|
||||||
|
*/
|
||||||
|
|
||||||
|
/*-----------------------------------------------------------
|
||||||
|
* Implementation of functions defined in portable.h for the RI5CY-GAP8 port.
|
||||||
|
*----------------------------------------------------------*/
|
||||||
|
|
||||||
|
/* Scheduler includes. */
|
||||||
|
#include "FreeRTOS.h"
|
||||||
|
#include "task.h"
|
||||||
|
#include "system_gap8.h"
|
||||||
|
|
||||||
|
/* Macro definitions. */
|
||||||
|
#include "chip_specific_extensions/gap8/freertos_risc_v_chip_specific_extensions.h"
|
||||||
|
|
||||||
|
/* Internal Functions. */
|
||||||
|
|
||||||
|
/* Setup timer to enable Systick interruptions. */
|
||||||
|
void prvSetupTimerInterrupt( void );
|
||||||
|
|
||||||
|
#if (portUSING_MPU_WRAPPERS == 1)
|
||||||
|
/* Setup MPU. */
|
||||||
|
void prvSetupMPU( void ) PRIVILEGED_FUNCTION;
|
||||||
|
|
||||||
|
/*
|
||||||
|
* Checks to see if being called from the context of an unprivileged task, and
|
||||||
|
* if so raises the privilege level and returns false - otherwise does nothing
|
||||||
|
* other than return true.
|
||||||
|
*/
|
||||||
|
BaseType_t xPortRaisePrivilege( void );
|
||||||
|
|
||||||
|
/* Reset privilege level after call to xPortRaisePrivilege(). */
|
||||||
|
void vPortResetPrivilege( BaseType_t xRunningPrivileged );
|
||||||
|
#endif /* portUSING_MPU_WRAPPERS == 1 */
|
||||||
|
|
||||||
|
/* Scheduler utilities. */
|
||||||
|
|
||||||
|
/* Critical sections management. */
|
||||||
|
void vPortEnter_Critical( void );
|
||||||
|
void vPortExit_Critical( void );
|
||||||
|
uint32_t uPortSet_Interrupt_Mask_From_ISR( void );
|
||||||
|
void vPortClear_Interrupt_Mask_From_ISR( uint32_t irqSet );
|
||||||
|
|
||||||
|
/* FreeRTOS Handlers in gap8_it.c. */
|
||||||
|
|
||||||
|
/* Variables. */
|
||||||
|
volatile uint32_t ulCriticalNesting = 0ul;
|
||||||
|
|
||||||
|
/*-----------------------------------------------------------*/
|
||||||
|
/* See header file for description. */
|
||||||
|
StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack,
|
||||||
|
TaskFunction_t pxCode,
|
||||||
|
void *pvParameters )
|
||||||
|
{
|
||||||
|
/* Few bytes on the bottom of the stack. May be useful for debugging. */
|
||||||
|
pxTopOfStack--;
|
||||||
|
*pxTopOfStack = 0xdeedfeed;
|
||||||
|
|
||||||
|
/* GAP8 extensions. */
|
||||||
|
{
|
||||||
|
/* Hardware Loop registers. */
|
||||||
|
pxTopOfStack -= (uint32_t) portGAP8_ADDITIONAL_EXTENSIONS;
|
||||||
|
}
|
||||||
|
/* Control and status registers saved if R/W. */
|
||||||
|
{
|
||||||
|
pxTopOfStack--;
|
||||||
|
*pxTopOfStack = ( StackType_t ) pxCode; /* MEPC */
|
||||||
|
pxTopOfStack--;
|
||||||
|
*pxTopOfStack = ( StackType_t ) portINITIAL_MSTATUS; /* MSTATUS */
|
||||||
|
}
|
||||||
|
/* General purpose registers saved. sp reg stored in Task Control Block. */
|
||||||
|
{
|
||||||
|
pxTopOfStack -= 27; /* a1-a7 + t0-t6 + s0-11 */
|
||||||
|
*pxTopOfStack = ( StackType_t ) pvParameters; /* a0 */
|
||||||
|
pxTopOfStack -= 1;
|
||||||
|
*pxTopOfStack = ( StackType_t ) pxCode; /* ra */
|
||||||
|
}
|
||||||
|
|
||||||
|
/*
|
||||||
|
* Task's stack view.
|
||||||
|
* LOW
|
||||||
|
* ************* <------ pxTopOfStack
|
||||||
|
* * ra *
|
||||||
|
* * a0 * <------ Parameters sent to task
|
||||||
|
* * a1 *
|
||||||
|
* * -- *
|
||||||
|
* * a7 *
|
||||||
|
* * t0 *
|
||||||
|
* * -- *
|
||||||
|
* * t6 *
|
||||||
|
* * s0 *
|
||||||
|
* * -- *
|
||||||
|
* * s11 *
|
||||||
|
* *-----------*
|
||||||
|
* * MSTATUS * <------ Initial mstatus for the task
|
||||||
|
* * MEPC * <------ MEPC contains address of task's function, jump to it after mret.
|
||||||
|
* *-----------*
|
||||||
|
* * HW loop *
|
||||||
|
* *===========*
|
||||||
|
* * deedfeed *
|
||||||
|
* *************
|
||||||
|
* HIGH
|
||||||
|
*/
|
||||||
|
return pxTopOfStack;
|
||||||
|
}
|
||||||
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
|
void vPortEndScheduler( void )
|
||||||
|
{
|
||||||
|
/* Do not implement. */
|
||||||
|
}
|
||||||
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
|
/* Setup Systick timer to generate tick interrupts. */
|
||||||
|
void prvSetupTimerInterrupt( void )
|
||||||
|
{
|
||||||
|
/* Compared value. */
|
||||||
|
/* SysTick->CMP_LO = ( configCPU_CLOCK_HZ / configTICK_RATE_HZ ) - 1ul; */
|
||||||
|
system_setup_systick((uint32_t) configTICK_RATE_HZ);
|
||||||
|
}
|
||||||
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
|
#if portUSING_MPU_WRAPPERS == 1
|
||||||
|
void prvSetupMPU( void )
|
||||||
|
{
|
||||||
|
}
|
||||||
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
|
void vPortStoreTaskMPUSettings( xMPU_SETTINGS *xMPUSettings,
|
||||||
|
const struct xMEMORY_REGION * const xRegions,
|
||||||
|
StackType_t *pxBottomOfStack,
|
||||||
|
uint32_t ulStackDepth )
|
||||||
|
{
|
||||||
|
}
|
||||||
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
|
BaseType_t xPortRaisePrivilege( void )
|
||||||
|
{
|
||||||
|
return 1;
|
||||||
|
}
|
||||||
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
|
void vPortResetPrivilege( BaseType_t xRunningPrivileged )
|
||||||
|
{
|
||||||
|
( void ) xRunningPrivileged;
|
||||||
|
}
|
||||||
|
#endif /* portUSING_MPU_WRAPPERS == 1 */
|
||||||
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
|
void vPortEnter_Critical( void )
|
||||||
|
{
|
||||||
|
portDISABLE_INTERRUPTS();
|
||||||
|
/* Increment nesting value everytime a critical section is entered. */
|
||||||
|
ulCriticalNesting++;
|
||||||
|
}
|
||||||
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
|
void vPortExit_Critical( void )
|
||||||
|
{
|
||||||
|
/* Decrement nesting value everytime a critical section is exit. */
|
||||||
|
if( ulCriticalNesting > 0 )
|
||||||
|
{
|
||||||
|
ulCriticalNesting--;
|
||||||
|
if( ulCriticalNesting == 0 )
|
||||||
|
{
|
||||||
|
/* If no more in any critical sections, enable interruptions. */
|
||||||
|
portENABLE_INTERRUPTS();
|
||||||
|
}
|
||||||
|
}
|
||||||
|
}
|
||||||
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
|
uint32_t uPortSet_Interrupt_Mask_From_ISR( void )
|
||||||
|
{
|
||||||
|
/* No nested IRQ, so IRQ are either enabled or disabled. */
|
||||||
|
return __disable_irq();
|
||||||
|
}
|
||||||
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
|
void vPortClear_Interrupt_Mask_From_ISR( uint32_t irqSet )
|
||||||
|
{
|
||||||
|
__restore_irq(irqSet);
|
||||||
|
/* No nested IRQ, so IRQ are either enabled or disabled. */
|
||||||
|
}
|
||||||
|
/*-----------------------------------------------------------*/
|
250
portable/GCC/RI5CY-GAP8/port_asm.S
Normal file
250
portable/GCC/RI5CY-GAP8/port_asm.S
Normal file
|
@ -0,0 +1,250 @@
|
||||||
|
/*
|
||||||
|
* Copyright (c) 2018, GreenWaves Technologies, Inc.
|
||||||
|
* All rights reserved.
|
||||||
|
*
|
||||||
|
* Redistribution and use in source and binary forms, with or without modification,
|
||||||
|
* are permitted provided that the following conditions are met:
|
||||||
|
*
|
||||||
|
* o Redistributions of source code must retain the above copyright notice, this list
|
||||||
|
* of conditions and the following disclaimer.
|
||||||
|
*
|
||||||
|
* o Redistributions in binary form must reproduce the above copyright notice, this
|
||||||
|
* list of conditions and the following disclaimer in the documentation and/or
|
||||||
|
* other materials provided with the distribution.
|
||||||
|
*
|
||||||
|
* o Neither the name of GreenWaves Technologies, Inc. nor the names of its
|
||||||
|
* contributors may be used to endorse or promote products derived from this
|
||||||
|
* software without specific prior written permission.
|
||||||
|
*
|
||||||
|
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
|
||||||
|
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||||
|
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||||
|
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
|
||||||
|
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||||
|
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||||
|
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
|
||||||
|
* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||||
|
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||||
|
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||||
|
*/
|
||||||
|
|
||||||
|
.file "port_asm.S"
|
||||||
|
|
||||||
|
#include "chip_specific_extensions/gap8/freertos_risc_v_chip_specific_extensions.h"
|
||||||
|
/*******************************************************************************
|
||||||
|
This file contains some macro definitions and functions defined in ASM.
|
||||||
|
Functions :
|
||||||
|
*xPortStartScheduler
|
||||||
|
********************************************************************************/
|
||||||
|
|
||||||
|
/*******************************************************************************
|
||||||
|
EXTERNAL VARIABLES & FUNCTIONS
|
||||||
|
*******************************************************************************/
|
||||||
|
.extern pxCurrentTCB
|
||||||
|
.extern prvSetupTimerInterrupt
|
||||||
|
.extern ulCriticalNesting
|
||||||
|
/******************************************************************************/
|
||||||
|
|
||||||
|
|
||||||
|
/*******************************************************************************
|
||||||
|
MACRO DEFINITION
|
||||||
|
*******************************************************************************/
|
||||||
|
|
||||||
|
/******************************************************************************/
|
||||||
|
.macro DECLARE Routine
|
||||||
|
.global \Routine
|
||||||
|
.func \Routine
|
||||||
|
.type \Routine, %function
|
||||||
|
\Routine:
|
||||||
|
.endm
|
||||||
|
/******************************************************************************/
|
||||||
|
|
||||||
|
/******************************************************************************/
|
||||||
|
.macro portGAP8_SAVE_ADDITIONAL_CONTEXT
|
||||||
|
|
||||||
|
addi sp, sp, -(portGAP8_ADDITIONAL_CONTEXT_SIZE * portWORD_SIZE)
|
||||||
|
|
||||||
|
/* HW Loop regs. */
|
||||||
|
csrr t0, LP_START_0
|
||||||
|
sw t0, 0*portWORD_SIZE(sp)
|
||||||
|
csrr t1, LP_END_0
|
||||||
|
sw t1, 1*portWORD_SIZE(sp)
|
||||||
|
csrr t2, LP_COUNT_0
|
||||||
|
sw t2, 2*portWORD_SIZE(sp)
|
||||||
|
csrr t0, LP_START_1
|
||||||
|
sw t0, 3*portWORD_SIZE(sp)
|
||||||
|
csrr t1, LP_END_1
|
||||||
|
sw t1, 4*portWORD_SIZE(sp)
|
||||||
|
csrr t2, LP_COUNT_1
|
||||||
|
sw t2, 5*portWORD_SIZE(sp)
|
||||||
|
|
||||||
|
.endm
|
||||||
|
/******************************************************************************/
|
||||||
|
|
||||||
|
/******************************************************************************/
|
||||||
|
.macro portGAP8_RESTORE_ADDITIONAL_CONTEXT
|
||||||
|
|
||||||
|
/* HW Loop regs. */
|
||||||
|
lw t2, 5*portWORD_SIZE(sp)
|
||||||
|
csrw LP_COUNT_1, t2
|
||||||
|
lw t1, 4*portWORD_SIZE(sp)
|
||||||
|
csrw LP_END_1, t1
|
||||||
|
lw t0, 3*portWORD_SIZE(sp)
|
||||||
|
csrw LP_START_1, t0
|
||||||
|
lw t2, 2*portWORD_SIZE(sp)
|
||||||
|
csrw LP_COUNT_0, t2
|
||||||
|
lw t1, 1*portWORD_SIZE(sp)
|
||||||
|
csrw LP_END_0, t1
|
||||||
|
lw t0, 0*portWORD_SIZE(sp)
|
||||||
|
csrw LP_START_0, t0
|
||||||
|
|
||||||
|
addi sp, sp, +(portGAP8_ADDITIONAL_CONTEXT_SIZE * portWORD_SIZE)
|
||||||
|
|
||||||
|
.endm
|
||||||
|
/******************************************************************************/
|
||||||
|
|
||||||
|
/******************************************************************************/
|
||||||
|
.macro portGAP8_SAVE_CONTEXT
|
||||||
|
|
||||||
|
addi sp, sp, -(portGAP8_CONTEXT_SIZE * portWORD_SIZE)
|
||||||
|
|
||||||
|
/* General purpose registers. */
|
||||||
|
sw ra, 0*portWORD_SIZE(sp)
|
||||||
|
sw a0, 1*portWORD_SIZE(sp)
|
||||||
|
sw a1, 2*portWORD_SIZE(sp)
|
||||||
|
sw a2, 3*portWORD_SIZE(sp)
|
||||||
|
sw a3, 4*portWORD_SIZE(sp)
|
||||||
|
sw a4, 5*portWORD_SIZE(sp)
|
||||||
|
sw a5, 6*portWORD_SIZE(sp)
|
||||||
|
sw a6, 7*portWORD_SIZE(sp)
|
||||||
|
sw a7, 8*portWORD_SIZE(sp)
|
||||||
|
sw t0, 9*portWORD_SIZE(sp)
|
||||||
|
sw t1, 10*portWORD_SIZE(sp)
|
||||||
|
sw t2, 11*portWORD_SIZE(sp)
|
||||||
|
sw t3, 12*portWORD_SIZE(sp)
|
||||||
|
sw t4, 13*portWORD_SIZE(sp)
|
||||||
|
sw t5, 14*portWORD_SIZE(sp)
|
||||||
|
sw t6, 15*portWORD_SIZE(sp)
|
||||||
|
sw s0, 16*portWORD_SIZE(sp)
|
||||||
|
sw s1, 17*portWORD_SIZE(sp)
|
||||||
|
sw s2, 18*portWORD_SIZE(sp)
|
||||||
|
sw s3, 19*portWORD_SIZE(sp)
|
||||||
|
sw s4, 20*portWORD_SIZE(sp)
|
||||||
|
sw s5, 21*portWORD_SIZE(sp)
|
||||||
|
sw s6, 22*portWORD_SIZE(sp)
|
||||||
|
sw s7, 23*portWORD_SIZE(sp)
|
||||||
|
sw s8, 24*portWORD_SIZE(sp)
|
||||||
|
sw s9, 25*portWORD_SIZE(sp)
|
||||||
|
sw s10, 26*portWORD_SIZE(sp)
|
||||||
|
sw s11, 27*portWORD_SIZE(sp)
|
||||||
|
|
||||||
|
/* MSTATUS */
|
||||||
|
csrr t0, mstatus
|
||||||
|
sw t0, 28*portWORD_SIZE(sp)
|
||||||
|
|
||||||
|
/* MEPC */
|
||||||
|
csrr t0, mepc
|
||||||
|
sw t0, 29*portWORD_SIZE(sp)
|
||||||
|
|
||||||
|
.endm
|
||||||
|
/******************************************************************************/
|
||||||
|
|
||||||
|
/******************************************************************************/
|
||||||
|
.macro portGAP8_RESTORE_CONTEXT
|
||||||
|
|
||||||
|
/* MEPC */
|
||||||
|
lw t0, 29*portWORD_SIZE(sp)
|
||||||
|
csrw mepc, t0
|
||||||
|
|
||||||
|
/* MSTATUS */
|
||||||
|
lw t0, 28*portWORD_SIZE(sp)
|
||||||
|
csrw mstatus, t0
|
||||||
|
|
||||||
|
/* General purpose registers. */
|
||||||
|
lw s11, 27*portWORD_SIZE(sp)
|
||||||
|
lw s10, 26*portWORD_SIZE(sp)
|
||||||
|
lw s9, 25*portWORD_SIZE(sp)
|
||||||
|
lw s8, 24*portWORD_SIZE(sp)
|
||||||
|
lw s7, 23*portWORD_SIZE(sp)
|
||||||
|
lw s6, 22*portWORD_SIZE(sp)
|
||||||
|
lw s5, 21*portWORD_SIZE(sp)
|
||||||
|
lw s4, 20*portWORD_SIZE(sp)
|
||||||
|
lw s3, 19*portWORD_SIZE(sp)
|
||||||
|
lw s2, 18*portWORD_SIZE(sp)
|
||||||
|
lw s1, 17*portWORD_SIZE(sp)
|
||||||
|
lw s0, 16*portWORD_SIZE(sp)
|
||||||
|
lw t6, 15*portWORD_SIZE(sp)
|
||||||
|
lw t5, 14*portWORD_SIZE(sp)
|
||||||
|
lw t4, 13*portWORD_SIZE(sp)
|
||||||
|
lw t3, 12*portWORD_SIZE(sp)
|
||||||
|
lw t2, 11*portWORD_SIZE(sp)
|
||||||
|
lw t1, 10*portWORD_SIZE(sp)
|
||||||
|
lw t0, 9*portWORD_SIZE(sp)
|
||||||
|
lw a7, 8*portWORD_SIZE(sp)
|
||||||
|
lw a6, 7*portWORD_SIZE(sp)
|
||||||
|
lw a5, 6*portWORD_SIZE(sp)
|
||||||
|
lw a4, 5*portWORD_SIZE(sp)
|
||||||
|
lw a3, 4*portWORD_SIZE(sp)
|
||||||
|
lw a2, 3*portWORD_SIZE(sp)
|
||||||
|
lw a1, 2*portWORD_SIZE(sp)
|
||||||
|
lw a0, 1*portWORD_SIZE(sp)
|
||||||
|
lw ra, 0*portWORD_SIZE(sp)
|
||||||
|
|
||||||
|
addi sp, sp, +(portGAP8_CONTEXT_SIZE * portWORD_SIZE)
|
||||||
|
|
||||||
|
.endm
|
||||||
|
/******************************************************************************/
|
||||||
|
|
||||||
|
/******************************************************************************/
|
||||||
|
.macro portGAP8_SAVE_EPC
|
||||||
|
|
||||||
|
csrr t0, mepc
|
||||||
|
sw t0, 29*4(sp)
|
||||||
|
|
||||||
|
.endm
|
||||||
|
/******************************************************************************/
|
||||||
|
|
||||||
|
/******************************************************************************/
|
||||||
|
.macro portGAP8_SAVE_RA
|
||||||
|
|
||||||
|
sw ra, 29*4(sp)
|
||||||
|
|
||||||
|
.endm
|
||||||
|
/******************************************************************************/
|
||||||
|
|
||||||
|
/******************************************************************************/
|
||||||
|
.macro portSAVE_CONTEXT
|
||||||
|
|
||||||
|
portGAP8_SAVE_ADDITIONAL_CONTEXT
|
||||||
|
portGAP8_SAVE_CONTEXT
|
||||||
|
lw tp, pxCurrentTCB
|
||||||
|
sw sp, 0*0(tp)
|
||||||
|
|
||||||
|
.endm
|
||||||
|
/******************************************************************************/
|
||||||
|
|
||||||
|
/******************************************************************************/
|
||||||
|
.macro portRESTORE_CONTEXT
|
||||||
|
|
||||||
|
lw tp, pxCurrentTCB
|
||||||
|
lw sp, 0*0(tp)
|
||||||
|
portGAP8_RESTORE_CONTEXT
|
||||||
|
portGAP8_RESTORE_ADDITIONAL_CONTEXT
|
||||||
|
mret
|
||||||
|
.endm
|
||||||
|
/******************************************************************************/
|
||||||
|
|
||||||
|
|
||||||
|
/*******************************************************************************
|
||||||
|
FUNCTION DEFINITION
|
||||||
|
*******************************************************************************/
|
||||||
|
|
||||||
|
/* xPortStartScheduler Function. */
|
||||||
|
DECLARE xPortStartScheduler
|
||||||
|
jal ra, prvSetupTimerInterrupt
|
||||||
|
;; la t0, ulCriticalNesting
|
||||||
|
;; sw zero, 0*0(t0)
|
||||||
|
portRESTORE_CONTEXT
|
||||||
|
.endfunc
|
||||||
|
|
||||||
|
/******************************************************************************/
|
113
portable/GCC/RI5CY-GAP8/portmacro.h
Normal file
113
portable/GCC/RI5CY-GAP8/portmacro.h
Normal file
|
@ -0,0 +1,113 @@
|
||||||
|
/*
|
||||||
|
* FreeRTOS Kernel V10.2.1
|
||||||
|
* Copyright (C) 2019 Amazon.com, Inc. or its affiliates. All Rights Reserved.
|
||||||
|
*
|
||||||
|
* Permission is hereby granted, free of charge, to any person obtaining a copy of
|
||||||
|
* this software and associated documentation files (the "Software"), to deal in
|
||||||
|
* the Software without restriction, including without limitation the rights to
|
||||||
|
* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
|
||||||
|
* the Software, and to permit persons to whom the Software is furnished to do so,
|
||||||
|
* subject to the following conditions:
|
||||||
|
*
|
||||||
|
* The above copyright notice and this permission notice shall be included in all
|
||||||
|
* copies or substantial portions of the Software.
|
||||||
|
*
|
||||||
|
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||||
|
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
|
||||||
|
* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
|
||||||
|
* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
|
||||||
|
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||||
|
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||||
|
*
|
||||||
|
* http://www.FreeRTOS.org
|
||||||
|
* http://aws.amazon.com/freertos
|
||||||
|
*
|
||||||
|
* 1 tab == 4 spaces!
|
||||||
|
*/
|
||||||
|
|
||||||
|
|
||||||
|
#ifndef PORTMACRO_H
|
||||||
|
#define PORTMACRO_H
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
extern "C" {
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/*-----------------------------------------------------------
|
||||||
|
* Port specific definitions.
|
||||||
|
*
|
||||||
|
* The settings in this file configure FreeRTOS correctly for the
|
||||||
|
* given hardware and compiler.
|
||||||
|
*
|
||||||
|
* These settings should not be altered.
|
||||||
|
*-----------------------------------------------------------
|
||||||
|
*/
|
||||||
|
|
||||||
|
/* Type definitions. */
|
||||||
|
#define portSTACK_TYPE uint32_t
|
||||||
|
#define portBASE_TYPE int32_t
|
||||||
|
#define portUBASE_TYPE uint32_t
|
||||||
|
|
||||||
|
typedef portSTACK_TYPE StackType_t;
|
||||||
|
typedef portBASE_TYPE BaseType_t;
|
||||||
|
typedef portUBASE_TYPE UBaseType_t;
|
||||||
|
|
||||||
|
#if( configUSE_16_BIT_TICKS == 1 )
|
||||||
|
typedef uint16_t TickType_t;
|
||||||
|
#define portMAX_DELAY ( ( TickType_t ) 0xffff )
|
||||||
|
#else
|
||||||
|
typedef uint32_t TickType_t;
|
||||||
|
#define portMAX_DELAY ( ( TickType_t ) 0xffffffffUL )
|
||||||
|
|
||||||
|
/* 32-bit tick type on a 32-bit architecture, so reads of the tick count do
|
||||||
|
not need to be guarded with a critical section. */
|
||||||
|
#define portTICK_TYPE_IS_ATOMIC ( 1 )
|
||||||
|
#endif
|
||||||
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
|
/* Architecture specifics. */
|
||||||
|
#define portSTACK_GROWTH ( -1 )
|
||||||
|
#define portTICK_PERIOD_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )
|
||||||
|
#define portBYTE_ALIGNMENT ( 8 )
|
||||||
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
|
/* Scheduler utilities. */
|
||||||
|
extern void vSetPendSV();
|
||||||
|
|
||||||
|
#define portYIELD() ( vSetPendSV() )
|
||||||
|
#define portEND_SWITCHING_ISR( xSwitchRequired ) { if( xSwitchRequired != pdFALSE ) vSetPendSV(); }
|
||||||
|
#define portYIELD_FROM_ISR( x ) ( portEND_SWITCHING_ISR( x ) )
|
||||||
|
|
||||||
|
#define portYIELD_WITHIN_API() ( vSetPendSV() )
|
||||||
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
|
/* Critical section management. */
|
||||||
|
extern void vPortEnter_Critical( void );
|
||||||
|
extern void vPortExit_Critical( void );
|
||||||
|
extern uint32_t uPortSet_Interrupt_Mask_From_ISR( void );
|
||||||
|
extern void vPortClear_Interrupt_Mask_From_ISR( uint32_t irqSet );
|
||||||
|
|
||||||
|
#define portSET_INTERRUPT_MASK_FROM_ISR() ( uPortSet_Interrupt_Mask_From_ISR() )
|
||||||
|
#define portCLEAR_INTERRUPT_MASK_FROM_ISR( x ) ( vPortClear_Interrupt_Mask_From_ISR( x ) )
|
||||||
|
|
||||||
|
#define portDISABLE_INTERRUPTS() { __asm__ volatile("csrci mstatus, (0x1 << 3)"); }
|
||||||
|
#define portENABLE_INTERRUPTS() { __asm__ volatile("csrsi mstatus, (0x1 << 3)"); }
|
||||||
|
|
||||||
|
#define portENTER_CRITICAL() ( vPortEnter_Critical() )
|
||||||
|
#define portEXIT_CRITICAL() ( vPortExit_Critical() )
|
||||||
|
|
||||||
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
|
/* Task function macros as described on the FreeRTOS.org WEB site. These are
|
||||||
|
not necessary for to use this port. They are defined so the common demo files
|
||||||
|
(which build with all the ports) will build. */
|
||||||
|
#define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void *pvParameters )
|
||||||
|
#define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void *pvParameters )
|
||||||
|
|
||||||
|
/*-----------------------------------------------------------*/
|
||||||
|
#ifdef __cplusplus
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#endif /* PORTMACRO_H */
|
||||||
|
|
Loading…
Add table
Add a link
Reference in a new issue