Cortex-M23: Do not use PSPLIM_NS (#791)

According to Armv8-M technical reference manual, if the main extension
is not implemented then PSPLIM_NS is RES0. Update the cortex-M23
port to not use the reserved PSPLIM_NS.
This commit is contained in:
Devaraj Ranganna 2023-09-28 10:08:55 +01:00 committed by GitHub
parent a695b671aa
commit 9d2571d2ed
No known key found for this signature in database
GPG key ID: 4AEE18F83AFDEB23
29 changed files with 833 additions and 145 deletions

View file

@ -67,6 +67,16 @@
#if ( ( configRUN_FREERTOS_SECURE_ONLY == 1 ) && ( configENABLE_TRUSTZONE == 1 ) )
#error TrustZone needs to be disabled in order to run FreeRTOS on the Secure Side.
#endif
/**
* Cortex-M23 does not have non-secure PSPLIM. We should use PSPLIM on Cortex-M23
* only when FreeRTOS runs on secure side.
*/
#if ( ( portHAS_ARMV8M_MAIN_EXTENSION == 0 ) && ( configRUN_FREERTOS_SECURE_ONLY == 0 ) )
#define portUSE_PSPLIM_REGISTER 0
#else
#define portUSE_PSPLIM_REGISTER 1
#endif
/*-----------------------------------------------------------*/
/**
@ -1185,11 +1195,19 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO
/* Store the value of the LR and PSPLIM registers before the SVC was raised. We need to
* restore it when we exit from the system call. */
pxMpuSettings->xSystemCallStackInfo.ulLinkRegisterAtSystemCallEntry = pulTaskStack[ portOFFSET_TO_LR ];
__asm volatile ( "mrs %0, psplim" : "=r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) );
#if ( portUSE_PSPLIM_REGISTER == 1 )
{
__asm volatile ( "mrs %0, psplim" : "=r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) );
}
#endif
/* Use the pulSystemCallStack in thread mode. */
__asm volatile ( "msr psp, %0" : : "r" ( pulSystemCallStack ) );
__asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.pulSystemCallStackLimit ) );
#if ( portUSE_PSPLIM_REGISTER == 1 )
{
__asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.pulSystemCallStackLimit ) );
}
#endif
/* Remember the location where we should copy the stack frame when we exit from
* the system call. */
@ -1316,11 +1334,19 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO
/* Store the value of the LR and PSPLIM registers before the SVC was raised.
* We need to restore it when we exit from the system call. */
pxMpuSettings->xSystemCallStackInfo.ulLinkRegisterAtSystemCallEntry = pulTaskStack[ portOFFSET_TO_LR ];
__asm volatile ( "mrs %0, psplim" : "=r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) );
#if ( portUSE_PSPLIM_REGISTER == 1 )
{
__asm volatile ( "mrs %0, psplim" : "=r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) );
}
#endif
/* Use the pulSystemCallStack in thread mode. */
__asm volatile ( "msr psp, %0" : : "r" ( pulSystemCallStack ) );
__asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.pulSystemCallStackLimit ) );
#if ( portUSE_PSPLIM_REGISTER == 1 )
{
__asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.pulSystemCallStackLimit ) );
}
#endif
/* Remember the location where we should copy the stack frame when we exit from
* the system call. */
@ -1415,7 +1441,11 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO
/* Restore the LR and PSPLIM to what they were at the time of
* system call entry. */
pulTaskStack[ portOFFSET_TO_LR ] = pxMpuSettings->xSystemCallStackInfo.ulLinkRegisterAtSystemCallEntry;
__asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) );
#if ( portUSE_PSPLIM_REGISTER == 1 )
{
__asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) );
}
#endif
/* If the hardware used padding to force the stack pointer
* to be double word aligned, set the stacked xPSR bit[9],

View file

@ -109,7 +109,9 @@
" ldmia r1!, {r2-r5} \n" /* r2 = original PSP, r3 = PSPLIM, r4 = CONTROL, r5 = LR. */
" subs r1, #16 \n"
" msr psp, r2 \n"
" msr psplim, r3 \n"
#if ( configRUN_FREERTOS_SECURE_ONLY == 1 )
" msr psplim, r3 \n"
#endif
" msr control, r4 \n"
" mov lr, r5 \n"
" \n"
@ -155,7 +157,9 @@
" ldr r0, [r1] \n" /* Read top of stack from TCB - The first item in pxCurrentTCB is the task top of stack. */
" \n"
" ldm r0!, {r1-r2} \n" /* Read from stack - r1 = PSPLIM and r2 = EXC_RETURN. */
" msr psplim, r1 \n" /* Set this task's PSPLIM value. */
#if ( configRUN_FREERTOS_SECURE_ONLY == 1 )
" msr psplim, r1 \n" /* Set this task's PSPLIM value. */
#endif
" movs r1, #2 \n" /* r1 = 2. */
" msr CONTROL, r1 \n" /* Switch to use PSP in the thread mode. */
" adds r0, #32 \n" /* Discard everything up to r0. */
@ -302,7 +306,11 @@ void vClearInterruptMask( __attribute__( ( unused ) ) uint32_t ulMask ) /* __att
" \n"
" save_special_regs: \n"
" mrs r2, psp \n" /* r2 = PSP. */
" mrs r3, psplim \n" /* r3 = PSPLIM. */
#if ( configRUN_FREERTOS_SECURE_ONLY == 1 )
" mrs r3, psplim \n" /* r3 = PSPLIM. */
#else
" movs r3, #0 \n" /* r3 = 0. 0 is stored in the PSPLIM slot. */
#endif
" mrs r4, control \n" /* r4 = CONTROL. */
" mov r5, lr \n" /* r5 = LR. */
" stmia r1!, {r2-r5} \n" /* Store original PSP (after hardware has saved context), PSPLIM, CONTROL and LR. */
@ -370,7 +378,9 @@ void vClearInterruptMask( __attribute__( ( unused ) ) uint32_t ulMask ) /* __att
" ldmia r1!, {r2-r5} \n" /* r2 = original PSP, r3 = PSPLIM, r4 = CONTROL, r5 = LR. */
" subs r1, #16 \n"
" msr psp, r2 \n"
" msr psplim, r3 \n"
#if ( configRUN_FREERTOS_SECURE_ONLY == 1 )
" msr psplim, r3 \n"
#endif
" msr control, r4 \n"
" mov lr, r5 \n"
" \n"
@ -416,7 +426,11 @@ void vClearInterruptMask( __attribute__( ( unused ) ) uint32_t ulMask ) /* __att
" ldr r1, [r2] \n" /* Read pxCurrentTCB. */
" subs r0, r0, #40 \n" /* Make space for PSPLIM, LR and the remaining registers on the stack. */
" str r0, [r1] \n" /* Save the new top of stack in TCB. */
" mrs r2, psplim \n" /* r2 = PSPLIM. */
#if ( configRUN_FREERTOS_SECURE_ONLY == 1 )
" mrs r2, psplim \n" /* r2 = PSPLIM. */
#else
" movs r2, #0 \n" /* r2 = 0. 0 is stored in the PSPLIM slot. */
#endif
" mov r3, lr \n" /* r3 = LR/EXC_RETURN. */
" stmia r0!, {r2-r7} \n" /* Store on the stack - PSPLIM, LR and low registers that are not automatically saved. */
" mov r4, r8 \n" /* r4 = r8. */
@ -442,7 +456,9 @@ void vClearInterruptMask( __attribute__( ( unused ) ) uint32_t ulMask ) /* __att
" msr psp, r0 \n" /* Remember the new top of stack for the task. */
" subs r0, r0, #40 \n" /* Move to the starting of the saved context. */
" ldmia r0!, {r2-r7} \n" /* Read from stack - r2 = PSPLIM, r3 = LR and r4-r7 restored. */
" msr psplim, r2 \n" /* Restore the PSPLIM register value for the task. */
#if ( configRUN_FREERTOS_SECURE_ONLY == 1 )
" msr psplim, r2 \n" /* Restore the PSPLIM register value for the task. */
#endif
" bx r3 \n"
" \n"
" .align 4 \n"