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Change default vector number to 16.
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@ -97,7 +97,7 @@ to exclude the API function. */
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#define INCLUDE_vTaskDelay 1
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#define INCLUDE_uxTaskGetStackHighWaterMark 1
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#define configYIELD_INTERRUPT_VECTOR 63UL
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#define configYIELD_INTERRUPT_VECTOR 16UL
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#define configKERNEL_INTERRUPT_PRIORITY 1
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#define configMAX_SYSCALL_INTERRUPT_PRIORITY 4
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@ -59,7 +59,7 @@
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/*
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* FreeRTOS.org requires two interrupts - a tick interrupt generated from a
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* timer source, and a spare interrupt vector used for context switching.
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* The configuration below uses PIT0 for the former, and vector 63 for the
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* The configuration below uses PIT0 for the former, and vector 16 for the
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* latter. **IF YOUR APPLICATION HAS BOTH OF THESE INTERRUPTS FREE THEN YOU DO
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* NOT NEED TO CHANGE ANY OF THIS CODE** - otherwise instructions are provided
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* here for using alternative interrupt sources.
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@ -82,14 +82,15 @@
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* 1) Modify vApplicationSetupInterrupts() below to be correct for whichever
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* interrupt vector is to be used. Make sure you use a spare interrupt on interrupt
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* controller 0, otherwise the register used to request context switches will also
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* require modification.
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* require modification. By default vector 16 is used which is free on most MCF52xxx
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* devices.
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*
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* 2) Change the definition of configYIELD_INTERRUPT_VECTOR within FreeRTOSConfig.h
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* to be correct for your chosen interrupt vector.
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*
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* 3) Change the name of the function __cs3_isr_interrupt_127() within portasm.S
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* 3) Change the name of the function __cs3_isr_interrupt_80() within portasm.S
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* to be correct for whichever vector number is being used. By default interrupt
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* controller 0 number 63 is used, which corresponds to vector number 127.
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* controller 0 vector number 16 is used, which corresponds to vector number 80.
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*/
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void vApplicationSetupInterrupts( void )
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{
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@ -99,11 +100,11 @@ const unsigned portSHORT usCompareMatchValue = ( ( configCPU_CLOCK_HZ / portPRES
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MCF_INTC0_ICR55 = ( 1 | ( configKERNEL_INTERRUPT_PRIORITY << 3 ) );
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MCF_INTC0_IMRH &= ~( MCF_INTC_IMRH_INT_MASK55 );
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/* Do the same for vector 63 (interrupt controller 0. I don't think the
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/* Do the same for vector 16 (interrupt controller 0). I don't think the
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write to MCF_INTC0_IMRH is actually required here but is included for
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completeness. */
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MCF_INTC0_ICR63 = ( 0 | ( configKERNEL_INTERRUPT_PRIORITY << 3 ) );
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MCF_INTC0_IMRH &= ~( MCF_INTC_IMRH_INT_MASK63 );
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MCF_INTC0_ICR16 = ( 0 | ( configKERNEL_INTERRUPT_PRIORITY << 3 ) );
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MCF_INTC0_IMRH &= ~( MCF_INTC_IMRH_INT_MASK16 );
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/* Configure PIT0 to generate the RTOS tick. */
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MCF_PIT0_PCSR |= MCF_PIT_PCSR_PIF;
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