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Hardware and software for the MicroBlaze project that uses the full Ethernet IP is now building - but the MAC driver has not yet been written.

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This commit is contained in:
Richard Barry 2011-08-28 18:38:32 +00:00
parent d14eb96aeb
commit 9c92745440
56 changed files with 31544 additions and 291 deletions
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BIN
Demo/MicroBlaze_Spartan-6_EthernetFull/SDKProjects/HardwareWithEthernetFull/system.bit
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732
Demo/MicroBlaze_Spartan-6_EthernetFull/SDKProjects/HardwareWithEthernetFull/system.xml
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8
Demo/MicroBlaze_Spartan-6_EthernetFull/SDKProjects/HardwareWithEthernetFull/system_bd.bmm
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@ -21,10 +21,10 @@ ADDRESS_MAP microblaze_0 MICROBLAZE-LE 100
ADDRESS_SPACE microblaze_0_bram_block_combined RAMB16 [0x00000000:0x00001FFF]
BUS_BLOCK
microblaze_0_bram_block/microblaze_0_bram_block/ramb16bwer_0 [31:24] INPUT = microblaze_0_bram_block_combined_0.mem PLACED = X3Y26;
microblaze_0_bram_block/microblaze_0_bram_block/ramb16bwer_1 [23:16] INPUT = microblaze_0_bram_block_combined_1.mem PLACED = X3Y28;
microblaze_0_bram_block/microblaze_0_bram_block/ramb16bwer_2 [15:8] INPUT = microblaze_0_bram_block_combined_2.mem PLACED = X2Y30;
microblaze_0_bram_block/microblaze_0_bram_block/ramb16bwer_3 [7:0] INPUT = microblaze_0_bram_block_combined_3.mem PLACED = X2Y28;
microblaze_0_bram_block/microblaze_0_bram_block/ramb16bwer_0 [31:24] INPUT = microblaze_0_bram_block_combined_0.mem PLACED = X3Y34;
microblaze_0_bram_block/microblaze_0_bram_block/ramb16bwer_1 [23:16] INPUT = microblaze_0_bram_block_combined_1.mem PLACED = X3Y36;
microblaze_0_bram_block/microblaze_0_bram_block/ramb16bwer_2 [15:8] INPUT = microblaze_0_bram_block_combined_2.mem PLACED = X2Y32;
microblaze_0_bram_block/microblaze_0_bram_block/ramb16bwer_3 [7:0] INPUT = microblaze_0_bram_block_combined_3.mem PLACED = X2Y30;
END_BUS_BLOCK;
END_ADDRESS_SPACE;

4
Demo/MicroBlaze_Spartan-6_EthernetFull/SDKProjects/RTOSDemo/.cproject
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@ -717,6 +717,8 @@
</scannerConfigBuildInfo>
</storageModule>
<storageModule moduleId="org.eclipse.cdt.core.externalSettings"/>
<storageModule moduleId="org.eclipse.cdt.core.language.mapping"/>
<storageModule moduleId="org.eclipse.cdt.internal.ui.text.commentOwnerProjectMappings"/>
</cconfiguration>
<cconfiguration id="xilinx.gnu.mb.exe.release.267375713">
<storageModule buildSystemId="org.eclipse.cdt.managedbuilder.core.configurationDataProvider" id="xilinx.gnu.mb.exe.release.267375713" moduleId="org.eclipse.cdt.core.settings" name="Release">
@ -1418,6 +1420,8 @@
</scannerConfigBuildInfo>
</storageModule>
<storageModule moduleId="org.eclipse.cdt.core.externalSettings"/>
<storageModule moduleId="org.eclipse.cdt.core.language.mapping"/>
<storageModule moduleId="org.eclipse.cdt.internal.ui.text.commentOwnerProjectMappings"/>
</cconfiguration>
</storageModule>
<storageModule moduleId="cdtBuildSystem" version="4.0.0">

2
Demo/MicroBlaze_Spartan-6_EthernetFull/SDKProjects/RTOSDemo/lwIP/lwIP_Apps/lwIP_Apps.c
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@ -117,7 +117,7 @@ static struct netif xNetIf;
LWIP_PORT_INIT_IPADDR(&xIPAddr);
LWIP_PORT_INIT_NETMASK(&xNetMask);
netif_set_default( netif_add( &xNetIf, &xIPAddr, &xNetMask, &xGateway, NULL, ethernetif_init, tcpip_input ) );
// netif_set_default( netif_add( &xNetIf, &xIPAddr, &xNetMask, &xGateway, NULL, ethernetif_init, tcpip_input ) );
netif_set_up( &xNetIf );
/* Initialise the raw http server. */

2
Demo/MicroBlaze_Spartan-6_EthernetFull/SDKProjects/RTOSDemo/src/lscript.ld
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@ -18,7 +18,7 @@ _HEAP_SIZE = DEFINED(_HEAP_SIZE) ? _HEAP_SIZE : 0x10000;
MEMORY
{
microblaze_0_i_bram_ctrl_microblaze_0_d_bram_ctrl : ORIGIN = 0x00000050, LENGTH = 0x00001FB0
MCB_DDR3_S0_AXI_BASEADDR : ORIGIN = 0x80000000, LENGTH = 0x00800000
MCB_DDR3_S0_AXI_BASEADDR : ORIGIN = 0xC0000000, LENGTH = 0x08000000
}
/* Specify the default entry point to the program */

6
Demo/MicroBlaze_Spartan-6_EthernetFull/SDKProjects/StandAloneBSP/system.mss
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@ -84,4 +84,10 @@ BEGIN DRIVER
PARAMETER HW_INSTANCE = MCB_DDR3
END
BEGIN DRIVER
PARAMETER DRIVER_NAME = gpio
PARAMETER DRIVER_VER = 3.00.a
PARAMETER HW_INSTANCE = DIP_Switches_4Bits
END