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Backup check in of the Microsemi IGLOO2 Creative Board RISC-V demo - still a work in progress.

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This commit is contained in:
Richard Barry 2018-12-04 01:27:06 +00:00
parent 4b9dd38d1c
commit 9a136a52df
13 changed files with 794 additions and 125 deletions
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8
FreeRTOS/Demo/RISC-V_IGLOO2_Creative_SoftConsole/riscv_hal/entry.S
View file

@ -24,6 +24,7 @@
#endif
.section .text.entry
.extern vPortTrapHandler
.globl _start
_start:
@ -33,10 +34,10 @@ nmi_vector:
j nmi_vector
trap_vector:
j trap_entry
j vPortTrapHandler
handle_reset:
la t0, trap_entry
la t0, vPortTrapHandler
csrw mtvec, t0
csrwi mstatus, 0
csrwi mie, 0
@ -71,7 +72,7 @@ handle_reset:
# perform the rest of initialization in C
j _init
#if 0
trap_entry:
addi sp, sp, -32*REGBYTES
@ -155,6 +156,7 @@ trap_entry:
addi sp, sp, 32*REGBYTES
mret
#endif /* 0 */
#endif

1
FreeRTOS/Demo/RISC-V_IGLOO2_Creative_SoftConsole/riscv_hal/microsemi-riscv-igloo2.ld
View file

@ -132,6 +132,7 @@ SECTIONS
__stack_bottom = .;
. += STACK_SIZE;
__stack_top = .;
_sp = .;
} > ram
}

1
FreeRTOS/Demo/RISC-V_IGLOO2_Creative_SoftConsole/riscv_hal/microsemi-riscv-ram.ld
View file

@ -132,6 +132,7 @@ SECTIONS
__stack_bottom = .;
. += STACK_SIZE;
__stack_top = .;
_sp = .;
} > ram
}

25
FreeRTOS/Demo/RISC-V_IGLOO2_Creative_SoftConsole/riscv_hal/riscv_hal.c
View file

@ -1,3 +1,4 @@
#if 0
/*******************************************************************************
* (c) Copyright 2016-2018 Microsemi SoC Products Group. All rights reserved.
*
@ -63,6 +64,7 @@ uint8_t External_31_IRQHandler(void);
*
*/
extern void Software_IRQHandler(void);
extern void Timer_IRQHandle( void );
/*------------------------------------------------------------------------------
* Increment value for the mtimecmp register in order to achieve a system tick
@ -115,15 +117,17 @@ uint32_t SysTick_Config(uint32_t ticks)
/*------------------------------------------------------------------------------
* RISC-V interrupt handler for machine timer interrupts.
*/
volatile uint32_t ulTimerInterrupts = 0;
extern void Timer_IRQHandler( void );
static void handle_m_timer_interrupt(void)
{
clear_csr(mie, MIP_MTIP);
// clear_csr(mie, MIP_MTIP);
SysTick_Handler();
Timer_IRQHandler();
PRCI->MTIMECMP[read_csr(mhartid)] = PRCI->MTIME + g_systick_increment;
// PRCI->MTIMECMP[read_csr(mhartid)] = PRCI->MTIME + g_systick_increment;
set_csr(mie, MIP_MTIP);
// set_csr(mie, MIP_MTIP);
}
/*------------------------------------------------------------------------------
@ -194,8 +198,20 @@ static void handle_m_soft_interrupt(void)
/*------------------------------------------------------------------------------
* Trap/Interrupt handler
*/
#define ENV_CALL_FROM_M_MODE 11
extern void vTaskSwitchContext( void );
uintptr_t handle_trap(uintptr_t mcause, uintptr_t mepc)
{
/*_RB_*/
if( mcause == ENV_CALL_FROM_M_MODE )
{
vTaskSwitchContext();
/* Ensure not to return to the instruction that generated the exception. */
mepc += 4;
} else
/*end _RB_*/
if ((mcause & MCAUSE_INT) && ((mcause & MCAUSE_CAUSE) == IRQ_M_EXT))
{
handle_m_ext_interrupt();
@ -249,3 +265,4 @@ uintptr_t handle_trap(uintptr_t mcause, uintptr_t mepc)
#ifdef __cplusplus
}
#endif
#endif

2
FreeRTOS/Demo/RISC-V_IGLOO2_Creative_SoftConsole/riscv_hal/riscv_plic.h
View file

@ -143,7 +143,7 @@ static inline void PLIC_init(void)
PLIC->TARGET[hart_id].PRIORITY_THRESHOLD = 0;
/* Enable machine external interrupts. */
set_csr(mie, MIP_MEIP);
// set_csr(mie, MIP_MEIP);
}
/*==============================================================================