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Update BSP source files for UltraScale Cortex-A53 and Cortex-R5 and Microblaze to the 2016.4 versions.

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Correct alignment issue in GCC Cortex-R port that was preventing full floating point usage in interrupts (other ports will be updated likewise).
Update the UltraScale R5 demo to test the GCC Cortex-A9 port layer modification mentioned on the line above.
This commit is contained in:
Richard Barry 2017-01-19 04:11:21 +00:00
parent 6ffaa6f018
commit 992a3c8c71
266 changed files with 8242 additions and 2072 deletions
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11
FreeRTOS/Demo/MicroBlaze_Kintex7_EthernetLite/RTOSDemo/src/Full_Demo/main_full.c
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@ -140,6 +140,7 @@
#include "EventGroupsDemo.h"
#include "TaskNotify.h"
#include "IntSemTest.h"
#include "AbortDelay.h"
/* Priorities for the demo application tasks. */
#define mainSEM_TEST_PRIORITY ( tskIDLE_PRIORITY + 1UL )
@ -251,6 +252,7 @@ void main_full( void )
vStartEventGroupTasks();
vStartTaskNotifyTask();
vStartInterruptSemaphoreTasks();
vCreateAbortDelayTasks();
/* Note - the set of standard demo tasks contains two versions of
vStartMathTasks.c. One is defined in flop.c, and uses double precision
@ -371,17 +373,22 @@ unsigned long ulErrorFound = pdFALSE;
ulErrorFound |= 1UL << 14UL;
}
if( xAreAbortDelayTestTasksStillRunning() != pdTRUE )
{
ulErrorFound |= 1UL << 15UL;
}
/* Check that the register test 1 task is still running. */
if( ulLastRegTest1Value == ulRegTest1LoopCounter )
{
ulErrorFound |= 1UL << 15UL;
ulErrorFound |= 1UL << 16UL;
}
ulLastRegTest1Value = ulRegTest1LoopCounter;
/* Check that the register test 2 task is still running. */
if( ulLastRegTest2Value == ulRegTest2LoopCounter )
{
ulErrorFound |= 1UL << 16UL;
ulErrorFound |= 1UL << 17UL;
}
ulLastRegTest2Value = ulRegTest2LoopCounter;