len0rd/FreeRTOS-Kernel
1
0
Fork 0
mirror of https://github.com/FreeRTOS/FreeRTOS-Kernel.git synced 2025-09-12 00:57:44 -04:00
Code Issues Projects Releases Packages Wiki Activity

ATmegaxxxx - update readme on megaAVR

Browse source
This commit is contained in:
Phillip Stevens 2020-04-14 14:35:42 +10:00
parent db234a6cc1
commit 98edb54ca3
1 changed files with 6 additions and 7 deletions
Download patch file Download diff file Expand all files Collapse all files

13
portable/GCC/ATmegaxxxx/readme.md
View file

@ -8,7 +8,8 @@ This port provides a basis for supporting all modern ATmega devices using either
This initial commit contains the information required to build with System Tick being generated by either the:
- Watchdog Timer, or
- Timer0 - an 8-bit Timer
- Timer0 - an 8-bit Timer, or
- TimerN - a 16-bit Timer which will be configured by the user.
Further commits can add support for 16-bit Timers available on many relevant devices. The availability of these 16-bit Timers is somewhat device specific, and these complex and highly configurable Timers are often used to generate phase correct PWM timing (for example) and they would be wasted as a simple System Tick.
@ -20,9 +21,9 @@ To build generic Microchip (AVR) ATmega support the similarities across the fami
The Microchip (AVR) ATmega family has limited Timer and Pin capabilities, and is designed to be used in physical applications, controlling hardware with PWM and recognising level and edge voltage changes. It does this mainly through the use of 16-bit Timers (for generating phase correct PWM by up/down counting), and Pins attached to Interrupts. The 8-bit Timers are also attached to Pins, and they can be used for more simple timing tasks, requiring only a single counting direction.
The Timers not attached to Pins (and therefore not impacting the application of the device) are an additional 16-bit Timer (very device dependent, eg Timer3 on 1284p), and the Watch Dog Timer.
The Timers not attached to Pins (and therefore not impacting the application of the device) are some 16-bit Timers (very device dependent, eg Timer3 on 1284p), The RTC Timer, and the Watch Dog Timer.
The Watch Dog Timer is configured identically across the entire range of ATmega devices. It comes in two variants. 1. Old style (eg ATmega32) which does not have an Interrupt capability, and hence on these old devices cannot be used as the System Tick. and 2. New style enhanced WDT, which can generate an Interrupt, and is available on every relevant device.
The Watch Dog Timer is configured identically across most of the ATmega devices. It comes in two variants. 1. Old style (eg ATmega32) which does not have an Interrupt capability, and hence on these old devices cannot be used as the System Tick. and 2. New style enhanced WDT, which can generate an Interrupt, and is available on every relevant device.
Using the Watch Dog Timer (WDT) to generate the System Tick does not impact its use as a watch dog. It can be configured to generate a System Tick interrupt, and then one period later to Reset the device if the interrupt is not serviced.
@ -76,12 +77,10 @@ ATmega devices with __ENHANCED WDT__ Interrupt capability - will use WDT.
- ATmega324PB -> 2kB RAM
- ATmega640/1280/2560/1281/2561 - Arduino Mega -> __8kB RAM + XRAM__
ATmega devices without enhanced __WDT__ Interrupt capability - will use Timer0.
ATmega devices without enhanced __WDT__ Interrupt capability - will use a 8-bit or 16-bit Timer.
- ATmega8A/16A/32A/64A/128A -> 4kB RAM
- ATmega165A/165PA/325A/325PA/3250A/3250PA/645A/645P/6450A/6450P -> 4kB RAM
- ATmega169A/169PA/329A/329PA/3290A/3290PA/649A/649P/6490A/6490P -> 4kB RAM
ATmega devices without avr-libc support - unsupported at this stage.
- ATmega808/809/1608/1609/3208/3209/4808/4809 - megaAVR 0-Series -> 6kB RAM