mirror of
https://github.com/FreeRTOS/FreeRTOS-Kernel.git
synced 2025-09-01 11:53:53 -04:00
Update to V4.5.0 files and directory structure.
This commit is contained in:
Richard Barry
parent
1362bebfdc
commit
98a9959a44
758 changed files with 53177 additions and 3139 deletions
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@ -1,5 +1,5 @@
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/*
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FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.
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FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.
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This file is part of the FreeRTOS.org distribution.
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@ -65,7 +65,7 @@
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#define portINITIAL_XPSR ( 0x01000000 )
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/* For backward compatibility, ensure configKERNEL_INTERRUPT_PRIORITY is
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defined. The value zero should also ensure backward compatibility.
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defined. The value 255 should also ensure backward compatibility.
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FreeRTOS.org versions prior to V4.3.0 did not include this definition. */
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#ifndef configKERNEL_INTERRUPT_PRIORITY
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#define configKERNEL_INTERRUPT_PRIORITY 255
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@ -1,5 +1,5 @@
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/*
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FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.
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FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.
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This file is part of the FreeRTOS.org distribution.
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@ -42,8 +42,8 @@
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#include <FreeRTOSConfig.h>
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/* For backward compatibility, ensure configKERNEL_INTERRUPT_PRIORITY is
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defined. The value zero should also ensure backward compatibility.
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/* For backward compatibility, ensure configKERNEL_INTERRUPT_PRIORITY is
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defined. The value zero should also ensure backward compatibility.
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FreeRTOS.org versions prior to V4.3.0 did not include this definition. */
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#ifndef configKERNEL_INTERRUPT_PRIORITY
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#define configKERNEL_INTERRUPT_PRIORITY 0
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@ -79,60 +79,53 @@ vSetMSP
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/*-----------------------------------------------------------*/
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xPortPendSVHandler:
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mrs r0, psp
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cbz r0, no_save
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/* Save the context into the TCB. */
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sub r0, r0, #0x20
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stm r0, {r4-r11}
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nop
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sub r0, r0, #0x04
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mrs r0, psp
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cbz r0, no_save
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/* Save the context into the TCB. */
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stmdb r0!, {r4-r11}
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sub r0, r0, #0x04
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ldr r1, =uxCriticalNesting
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ldr r1, [r1]
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str R1, [r0, #0x00]
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ldr r1, =pxCurrentTCB
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ldr r1, [r1]
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str r0, [r1]
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ldr r2, =pxCurrentTCB
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ldr r1, [r1]
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ldr r2, [r2]
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str r1, [r0]
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str r0, [r2]
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no_save:
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ldr r0, =vPortSwitchContext
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push {r14}
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blx r0
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pop {r14}
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/* Restore the context. */
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push {r14}
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bl vPortSwitchContext
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pop {r14}
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/* Restore the context. */
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ldr r1, =pxCurrentTCB
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ldr r1, [r1]
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ldr r0, [r1]
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ldm r0, {r1, r4-r11}
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nop
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ldr r1, [r1]
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ldr r0, [r1]
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ldmia r0!, {r1, r4-r11}
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ldr r2, =uxCriticalNesting
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str r1, [r2]
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add r0, r0, #0x24
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msr psp, r0
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orr r14, r14, #0xd
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/* Exit with interrupts in the state required by the task. */
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cbnz r1, sv_disable_interrupts
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bx r14
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sv_disable_interrupts:
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str r1, [r2]
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msr psp, r0
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orr r14, r14, #0xd
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/* Exit with interrupts in the state required by the task. */
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cbnz r1, sv_disable_interrupts
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bx r14
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sv_disable_interrupts:
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mov r1, #configKERNEL_INTERRUPT_PRIORITY
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msr basepri, R1
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bx r14
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bx r14
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/*-----------------------------------------------------------*/
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xPortSysTickHandler:
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/* Call the scheduler tick function. */
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ldr r0, =vPortIncrementTick
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push {r14}
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blx r0
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bl vPortIncrementTick
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pop {r14}
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/* If using preemption, also force a context switch. */
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#if configUSE_PREEMPTION == 1
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push {r14}
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ldr r0, =vPortYieldFromISR
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blx r0
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bl vPortYieldFromISR
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pop {r14}
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#endif
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@ -1,5 +1,5 @@
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/*
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FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.
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FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.
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This file is part of the FreeRTOS.org distribution.
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@ -90,7 +90,6 @@ extern void vPortYieldFromISR( void );
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/* Critical section management. */
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extern void vPortEnableInterrupts( void );
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extern void vPortEnterCritical( void );
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extern void vPortExitCritical( void );
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extern void vPortSetInterruptMask( void );
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@ -1,5 +1,5 @@
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/*
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FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.
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FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.
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This file is part of the FreeRTOS.org distribution.
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@ -1,5 +1,5 @@
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/*
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FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.
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FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.
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This file is part of the FreeRTOS.org distribution.
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@ -1,4 +1,4 @@
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; FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.
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; FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.
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;
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; This file is part of the FreeRTOS.org distribution.
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;
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@ -70,107 +70,107 @@ _evba:
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ORG 0x000
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// Unrecoverable Exception.
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_handle_Unrecoverable_Exception:
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rjmp _handle_Unrecoverable_Exception
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rjmp $
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ORG 0x004
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// TLB Multiple Hit: UNUSED IN AVR32UC.
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_handle_TLB_Multiple_Hit:
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rjmp _handle_TLB_Multiple_Hit
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rjmp $
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ORG 0x008
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// Bus Error Data Fetch.
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_handle_Bus_Error_Data_Fetch:
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rjmp _handle_Bus_Error_Data_Fetch
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rjmp $
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ORG 0x00C
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// Bus Error Instruction Fetch.
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_handle_Bus_Error_Instruction_Fetch:
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rjmp _handle_Bus_Error_Instruction_Fetch
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rjmp $
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ORG 0x010
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// NMI.
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_handle_NMI:
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rjmp _handle_NMI
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rjmp $
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ORG 0x014
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// Instruction Address.
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_handle_Instruction_Address:
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rjmp _handle_Instruction_Address
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rjmp $
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ORG 0x018
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// ITLB Protection.
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_handle_ITLB_Protection:
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rjmp _handle_ITLB_Protection
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rjmp $
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ORG 0x01C
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// Breakpoint.
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_handle_Breakpoint:
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rjmp _handle_Breakpoint
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rjmp $
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ORG 0x020
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// Illegal Opcode.
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_handle_Illegal_Opcode:
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rjmp _handle_Illegal_Opcode
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rjmp $
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ORG 0x024
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// Unimplemented Instruction.
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_handle_Unimplemented_Instruction:
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rjmp _handle_Unimplemented_Instruction
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rjmp $
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ORG 0x028
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// Privilege Violation.
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_handle_Privilege_Violation:
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rjmp _handle_Privilege_Violation
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rjmp $
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ORG 0x02C
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// Floating-Point: UNUSED IN AVR32UC.
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_handle_Floating_Point:
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rjmp _handle_Floating_Point
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rjmp $
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ORG 0x030
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// Coprocessor Absent: UNUSED IN AVR32UC.
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_handle_Coprocessor_Absent:
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rjmp _handle_Coprocessor_Absent
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rjmp $
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ORG 0x034
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// Data Address (Read).
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_handle_Data_Address_Read:
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rjmp _handle_Data_Address_Read
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rjmp $
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ORG 0x038
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// Data Address (Write).
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_handle_Data_Address_Write:
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rjmp _handle_Data_Address_Write
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rjmp $
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ORG 0x03C
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// DTLB Protection (Read).
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_handle_DTLB_Protection_Read:
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rjmp _handle_DTLB_Protection_Read
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rjmp $
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ORG 0x040
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// DTLB Protection (Write).
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_handle_DTLB_Protection_Write:
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rjmp _handle_DTLB_Protection_Write
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rjmp $
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ORG 0x044
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// DTLB Modified: UNUSED IN AVR32UC.
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_handle_DTLB_Modified:
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rjmp _handle_DTLB_Modified
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rjmp $
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ORG 0x050
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// ITLB Miss: UNUSED IN AVR32UC.
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_handle_ITLB_Miss:
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rjmp _handle_ITLB_Miss
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rjmp $
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ORG 0x060
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// DTLB Miss (Read): UNUSED IN AVR32UC.
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_handle_DTLB_Miss_Read:
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rjmp _handle_DTLB_Miss_Read
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rjmp $
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ORG 0x070
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// DTLB Miss (Write): UNUSED IN AVR32UC.
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_handle_DTLB_Miss_Write:
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rjmp _handle_DTLB_Miss_Write
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rjmp $
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ORG 0x100
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// Supervisor Call.
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@ -13,7 +13,7 @@
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*****************************************************************************/
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/*
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FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.
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FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.
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This file is part of the FreeRTOS.org distribution.
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@ -76,6 +76,8 @@ volatile unsigned portLONG ulCriticalNesting = 9999UL;
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#if( configTICK_USE_TC==0 )
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static void prvScheduleNextTick( void );
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#else
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static void prvClearTcInt( void );
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#endif
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/* Setup the timer to generate the tick interrupts. */
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@ -169,7 +171,7 @@ static void vTick( void )
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#if( configTICK_USE_TC==1 )
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/* Clear the interrupt flag. */
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AVR32_TC.channel[configTICK_TC_CHANNEL].sr;
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prvClearTcInt();
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#else
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/* Schedule the COUNT&COMPARE match interrupt in (configCPU_CLOCK_HZ/configTICK_RATE_HZ)
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clock cycles from now. */
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@ -201,6 +203,7 @@ void SCALLYield( void )
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different optimisation levels. The interrupt flags can therefore not always
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be saved to the stack. Instead the critical section nesting level is stored
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in a variable, which is then saved as part of the stack context. */
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#pragma optimize = no_inline
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void vPortEnterCritical( void )
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{
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/* Disable interrupts */
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@ -213,6 +216,7 @@ void vPortEnterCritical( void )
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}
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/*-----------------------------------------------------------*/
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#pragma optimize = no_inline
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void vPortExitCritical( void )
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{
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if(ulCriticalNesting > portNO_CRITICAL_NESTING)
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@ -301,6 +305,7 @@ clock cycles from now. */
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Set_system_register(AVR32_COMPARE, lCycles);
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}
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#pragma optimize = no_inline
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static void prvScheduleNextTick(void)
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{
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unsigned long lCycles, lCount;
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@ -320,6 +325,12 @@ clock cycles from now. */
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}
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Set_system_register(AVR32_COMPARE, lCycles);
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}
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#else
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#pragma optimize = no_inline
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static void prvClearTcInt(void)
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{
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AVR32_TC.channel[configTICK_TC_CHANNEL].sr;
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}
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#endif
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/*-----------------------------------------------------------*/
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@ -13,7 +13,7 @@
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*****************************************************************************/
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/*
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FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.
|
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FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.
|
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|
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This file is part of the FreeRTOS.org distribution.
|
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|
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|
|
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|
@ -1,5 +1,5 @@
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/*
|
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FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.
|
||||
FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.
|
||||
|
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This file is part of the FreeRTOS.org distribution.
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|
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|
|
|
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|
|
@ -1,5 +1,5 @@
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/*
|
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FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.
|
||||
FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.
|
||||
|
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This file is part of the FreeRTOS.org distribution.
|
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|
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|
|
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|
|
@ -1,5 +1,5 @@
|
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/*
|
||||
FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.
|
||||
FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.
|
||||
|
||||
This file is part of the FreeRTOS.org distribution.
|
||||
|
||||
|
|
|
|||
|
|
@ -1,5 +1,5 @@
|
|||
/*
|
||||
FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.
|
||||
FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.
|
||||
|
||||
This file is part of the FreeRTOS.org distribution.
|
||||
|
||||
|
|
|
|||
|
|
@ -1,5 +1,5 @@
|
|||
/*
|
||||
FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.
|
||||
FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.
|
||||
|
||||
This file is part of the FreeRTOS.org distribution.
|
||||
|
||||
|
|
|
|||
|
|
@ -1,5 +1,5 @@
|
|||
/*
|
||||
FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.
|
||||
FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.
|
||||
|
||||
This file is part of the FreeRTOS.org distribution.
|
||||
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
; FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.
|
||||
; FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.
|
||||
;
|
||||
; This file is part of the FreeRTOS.org distribution.
|
||||
;
|
||||
|
|
|
|||
|
|
@ -1,5 +1,5 @@
|
|||
/*
|
||||
FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.
|
||||
FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.
|
||||
|
||||
This file is part of the FreeRTOS.org distribution.
|
||||
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
; FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.
|
||||
; FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.
|
||||
;
|
||||
; This file is part of the FreeRTOS.org distribution.
|
||||
;
|
||||
|
|
|
|||
|
|
@ -1,5 +1,5 @@
|
|||
/*
|
||||
FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.
|
||||
FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.
|
||||
|
||||
This file is part of the FreeRTOS.org distribution.
|
||||
|
||||
|
|
|
|||
|
|
@ -1,5 +1,5 @@
|
|||
/*
|
||||
FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.
|
||||
FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.
|
||||
|
||||
This file is part of the FreeRTOS distribution.
|
||||
|
||||
|
|
|
|||
|
|
@ -1,5 +1,5 @@
|
|||
/*
|
||||
FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.
|
||||
FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.
|
||||
|
||||
This file is part of the FreeRTOS distribution.
|
||||
|
||||
|
|
@ -34,7 +34,7 @@
|
|||
*/
|
||||
|
||||
/*-----------------------------------------------------------
|
||||
* Implementation of functions defined in portable.h for the ST STR91x ARM7
|
||||
* Implementation of functions defined in portable.h for the ST STR91x ARM9
|
||||
* port.
|
||||
*----------------------------------------------------------*/
|
||||
|
||||
|
|
@ -43,22 +43,54 @@
|
|||
|
||||
/* Standard includes. */
|
||||
#include <stdlib.h>
|
||||
#include <assert.h>
|
||||
|
||||
/* Scheduler includes. */
|
||||
#include "FreeRTOS.h"
|
||||
#include "task.h"
|
||||
|
||||
#ifndef configUSE_WATCHDOG_TICK
|
||||
#error configUSE_WATCHDOG_TICK must be set to either 1 or 0 in FreeRTOSConfig.h to use either the Watchdog or timer 2 to generate the tick interrupt respectively.
|
||||
#endif
|
||||
|
||||
/* Constants required to setup the initial stack. */
|
||||
#ifndef _RUN_TASK_IN_ARM_MODE_
|
||||
#define portINITIAL_SPSR ( ( portSTACK_TYPE ) 0x3f ) /* System mode, THUMB mode, interrupts enabled. */
|
||||
#else
|
||||
#define portINITIAL_SPSR ( ( portSTACK_TYPE ) 0x1f ) /* System mode, ARM mode, interrupts enabled. */
|
||||
#endif
|
||||
|
||||
#define portINSTRUCTION_SIZE ( ( portSTACK_TYPE ) 4 )
|
||||
|
||||
/* Constants required to handle critical sections. */
|
||||
#define portNO_CRITICAL_NESTING ( ( unsigned portLONG ) 0 )
|
||||
|
||||
#ifndef abs
|
||||
#define abs(x) ((x)>0 ? (x) : -(x))
|
||||
#endif
|
||||
|
||||
/**
|
||||
* Toggle a led using the following algorithm:
|
||||
* if ( GPIO_ReadBit(GPIO9, GPIO_Pin_2) )
|
||||
* {
|
||||
* GPIO_WriteBit( GPIO9, GPIO_Pin_2, Bit_RESET );
|
||||
* }
|
||||
* else
|
||||
* {
|
||||
* GPIO_WriteBit( GPIO9, GPIO_Pin_2, Bit_RESET );
|
||||
* }
|
||||
*
|
||||
*/
|
||||
#define TOGGLE_LED(port,pin) \
|
||||
if ( ((((port)->DR[(pin)<<2])) & (pin)) != Bit_RESET ) \
|
||||
{ \
|
||||
(port)->DR[(pin) <<2] = 0x00; \
|
||||
} \
|
||||
else \
|
||||
{ \
|
||||
(port)->DR[(pin) <<2] = (pin); \
|
||||
}
|
||||
|
||||
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
|
|
@ -73,12 +105,16 @@ unsigned portLONG ulCriticalNesting = ( unsigned portLONG ) 9999;
|
|||
/* Tick interrupt routines for cooperative and preemptive operation
|
||||
respectively. The preemptive version is not defined as __irq as it is called
|
||||
from an asm wrapper function. */
|
||||
__arm __irq void vPortNonPreemptiveTick( void );
|
||||
void WDG_IRQHandler( void );
|
||||
|
||||
/* VIC interrupt default handler. */
|
||||
static void prvDefaultHandler( void );
|
||||
|
||||
#if configUSE_WATCHDOG_TICK == 0
|
||||
/* Used to update the OCR timer register */
|
||||
static u16 s_nPulseLength;
|
||||
#endif
|
||||
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/*
|
||||
|
|
@ -174,90 +210,189 @@ void vPortEndScheduler( void )
|
|||
|
||||
/* This function is called from an asm wrapper, so does not require the __irq
|
||||
keyword. */
|
||||
void WDG_IRQHandler( void )
|
||||
{
|
||||
/* Increment the tick counter. */
|
||||
vTaskIncrementTick();
|
||||
#if configUSE_WATCHDOG_TICK == 1
|
||||
|
||||
#if configUSE_PREEMPTION == 1
|
||||
/* The new tick value might unblock a task. Ensure the highest task that
|
||||
is ready to execute is the task that will execute when the tick ISR
|
||||
exits. */
|
||||
vTaskSwitchContext();
|
||||
#endif
|
||||
|
||||
/* Clear the interrupt in the watchdog. */
|
||||
WDG->SR &= ~0x0001;
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
#ifndef abs
|
||||
#define abs(x) ((x)>0 ? (x) : -(x))
|
||||
#endif
|
||||
|
||||
static void prvFindFactors(u32 n, u16 *a, u32 *b)
|
||||
{
|
||||
/* This function is copied from the ST STR7 library and is
|
||||
copyright STMicroelectronics. Reproduced with permission. */
|
||||
|
||||
u32 b0;
|
||||
u16 a0;
|
||||
long err, err_min=n;
|
||||
|
||||
*a = a0 = ((n-1)/65536ul) + 1;
|
||||
*b = b0 = n / *a;
|
||||
|
||||
for (; *a <= 256; (*a)++)
|
||||
static void prvFindFactors(u32 n, u16 *a, u32 *b)
|
||||
{
|
||||
*b = n / *a;
|
||||
err = (long)*a * (long)*b - (long)n;
|
||||
if (abs(err) > (*a / 2))
|
||||
/* This function is copied from the ST STR7 library and is
|
||||
copyright STMicroelectronics. Reproduced with permission. */
|
||||
|
||||
u32 b0;
|
||||
u16 a0;
|
||||
long err, err_min=n;
|
||||
|
||||
*a = a0 = ((n-1)/65536ul) + 1;
|
||||
*b = b0 = n / *a;
|
||||
|
||||
for (; *a <= 256; (*a)++)
|
||||
{
|
||||
(*b)++;
|
||||
*b = n / *a;
|
||||
err = (long)*a * (long)*b - (long)n;
|
||||
if (abs(err) > (*a / 2))
|
||||
{
|
||||
(*b)++;
|
||||
err = (long)*a * (long)*b - (long)n;
|
||||
}
|
||||
if (abs(err) < abs(err_min))
|
||||
{
|
||||
err_min = err;
|
||||
a0 = *a;
|
||||
b0 = *b;
|
||||
if (err == 0) break;
|
||||
}
|
||||
}
|
||||
if (abs(err) < abs(err_min))
|
||||
|
||||
*a = a0;
|
||||
*b = b0;
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
static void prvSetupTimerInterrupt( void )
|
||||
{
|
||||
WDG_InitTypeDef xWdg;
|
||||
unsigned portSHORT a;
|
||||
unsigned portLONG n = configCPU_PERIPH_HZ / configTICK_RATE_HZ, b;
|
||||
|
||||
/* Configure the watchdog as a free running timer that generates a
|
||||
periodic interrupt. */
|
||||
|
||||
SCU_APBPeriphClockConfig( __WDG, ENABLE );
|
||||
WDG_DeInit();
|
||||
WDG_StructInit(&xWdg);
|
||||
prvFindFactors( n, &a, &b );
|
||||
xWdg.WDG_Prescaler = a - 1;
|
||||
xWdg.WDG_Preload = b - 1;
|
||||
WDG_Init( &xWdg );
|
||||
WDG_ITConfig(ENABLE);
|
||||
|
||||
/* Configure the VIC for the WDG interrupt. */
|
||||
VIC_Config( WDG_ITLine, VIC_IRQ, 10 );
|
||||
VIC_ITCmd( WDG_ITLine, ENABLE );
|
||||
|
||||
/* Install the default handlers for both VIC's. */
|
||||
VIC0->DVAR = ( unsigned portLONG ) prvDefaultHandler;
|
||||
VIC1->DVAR = ( unsigned portLONG ) prvDefaultHandler;
|
||||
|
||||
WDG_Cmd(ENABLE);
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
void WDG_IRQHandler( void )
|
||||
{
|
||||
{
|
||||
err_min = err;
|
||||
a0 = *a;
|
||||
b0 = *b;
|
||||
if (err == 0) break;
|
||||
/* Increment the tick counter. */
|
||||
vTaskIncrementTick();
|
||||
|
||||
#if configUSE_PREEMPTION == 1
|
||||
{
|
||||
/* The new tick value might unblock a task. Ensure the highest task that
|
||||
is ready to execute is the task that will execute when the tick ISR
|
||||
exits. */
|
||||
vTaskSwitchContext();
|
||||
}
|
||||
#endif /* configUSE_PREEMPTION. */
|
||||
|
||||
/* Clear the interrupt in the watchdog. */
|
||||
WDG->SR &= ~0x0001;
|
||||
}
|
||||
}
|
||||
|
||||
*a = a0;
|
||||
*b = b0;
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
#else
|
||||
|
||||
static void prvSetupTimerInterrupt( void )
|
||||
{
|
||||
WDG_InitTypeDef xWdg;
|
||||
unsigned portSHORT a;
|
||||
unsigned portLONG n = configCPU_PERIPH_HZ / configTICK_RATE_HZ, b;
|
||||
static void prvFindFactors(u32 n, u8 *a, u16 *b)
|
||||
{
|
||||
/* This function is copied from the ST STR7 library and is
|
||||
copyright STMicroelectronics. Reproduced with permission. */
|
||||
|
||||
u16 b0;
|
||||
u8 a0;
|
||||
long err, err_min=n;
|
||||
|
||||
|
||||
*a = a0 = ((n-1)/256) + 1;
|
||||
*b = b0 = n / *a;
|
||||
|
||||
for (; *a <= 256; (*a)++)
|
||||
{
|
||||
*b = n / *a;
|
||||
err = (long)*a * (long)*b - (long)n;
|
||||
if (abs(err) > (*a / 2))
|
||||
{
|
||||
(*b)++;
|
||||
err = (long)*a * (long)*b - (long)n;
|
||||
}
|
||||
if (abs(err) < abs(err_min))
|
||||
{
|
||||
err_min = err;
|
||||
a0 = *a;
|
||||
b0 = *b;
|
||||
if (err == 0) break;
|
||||
}
|
||||
}
|
||||
|
||||
*a = a0;
|
||||
*b = b0;
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* Configure the watchdog as a free running timer that generates a
|
||||
periodic interrupt. */
|
||||
static void prvSetupTimerInterrupt( void )
|
||||
{
|
||||
unsigned portCHAR a;
|
||||
unsigned portSHORT b;
|
||||
unsigned portLONG n = configCPU_PERIPH_HZ / configTICK_RATE_HZ;
|
||||
|
||||
TIM_InitTypeDef timer;
|
||||
|
||||
SCU_APBPeriphClockConfig( __TIM23, ENABLE );
|
||||
TIM_DeInit(TIM2);
|
||||
TIM_StructInit(&timer);
|
||||
prvFindFactors( n, &a, &b );
|
||||
|
||||
timer.TIM_Mode = TIM_OCM_CHANNEL_1;
|
||||
timer.TIM_OC1_Modes = TIM_TIMING;
|
||||
timer.TIM_Clock_Source = TIM_CLK_APB;
|
||||
timer.TIM_Clock_Edge = TIM_CLK_EDGE_RISING;
|
||||
timer.TIM_Prescaler = a-1;
|
||||
timer.TIM_Pulse_Level_1 = TIM_HIGH;
|
||||
timer.TIM_Pulse_Length_1 = s_nPulseLength = b-1;
|
||||
|
||||
TIM_Init (TIM2, &timer);
|
||||
TIM_ITConfig(TIM2, TIM_IT_OC1, ENABLE);
|
||||
/* Configure the VIC for the WDG interrupt. */
|
||||
VIC_Config( TIM2_ITLine, VIC_IRQ, 10 );
|
||||
VIC_ITCmd( TIM2_ITLine, ENABLE );
|
||||
|
||||
/* Install the default handlers for both VIC's. */
|
||||
VIC0->DVAR = ( unsigned portLONG ) prvDefaultHandler;
|
||||
VIC1->DVAR = ( unsigned portLONG ) prvDefaultHandler;
|
||||
|
||||
TIM_CounterCmd(TIM2, TIM_CLEAR);
|
||||
TIM_CounterCmd(TIM2, TIM_START);
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
SCU_APBPeriphClockConfig( __WDG, ENABLE );
|
||||
WDG_DeInit();
|
||||
WDG_StructInit(&xWdg);
|
||||
prvFindFactors( n, &a, &b );
|
||||
xWdg.WDG_Prescaler = a - 1;
|
||||
xWdg.WDG_Preload = b - 1;
|
||||
WDG_Init( &xWdg );
|
||||
WDG_ITConfig(ENABLE);
|
||||
|
||||
/* Configure the VIC for the WDG interrupt. */
|
||||
VIC_Config( WDG_ITLine, VIC_IRQ, 10 );
|
||||
VIC_ITCmd( WDG_ITLine, ENABLE );
|
||||
|
||||
/* Install the default handlers for both VIC's. */
|
||||
VIC0->DVAR = ( unsigned portLONG ) prvDefaultHandler;
|
||||
VIC1->DVAR = ( unsigned portLONG ) prvDefaultHandler;
|
||||
|
||||
WDG_Cmd(ENABLE);
|
||||
}
|
||||
void TIM2_IRQHandler( void )
|
||||
{
|
||||
/* Reset the timer counter to avioid overflow. */
|
||||
TIM2->OC1R += s_nPulseLength;
|
||||
|
||||
/* Increment the tick counter. */
|
||||
vTaskIncrementTick();
|
||||
|
||||
#if configUSE_PREEMPTION == 1
|
||||
{
|
||||
/* The new tick value might unblock a task. Ensure the highest task that
|
||||
is ready to execute is the task that will execute when the tick ISR
|
||||
exits. */
|
||||
vTaskSwitchContext();
|
||||
}
|
||||
#endif
|
||||
|
||||
/* Clear the interrupt in the watchdog. */
|
||||
TIM2->SR &= ~TIM_FLAG_OC1;
|
||||
}
|
||||
|
||||
#endif /* USE_WATCHDOG_TICK */
|
||||
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
|
|
|
|||
|
|
@ -1,5 +1,5 @@
|
|||
/*
|
||||
FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.
|
||||
FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.
|
||||
|
||||
This file is part of the FreeRTOS distribution.
|
||||
|
||||
|
|
|
|||
|
|
@ -1,5 +1,5 @@
|
|||
/*
|
||||
FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.
|
||||
FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.
|
||||
|
||||
This file is part of the FreeRTOS distribution.
|
||||
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue