mirror of
https://github.com/FreeRTOS/FreeRTOS-Kernel.git
synced 2025-09-05 22:03:49 -04:00
Feature: SMP (#278)
* Add XMOS XCore ports Some minor modifications are also made to the kernel to support the XCore compiler's automatic stack size calculation. * Update kernel to support SMP The XMOS XCore ports are also updated to support SMP. * Fix compiler warnings in xcore ports The port set and clear interrupt mask from ISR macros were removed from the ports so that the default macros found in FreeRTOS.h are used instead. The default macros do not result in warnings when they are used. * Remove inline function from timers.h Inline function converted to macro. This should now build when optimizations are off and inlining is disabled. * Fix compiler warnings in xcore ports and tasks.c * fixed documentation for ulTaskNotifyTake() and ulTaskNotifyTakeIndexed() * spelling fixes for tasks.c Co-authored-by: Michael Bruno <mikeb@xmos.com>
This commit is contained in:
parent
cafae476e4
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509 changed files with 176869 additions and 174380 deletions
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@ -1,300 +1,300 @@
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/*
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* FreeRTOS Kernel V10.4.3
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* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy of
|
||||
* this software and associated documentation files (the "Software"), to deal in
|
||||
* the Software without restriction, including without limitation the rights to
|
||||
* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
|
||||
* the Software, and to permit persons to whom the Software is furnished to do so,
|
||||
* subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in all
|
||||
* copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
|
||||
* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
|
||||
* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
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* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
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* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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*
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* https://www.FreeRTOS.org
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* https://github.com/FreeRTOS
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*
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* 1 tab == 4 spaces!
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*/
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/* IAR includes. */
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#include <intrinsics.h>
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/* Scheduler includes. */
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#include "FreeRTOS.h"
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#include "task.h"
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#if configUSE_PORT_OPTIMISED_TASK_SELECTION == 1
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/* Check the configuration. */
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#if( configMAX_PRIORITIES > 32 )
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#error configUSE_PORT_OPTIMISED_TASK_SELECTION can only be set to 1 when configMAX_PRIORITIES is less than or equal to 32. It is very rare that a system requires more than 10 to 15 difference priorities as tasks that share a priority will time slice.
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#endif
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#endif /* configUSE_PORT_OPTIMISED_TASK_SELECTION */
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#ifndef configSETUP_TICK_INTERRUPT
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#error configSETUP_TICK_INTERRUPT() must be defined in FreeRTOSConfig.h to call the function that sets up the tick interrupt. A default that uses the PIT is provided in the official demo application.
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#endif
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#ifndef configCLEAR_TICK_INTERRUPT
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#error configCLEAR_TICK_INTERRUPT must be defined in FreeRTOSConfig.h to clear which ever interrupt was used to generate the tick interrupt. A default that uses the PIT is provided in the official demo application.
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#endif
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/* A critical section is exited when the critical section nesting count reaches
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this value. */
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#define portNO_CRITICAL_NESTING ( ( uint32_t ) 0 )
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/* Tasks are not created with a floating point context, but can be given a
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floating point context after they have been created. A variable is stored as
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part of the tasks context that holds portNO_FLOATING_POINT_CONTEXT if the task
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does not have an FPU context, or any other value if the task does have an FPU
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context. */
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#define portNO_FLOATING_POINT_CONTEXT ( ( StackType_t ) 0 )
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/* Constants required to setup the initial task context. */
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#define portINITIAL_SPSR ( ( StackType_t ) 0x1f ) /* System mode, ARM mode, interrupts enabled. */
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#define portTHUMB_MODE_BIT ( ( StackType_t ) 0x20 )
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#define portTHUMB_MODE_ADDRESS ( 0x01UL )
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/* Masks all bits in the APSR other than the mode bits. */
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#define portAPSR_MODE_BITS_MASK ( 0x1F )
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/* The value of the mode bits in the APSR when the CPU is executing in user
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mode. */
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#define portAPSR_USER_MODE ( 0x10 )
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/*-----------------------------------------------------------*/
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/*
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* Starts the first task executing. This function is necessarily written in
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* assembly code so is implemented in portASM.s.
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*/
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extern void vPortRestoreTaskContext( void );
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/*
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* Used to catch tasks that attempt to return from their implementing function.
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*/
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static void prvTaskExitError( void );
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/*-----------------------------------------------------------*/
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/* A variable is used to keep track of the critical section nesting. This
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variable has to be stored as part of the task context and must be initialised to
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a non zero value to ensure interrupts don't inadvertently become unmasked before
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the scheduler starts. As it is stored as part of the task context it will
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automatically be set to 0 when the first task is started. */
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volatile uint32_t ulCriticalNesting = 9999UL;
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/* Saved as part of the task context. If ulPortTaskHasFPUContext is non-zero
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then a floating point context must be saved and restored for the task. */
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uint32_t ulPortTaskHasFPUContext = pdFALSE;
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/* Set to 1 to pend a context switch from an ISR. */
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uint32_t ulPortYieldRequired = pdFALSE;
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/* Counts the interrupt nesting depth. A context switch is only performed if
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if the nesting depth is 0. */
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uint32_t ulPortInterruptNesting = 0UL;
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/*-----------------------------------------------------------*/
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/*
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* See header file for description.
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*/
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StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters )
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{
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/* Setup the initial stack of the task. The stack is set exactly as
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expected by the portRESTORE_CONTEXT() macro.
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The fist real value on the stack is the status register, which is set for
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system mode, with interrupts enabled. A few NULLs are added first to ensure
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GDB does not try decoding a non-existent return address. */
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*pxTopOfStack = NULL;
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pxTopOfStack--;
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*pxTopOfStack = NULL;
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pxTopOfStack--;
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*pxTopOfStack = NULL;
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pxTopOfStack--;
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*pxTopOfStack = ( StackType_t ) portINITIAL_SPSR;
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if( ( ( uint32_t ) pxCode & portTHUMB_MODE_ADDRESS ) != 0x00UL )
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{
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/* The task will start in THUMB mode. */
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*pxTopOfStack |= portTHUMB_MODE_BIT;
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}
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pxTopOfStack--;
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/* Next the return address, which in this case is the start of the task. */
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*pxTopOfStack = ( StackType_t ) pxCode;
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pxTopOfStack--;
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/* Next all the registers other than the stack pointer. */
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*pxTopOfStack = ( StackType_t ) prvTaskExitError; /* R14 */
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pxTopOfStack--;
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*pxTopOfStack = ( StackType_t ) 0x12121212; /* R12 */
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pxTopOfStack--;
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*pxTopOfStack = ( StackType_t ) 0x11111111; /* R11 */
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pxTopOfStack--;
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*pxTopOfStack = ( StackType_t ) 0x10101010; /* R10 */
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pxTopOfStack--;
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*pxTopOfStack = ( StackType_t ) 0x09090909; /* R9 */
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pxTopOfStack--;
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*pxTopOfStack = ( StackType_t ) 0x08080808; /* R8 */
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pxTopOfStack--;
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*pxTopOfStack = ( StackType_t ) 0x07070707; /* R7 */
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pxTopOfStack--;
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*pxTopOfStack = ( StackType_t ) 0x06060606; /* R6 */
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pxTopOfStack--;
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*pxTopOfStack = ( StackType_t ) 0x05050505; /* R5 */
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pxTopOfStack--;
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*pxTopOfStack = ( StackType_t ) 0x04040404; /* R4 */
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pxTopOfStack--;
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*pxTopOfStack = ( StackType_t ) 0x03030303; /* R3 */
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pxTopOfStack--;
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*pxTopOfStack = ( StackType_t ) 0x02020202; /* R2 */
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pxTopOfStack--;
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*pxTopOfStack = ( StackType_t ) 0x01010101; /* R1 */
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pxTopOfStack--;
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*pxTopOfStack = ( StackType_t ) pvParameters; /* R0 */
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pxTopOfStack--;
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/* The task will start with a critical nesting count of 0 as interrupts are
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enabled. */
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*pxTopOfStack = portNO_CRITICAL_NESTING;
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pxTopOfStack--;
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/* The task will start without a floating point context. A task that uses
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the floating point hardware must call vPortTaskUsesFPU() before executing
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any floating point instructions. */
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*pxTopOfStack = portNO_FLOATING_POINT_CONTEXT;
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return pxTopOfStack;
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}
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/*-----------------------------------------------------------*/
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static void prvTaskExitError( void )
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{
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/* A function that implements a task must not exit or attempt to return to
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its caller as there is nothing to return to. If a task wants to exit it
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should instead call vTaskDelete( NULL ).
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Artificially force an assert() to be triggered if configASSERT() is
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defined, then stop here so application writers can catch the error. */
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configASSERT( ulPortInterruptNesting == ~0UL );
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portDISABLE_INTERRUPTS();
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for( ;; );
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}
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/*-----------------------------------------------------------*/
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BaseType_t xPortStartScheduler( void )
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{
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uint32_t ulAPSR;
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/* Only continue if the CPU is not in User mode. The CPU must be in a
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Privileged mode for the scheduler to start. */
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__asm volatile ( "MRS %0, APSR" : "=r" ( ulAPSR ) );
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ulAPSR &= portAPSR_MODE_BITS_MASK;
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configASSERT( ulAPSR != portAPSR_USER_MODE );
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if( ulAPSR != portAPSR_USER_MODE )
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{
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/* Start the timer that generates the tick ISR. */
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configSETUP_TICK_INTERRUPT();
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vPortRestoreTaskContext();
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}
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/* Will only get here if vTaskStartScheduler() was called with the CPU in
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a non-privileged mode or the binary point register was not set to its lowest
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possible value. */
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return 0;
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}
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/*-----------------------------------------------------------*/
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void vPortEndScheduler( void )
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{
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/* Not implemented in ports where there is nothing to return to.
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Artificially force an assert. */
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configASSERT( ulCriticalNesting == 1000UL );
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}
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/*-----------------------------------------------------------*/
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void vPortEnterCritical( void )
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{
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portDISABLE_INTERRUPTS();
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/* Now interrupts are disabled ulCriticalNesting can be accessed
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directly. Increment ulCriticalNesting to keep a count of how many times
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portENTER_CRITICAL() has been called. */
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ulCriticalNesting++;
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/* This is not the interrupt safe version of the enter critical function so
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assert() if it is being called from an interrupt context. Only API
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functions that end in "FromISR" can be used in an interrupt. Only assert if
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the critical nesting count is 1 to protect against recursive calls if the
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assert function also uses a critical section. */
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if( ulCriticalNesting == 1 )
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{
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configASSERT( ulPortInterruptNesting == 0 );
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}
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}
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/*-----------------------------------------------------------*/
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void vPortExitCritical( void )
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{
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if( ulCriticalNesting > portNO_CRITICAL_NESTING )
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{
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/* Decrement the nesting count as the critical section is being
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exited. */
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ulCriticalNesting--;
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/* If the nesting level has reached zero then all interrupt
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priorities must be re-enabled. */
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if( ulCriticalNesting == portNO_CRITICAL_NESTING )
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{
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/* Critical nesting has reached zero so all interrupt priorities
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should be unmasked. */
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portENABLE_INTERRUPTS();
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}
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}
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}
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/*-----------------------------------------------------------*/
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void FreeRTOS_Tick_Handler( void )
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{
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portDISABLE_INTERRUPTS();
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/* Increment the RTOS tick. */
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if( xTaskIncrementTick() != pdFALSE )
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{
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ulPortYieldRequired = pdTRUE;
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}
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portENABLE_INTERRUPTS();
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configCLEAR_TICK_INTERRUPT();
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}
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/*-----------------------------------------------------------*/
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void vPortTaskUsesFPU( void )
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{
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uint32_t ulInitialFPSCR = 0;
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/* A task is registering the fact that it needs an FPU context. Set the
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FPU flag (which is saved as part of the task context). */
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ulPortTaskHasFPUContext = pdTRUE;
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/* Initialise the floating point status register. */
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__asm( "FMXR FPSCR, %0" :: "r" (ulInitialFPSCR) );
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}
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/*-----------------------------------------------------------*/
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/*
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* FreeRTOS Kernel V10.4.3
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* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
|
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*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy of
|
||||
* this software and associated documentation files (the "Software"), to deal in
|
||||
* the Software without restriction, including without limitation the rights to
|
||||
* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
|
||||
* the Software, and to permit persons to whom the Software is furnished to do so,
|
||||
* subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in all
|
||||
* copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
|
||||
* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
|
||||
* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
|
||||
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
* https://www.FreeRTOS.org
|
||||
* https://github.com/FreeRTOS
|
||||
*
|
||||
* 1 tab == 4 spaces!
|
||||
*/
|
||||
|
||||
/* IAR includes. */
|
||||
#include <intrinsics.h>
|
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|
||||
/* Scheduler includes. */
|
||||
#include "FreeRTOS.h"
|
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#include "task.h"
|
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|
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#if configUSE_PORT_OPTIMISED_TASK_SELECTION == 1
|
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/* Check the configuration. */
|
||||
#if( configMAX_PRIORITIES > 32 )
|
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#error configUSE_PORT_OPTIMISED_TASK_SELECTION can only be set to 1 when configMAX_PRIORITIES is less than or equal to 32. It is very rare that a system requires more than 10 to 15 difference priorities as tasks that share a priority will time slice.
|
||||
#endif
|
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#endif /* configUSE_PORT_OPTIMISED_TASK_SELECTION */
|
||||
|
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#ifndef configSETUP_TICK_INTERRUPT
|
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#error configSETUP_TICK_INTERRUPT() must be defined in FreeRTOSConfig.h to call the function that sets up the tick interrupt. A default that uses the PIT is provided in the official demo application.
|
||||
#endif
|
||||
|
||||
#ifndef configCLEAR_TICK_INTERRUPT
|
||||
#error configCLEAR_TICK_INTERRUPT must be defined in FreeRTOSConfig.h to clear which ever interrupt was used to generate the tick interrupt. A default that uses the PIT is provided in the official demo application.
|
||||
#endif
|
||||
|
||||
/* A critical section is exited when the critical section nesting count reaches
|
||||
this value. */
|
||||
#define portNO_CRITICAL_NESTING ( ( uint32_t ) 0 )
|
||||
|
||||
/* Tasks are not created with a floating point context, but can be given a
|
||||
floating point context after they have been created. A variable is stored as
|
||||
part of the tasks context that holds portNO_FLOATING_POINT_CONTEXT if the task
|
||||
does not have an FPU context, or any other value if the task does have an FPU
|
||||
context. */
|
||||
#define portNO_FLOATING_POINT_CONTEXT ( ( StackType_t ) 0 )
|
||||
|
||||
/* Constants required to setup the initial task context. */
|
||||
#define portINITIAL_SPSR ( ( StackType_t ) 0x1f ) /* System mode, ARM mode, interrupts enabled. */
|
||||
#define portTHUMB_MODE_BIT ( ( StackType_t ) 0x20 )
|
||||
#define portTHUMB_MODE_ADDRESS ( 0x01UL )
|
||||
|
||||
/* Masks all bits in the APSR other than the mode bits. */
|
||||
#define portAPSR_MODE_BITS_MASK ( 0x1F )
|
||||
|
||||
/* The value of the mode bits in the APSR when the CPU is executing in user
|
||||
mode. */
|
||||
#define portAPSR_USER_MODE ( 0x10 )
|
||||
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/*
|
||||
* Starts the first task executing. This function is necessarily written in
|
||||
* assembly code so is implemented in portASM.s.
|
||||
*/
|
||||
extern void vPortRestoreTaskContext( void );
|
||||
|
||||
/*
|
||||
* Used to catch tasks that attempt to return from their implementing function.
|
||||
*/
|
||||
static void prvTaskExitError( void );
|
||||
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* A variable is used to keep track of the critical section nesting. This
|
||||
variable has to be stored as part of the task context and must be initialised to
|
||||
a non zero value to ensure interrupts don't inadvertently become unmasked before
|
||||
the scheduler starts. As it is stored as part of the task context it will
|
||||
automatically be set to 0 when the first task is started. */
|
||||
volatile uint32_t ulCriticalNesting = 9999UL;
|
||||
|
||||
/* Saved as part of the task context. If ulPortTaskHasFPUContext is non-zero
|
||||
then a floating point context must be saved and restored for the task. */
|
||||
uint32_t ulPortTaskHasFPUContext = pdFALSE;
|
||||
|
||||
/* Set to 1 to pend a context switch from an ISR. */
|
||||
uint32_t ulPortYieldRequired = pdFALSE;
|
||||
|
||||
/* Counts the interrupt nesting depth. A context switch is only performed if
|
||||
if the nesting depth is 0. */
|
||||
uint32_t ulPortInterruptNesting = 0UL;
|
||||
|
||||
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/*
|
||||
* See header file for description.
|
||||
*/
|
||||
StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters )
|
||||
{
|
||||
/* Setup the initial stack of the task. The stack is set exactly as
|
||||
expected by the portRESTORE_CONTEXT() macro.
|
||||
|
||||
The fist real value on the stack is the status register, which is set for
|
||||
system mode, with interrupts enabled. A few NULLs are added first to ensure
|
||||
GDB does not try decoding a non-existent return address. */
|
||||
*pxTopOfStack = NULL;
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = NULL;
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = NULL;
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( StackType_t ) portINITIAL_SPSR;
|
||||
|
||||
if( ( ( uint32_t ) pxCode & portTHUMB_MODE_ADDRESS ) != 0x00UL )
|
||||
{
|
||||
/* The task will start in THUMB mode. */
|
||||
*pxTopOfStack |= portTHUMB_MODE_BIT;
|
||||
}
|
||||
|
||||
pxTopOfStack--;
|
||||
|
||||
/* Next the return address, which in this case is the start of the task. */
|
||||
*pxTopOfStack = ( StackType_t ) pxCode;
|
||||
pxTopOfStack--;
|
||||
|
||||
/* Next all the registers other than the stack pointer. */
|
||||
*pxTopOfStack = ( StackType_t ) prvTaskExitError; /* R14 */
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( StackType_t ) 0x12121212; /* R12 */
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( StackType_t ) 0x11111111; /* R11 */
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( StackType_t ) 0x10101010; /* R10 */
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( StackType_t ) 0x09090909; /* R9 */
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( StackType_t ) 0x08080808; /* R8 */
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( StackType_t ) 0x07070707; /* R7 */
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( StackType_t ) 0x06060606; /* R6 */
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( StackType_t ) 0x05050505; /* R5 */
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( StackType_t ) 0x04040404; /* R4 */
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( StackType_t ) 0x03030303; /* R3 */
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( StackType_t ) 0x02020202; /* R2 */
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( StackType_t ) 0x01010101; /* R1 */
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( StackType_t ) pvParameters; /* R0 */
|
||||
pxTopOfStack--;
|
||||
|
||||
/* The task will start with a critical nesting count of 0 as interrupts are
|
||||
enabled. */
|
||||
*pxTopOfStack = portNO_CRITICAL_NESTING;
|
||||
pxTopOfStack--;
|
||||
|
||||
/* The task will start without a floating point context. A task that uses
|
||||
the floating point hardware must call vPortTaskUsesFPU() before executing
|
||||
any floating point instructions. */
|
||||
*pxTopOfStack = portNO_FLOATING_POINT_CONTEXT;
|
||||
|
||||
return pxTopOfStack;
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
static void prvTaskExitError( void )
|
||||
{
|
||||
/* A function that implements a task must not exit or attempt to return to
|
||||
its caller as there is nothing to return to. If a task wants to exit it
|
||||
should instead call vTaskDelete( NULL ).
|
||||
|
||||
Artificially force an assert() to be triggered if configASSERT() is
|
||||
defined, then stop here so application writers can catch the error. */
|
||||
configASSERT( ulPortInterruptNesting == ~0UL );
|
||||
portDISABLE_INTERRUPTS();
|
||||
for( ;; );
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
BaseType_t xPortStartScheduler( void )
|
||||
{
|
||||
uint32_t ulAPSR;
|
||||
|
||||
/* Only continue if the CPU is not in User mode. The CPU must be in a
|
||||
Privileged mode for the scheduler to start. */
|
||||
__asm volatile ( "MRS %0, APSR" : "=r" ( ulAPSR ) );
|
||||
ulAPSR &= portAPSR_MODE_BITS_MASK;
|
||||
configASSERT( ulAPSR != portAPSR_USER_MODE );
|
||||
|
||||
if( ulAPSR != portAPSR_USER_MODE )
|
||||
{
|
||||
/* Start the timer that generates the tick ISR. */
|
||||
configSETUP_TICK_INTERRUPT();
|
||||
vPortRestoreTaskContext();
|
||||
}
|
||||
|
||||
/* Will only get here if vTaskStartScheduler() was called with the CPU in
|
||||
a non-privileged mode or the binary point register was not set to its lowest
|
||||
possible value. */
|
||||
return 0;
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
void vPortEndScheduler( void )
|
||||
{
|
||||
/* Not implemented in ports where there is nothing to return to.
|
||||
Artificially force an assert. */
|
||||
configASSERT( ulCriticalNesting == 1000UL );
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
void vPortEnterCritical( void )
|
||||
{
|
||||
portDISABLE_INTERRUPTS();
|
||||
|
||||
/* Now interrupts are disabled ulCriticalNesting can be accessed
|
||||
directly. Increment ulCriticalNesting to keep a count of how many times
|
||||
portENTER_CRITICAL() has been called. */
|
||||
ulCriticalNesting++;
|
||||
|
||||
/* This is not the interrupt safe version of the enter critical function so
|
||||
assert() if it is being called from an interrupt context. Only API
|
||||
functions that end in "FromISR" can be used in an interrupt. Only assert if
|
||||
the critical nesting count is 1 to protect against recursive calls if the
|
||||
assert function also uses a critical section. */
|
||||
if( ulCriticalNesting == 1 )
|
||||
{
|
||||
configASSERT( ulPortInterruptNesting == 0 );
|
||||
}
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
void vPortExitCritical( void )
|
||||
{
|
||||
if( ulCriticalNesting > portNO_CRITICAL_NESTING )
|
||||
{
|
||||
/* Decrement the nesting count as the critical section is being
|
||||
exited. */
|
||||
ulCriticalNesting--;
|
||||
|
||||
/* If the nesting level has reached zero then all interrupt
|
||||
priorities must be re-enabled. */
|
||||
if( ulCriticalNesting == portNO_CRITICAL_NESTING )
|
||||
{
|
||||
/* Critical nesting has reached zero so all interrupt priorities
|
||||
should be unmasked. */
|
||||
portENABLE_INTERRUPTS();
|
||||
}
|
||||
}
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
void FreeRTOS_Tick_Handler( void )
|
||||
{
|
||||
portDISABLE_INTERRUPTS();
|
||||
|
||||
/* Increment the RTOS tick. */
|
||||
if( xTaskIncrementTick() != pdFALSE )
|
||||
{
|
||||
ulPortYieldRequired = pdTRUE;
|
||||
}
|
||||
|
||||
portENABLE_INTERRUPTS();
|
||||
configCLEAR_TICK_INTERRUPT();
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
void vPortTaskUsesFPU( void )
|
||||
{
|
||||
uint32_t ulInitialFPSCR = 0;
|
||||
|
||||
/* A task is registering the fact that it needs an FPU context. Set the
|
||||
FPU flag (which is saved as part of the task context). */
|
||||
ulPortTaskHasFPUContext = pdTRUE;
|
||||
|
||||
/* Initialise the floating point status register. */
|
||||
__asm( "FMXR FPSCR, %0" :: "r" (ulInitialFPSCR) );
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
|
||||
|
||||
|
|
|
@ -1,113 +1,113 @@
|
|||
;/*
|
||||
; * FreeRTOS Kernel V10.4.3
|
||||
; * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
|
||||
; *
|
||||
; * Permission is hereby granted, free of charge, to any person obtaining a copy of
|
||||
; * this software and associated documentation files (the "Software"), to deal in
|
||||
; * the Software without restriction, including without limitation the rights to
|
||||
; * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
|
||||
; * the Software, and to permit persons to whom the Software is furnished to do so,
|
||||
; * subject to the following conditions:
|
||||
; *
|
||||
; * The above copyright notice and this permission notice shall be included in all
|
||||
; * copies or substantial portions of the Software.
|
||||
; *
|
||||
; * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
; * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
|
||||
; * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
|
||||
; * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
|
||||
; * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
; * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
; *
|
||||
; * https://www.FreeRTOS.org
|
||||
; * https://github.com/FreeRTOS
|
||||
; *
|
||||
; * 1 tab == 4 spaces!
|
||||
; */
|
||||
|
||||
EXTERN vTaskSwitchContext
|
||||
EXTERN ulCriticalNesting
|
||||
EXTERN pxCurrentTCB
|
||||
EXTERN ulPortTaskHasFPUContext
|
||||
EXTERN ulAsmAPIPriorityMask
|
||||
|
||||
portSAVE_CONTEXT macro
|
||||
|
||||
; Save the LR and SPSR onto the system mode stack before switching to
|
||||
; system mode to save the remaining system mode registers
|
||||
SRSDB sp!, #SYS_MODE
|
||||
CPS #SYS_MODE
|
||||
PUSH {R0-R12, R14}
|
||||
|
||||
; Push the critical nesting count
|
||||
LDR R2, =ulCriticalNesting
|
||||
LDR R1, [R2]
|
||||
PUSH {R1}
|
||||
|
||||
; Does the task have a floating point context that needs saving? If
|
||||
; ulPortTaskHasFPUContext is 0 then no.
|
||||
LDR R2, =ulPortTaskHasFPUContext
|
||||
LDR R3, [R2]
|
||||
CMP R3, #0
|
||||
|
||||
; Save the floating point context, if any
|
||||
FMRXNE R1, FPSCR
|
||||
VPUSHNE {D0-D15}
|
||||
#if configFPU_D32 == 1
|
||||
VPUSHNE {D16-D31}
|
||||
#endif ; configFPU_D32
|
||||
PUSHNE {R1}
|
||||
|
||||
; Save ulPortTaskHasFPUContext itself
|
||||
PUSH {R3}
|
||||
|
||||
; Save the stack pointer in the TCB
|
||||
LDR R0, =pxCurrentTCB
|
||||
LDR R1, [R0]
|
||||
STR SP, [R1]
|
||||
|
||||
endm
|
||||
|
||||
; /**********************************************************************/
|
||||
|
||||
portRESTORE_CONTEXT macro
|
||||
|
||||
; Set the SP to point to the stack of the task being restored.
|
||||
LDR R0, =pxCurrentTCB
|
||||
LDR R1, [R0]
|
||||
LDR SP, [R1]
|
||||
|
||||
; Is there a floating point context to restore? If the restored
|
||||
; ulPortTaskHasFPUContext is zero then no.
|
||||
LDR R0, =ulPortTaskHasFPUContext
|
||||
POP {R1}
|
||||
STR R1, [R0]
|
||||
CMP R1, #0
|
||||
|
||||
; Restore the floating point context, if any
|
||||
POPNE {R0}
|
||||
#if configFPU_D32 == 1
|
||||
VPOPNE {D16-D31}
|
||||
#endif ; configFPU_D32
|
||||
VPOPNE {D0-D15}
|
||||
VMSRNE FPSCR, R0
|
||||
|
||||
; Restore the critical section nesting depth
|
||||
LDR R0, =ulCriticalNesting
|
||||
POP {R1}
|
||||
STR R1, [R0]
|
||||
|
||||
; Restore all system mode registers other than the SP (which is already
|
||||
; being used)
|
||||
POP {R0-R12, R14}
|
||||
|
||||
; Return to the task code, loading CPSR on the way. CPSR has the interrupt
|
||||
; enable bit set appropriately for the task about to execute.
|
||||
RFEIA sp!
|
||||
|
||||
endm
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
;/*
|
||||
; * FreeRTOS Kernel V10.4.3
|
||||
; * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
|
||||
; *
|
||||
; * Permission is hereby granted, free of charge, to any person obtaining a copy of
|
||||
; * this software and associated documentation files (the "Software"), to deal in
|
||||
; * the Software without restriction, including without limitation the rights to
|
||||
; * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
|
||||
; * the Software, and to permit persons to whom the Software is furnished to do so,
|
||||
; * subject to the following conditions:
|
||||
; *
|
||||
; * The above copyright notice and this permission notice shall be included in all
|
||||
; * copies or substantial portions of the Software.
|
||||
; *
|
||||
; * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
; * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
|
||||
; * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
|
||||
; * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
|
||||
; * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
; * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
; *
|
||||
; * https://www.FreeRTOS.org
|
||||
; * https://github.com/FreeRTOS
|
||||
; *
|
||||
; * 1 tab == 4 spaces!
|
||||
; */
|
||||
|
||||
EXTERN vTaskSwitchContext
|
||||
EXTERN ulCriticalNesting
|
||||
EXTERN pxCurrentTCB
|
||||
EXTERN ulPortTaskHasFPUContext
|
||||
EXTERN ulAsmAPIPriorityMask
|
||||
|
||||
portSAVE_CONTEXT macro
|
||||
|
||||
; Save the LR and SPSR onto the system mode stack before switching to
|
||||
; system mode to save the remaining system mode registers
|
||||
SRSDB sp!, #SYS_MODE
|
||||
CPS #SYS_MODE
|
||||
PUSH {R0-R12, R14}
|
||||
|
||||
; Push the critical nesting count
|
||||
LDR R2, =ulCriticalNesting
|
||||
LDR R1, [R2]
|
||||
PUSH {R1}
|
||||
|
||||
; Does the task have a floating point context that needs saving? If
|
||||
; ulPortTaskHasFPUContext is 0 then no.
|
||||
LDR R2, =ulPortTaskHasFPUContext
|
||||
LDR R3, [R2]
|
||||
CMP R3, #0
|
||||
|
||||
; Save the floating point context, if any
|
||||
FMRXNE R1, FPSCR
|
||||
VPUSHNE {D0-D15}
|
||||
#if configFPU_D32 == 1
|
||||
VPUSHNE {D16-D31}
|
||||
#endif ; configFPU_D32
|
||||
PUSHNE {R1}
|
||||
|
||||
; Save ulPortTaskHasFPUContext itself
|
||||
PUSH {R3}
|
||||
|
||||
; Save the stack pointer in the TCB
|
||||
LDR R0, =pxCurrentTCB
|
||||
LDR R1, [R0]
|
||||
STR SP, [R1]
|
||||
|
||||
endm
|
||||
|
||||
; /**********************************************************************/
|
||||
|
||||
portRESTORE_CONTEXT macro
|
||||
|
||||
; Set the SP to point to the stack of the task being restored.
|
||||
LDR R0, =pxCurrentTCB
|
||||
LDR R1, [R0]
|
||||
LDR SP, [R1]
|
||||
|
||||
; Is there a floating point context to restore? If the restored
|
||||
; ulPortTaskHasFPUContext is zero then no.
|
||||
LDR R0, =ulPortTaskHasFPUContext
|
||||
POP {R1}
|
||||
STR R1, [R0]
|
||||
CMP R1, #0
|
||||
|
||||
; Restore the floating point context, if any
|
||||
POPNE {R0}
|
||||
#if configFPU_D32 == 1
|
||||
VPOPNE {D16-D31}
|
||||
#endif ; configFPU_D32
|
||||
VPOPNE {D0-D15}
|
||||
VMSRNE FPSCR, R0
|
||||
|
||||
; Restore the critical section nesting depth
|
||||
LDR R0, =ulCriticalNesting
|
||||
POP {R1}
|
||||
STR R1, [R0]
|
||||
|
||||
; Restore all system mode registers other than the SP (which is already
|
||||
; being used)
|
||||
POP {R0-R12, R14}
|
||||
|
||||
; Return to the task code, loading CPSR on the way. CPSR has the interrupt
|
||||
; enable bit set appropriately for the task about to execute.
|
||||
RFEIA sp!
|
||||
|
||||
endm
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
|
|
@ -1,176 +1,176 @@
|
|||
;/*
|
||||
; * FreeRTOS Kernel V10.4.3
|
||||
; * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
|
||||
; *
|
||||
; * Permission is hereby granted, free of charge, to any person obtaining a copy of
|
||||
; * this software and associated documentation files (the "Software"), to deal in
|
||||
; * the Software without restriction, including without limitation the rights to
|
||||
; * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
|
||||
; * the Software, and to permit persons to whom the Software is furnished to do so,
|
||||
; * subject to the following conditions:
|
||||
; *
|
||||
; * The above copyright notice and this permission notice shall be included in all
|
||||
; * copies or substantial portions of the Software.
|
||||
; *
|
||||
; * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
; * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
|
||||
; * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
|
||||
; * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
|
||||
; * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
; * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
; *
|
||||
; * https://www.FreeRTOS.org
|
||||
; * https://github.com/FreeRTOS
|
||||
; *
|
||||
; * 1 tab == 4 spaces!
|
||||
; */
|
||||
|
||||
INCLUDE FreeRTOSConfig.h
|
||||
INCLUDE portmacro.h
|
||||
|
||||
EXTERN vTaskSwitchContext
|
||||
EXTERN ulPortYieldRequired
|
||||
EXTERN ulPortInterruptNesting
|
||||
EXTERN vApplicationIRQHandler
|
||||
|
||||
PUBLIC FreeRTOS_SWI_Handler
|
||||
PUBLIC FreeRTOS_IRQ_Handler
|
||||
PUBLIC vPortRestoreTaskContext
|
||||
|
||||
SYS_MODE EQU 0x1f
|
||||
SVC_MODE EQU 0x13
|
||||
IRQ_MODE EQU 0x12
|
||||
|
||||
SECTION .text:CODE:ROOT(2)
|
||||
ARM
|
||||
|
||||
INCLUDE portASM.h
|
||||
|
||||
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
|
||||
; SVC handler is used to yield a task.
|
||||
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
|
||||
FreeRTOS_SWI_Handler
|
||||
|
||||
PRESERVE8
|
||||
|
||||
; Save the context of the current task and select a new task to run.
|
||||
portSAVE_CONTEXT
|
||||
LDR R0, =vTaskSwitchContext
|
||||
BLX R0
|
||||
portRESTORE_CONTEXT
|
||||
|
||||
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
|
||||
; vPortRestoreTaskContext is used to start the scheduler.
|
||||
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
|
||||
vPortRestoreTaskContext
|
||||
|
||||
PRESERVE8
|
||||
|
||||
; Switch to system mode
|
||||
CPS #SYS_MODE
|
||||
portRESTORE_CONTEXT
|
||||
|
||||
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
|
||||
; IRQ interrupt handler used when individual priorities cannot be masked
|
||||
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
|
||||
FreeRTOS_IRQ_Handler
|
||||
|
||||
PRESERVE8
|
||||
|
||||
; Return to the interrupted instruction.
|
||||
SUB lr, lr, #4
|
||||
|
||||
; Push the return address and SPSR
|
||||
PUSH {lr}
|
||||
MRS lr, SPSR
|
||||
PUSH {lr}
|
||||
|
||||
; Change to supervisor mode to allow reentry.
|
||||
CPS #SVC_MODE
|
||||
|
||||
; Push used registers.
|
||||
PUSH {r0-r4, r12}
|
||||
|
||||
; Increment nesting count. r3 holds the address of ulPortInterruptNesting
|
||||
; for future use. r1 holds the original ulPortInterruptNesting value for
|
||||
; future use.
|
||||
LDR r3, =ulPortInterruptNesting
|
||||
LDR r1, [r3]
|
||||
ADD r4, r1, #1
|
||||
STR r4, [r3]
|
||||
|
||||
; Ensure bit 2 of the stack pointer is clear. r2 holds the bit 2 value for
|
||||
; future use.
|
||||
MOV r2, sp
|
||||
AND r2, r2, #4
|
||||
SUB sp, sp, r2
|
||||
|
||||
PUSH {r0-r4, lr}
|
||||
|
||||
; Call the port part specific handler.
|
||||
LDR r0, =vApplicationIRQHandler
|
||||
BLX r0
|
||||
POP {r0-r4, lr}
|
||||
ADD sp, sp, r2
|
||||
|
||||
CPSID i
|
||||
|
||||
; Write to the EOI register.
|
||||
LDR r4, =configEOI_ADDRESS
|
||||
STR r0, [r4]
|
||||
|
||||
; Restore the old nesting count
|
||||
STR r1, [r3]
|
||||
|
||||
; A context switch is never performed if the nesting count is not 0.
|
||||
CMP r1, #0
|
||||
BNE exit_without_switch
|
||||
|
||||
; Did the interrupt request a context switch? r1 holds the address of
|
||||
; ulPortYieldRequired and r0 the value of ulPortYieldRequired for future
|
||||
; use.
|
||||
LDR r1, =ulPortYieldRequired
|
||||
LDR r0, [r1]
|
||||
CMP r0, #0
|
||||
BNE switch_before_exit
|
||||
|
||||
exit_without_switch
|
||||
; No context switch. Restore used registers, LR_irq and SPSR before
|
||||
; returning.
|
||||
POP {r0-r4, r12}
|
||||
CPS #IRQ_MODE
|
||||
POP {LR}
|
||||
MSR SPSR_cxsf, LR
|
||||
POP {LR}
|
||||
MOVS PC, LR
|
||||
|
||||
switch_before_exit
|
||||
; A context switch is to be performed. Clear the context switch pending
|
||||
; flag.
|
||||
MOV r0, #0
|
||||
STR r0, [r1]
|
||||
|
||||
; Restore used registers, LR-irq and SPSR before saving the context
|
||||
; to the task stack.
|
||||
POP {r0-r4, r12}
|
||||
CPS #IRQ_MODE
|
||||
POP {LR}
|
||||
MSR SPSR_cxsf, LR
|
||||
POP {LR}
|
||||
portSAVE_CONTEXT
|
||||
|
||||
; Call the function that selects the new task to execute.
|
||||
; vTaskSwitchContext() if vTaskSwitchContext() uses LDRD or STRD
|
||||
; instructions, or 8 byte aligned stack allocated data. LR does not need
|
||||
; saving as a new LR will be loaded by portRESTORE_CONTEXT anyway.
|
||||
LDR r0, =vTaskSwitchContext
|
||||
BLX r0
|
||||
|
||||
; Restore the context of, and branch to, the task selected to execute next.
|
||||
portRESTORE_CONTEXT
|
||||
|
||||
END
|
||||
|
||||
|
||||
|
||||
|
||||
;/*
|
||||
; * FreeRTOS Kernel V10.4.3
|
||||
; * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
|
||||
; *
|
||||
; * Permission is hereby granted, free of charge, to any person obtaining a copy of
|
||||
; * this software and associated documentation files (the "Software"), to deal in
|
||||
; * the Software without restriction, including without limitation the rights to
|
||||
; * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
|
||||
; * the Software, and to permit persons to whom the Software is furnished to do so,
|
||||
; * subject to the following conditions:
|
||||
; *
|
||||
; * The above copyright notice and this permission notice shall be included in all
|
||||
; * copies or substantial portions of the Software.
|
||||
; *
|
||||
; * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
; * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
|
||||
; * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
|
||||
; * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
|
||||
; * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
; * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
; *
|
||||
; * https://www.FreeRTOS.org
|
||||
; * https://github.com/FreeRTOS
|
||||
; *
|
||||
; * 1 tab == 4 spaces!
|
||||
; */
|
||||
|
||||
INCLUDE FreeRTOSConfig.h
|
||||
INCLUDE portmacro.h
|
||||
|
||||
EXTERN vTaskSwitchContext
|
||||
EXTERN ulPortYieldRequired
|
||||
EXTERN ulPortInterruptNesting
|
||||
EXTERN vApplicationIRQHandler
|
||||
|
||||
PUBLIC FreeRTOS_SWI_Handler
|
||||
PUBLIC FreeRTOS_IRQ_Handler
|
||||
PUBLIC vPortRestoreTaskContext
|
||||
|
||||
SYS_MODE EQU 0x1f
|
||||
SVC_MODE EQU 0x13
|
||||
IRQ_MODE EQU 0x12
|
||||
|
||||
SECTION .text:CODE:ROOT(2)
|
||||
ARM
|
||||
|
||||
INCLUDE portASM.h
|
||||
|
||||
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
|
||||
; SVC handler is used to yield a task.
|
||||
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
|
||||
FreeRTOS_SWI_Handler
|
||||
|
||||
PRESERVE8
|
||||
|
||||
; Save the context of the current task and select a new task to run.
|
||||
portSAVE_CONTEXT
|
||||
LDR R0, =vTaskSwitchContext
|
||||
BLX R0
|
||||
portRESTORE_CONTEXT
|
||||
|
||||
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
|
||||
; vPortRestoreTaskContext is used to start the scheduler.
|
||||
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
|
||||
vPortRestoreTaskContext
|
||||
|
||||
PRESERVE8
|
||||
|
||||
; Switch to system mode
|
||||
CPS #SYS_MODE
|
||||
portRESTORE_CONTEXT
|
||||
|
||||
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
|
||||
; IRQ interrupt handler used when individual priorities cannot be masked
|
||||
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
|
||||
FreeRTOS_IRQ_Handler
|
||||
|
||||
PRESERVE8
|
||||
|
||||
; Return to the interrupted instruction.
|
||||
SUB lr, lr, #4
|
||||
|
||||
; Push the return address and SPSR
|
||||
PUSH {lr}
|
||||
MRS lr, SPSR
|
||||
PUSH {lr}
|
||||
|
||||
; Change to supervisor mode to allow reentry.
|
||||
CPS #SVC_MODE
|
||||
|
||||
; Push used registers.
|
||||
PUSH {r0-r4, r12}
|
||||
|
||||
; Increment nesting count. r3 holds the address of ulPortInterruptNesting
|
||||
; for future use. r1 holds the original ulPortInterruptNesting value for
|
||||
; future use.
|
||||
LDR r3, =ulPortInterruptNesting
|
||||
LDR r1, [r3]
|
||||
ADD r4, r1, #1
|
||||
STR r4, [r3]
|
||||
|
||||
; Ensure bit 2 of the stack pointer is clear. r2 holds the bit 2 value for
|
||||
; future use.
|
||||
MOV r2, sp
|
||||
AND r2, r2, #4
|
||||
SUB sp, sp, r2
|
||||
|
||||
PUSH {r0-r4, lr}
|
||||
|
||||
; Call the port part specific handler.
|
||||
LDR r0, =vApplicationIRQHandler
|
||||
BLX r0
|
||||
POP {r0-r4, lr}
|
||||
ADD sp, sp, r2
|
||||
|
||||
CPSID i
|
||||
|
||||
; Write to the EOI register.
|
||||
LDR r4, =configEOI_ADDRESS
|
||||
STR r0, [r4]
|
||||
|
||||
; Restore the old nesting count
|
||||
STR r1, [r3]
|
||||
|
||||
; A context switch is never performed if the nesting count is not 0.
|
||||
CMP r1, #0
|
||||
BNE exit_without_switch
|
||||
|
||||
; Did the interrupt request a context switch? r1 holds the address of
|
||||
; ulPortYieldRequired and r0 the value of ulPortYieldRequired for future
|
||||
; use.
|
||||
LDR r1, =ulPortYieldRequired
|
||||
LDR r0, [r1]
|
||||
CMP r0, #0
|
||||
BNE switch_before_exit
|
||||
|
||||
exit_without_switch
|
||||
; No context switch. Restore used registers, LR_irq and SPSR before
|
||||
; returning.
|
||||
POP {r0-r4, r12}
|
||||
CPS #IRQ_MODE
|
||||
POP {LR}
|
||||
MSR SPSR_cxsf, LR
|
||||
POP {LR}
|
||||
MOVS PC, LR
|
||||
|
||||
switch_before_exit
|
||||
; A context switch is to be performed. Clear the context switch pending
|
||||
; flag.
|
||||
MOV r0, #0
|
||||
STR r0, [r1]
|
||||
|
||||
; Restore used registers, LR-irq and SPSR before saving the context
|
||||
; to the task stack.
|
||||
POP {r0-r4, r12}
|
||||
CPS #IRQ_MODE
|
||||
POP {LR}
|
||||
MSR SPSR_cxsf, LR
|
||||
POP {LR}
|
||||
portSAVE_CONTEXT
|
||||
|
||||
; Call the function that selects the new task to execute.
|
||||
; vTaskSwitchContext() if vTaskSwitchContext() uses LDRD or STRD
|
||||
; instructions, or 8 byte aligned stack allocated data. LR does not need
|
||||
; saving as a new LR will be loaded by portRESTORE_CONTEXT anyway.
|
||||
LDR r0, =vTaskSwitchContext
|
||||
BLX r0
|
||||
|
||||
; Restore the context of, and branch to, the task selected to execute next.
|
||||
portRESTORE_CONTEXT
|
||||
|
||||
END
|
||||
|
||||
|
||||
|
||||
|
||||
|
|
|
@ -1,162 +1,162 @@
|
|||
/*
|
||||
* FreeRTOS Kernel V10.4.3
|
||||
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy of
|
||||
* this software and associated documentation files (the "Software"), to deal in
|
||||
* the Software without restriction, including without limitation the rights to
|
||||
* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
|
||||
* the Software, and to permit persons to whom the Software is furnished to do so,
|
||||
* subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in all
|
||||
* copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
|
||||
* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
|
||||
* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
|
||||
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
* https://www.FreeRTOS.org
|
||||
* https://github.com/FreeRTOS
|
||||
*
|
||||
* 1 tab == 4 spaces!
|
||||
*/
|
||||
|
||||
#ifndef PORTMACRO_H
|
||||
#define PORTMACRO_H
|
||||
|
||||
/* IAR includes. */
|
||||
#ifdef __ICCARM__
|
||||
|
||||
#include <intrinsics.h>
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/*-----------------------------------------------------------
|
||||
* Port specific definitions.
|
||||
*
|
||||
* The settings in this file configure FreeRTOS correctly for the given hardware
|
||||
* and compiler.
|
||||
*
|
||||
* These settings should not be altered.
|
||||
*-----------------------------------------------------------
|
||||
*/
|
||||
|
||||
/* Type definitions. */
|
||||
#define portCHAR char
|
||||
#define portFLOAT float
|
||||
#define portDOUBLE double
|
||||
#define portLONG long
|
||||
#define portSHORT short
|
||||
#define portSTACK_TYPE uint32_t
|
||||
#define portBASE_TYPE long
|
||||
|
||||
typedef portSTACK_TYPE StackType_t;
|
||||
typedef long BaseType_t;
|
||||
typedef unsigned long UBaseType_t;
|
||||
|
||||
typedef uint32_t TickType_t;
|
||||
#define portMAX_DELAY ( TickType_t ) 0xffffffffUL
|
||||
|
||||
/* 32-bit tick type on a 32-bit architecture, so reads of the tick count do
|
||||
not need to be guarded with a critical section. */
|
||||
#define portTICK_TYPE_IS_ATOMIC 1
|
||||
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* Hardware specifics. */
|
||||
#define portSTACK_GROWTH ( -1 )
|
||||
#define portTICK_PERIOD_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )
|
||||
#define portBYTE_ALIGNMENT 8
|
||||
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* Task utilities. */
|
||||
|
||||
/* Called at the end of an ISR that can cause a context switch. */
|
||||
#define portEND_SWITCHING_ISR( xSwitchRequired )\
|
||||
{ \
|
||||
extern uint32_t ulPortYieldRequired; \
|
||||
\
|
||||
if( xSwitchRequired != pdFALSE ) \
|
||||
{ \
|
||||
ulPortYieldRequired = pdTRUE; \
|
||||
} \
|
||||
}
|
||||
|
||||
#define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x )
|
||||
#define portYIELD() __asm volatile ( "SWI 0" ); __ISB()
|
||||
|
||||
|
||||
/*-----------------------------------------------------------
|
||||
* Critical section control
|
||||
*----------------------------------------------------------*/
|
||||
|
||||
extern void vPortEnterCritical( void );
|
||||
extern void vPortExitCritical( void );
|
||||
extern uint32_t ulPortSetInterruptMask( void );
|
||||
extern void vPortClearInterruptMask( uint32_t ulNewMaskValue );
|
||||
|
||||
#define portENTER_CRITICAL() vPortEnterCritical();
|
||||
#define portEXIT_CRITICAL() vPortExitCritical();
|
||||
#define portDISABLE_INTERRUPTS() __disable_irq(); __DSB(); __ISB() /* No priority mask register so global disable is used. */
|
||||
#define portENABLE_INTERRUPTS() __enable_irq()
|
||||
#define portSET_INTERRUPT_MASK_FROM_ISR() __get_interrupt_state(); __disable_irq() /* No priority mask register so global disable is used. */
|
||||
#define portCLEAR_INTERRUPT_MASK_FROM_ISR(x) __set_interrupt_state(x)
|
||||
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* Task function macros as described on the FreeRTOS.org WEB site. These are
|
||||
not required for this port but included in case common demo code that uses these
|
||||
macros is used. */
|
||||
#define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void *pvParameters )
|
||||
#define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void *pvParameters )
|
||||
|
||||
/* Prototype of the FreeRTOS tick handler. This must be installed as the
|
||||
handler for whichever peripheral is used to generate the RTOS tick. */
|
||||
void FreeRTOS_Tick_Handler( void );
|
||||
|
||||
/* Any task that uses the floating point unit MUST call vPortTaskUsesFPU()
|
||||
before any floating point instructions are executed. */
|
||||
void vPortTaskUsesFPU( void );
|
||||
#define portTASK_USES_FLOATING_POINT() vPortTaskUsesFPU()
|
||||
|
||||
/* Architecture specific optimisations. */
|
||||
#ifndef configUSE_PORT_OPTIMISED_TASK_SELECTION
|
||||
#define configUSE_PORT_OPTIMISED_TASK_SELECTION 1
|
||||
#endif
|
||||
|
||||
#if configUSE_PORT_OPTIMISED_TASK_SELECTION == 1
|
||||
|
||||
/* Store/clear the ready priorities in a bit map. */
|
||||
#define portRECORD_READY_PRIORITY( uxPriority, uxReadyPriorities ) ( uxReadyPriorities ) |= ( 1UL << ( uxPriority ) )
|
||||
#define portRESET_READY_PRIORITY( uxPriority, uxReadyPriorities ) ( uxReadyPriorities ) &= ~( 1UL << ( uxPriority ) )
|
||||
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
#define portGET_HIGHEST_PRIORITY( uxTopPriority, uxReadyPriorities ) uxTopPriority = ( 31 - __CLZ( uxReadyPriorities ) )
|
||||
|
||||
#endif /* configUSE_PORT_OPTIMISED_TASK_SELECTION */
|
||||
|
||||
#define portNOP() __asm volatile( "NOP" )
|
||||
|
||||
|
||||
#ifdef __cplusplus
|
||||
} /* extern C */
|
||||
#endif
|
||||
|
||||
/* Suppress warnings that are generated by the IAR tools, but cannot be
|
||||
fixed in the source code because to do so would cause other compilers to
|
||||
generate warnings. */
|
||||
#pragma diag_suppress=Pe191
|
||||
#pragma diag_suppress=Pa082
|
||||
|
||||
#endif /* __ICCARM__ */
|
||||
|
||||
#endif /* PORTMACRO_H */
|
||||
|
||||
/*
|
||||
* FreeRTOS Kernel V10.4.3
|
||||
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy of
|
||||
* this software and associated documentation files (the "Software"), to deal in
|
||||
* the Software without restriction, including without limitation the rights to
|
||||
* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
|
||||
* the Software, and to permit persons to whom the Software is furnished to do so,
|
||||
* subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in all
|
||||
* copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
|
||||
* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
|
||||
* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
|
||||
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
* https://www.FreeRTOS.org
|
||||
* https://github.com/FreeRTOS
|
||||
*
|
||||
* 1 tab == 4 spaces!
|
||||
*/
|
||||
|
||||
#ifndef PORTMACRO_H
|
||||
#define PORTMACRO_H
|
||||
|
||||
/* IAR includes. */
|
||||
#ifdef __ICCARM__
|
||||
|
||||
#include <intrinsics.h>
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/*-----------------------------------------------------------
|
||||
* Port specific definitions.
|
||||
*
|
||||
* The settings in this file configure FreeRTOS correctly for the given hardware
|
||||
* and compiler.
|
||||
*
|
||||
* These settings should not be altered.
|
||||
*-----------------------------------------------------------
|
||||
*/
|
||||
|
||||
/* Type definitions. */
|
||||
#define portCHAR char
|
||||
#define portFLOAT float
|
||||
#define portDOUBLE double
|
||||
#define portLONG long
|
||||
#define portSHORT short
|
||||
#define portSTACK_TYPE uint32_t
|
||||
#define portBASE_TYPE long
|
||||
|
||||
typedef portSTACK_TYPE StackType_t;
|
||||
typedef long BaseType_t;
|
||||
typedef unsigned long UBaseType_t;
|
||||
|
||||
typedef uint32_t TickType_t;
|
||||
#define portMAX_DELAY ( TickType_t ) 0xffffffffUL
|
||||
|
||||
/* 32-bit tick type on a 32-bit architecture, so reads of the tick count do
|
||||
not need to be guarded with a critical section. */
|
||||
#define portTICK_TYPE_IS_ATOMIC 1
|
||||
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* Hardware specifics. */
|
||||
#define portSTACK_GROWTH ( -1 )
|
||||
#define portTICK_PERIOD_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )
|
||||
#define portBYTE_ALIGNMENT 8
|
||||
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* Task utilities. */
|
||||
|
||||
/* Called at the end of an ISR that can cause a context switch. */
|
||||
#define portEND_SWITCHING_ISR( xSwitchRequired )\
|
||||
{ \
|
||||
extern uint32_t ulPortYieldRequired; \
|
||||
\
|
||||
if( xSwitchRequired != pdFALSE ) \
|
||||
{ \
|
||||
ulPortYieldRequired = pdTRUE; \
|
||||
} \
|
||||
}
|
||||
|
||||
#define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x )
|
||||
#define portYIELD() __asm volatile ( "SWI 0" ); __ISB()
|
||||
|
||||
|
||||
/*-----------------------------------------------------------
|
||||
* Critical section control
|
||||
*----------------------------------------------------------*/
|
||||
|
||||
extern void vPortEnterCritical( void );
|
||||
extern void vPortExitCritical( void );
|
||||
extern uint32_t ulPortSetInterruptMask( void );
|
||||
extern void vPortClearInterruptMask( uint32_t ulNewMaskValue );
|
||||
|
||||
#define portENTER_CRITICAL() vPortEnterCritical();
|
||||
#define portEXIT_CRITICAL() vPortExitCritical();
|
||||
#define portDISABLE_INTERRUPTS() __disable_irq(); __DSB(); __ISB() /* No priority mask register so global disable is used. */
|
||||
#define portENABLE_INTERRUPTS() __enable_irq()
|
||||
#define portSET_INTERRUPT_MASK_FROM_ISR() __get_interrupt_state(); __disable_irq() /* No priority mask register so global disable is used. */
|
||||
#define portCLEAR_INTERRUPT_MASK_FROM_ISR(x) __set_interrupt_state(x)
|
||||
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* Task function macros as described on the FreeRTOS.org WEB site. These are
|
||||
not required for this port but included in case common demo code that uses these
|
||||
macros is used. */
|
||||
#define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void *pvParameters )
|
||||
#define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void *pvParameters )
|
||||
|
||||
/* Prototype of the FreeRTOS tick handler. This must be installed as the
|
||||
handler for whichever peripheral is used to generate the RTOS tick. */
|
||||
void FreeRTOS_Tick_Handler( void );
|
||||
|
||||
/* Any task that uses the floating point unit MUST call vPortTaskUsesFPU()
|
||||
before any floating point instructions are executed. */
|
||||
void vPortTaskUsesFPU( void );
|
||||
#define portTASK_USES_FLOATING_POINT() vPortTaskUsesFPU()
|
||||
|
||||
/* Architecture specific optimisations. */
|
||||
#ifndef configUSE_PORT_OPTIMISED_TASK_SELECTION
|
||||
#define configUSE_PORT_OPTIMISED_TASK_SELECTION 1
|
||||
#endif
|
||||
|
||||
#if configUSE_PORT_OPTIMISED_TASK_SELECTION == 1
|
||||
|
||||
/* Store/clear the ready priorities in a bit map. */
|
||||
#define portRECORD_READY_PRIORITY( uxPriority, uxReadyPriorities ) ( uxReadyPriorities ) |= ( 1UL << ( uxPriority ) )
|
||||
#define portRESET_READY_PRIORITY( uxPriority, uxReadyPriorities ) ( uxReadyPriorities ) &= ~( 1UL << ( uxPriority ) )
|
||||
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
#define portGET_HIGHEST_PRIORITY( uxTopPriority, uxReadyPriorities ) uxTopPriority = ( 31 - __CLZ( uxReadyPriorities ) )
|
||||
|
||||
#endif /* configUSE_PORT_OPTIMISED_TASK_SELECTION */
|
||||
|
||||
#define portNOP() __asm volatile( "NOP" )
|
||||
|
||||
|
||||
#ifdef __cplusplus
|
||||
} /* extern C */
|
||||
#endif
|
||||
|
||||
/* Suppress warnings that are generated by the IAR tools, but cannot be
|
||||
fixed in the source code because to do so would cause other compilers to
|
||||
generate warnings. */
|
||||
#pragma diag_suppress=Pe191
|
||||
#pragma diag_suppress=Pa082
|
||||
|
||||
#endif /* __ICCARM__ */
|
||||
|
||||
#endif /* PORTMACRO_H */
|
||||
|
||||
|
|
Loading…
Add table
Add a link
Reference in a new issue