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Changes to the AVR demo's. IAR demo updated with new critical section method.
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41b142bae4
commit
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17 changed files with 866 additions and 318 deletions
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@ -51,8 +51,8 @@ static portTickType xCoRoutineTickCount = 0;
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#define corINITIAL_STATE ( 0 )
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/*
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* Place the co-routine represented by pxCRCB into the appropriate ready queue
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* for the priority. It is inserted at the end of the list.
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* Place the co-routine represented by pxCRCB into the appropriate ready queue
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* for the priority. It is inserted at the end of the list.
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*
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* This macro accesses the co-routine ready lists and therefore must not be
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* used from within an ISR.
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@ -81,20 +81,20 @@ static void prvInitialiseCoRoutineLists( void );
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static inline void prvCheckPendingReadyList( void );
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/*
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* Macro that looks at the list of co-routines that are currently delayed to
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* Macro that looks at the list of co-routines that are currently delayed to
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* see if any require waking.
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*
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* Co-routines are stored in the queue in the order of their wake time -
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* meaning once one co-routine has been found whose timer has not expired
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* Co-routines are stored in the queue in the order of their wake time -
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* meaning once one co-routine has been found whose timer has not expired
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* we need not look any further down the list.
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*/
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static inline void prvCheckDelayedList( void );
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/*-----------------------------------------------------------*/
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portBASE_TYPE xCoRoutineCreate( crCOROUTINE_CODE pxCoRoutineCode, unsigned portBASE_TYPE uxPriority, unsigned portBASE_TYPE uxIndex )
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signed portBASE_TYPE xCoRoutineCreate( crCOROUTINE_CODE pxCoRoutineCode, unsigned portBASE_TYPE uxPriority, unsigned portBASE_TYPE uxIndex )
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{
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portBASE_TYPE xReturn;
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signed portBASE_TYPE xReturn;
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corCRCB *pxCoRoutine;
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/* Allocate the memory that will store the co-routine control block. */
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@ -125,8 +125,8 @@ corCRCB *pxCoRoutine;
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vListInitialiseItem( &( pxCoRoutine->xGenericListItem ) );
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vListInitialiseItem( &( pxCoRoutine->xEventListItem ) );
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/* Set the co-routine control block as a link back from the xListItem.
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This is so we can get back to the containing CRCB from a generic item
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/* Set the co-routine control block as a link back from the xListItem.
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This is so we can get back to the containing CRCB from a generic item
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in a list. */
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listSET_LIST_ITEM_OWNER( &( pxCoRoutine->xGenericListItem ), pxCoRoutine );
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listSET_LIST_ITEM_OWNER( &( pxCoRoutine->xEventListItem ), pxCoRoutine );
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@ -190,7 +190,7 @@ portTickType xTimeToWake;
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static inline void prvCheckPendingReadyList( void )
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{
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/* Are there any co-routines waiting to get moved to the ready list? These
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are co-routines that have been readied by an ISR. The ISR cannot access
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are co-routines that have been readied by an ISR. The ISR cannot access
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the ready lists itself. */
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while( !listLIST_IS_EMPTY( &xPendingReadyList ) )
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{
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@ -244,9 +244,9 @@ corCRCB *pxCRCB;
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portDISABLE_INTERRUPTS();
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{
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/* The event could have occurred just before this critical
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/* The event could have occurred just before this critical
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section. If this is the case then the generic list item will
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have been moved to the pending ready list and the following
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have been moved to the pending ready list and the following
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line is still valid. Also the pvContainer parameter will have
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been set to NULL so the following lines are also valid. */
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vListRemove( &( pxCRCB->xGenericListItem ) );
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@ -310,17 +310,17 @@ unsigned portBASE_TYPE uxPriority;
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vListInitialise( ( xList * ) &xDelayedCoRoutineList2 );
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vListInitialise( ( xList * ) &xPendingReadyList );
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/* Start with pxDelayedCoRoutineList using list1 and the
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/* Start with pxDelayedCoRoutineList using list1 and the
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pxOverflowDelayedCoRoutineList using list2. */
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pxDelayedCoRoutineList = &xDelayedCoRoutineList1;
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pxOverflowDelayedCoRoutineList = &xDelayedCoRoutineList2;
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}
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/*-----------------------------------------------------------*/
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portBASE_TYPE xCoRoutineRemoveFromEventList( const xList *pxEventList )
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signed portBASE_TYPE xCoRoutineRemoveFromEventList( const xList *pxEventList )
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{
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corCRCB *pxUnblockedCRCB;
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portBASE_TYPE xReturn;
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signed portBASE_TYPE xReturn;
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/* This function is called from within an interrupt. It can only access
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event lists and the pending ready list. */
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