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Memory Protection Unit (MPU) Enhancements (#705)
Memory Protection Unit (MPU) Enhancements This commit introduces a new MPU wrapper that places additional restrictions on unprivileged tasks. The following is the list of changes introduced with the new MPU wrapper: 1. Opaque and indirectly verifiable integers for kernel object handles: All the kernel object handles (for example, queue handles) are now opaque integers. Previously object handles were raw pointers. 2. Saving the task context in Task Control Block (TCB): When a task is swapped out by the scheduler, the task's context is now saved in its TCB. Previously the task's context was saved on its stack. 3. Execute system calls on a separate privileged only stack: FreeRTOS system calls, which execute with elevated privilege, now use a separate privileged only stack. Previously system calls used the calling task's stack. The application writer can control the size of the system call stack using new configSYSTEM_CALL_STACK_SIZE config macro. 4. Memory bounds checks: FreeRTOS system calls which accept a pointer and de-reference it, now verify that the calling task has required permissions to access the memory location referenced by the pointer. 5. System call restrictions: The following system calls are no longer available to unprivileged tasks: - vQueueDelete - xQueueCreateMutex - xQueueCreateMutexStatic - xQueueCreateCountingSemaphore - xQueueCreateCountingSemaphoreStatic - xQueueGenericCreate - xQueueGenericCreateStatic - xQueueCreateSet - xQueueRemoveFromSet - xQueueGenericReset - xTaskCreate - xTaskCreateStatic - vTaskDelete - vTaskPrioritySet - vTaskSuspendAll - xTaskResumeAll - xTaskGetHandle - xTaskCallApplicationTaskHook - vTaskList - vTaskGetRunTimeStats - xTaskCatchUpTicks - xEventGroupCreate - xEventGroupCreateStatic - vEventGroupDelete - xStreamBufferGenericCreate - xStreamBufferGenericCreateStatic - vStreamBufferDelete - xStreamBufferReset Also, an unprivileged task can no longer use vTaskSuspend to suspend any task other than itself. We thank the following people for their inputs in these enhancements: - David Reiss of Meta Platforms, Inc. - Lan Luo, Xinhui Shao, Yumeng Wei, Zixia Liu, Huaiyu Yan and Zhen Ling of School of Computer Science and Engineering, Southeast University, China. - Xinwen Fu of Department of Computer Science, University of Massachusetts Lowell, USA. - Yuequi Chen, Zicheng Wang, Minghao Lin of University of Colorado Boulder, USA.
This commit is contained in:
parent
18e2937239
commit
97050a17aa
123 changed files with 94802 additions and 6515 deletions
1556
portable/IAR/ARM_CM4F_MPU/mpu_wrappers_v2_asm.S
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1556
portable/IAR/ARM_CM4F_MPU/mpu_wrappers_v2_asm.S
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File diff suppressed because it is too large
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@ -132,8 +132,14 @@
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#define portINITIAL_CONTROL_IF_UNPRIVILEGED ( 0x03 )
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#define portINITIAL_CONTROL_IF_PRIVILEGED ( 0x02 )
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/* Constants used during system call enter and exit. */
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#define portPSR_STACK_PADDING_MASK ( 1UL << 9UL )
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#define portEXC_RETURN_STACK_FRAME_TYPE_MASK ( 1UL << 4UL )
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/* Offsets in the stack to the parameters when inside the SVC handler. */
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#define portOFFSET_TO_LR ( 5 )
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#define portOFFSET_TO_PC ( 6 )
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#define portOFFSET_TO_PSR ( 7 )
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/* The systick is a 24-bit counter. */
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#define portMAX_24_BIT_NUMBER ( 0xffffffUL )
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@ -147,6 +153,21 @@
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* have bit-0 clear, as it is loaded into the PC on exit from an ISR. */
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#define portSTART_ADDRESS_MASK ( ( StackType_t ) 0xfffffffeUL )
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/* Does addr lie within [start, end] address range? */
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#define portIS_ADDRESS_WITHIN_RANGE( addr, start, end ) \
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( ( ( addr ) >= ( start ) ) && ( ( addr ) <= ( end ) ) )
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/* Is the access request satisfied by the available permissions? */
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#define portIS_AUTHORIZED( accessRequest, permissions ) \
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( ( ( permissions ) & ( accessRequest ) ) == accessRequest )
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/* Max value that fits in a uint32_t type. */
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#define portUINT32_MAX ( ~( ( uint32_t ) 0 ) )
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/* Check if adding a and b will result in overflow. */
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#define portADD_UINT32_WILL_OVERFLOW( a, b ) ( ( a ) > ( portUINT32_MAX - ( b ) ) )
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/*-----------------------------------------------------------*/
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/*
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* Configure a number of standard MPU regions that are used by all tasks.
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*/
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@ -184,7 +205,7 @@ extern void vPortEnableVFP( void );
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/*
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* The C portion of the SVC handler.
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*/
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void vPortSVCHandler_C( uint32_t * pulParam );
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void vPortSVCHandler_C( uint32_t * pulParam ) PRIVILEGED_FUNCTION;
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/*
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* Called from the SVC handler used to start the scheduler.
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@ -208,6 +229,57 @@ extern void vPortRestoreContextOfFirstTask( void ) PRIVILEGED_FUNCTION;
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#else
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void vPortExitCritical( void ) PRIVILEGED_FUNCTION;
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#endif
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#if ( configUSE_MPU_WRAPPERS_V1 == 0 )
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/**
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* @brief Sets up the system call stack so that upon returning from
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* SVC, the system call stack is used.
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*
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* It is used for the system calls with up to 4 parameters.
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*
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* @param pulTaskStack The current SP when the SVC was raised.
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* @param ulLR The value of Link Register (EXC_RETURN) in the SVC handler.
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*/
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void vSystemCallEnter( uint32_t * pulTaskStack, uint32_t ulLR ) PRIVILEGED_FUNCTION;
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#endif /* #if ( configUSE_MPU_WRAPPERS_V1 == 0 ) */
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#if ( configUSE_MPU_WRAPPERS_V1 == 0 )
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/**
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* @brief Sets up the system call stack so that upon returning from
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* SVC, the system call stack is used.
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*
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* It is used for the system calls with 5 parameters.
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*
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* @param pulTaskStack The current SP when the SVC was raised.
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* @param ulLR The value of Link Register (EXC_RETURN) in the SVC handler.
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*/
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void vSystemCallEnter_1( uint32_t * pulTaskStack, uint32_t ulLR ) PRIVILEGED_FUNCTION;
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#endif /* #if ( configUSE_MPU_WRAPPERS_V1 == 0 ) */
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#if ( configUSE_MPU_WRAPPERS_V1 == 0 )
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/**
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* @brief Sets up the task stack so that upon returning from
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* SVC, the task stack is used again.
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*
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* @param pulSystemCallStack The current SP when the SVC was raised.
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* @param ulLR The value of Link Register (EXC_RETURN) in the SVC handler.
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*/
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void vSystemCallExit( uint32_t * pulSystemCallStack, uint32_t ulLR ) PRIVILEGED_FUNCTION;
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#endif /* #if ( configUSE_MPU_WRAPPERS_V1 == 0 ) */
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/**
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* @brief Checks whether or not the calling task is privileged.
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*
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* @return pdTRUE if the calling task is privileged, pdFALSE otherwise.
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*/
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BaseType_t xPortIsTaskPrivileged( void ) PRIVILEGED_FUNCTION;
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/*-----------------------------------------------------------*/
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/* Each task maintains its own interrupt status in the critical nesting
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@ -233,46 +305,56 @@ static UBaseType_t uxCriticalNesting = 0xaaaaaaaa;
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StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
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TaskFunction_t pxCode,
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void * pvParameters,
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BaseType_t xRunPrivileged )
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BaseType_t xRunPrivileged,
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xMPU_SETTINGS * xMPUSettings )
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{
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/* Simulate the stack frame as it would be created by a context switch
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* interrupt. */
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/* Offset added to account for the way the MCU uses the stack on entry/exit
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* of interrupts, and to ensure alignment. */
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pxTopOfStack--;
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*pxTopOfStack = portINITIAL_XPSR; /* xPSR */
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pxTopOfStack--;
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*pxTopOfStack = ( ( StackType_t ) pxCode ) & portSTART_ADDRESS_MASK; /* PC */
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pxTopOfStack--;
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*pxTopOfStack = ( StackType_t ) 0; /* LR */
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/* Save code space by skipping register initialisation. */
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pxTopOfStack -= 5; /* R12, R3, R2 and R1. */
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*pxTopOfStack = ( StackType_t ) pvParameters; /* R0 */
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/* A save method is being used that requires each task to maintain its
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* own exec return value. */
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pxTopOfStack--;
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*pxTopOfStack = portINITIAL_EXC_RETURN;
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pxTopOfStack -= 9; /* R11, R10, R9, R8, R7, R6, R5 and R4. */
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if( xRunPrivileged == pdTRUE )
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{
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*pxTopOfStack = portINITIAL_CONTROL_IF_PRIVILEGED;
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xMPUSettings->ulTaskFlags |= portTASK_IS_PRIVILEGED_FLAG;
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xMPUSettings->ulContext[ 0 ] = portINITIAL_CONTROL_IF_PRIVILEGED;
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}
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else
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{
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*pxTopOfStack = portINITIAL_CONTROL_IF_UNPRIVILEGED;
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xMPUSettings->ulTaskFlags &= ( ~portTASK_IS_PRIVILEGED_FLAG );
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xMPUSettings->ulContext[ 0 ] = portINITIAL_CONTROL_IF_UNPRIVILEGED;
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}
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xMPUSettings->ulContext[ 1 ] = 0x04040404; /* r4. */
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xMPUSettings->ulContext[ 2 ] = 0x05050505; /* r5. */
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xMPUSettings->ulContext[ 3 ] = 0x06060606; /* r6. */
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xMPUSettings->ulContext[ 4 ] = 0x07070707; /* r7. */
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xMPUSettings->ulContext[ 5 ] = 0x08080808; /* r8. */
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xMPUSettings->ulContext[ 6 ] = 0x09090909; /* r9. */
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xMPUSettings->ulContext[ 7 ] = 0x10101010; /* r10. */
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xMPUSettings->ulContext[ 8 ] = 0x11111111; /* r11. */
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xMPUSettings->ulContext[ 9 ] = portINITIAL_EXC_RETURN; /* EXC_RETURN. */
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return pxTopOfStack;
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xMPUSettings->ulContext[ 10 ] = ( uint32_t ) ( pxTopOfStack - 8 ); /* PSP with the hardware saved stack. */
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xMPUSettings->ulContext[ 11 ] = ( uint32_t ) pvParameters; /* r0. */
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xMPUSettings->ulContext[ 12 ] = 0x01010101; /* r1. */
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xMPUSettings->ulContext[ 13 ] = 0x02020202; /* r2. */
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xMPUSettings->ulContext[ 14 ] = 0x03030303; /* r3. */
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xMPUSettings->ulContext[ 15 ] = 0x12121212; /* r12. */
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xMPUSettings->ulContext[ 16 ] = 0; /* LR. */
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xMPUSettings->ulContext[ 17 ] = ( ( uint32_t ) pxCode ) & portSTART_ADDRESS_MASK; /* PC. */
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xMPUSettings->ulContext[ 18 ] = portINITIAL_XPSR; /* xPSR. */
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#if ( configUSE_MPU_WRAPPERS_V1 == 0 )
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{
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/* Ensure that the system call stack is double word aligned. */
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xMPUSettings->xSystemCallStackInfo.pulSystemCallStack = &( xMPUSettings->xSystemCallStackInfo.ulSystemCallStackBuffer[ configSYSTEM_CALL_STACK_SIZE - 1 ] );
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xMPUSettings->xSystemCallStackInfo.pulSystemCallStack = ( uint32_t * ) ( ( uint32_t ) ( xMPUSettings->xSystemCallStackInfo.pulSystemCallStack ) &
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( uint32_t ) ( ~( portBYTE_ALIGNMENT_MASK ) ) );
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/* This is not NULL only for the duration of a system call. */
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xMPUSettings->xSystemCallStackInfo.pulTaskStack = NULL;
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}
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#endif /* #if ( configUSE_MPU_WRAPPERS_V1 == 0 ) */
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return &( xMPUSettings->ulContext[ 19 ] );
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}
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/*-----------------------------------------------------------*/
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void vPortSVCHandler_C( uint32_t * pulParam )
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void vPortSVCHandler_C( uint32_t * pulParam ) /* PRIVILEGED_FUNCTION */
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{
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uint8_t ucSVCNumber;
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uint32_t ulPC;
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::: "r1", "memory"
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);
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break;
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#endif /* #if( configENFORCE_SYSTEM_CALLS_FROM_KERNEL_ONLY == 1 ) */
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#endif /* #if( configENFORCE_SYSTEM_CALLS_FROM_KERNEL_ONLY == 1 ) */
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default: /* Unknown SVC call. */
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break;
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}
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/*-----------------------------------------------------------*/
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#if ( configUSE_MPU_WRAPPERS_V1 == 0 )
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void vSystemCallEnter( uint32_t * pulTaskStack, uint32_t ulLR ) /* PRIVILEGED_FUNCTION */
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{
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extern TaskHandle_t pxCurrentTCB;
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xMPU_SETTINGS * pxMpuSettings;
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uint32_t * pulSystemCallStack;
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uint32_t ulStackFrameSize, ulSystemCallLocation, i;
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#if defined( __ARMCC_VERSION )
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/* Declaration when these variable are defined in code instead of being
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* exported from linker scripts. */
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extern uint32_t * __syscalls_flash_start__;
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extern uint32_t * __syscalls_flash_end__;
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#else
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/* Declaration when these variable are exported from linker scripts. */
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extern uint32_t __syscalls_flash_start__[];
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extern uint32_t __syscalls_flash_end__[];
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#endif /* #if defined( __ARMCC_VERSION ) */
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ulSystemCallLocation = pulTaskStack[ portOFFSET_TO_PC ];
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/* If the request did not come from the system call section, do nothing. */
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if( ( ulSystemCallLocation >= ( uint32_t ) __syscalls_flash_start__ ) &&
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( ulSystemCallLocation <= ( uint32_t ) __syscalls_flash_end__ ) )
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{
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pxMpuSettings = xTaskGetMPUSettings( pxCurrentTCB );
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pulSystemCallStack = pxMpuSettings->xSystemCallStackInfo.pulSystemCallStack;
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/* This is not NULL only for the duration of the system call. */
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configASSERT( pxMpuSettings->xSystemCallStackInfo.pulTaskStack == NULL );
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if( ( ulLR & portEXC_RETURN_STACK_FRAME_TYPE_MASK ) == 0UL )
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{
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/* Extended frame i.e. FPU in use. */
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ulStackFrameSize = 26;
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__asm volatile (
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" vpush {s0} \n" /* Trigger lazy stacking. */
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" vpop {s0} \n" /* Nullify the affect of the above instruction. */
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::: "memory"
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);
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}
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else
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{
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/* Standard frame i.e. FPU not in use. */
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ulStackFrameSize = 8;
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}
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/* Make space on the system call stack for the stack frame. */
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pulSystemCallStack = pulSystemCallStack - ulStackFrameSize;
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/* Copy the stack frame. */
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for( i = 0; i < ulStackFrameSize; i++ )
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{
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pulSystemCallStack[ i ] = pulTaskStack[ i ];
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}
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/* Use the pulSystemCallStack in thread mode. */
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__asm volatile ( "msr psp, %0" : : "r" ( pulSystemCallStack ) );
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/* Raise the privilege for the duration of the system call. */
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__asm volatile (
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" mrs r1, control \n" /* Obtain current control value. */
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" bic r1, #1 \n" /* Clear nPRIV bit. */
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" msr control, r1 \n" /* Write back new control value. */
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::: "r1", "memory"
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);
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/* Remember the location where we should copy the stack frame when we exit from
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* the system call. */
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pxMpuSettings->xSystemCallStackInfo.pulTaskStack = pulTaskStack + ulStackFrameSize;
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/* Store the value of the Link Register before the SVC was raised. We need to
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* restore it when we exit from the system call. */
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pxMpuSettings->xSystemCallStackInfo.ulLinkRegisterAtSystemCallEntry = pulTaskStack[ portOFFSET_TO_LR ];
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/* Record if the hardware used padding to force the stack pointer
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* to be double word aligned. */
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if( ( pulTaskStack[ portOFFSET_TO_PSR ] & portPSR_STACK_PADDING_MASK ) == portPSR_STACK_PADDING_MASK )
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{
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pxMpuSettings->ulTaskFlags |= portSTACK_FRAME_HAS_PADDING_FLAG;
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}
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else
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{
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pxMpuSettings->ulTaskFlags &= ( ~portSTACK_FRAME_HAS_PADDING_FLAG );
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}
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/* We ensure in pxPortInitialiseStack that the system call stack is
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* double word aligned and therefore, there is no need of padding.
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* Clear the bit[9] of stacked xPSR. */
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pulSystemCallStack[ portOFFSET_TO_PSR ] &= ( ~portPSR_STACK_PADDING_MASK );
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}
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}
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#endif /* #if ( configUSE_MPU_WRAPPERS_V1 == 0 ) */
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/*-----------------------------------------------------------*/
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#if ( configUSE_MPU_WRAPPERS_V1 == 0 )
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void vSystemCallEnter_1( uint32_t * pulTaskStack, uint32_t ulLR ) /* PRIVILEGED_FUNCTION */
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{
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extern TaskHandle_t pxCurrentTCB;
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xMPU_SETTINGS * pxMpuSettings;
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uint32_t * pulSystemCallStack;
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uint32_t ulStackFrameSize, ulSystemCallLocation, i;
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#if defined( __ARMCC_VERSION )
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/* Declaration when these variable are defined in code instead of being
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* exported from linker scripts. */
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extern uint32_t * __syscalls_flash_start__;
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extern uint32_t * __syscalls_flash_end__;
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#else
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/* Declaration when these variable are exported from linker scripts. */
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extern uint32_t __syscalls_flash_start__[];
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extern uint32_t __syscalls_flash_end__[];
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#endif /* #if defined( __ARMCC_VERSION ) */
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ulSystemCallLocation = pulTaskStack[ portOFFSET_TO_PC ];
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/* If the request did not come from the system call section, do nothing. */
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if( ( ulSystemCallLocation >= ( uint32_t ) __syscalls_flash_start__ ) &&
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( ulSystemCallLocation <= ( uint32_t ) __syscalls_flash_end__ ) )
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{
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pxMpuSettings = xTaskGetMPUSettings( pxCurrentTCB );
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pulSystemCallStack = pxMpuSettings->xSystemCallStackInfo.pulSystemCallStack;
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/* This is not NULL only for the duration of the system call. */
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configASSERT( pxMpuSettings->xSystemCallStackInfo.pulTaskStack == NULL );
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if( ( ulLR & portEXC_RETURN_STACK_FRAME_TYPE_MASK ) == 0UL )
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{
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/* Extended frame i.e. FPU in use. */
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ulStackFrameSize = 26;
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__asm volatile (
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" vpush {s0} \n" /* Trigger lazy stacking. */
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" vpop {s0} \n" /* Nullify the affect of the above instruction. */
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::: "memory"
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);
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}
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else
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{
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/* Standard frame i.e. FPU not in use. */
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ulStackFrameSize = 8;
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}
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/* Make space on the system call stack for the stack frame and
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* the parameter passed on the stack. We only need to copy one
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* parameter but we still reserve 2 spaces to keep the stack
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* double word aligned. */
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pulSystemCallStack = pulSystemCallStack - ulStackFrameSize - 2UL;
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/* Copy the stack frame. */
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for( i = 0; i < ulStackFrameSize; i++ )
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{
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pulSystemCallStack[ i ] = pulTaskStack[ i ];
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}
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/* Copy the parameter which is passed the stack. */
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if( ( pulTaskStack[ portOFFSET_TO_PSR ] & portPSR_STACK_PADDING_MASK ) == portPSR_STACK_PADDING_MASK )
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{
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pulSystemCallStack[ ulStackFrameSize ] = pulTaskStack[ ulStackFrameSize + 1 ];
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/* Record if the hardware used padding to force the stack pointer
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* to be double word aligned. */
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pxMpuSettings->ulTaskFlags |= portSTACK_FRAME_HAS_PADDING_FLAG;
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}
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else
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{
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pulSystemCallStack[ ulStackFrameSize ] = pulTaskStack[ ulStackFrameSize ];
|
||||
/* Record if the hardware used padding to force the stack pointer
|
||||
* to be double word aligned. */
|
||||
pxMpuSettings->ulTaskFlags &= ( ~portSTACK_FRAME_HAS_PADDING_FLAG );
|
||||
}
|
||||
|
||||
/* Use the pulSystemCallStack in thread mode. */
|
||||
__asm volatile ( "msr psp, %0" : : "r" ( pulSystemCallStack ) );
|
||||
|
||||
/* Raise the privilege for the duration of the system call. */
|
||||
__asm volatile (
|
||||
" mrs r1, control \n" /* Obtain current control value. */
|
||||
" bic r1, #1 \n" /* Clear nPRIV bit. */
|
||||
" msr control, r1 \n" /* Write back new control value. */
|
||||
::: "r1", "memory"
|
||||
);
|
||||
|
||||
/* Remember the location where we should copy the stack frame when we exit from
|
||||
* the system call. */
|
||||
pxMpuSettings->xSystemCallStackInfo.pulTaskStack = pulTaskStack + ulStackFrameSize;
|
||||
|
||||
/* Store the value of the Link Register before the SVC was raised. We need to
|
||||
* restore it when we exit from the system call. */
|
||||
pxMpuSettings->xSystemCallStackInfo.ulLinkRegisterAtSystemCallEntry = pulTaskStack[ portOFFSET_TO_LR ];
|
||||
|
||||
/* We ensure in pxPortInitialiseStack that the system call stack is
|
||||
* double word aligned and therefore, there is no need of padding.
|
||||
* Clear the bit[9] of stacked xPSR. */
|
||||
pulSystemCallStack[ portOFFSET_TO_PSR ] &= ( ~portPSR_STACK_PADDING_MASK );
|
||||
}
|
||||
}
|
||||
|
||||
#endif /* #if ( configUSE_MPU_WRAPPERS_V1 == 0 ) */
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
#if ( configUSE_MPU_WRAPPERS_V1 == 0 )
|
||||
|
||||
void vSystemCallExit( uint32_t * pulSystemCallStack, uint32_t ulLR ) /* PRIVILEGED_FUNCTION */
|
||||
{
|
||||
extern TaskHandle_t pxCurrentTCB;
|
||||
xMPU_SETTINGS * pxMpuSettings;
|
||||
uint32_t * pulTaskStack;
|
||||
uint32_t ulStackFrameSize, ulSystemCallLocation, i;
|
||||
#if defined( __ARMCC_VERSION )
|
||||
/* Declaration when these variable are defined in code instead of being
|
||||
* exported from linker scripts. */
|
||||
extern uint32_t * __syscalls_flash_start__;
|
||||
extern uint32_t * __syscalls_flash_end__;
|
||||
#else
|
||||
/* Declaration when these variable are exported from linker scripts. */
|
||||
extern uint32_t __syscalls_flash_start__[];
|
||||
extern uint32_t __syscalls_flash_end__[];
|
||||
#endif /* #if defined( __ARMCC_VERSION ) */
|
||||
|
||||
ulSystemCallLocation = pulSystemCallStack[ portOFFSET_TO_PC ];
|
||||
|
||||
/* If the request did not come from the system call section, do nothing. */
|
||||
if( ( ulSystemCallLocation >= ( uint32_t ) __syscalls_flash_start__ ) &&
|
||||
( ulSystemCallLocation <= ( uint32_t ) __syscalls_flash_end__ ) )
|
||||
{
|
||||
pxMpuSettings = xTaskGetMPUSettings( pxCurrentTCB );
|
||||
pulTaskStack = pxMpuSettings->xSystemCallStackInfo.pulTaskStack;
|
||||
|
||||
if( ( ulLR & portEXC_RETURN_STACK_FRAME_TYPE_MASK ) == 0UL )
|
||||
{
|
||||
/* Extended frame i.e. FPU in use. */
|
||||
ulStackFrameSize = 26;
|
||||
__asm volatile (
|
||||
" vpush {s0} \n" /* Trigger lazy stacking. */
|
||||
" vpop {s0} \n" /* Nullify the affect of the above instruction. */
|
||||
::: "memory"
|
||||
);
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Standard frame i.e. FPU not in use. */
|
||||
ulStackFrameSize = 8;
|
||||
}
|
||||
|
||||
/* Make space on the task stack for the stack frame. */
|
||||
pulTaskStack = pulTaskStack - ulStackFrameSize;
|
||||
|
||||
/* Copy the stack frame. */
|
||||
for( i = 0; i < ulStackFrameSize; i++ )
|
||||
{
|
||||
pulTaskStack[ i ] = pulSystemCallStack[ i ];
|
||||
}
|
||||
|
||||
/* Use the pulTaskStack in thread mode. */
|
||||
__asm volatile ( "msr psp, %0" : : "r" ( pulTaskStack ) );
|
||||
|
||||
/* Drop the privilege before returning to the thread mode. */
|
||||
__asm volatile (
|
||||
" mrs r1, control \n" /* Obtain current control value. */
|
||||
" orr r1, #1 \n" /* Set nPRIV bit. */
|
||||
" msr control, r1 \n" /* Write back new control value. */
|
||||
::: "r1", "memory"
|
||||
);
|
||||
|
||||
/* Restore the stacked link register to what it was at the time of
|
||||
* system call entry. */
|
||||
pulTaskStack[ portOFFSET_TO_LR ] = pxMpuSettings->xSystemCallStackInfo.ulLinkRegisterAtSystemCallEntry;
|
||||
|
||||
/* If the hardware used padding to force the stack pointer
|
||||
* to be double word aligned, set the stacked xPSR bit[9],
|
||||
* otherwise clear it. */
|
||||
if( ( pxMpuSettings->ulTaskFlags & portSTACK_FRAME_HAS_PADDING_FLAG ) == portSTACK_FRAME_HAS_PADDING_FLAG )
|
||||
{
|
||||
pulTaskStack[ portOFFSET_TO_PSR ] |= portPSR_STACK_PADDING_MASK;
|
||||
}
|
||||
else
|
||||
{
|
||||
pulTaskStack[ portOFFSET_TO_PSR ] &= ( ~portPSR_STACK_PADDING_MASK );
|
||||
}
|
||||
|
||||
/* This is not NULL only for the duration of the system call. */
|
||||
pxMpuSettings->xSystemCallStackInfo.pulTaskStack = NULL;
|
||||
}
|
||||
}
|
||||
|
||||
#endif /* #if ( configUSE_MPU_WRAPPERS_V1 == 0 ) */
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
BaseType_t xPortIsTaskPrivileged( void ) /* PRIVILEGED_FUNCTION */
|
||||
{
|
||||
BaseType_t xTaskIsPrivileged = pdFALSE;
|
||||
const xMPU_SETTINGS * xTaskMpuSettings = xTaskGetMPUSettings( NULL ); /* Calling task's MPU settings. */
|
||||
|
||||
if( ( xTaskMpuSettings->ulTaskFlags & portTASK_IS_PRIVILEGED_FLAG ) == portTASK_IS_PRIVILEGED_FLAG )
|
||||
{
|
||||
xTaskIsPrivileged = pdTRUE;
|
||||
}
|
||||
|
||||
return xTaskIsPrivileged;
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/*
|
||||
* See header file for description.
|
||||
*/
|
||||
|
@ -738,11 +1122,19 @@ void vPortStoreTaskMPUSettings( xMPU_SETTINGS * xMPUSettings,
|
|||
( prvGetMPURegionSizeSetting( ( uint32_t ) __SRAM_segment_end__ - ( uint32_t ) __SRAM_segment_start__ ) ) |
|
||||
( portMPU_REGION_ENABLE );
|
||||
|
||||
xMPUSettings->xRegionSettings[ 0 ].ulRegionStartAddress = ( uint32_t ) __SRAM_segment_start__;
|
||||
xMPUSettings->xRegionSettings[ 0 ].ulRegionEndAddress = ( uint32_t ) __SRAM_segment_end__;
|
||||
xMPUSettings->xRegionSettings[ 0 ].ulRegionPermissions = ( tskMPU_READ_PERMISSION |
|
||||
tskMPU_WRITE_PERMISSION );
|
||||
|
||||
/* Invalidate user configurable regions. */
|
||||
for( ul = 1UL; ul <= portNUM_CONFIGURABLE_REGIONS; ul++ )
|
||||
{
|
||||
xMPUSettings->xRegion[ ul ].ulRegionBaseAddress = ( ( ul - 1UL ) | portMPU_REGION_VALID );
|
||||
xMPUSettings->xRegion[ ul ].ulRegionAttribute = 0UL;
|
||||
xMPUSettings->xRegionSettings[ ul ].ulRegionStartAddress = 0UL;
|
||||
xMPUSettings->xRegionSettings[ ul ].ulRegionEndAddress = 0UL;
|
||||
xMPUSettings->xRegionSettings[ ul ].ulRegionPermissions = 0UL;
|
||||
}
|
||||
}
|
||||
else
|
||||
|
@ -765,6 +1157,13 @@ void vPortStoreTaskMPUSettings( xMPU_SETTINGS * xMPUSettings,
|
|||
( prvGetMPURegionSizeSetting( ulStackDepth * ( uint32_t ) sizeof( StackType_t ) ) ) |
|
||||
( ( configTEX_S_C_B_SRAM & portMPU_RASR_TEX_S_C_B_MASK ) << portMPU_RASR_TEX_S_C_B_LOCATION ) |
|
||||
( portMPU_REGION_ENABLE );
|
||||
|
||||
xMPUSettings->xRegionSettings[ 0 ].ulRegionStartAddress = ( uint32_t ) pxBottomOfStack;
|
||||
xMPUSettings->xRegionSettings[ 0 ].ulRegionEndAddress = ( uint32_t ) ( ( uint32_t ) ( pxBottomOfStack ) +
|
||||
( ulStackDepth * ( uint32_t ) sizeof( StackType_t ) ) - 1UL );
|
||||
xMPUSettings->xRegionSettings[ 0 ].ulRegionPermissions = ( tskMPU_READ_PERMISSION |
|
||||
tskMPU_WRITE_PERMISSION );
|
||||
|
||||
}
|
||||
|
||||
lIndex = 0;
|
||||
|
@ -785,12 +1184,28 @@ void vPortStoreTaskMPUSettings( xMPU_SETTINGS * xMPUSettings,
|
|||
( prvGetMPURegionSizeSetting( xRegions[ lIndex ].ulLengthInBytes ) ) |
|
||||
( xRegions[ lIndex ].ulParameters ) |
|
||||
( portMPU_REGION_ENABLE );
|
||||
|
||||
xMPUSettings->xRegionSettings[ ul ].ulRegionStartAddress = ( uint32_t) xRegions[ lIndex ].pvBaseAddress;
|
||||
xMPUSettings->xRegionSettings[ ul ].ulRegionEndAddress = ( uint32_t ) ( ( uint32_t ) xRegions[ lIndex ].pvBaseAddress + xRegions[ lIndex ].ulLengthInBytes - 1UL );
|
||||
xMPUSettings->xRegionSettings[ ul ].ulRegionPermissions = 0UL;
|
||||
if( ( ( xRegions[ lIndex ].ulParameters & portMPU_REGION_READ_ONLY ) == portMPU_REGION_READ_ONLY ) ||
|
||||
( ( xRegions[ lIndex ].ulParameters & portMPU_REGION_PRIVILEGED_READ_WRITE_UNPRIV_READ_ONLY ) == portMPU_REGION_PRIVILEGED_READ_WRITE_UNPRIV_READ_ONLY ) )
|
||||
{
|
||||
xMPUSettings->xRegionSettings[ ul ].ulRegionPermissions = tskMPU_READ_PERMISSION;
|
||||
}
|
||||
if( ( xRegions[ lIndex ].ulParameters & portMPU_REGION_READ_WRITE ) == portMPU_REGION_READ_WRITE )
|
||||
{
|
||||
xMPUSettings->xRegionSettings[ ul ].ulRegionPermissions = ( tskMPU_READ_PERMISSION | tskMPU_WRITE_PERMISSION );
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Invalidate the region. */
|
||||
xMPUSettings->xRegion[ ul ].ulRegionBaseAddress = ( ( ul - 1UL ) | portMPU_REGION_VALID );
|
||||
xMPUSettings->xRegion[ ul ].ulRegionAttribute = 0UL;
|
||||
xMPUSettings->xRegionSettings[ ul ].ulRegionStartAddress = 0UL;
|
||||
xMPUSettings->xRegionSettings[ ul ].ulRegionEndAddress = 0UL;
|
||||
xMPUSettings->xRegionSettings[ ul ].ulRegionPermissions = 0UL;
|
||||
}
|
||||
|
||||
lIndex++;
|
||||
|
@ -799,6 +1214,48 @@ void vPortStoreTaskMPUSettings( xMPU_SETTINGS * xMPUSettings,
|
|||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
BaseType_t xPortIsAuthorizedToAccessBuffer( const void * pvBuffer,
|
||||
uint32_t ulBufferLength,
|
||||
uint32_t ulAccessRequested ) /* PRIVILEGED_FUNCTION */
|
||||
|
||||
{
|
||||
uint32_t i, ulBufferStartAddress, ulBufferEndAddress;
|
||||
BaseType_t xAccessGranted = pdFALSE;
|
||||
const xMPU_SETTINGS * xTaskMpuSettings = xTaskGetMPUSettings( NULL ); /* Calling task's MPU settings. */
|
||||
|
||||
if( ( xTaskMpuSettings->ulTaskFlags & portTASK_IS_PRIVILEGED_FLAG ) == portTASK_IS_PRIVILEGED_FLAG )
|
||||
{
|
||||
xAccessGranted = pdTRUE;
|
||||
}
|
||||
else
|
||||
{
|
||||
if( portADD_UINT32_WILL_OVERFLOW( ( ( uint32_t ) pvBuffer ), ( ulBufferLength - 1UL ) ) == pdFALSE )
|
||||
{
|
||||
ulBufferStartAddress = ( uint32_t ) pvBuffer;
|
||||
ulBufferEndAddress = ( ( ( uint32_t ) pvBuffer ) + ulBufferLength - 1UL );
|
||||
|
||||
for( i = 0; i < portTOTAL_NUM_REGIONS_IN_TCB; i++ )
|
||||
{
|
||||
if( portIS_ADDRESS_WITHIN_RANGE( ulBufferStartAddress,
|
||||
xTaskMpuSettings->xRegionSettings[ i ].ulRegionStartAddress,
|
||||
xTaskMpuSettings->xRegionSettings[ i ].ulRegionEndAddress ) &&
|
||||
portIS_ADDRESS_WITHIN_RANGE( ulBufferEndAddress,
|
||||
xTaskMpuSettings->xRegionSettings[ i ].ulRegionStartAddress,
|
||||
xTaskMpuSettings->xRegionSettings[ i ].ulRegionEndAddress ) &&
|
||||
portIS_AUTHORIZED( ulAccessRequested, xTaskMpuSettings->xRegionSettings[ i ].ulRegionPermissions ) )
|
||||
{
|
||||
xAccessGranted = pdTRUE;
|
||||
break;
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
return xAccessGranted;
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
|
||||
#if ( configASSERT_DEFINED == 1 )
|
||||
|
||||
void vPortValidateInterruptPriority( void )
|
||||
|
|
|
@ -25,6 +25,7 @@
|
|||
* https://github.com/FreeRTOS
|
||||
*
|
||||
*/
|
||||
|
||||
/* Including FreeRTOSConfig.h here will cause build errors if the header file
|
||||
contains code not understood by the assembler - for example the 'extern' keyword.
|
||||
To avoid errors place any such code inside a #ifdef __ICCARM__/#endif block so
|
||||
|
@ -38,6 +39,9 @@ files (__ICCARM__ is defined by the IAR C compiler but not by the IAR assembler.
|
|||
EXTERN pxCurrentTCB
|
||||
EXTERN vTaskSwitchContext
|
||||
EXTERN vPortSVCHandler_C
|
||||
EXTERN vSystemCallEnter
|
||||
EXTERN vSystemCallEnter_1
|
||||
EXTERN vSystemCallExit
|
||||
|
||||
PUBLIC xPortPendSVHandler
|
||||
PUBLIC vPortSVCHandler
|
||||
|
@ -49,99 +53,141 @@ files (__ICCARM__ is defined by the IAR C compiler but not by the IAR assembler.
|
|||
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
#ifndef configUSE_MPU_WRAPPERS_V1
|
||||
#define configUSE_MPU_WRAPPERS_V1 0
|
||||
#endif
|
||||
|
||||
/* These must be in sync with portmacro.h. */
|
||||
#define portSVC_SYSTEM_CALL_ENTER 3
|
||||
#define portSVC_SYSTEM_CALL_ENTER_1 4
|
||||
#define portSVC_SYSTEM_CALL_EXIT 5
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
xPortPendSVHandler:
|
||||
|
||||
ldr r3, =pxCurrentTCB
|
||||
ldr r2, [r3] /* r2 = pxCurrentTCB. */
|
||||
ldr r1, [r2] /* r1 = Location where the context should be saved. */
|
||||
|
||||
/*------------ Save Context. ----------- */
|
||||
mrs r3, control
|
||||
mrs r0, psp
|
||||
isb
|
||||
/* Get the location of the current TCB. */
|
||||
ldr r3, =pxCurrentTCB
|
||||
ldr r2, [r3]
|
||||
|
||||
/* Is the task using the FPU context? If so, push high vfp registers. */
|
||||
tst r14, #0x10
|
||||
it eq
|
||||
vstmdbeq r0!, {s16-s31}
|
||||
add r0, r0, #0x20 /* Move r0 to location where s0 is saved. */
|
||||
tst lr, #0x10
|
||||
ittt eq
|
||||
vstmiaeq r1!, {s16-s31} /* Store s16-s31. */
|
||||
vldmiaeq r0, {s0-s16} /* Copy hardware saved FP context into s0-s16. */
|
||||
vstmiaeq r1!, {s0-s16} /* Store hardware saved FP context. */
|
||||
sub r0, r0, #0x20 /* Set r0 back to the location of hardware saved context. */
|
||||
|
||||
/* Save the core registers. */
|
||||
mrs r1, control
|
||||
stmdb r0!, {r1, r4-r11, r14}
|
||||
stmia r1!, {r3-r11, lr} /* Store CONTROL register, r4-r11 and LR. */
|
||||
ldmia r0, {r4-r11} /* Copy hardware saved context into r4-r11. */
|
||||
stmia r1!, {r0, r4-r11} /* Store original PSP (after hardware has saved context) and the hardware saved context. */
|
||||
str r1, [r2] /* Save the location from where the context should be restored as the first member of TCB. */
|
||||
|
||||
/* Save the new top of stack into the first member of the TCB. */
|
||||
str r0, [r2]
|
||||
|
||||
stmdb sp!, {r0, r3}
|
||||
/*---------- Select next task. --------- */
|
||||
mov r0, #configMAX_SYSCALL_INTERRUPT_PRIORITY
|
||||
#if ( configENABLE_ERRATA_837070_WORKAROUND == 1 )
|
||||
cpsid i /* ARM Cortex-M7 r0p1 Errata 837070 workaround. */
|
||||
#endif
|
||||
#if ( configENABLE_ERRATA_837070_WORKAROUND == 1 )
|
||||
cpsid i /* ARM Cortex-M7 r0p1 Errata 837070 workaround. */
|
||||
#endif
|
||||
msr basepri, r0
|
||||
dsb
|
||||
isb
|
||||
#if ( configENABLE_ERRATA_837070_WORKAROUND == 1 )
|
||||
cpsie i /* ARM Cortex-M7 r0p1 Errata 837070 workaround. */
|
||||
#endif
|
||||
#if ( configENABLE_ERRATA_837070_WORKAROUND == 1 )
|
||||
cpsie i /* ARM Cortex-M7 r0p1 Errata 837070 workaround. */
|
||||
#endif
|
||||
bl vTaskSwitchContext
|
||||
mov r0, #0
|
||||
msr basepri, r0
|
||||
ldmia sp!, {r0, r3}
|
||||
|
||||
/* The first item in pxCurrentTCB is the task top of stack. */
|
||||
ldr r1, [r3]
|
||||
ldr r0, [r1]
|
||||
/* Move onto the second item in the TCB... */
|
||||
add r1, r1, #4
|
||||
/*------------ Program MPU. ------------ */
|
||||
ldr r3, =pxCurrentTCB
|
||||
ldr r2, [r3] /* r2 = pxCurrentTCB. */
|
||||
add r2, r2, #4 /* r2 = Second item in the TCB which is xMPUSettings. */
|
||||
|
||||
dmb /* Complete outstanding transfers before disabling MPU. */
|
||||
ldr r2, =0xe000ed94 /* MPU_CTRL register. */
|
||||
ldr r3, [r2] /* Read the value of MPU_CTRL. */
|
||||
bic r3, r3, #1 /* r3 = r3 & ~1 i.e. Clear the bit 0 in r3. */
|
||||
str r3, [r2] /* Disable MPU. */
|
||||
dmb /* Complete outstanding transfers before disabling MPU. */
|
||||
ldr r0, =0xe000ed94 /* MPU_CTRL register. */
|
||||
ldr r3, [r0] /* Read the value of MPU_CTRL. */
|
||||
bic r3, #1 /* r3 = r3 & ~1 i.e. Clear the bit 0 in r3. */
|
||||
str r3, [r0] /* Disable MPU. */
|
||||
|
||||
/* Region Base Address register. */
|
||||
ldr r2, =0xe000ed9c
|
||||
/* Read 4 sets of MPU registers [MPU Region # 4 - 7]. */
|
||||
ldmia r1!, {r4-r11}
|
||||
/* Write 4 sets of MPU registers [MPU Region # 4 - 7]. */
|
||||
stmia r2, {r4-r11}
|
||||
ldr r0, =0xe000ed9c /* Region Base Address register. */
|
||||
ldmia r2!, {r4-r11} /* Read 4 sets of MPU registers [MPU Region # 4 - 7]. */
|
||||
stmia r0, {r4-r11} /* Write 4 sets of MPU registers [MPU Region # 4 - 7]. */
|
||||
|
||||
#ifdef configTOTAL_MPU_REGIONS
|
||||
#if ( configTOTAL_MPU_REGIONS == 16 )
|
||||
/* Read 4 sets of MPU registers [MPU Region # 8 - 11]. */
|
||||
ldmia r1!, {r4-r11}
|
||||
/* Write 4 sets of MPU registers. [MPU Region # 8 - 11]. */
|
||||
stmia r2, {r4-r11}
|
||||
/* Read 4 sets of MPU registers [MPU Region # 12 - 15]. */
|
||||
ldmia r1!, {r4-r11}
|
||||
/* Write 4 sets of MPU registers. [MPU Region # 12 - 15]. */
|
||||
stmia r2, {r4-r11}
|
||||
#endif /* configTOTAL_MPU_REGIONS == 16. */
|
||||
#endif /* configTOTAL_MPU_REGIONS */
|
||||
#ifdef configTOTAL_MPU_REGIONS
|
||||
#if ( configTOTAL_MPU_REGIONS == 16 )
|
||||
ldmia r2!, {r4-r11} /* Read 4 sets of MPU registers [MPU Region # 8 - 11]. */
|
||||
stmia r0, {r4-r11} /* Write 4 sets of MPU registers. [MPU Region # 8 - 11]. */
|
||||
ldmia r2!, {r4-r11} /* Read 4 sets of MPU registers [MPU Region # 12 - 15]. */
|
||||
stmia r0, {r4-r11} /* Write 4 sets of MPU registers. [MPU Region # 12 - 15]. */
|
||||
#endif /* configTOTAL_MPU_REGIONS == 16. */
|
||||
#endif
|
||||
|
||||
ldr r2, =0xe000ed94 /* MPU_CTRL register. */
|
||||
ldr r3, [r2] /* Read the value of MPU_CTRL. */
|
||||
orr r3, r3, #1 /* r3 = r3 | 1 i.e. Set the bit 0 in r3. */
|
||||
str r3, [r2] /* Enable MPU. */
|
||||
dsb /* Force memory writes before continuing. */
|
||||
ldr r0, =0xe000ed94 /* MPU_CTRL register. */
|
||||
ldr r3, [r0] /* Read the value of MPU_CTRL. */
|
||||
orr r3, #1 /* r3 = r3 | 1 i.e. Set the bit 0 in r3. */
|
||||
str r3, [r0] /* Enable MPU. */
|
||||
dsb /* Force memory writes before continuing. */
|
||||
|
||||
/* Pop the registers that are not automatically saved on exception entry. */
|
||||
ldmia r0!, {r3-r11, r14}
|
||||
/*---------- Restore Context. ---------- */
|
||||
ldr r3, =pxCurrentTCB
|
||||
ldr r2, [r3] /* r2 = pxCurrentTCB. */
|
||||
ldr r1, [r2] /* r1 = Location of saved context in TCB. */
|
||||
|
||||
ldmdb r1!, {r0, r4-r11} /* r0 contains PSP after the hardware had saved context. r4-r11 contain hardware saved context. */
|
||||
msr psp, r0
|
||||
stmia r0!, {r4-r11} /* Copy the hardware saved context on the task stack. */
|
||||
ldmdb r1!, {r3-r11, lr} /* r3 contains CONTROL register. r4-r11 and LR restored. */
|
||||
msr control, r3
|
||||
|
||||
/* Is the task using the FPU context? If so, pop the high vfp registers
|
||||
too. */
|
||||
tst r14, #0x10
|
||||
it eq
|
||||
vldmiaeq r0!, {s16-s31}
|
||||
|
||||
msr psp, r0
|
||||
isb
|
||||
|
||||
bx r14
|
||||
tst lr, #0x10
|
||||
ittt eq
|
||||
vldmdbeq r1!, {s0-s16} /* s0-s16 contain hardware saved FP context. */
|
||||
vstmiaeq r0!, {s0-s16} /* Copy hardware saved FP context on the task stack. */
|
||||
vldmdbeq r1!, {s16-s31} /* Restore s16-s31. */
|
||||
|
||||
str r1, [r2] /* Save the location where the context should be saved next as the first member of TCB. */
|
||||
bx lr
|
||||
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
#if ( configUSE_MPU_WRAPPERS_V1 == 0 )
|
||||
|
||||
vPortSVCHandler:
|
||||
#ifndef USE_PROCESS_STACK /* Code should not be required if a main() is using the process stack. */
|
||||
tst lr, #4
|
||||
ite eq
|
||||
mrseq r0, msp
|
||||
mrsne r0, psp
|
||||
|
||||
ldr r1, [r0, #24]
|
||||
ldrb r2, [r1, #-2]
|
||||
cmp r2, #portSVC_SYSTEM_CALL_ENTER
|
||||
beq syscall_enter
|
||||
cmp r2, #portSVC_SYSTEM_CALL_ENTER_1
|
||||
beq syscall_enter_1
|
||||
cmp r2, #portSVC_SYSTEM_CALL_EXIT
|
||||
beq syscall_exit
|
||||
b vPortSVCHandler_C
|
||||
|
||||
syscall_enter:
|
||||
mov r1, lr
|
||||
b vSystemCallEnter
|
||||
|
||||
syscall_enter_1:
|
||||
mov r1, lr
|
||||
b vSystemCallEnter_1
|
||||
|
||||
syscall_exit:
|
||||
mov r1, lr
|
||||
b vSystemCallExit
|
||||
|
||||
#else /* #if ( configUSE_MPU_WRAPPERS_V1 == 0 ) */
|
||||
|
||||
vPortSVCHandler:
|
||||
#ifndef USE_PROCESS_STACK
|
||||
tst lr, #4
|
||||
ite eq
|
||||
mrseq r0, msp
|
||||
|
@ -151,6 +197,7 @@ vPortSVCHandler:
|
|||
#endif
|
||||
b vPortSVCHandler_C
|
||||
|
||||
#endif /* #if ( configUSE_MPU_WRAPPERS_V1 == 0 ) */
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
vPortStartFirstTask:
|
||||
|
@ -176,60 +223,56 @@ vPortStartFirstTask:
|
|||
/*-----------------------------------------------------------*/
|
||||
|
||||
vPortRestoreContextOfFirstTask:
|
||||
/* Use the NVIC offset register to locate the stack. */
|
||||
ldr r0, =0xE000ED08
|
||||
ldr r0, =0xE000ED08 /* Use the NVIC offset register to locate the stack. */
|
||||
ldr r0, [r0]
|
||||
ldr r0, [r0]
|
||||
/* Set the msp back to the start of the stack. */
|
||||
msr msp, r0
|
||||
/* Restore the context. */
|
||||
msr msp, r0 /* Set the msp back to the start of the stack. */
|
||||
|
||||
/*------------ Program MPU. ------------ */
|
||||
ldr r3, =pxCurrentTCB
|
||||
ldr r1, [r3]
|
||||
/* The first item in the TCB is the task top of stack. */
|
||||
ldr r0, [r1]
|
||||
/* Move onto the second item in the TCB... */
|
||||
add r1, r1, #4
|
||||
ldr r2, [r3] /* r2 = pxCurrentTCB. */
|
||||
add r2, r2, #4 /* r2 = Second item in the TCB which is xMPUSettings. */
|
||||
|
||||
dmb /* Complete outstanding transfers before disabling MPU. */
|
||||
ldr r2, =0xe000ed94 /* MPU_CTRL register. */
|
||||
ldr r3, [r2] /* Read the value of MPU_CTRL. */
|
||||
bic r3, r3, #1 /* r3 = r3 & ~1 i.e. Clear the bit 0 in r3. */
|
||||
str r3, [r2] /* Disable MPU. */
|
||||
dmb /* Complete outstanding transfers before disabling MPU. */
|
||||
ldr r0, =0xe000ed94 /* MPU_CTRL register. */
|
||||
ldr r3, [r0] /* Read the value of MPU_CTRL. */
|
||||
bic r3, #1 /* r3 = r3 & ~1 i.e. Clear the bit 0 in r3. */
|
||||
str r3, [r0] /* Disable MPU. */
|
||||
|
||||
/* Region Base Address register. */
|
||||
ldr r2, =0xe000ed9c
|
||||
/* Read 4 sets of MPU registers [MPU Region # 4 - 7]. */
|
||||
ldmia r1!, {r4-r11}
|
||||
/* Write 4 sets of MPU registers [MPU Region # 4 - 7]. */
|
||||
stmia r2, {r4-r11}
|
||||
ldr r0, =0xe000ed9c /* Region Base Address register. */
|
||||
ldmia r2!, {r4-r11} /* Read 4 sets of MPU registers [MPU Region # 4 - 7]. */
|
||||
stmia r0, {r4-r11} /* Write 4 sets of MPU registers [MPU Region # 4 - 7]. */
|
||||
|
||||
#ifdef configTOTAL_MPU_REGIONS
|
||||
#if ( configTOTAL_MPU_REGIONS == 16 )
|
||||
/* Read 4 sets of MPU registers [MPU Region # 8 - 11]. */
|
||||
ldmia r1!, {r4-r11}
|
||||
/* Write 4 sets of MPU registers. [MPU Region # 8 - 11]. */
|
||||
stmia r2, {r4-r11}
|
||||
/* Read 4 sets of MPU registers [MPU Region # 12 - 15]. */
|
||||
ldmia r1!, {r4-r11}
|
||||
/* Write 4 sets of MPU registers. [MPU Region # 12 - 15]. */
|
||||
stmia r2, {r4-r11}
|
||||
#endif /* configTOTAL_MPU_REGIONS == 16. */
|
||||
#endif /* configTOTAL_MPU_REGIONS */
|
||||
#ifdef configTOTAL_MPU_REGIONS
|
||||
#if ( configTOTAL_MPU_REGIONS == 16 )
|
||||
ldmia r2!, {r4-r11} /* Read 4 sets of MPU registers [MPU Region # 8 - 11]. */
|
||||
stmia r0, {r4-r11} /* Write 4 sets of MPU registers. [MPU Region # 8 - 11]. */
|
||||
ldmia r2!, {r4-r11} /* Read 4 sets of MPU registers [MPU Region # 12 - 15]. */
|
||||
stmia r0, {r4-r11} /* Write 4 sets of MPU registers. [MPU Region # 12 - 15]. */
|
||||
#endif /* configTOTAL_MPU_REGIONS == 16. */
|
||||
#endif
|
||||
|
||||
ldr r2, =0xe000ed94 /* MPU_CTRL register. */
|
||||
ldr r3, [r2] /* Read the value of MPU_CTRL. */
|
||||
orr r3, r3, #1 /* r3 = r3 | 1 i.e. Set the bit 0 in r3. */
|
||||
str r3, [r2] /* Enable MPU. */
|
||||
dsb /* Force memory writes before continuing. */
|
||||
ldr r0, =0xe000ed94 /* MPU_CTRL register. */
|
||||
ldr r3, [r0] /* Read the value of MPU_CTRL. */
|
||||
orr r3, #1 /* r3 = r3 | 1 i.e. Set the bit 0 in r3. */
|
||||
str r3, [r0] /* Enable MPU. */
|
||||
dsb /* Force memory writes before continuing. */
|
||||
|
||||
/* Pop the registers that are not automatically saved on exception entry. */
|
||||
ldmia r0!, {r3-r11, r14}
|
||||
msr control, r3
|
||||
/* Restore the task stack pointer. */
|
||||
/*---------- Restore Context. ---------- */
|
||||
ldr r3, =pxCurrentTCB
|
||||
ldr r2, [r3] /* r2 = pxCurrentTCB. */
|
||||
ldr r1, [r2] /* r1 = Location of saved context in TCB. */
|
||||
|
||||
ldmdb r1!, {r0, r4-r11} /* r0 contains PSP after the hardware had saved context. r4-r11 contain hardware saved context. */
|
||||
msr psp, r0
|
||||
stmia r0, {r4-r11} /* Copy the hardware saved context on the task stack. */
|
||||
ldmdb r1!, {r3-r11, lr} /* r3 contains CONTROL register. r4-r11 and LR restored. */
|
||||
msr control, r3
|
||||
str r1, [r2] /* Save the location where the context should be saved next as the first member of TCB. */
|
||||
|
||||
mov r0, #0
|
||||
msr basepri, r0
|
||||
bx r14
|
||||
bx lr
|
||||
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
|
|
|
@ -195,9 +195,45 @@ typedef struct MPU_REGION_REGISTERS
|
|||
uint32_t ulRegionAttribute;
|
||||
} xMPU_REGION_REGISTERS;
|
||||
|
||||
typedef struct MPU_REGION_SETTINGS
|
||||
{
|
||||
uint32_t ulRegionStartAddress;
|
||||
uint32_t ulRegionEndAddress;
|
||||
uint32_t ulRegionPermissions;
|
||||
} xMPU_REGION_SETTINGS;
|
||||
|
||||
#if ( configUSE_MPU_WRAPPERS_V1 == 0 )
|
||||
|
||||
#ifndef configSYSTEM_CALL_STACK_SIZE
|
||||
#error configSYSTEM_CALL_STACK_SIZE must be defined to the desired size of the system call stack in words for using MPU wrappers v2.
|
||||
#endif
|
||||
|
||||
typedef struct SYSTEM_CALL_STACK_INFO
|
||||
{
|
||||
uint32_t ulSystemCallStackBuffer[ configSYSTEM_CALL_STACK_SIZE ];
|
||||
uint32_t * pulSystemCallStack;
|
||||
uint32_t * pulTaskStack;
|
||||
uint32_t ulLinkRegisterAtSystemCallEntry;
|
||||
} xSYSTEM_CALL_STACK_INFO;
|
||||
|
||||
#endif /* configUSE_MPU_WRAPPERS_V1 == 0 */
|
||||
|
||||
#define MAX_CONTEXT_SIZE 52
|
||||
|
||||
/* Flags used for xMPU_SETTINGS.ulTaskFlags member. */
|
||||
#define portSTACK_FRAME_HAS_PADDING_FLAG ( 1UL << 0UL )
|
||||
#define portTASK_IS_PRIVILEGED_FLAG ( 1UL << 1UL )
|
||||
|
||||
typedef struct MPU_SETTINGS
|
||||
{
|
||||
xMPU_REGION_REGISTERS xRegion[ portTOTAL_NUM_REGIONS_IN_TCB ];
|
||||
xMPU_REGION_SETTINGS xRegionSettings[ portTOTAL_NUM_REGIONS_IN_TCB ];
|
||||
uint32_t ulContext[ MAX_CONTEXT_SIZE ];
|
||||
uint32_t ulTaskFlags;
|
||||
|
||||
#if ( configUSE_MPU_WRAPPERS_V1 == 0 )
|
||||
xSYSTEM_CALL_STACK_INFO xSystemCallStackInfo;
|
||||
#endif
|
||||
} xMPU_SETTINGS;
|
||||
|
||||
/* Architecture specifics. */
|
||||
|
@ -207,9 +243,12 @@ typedef struct MPU_SETTINGS
|
|||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* SVC numbers for various services. */
|
||||
#define portSVC_START_SCHEDULER 0
|
||||
#define portSVC_YIELD 1
|
||||
#define portSVC_RAISE_PRIVILEGE 2
|
||||
#define portSVC_START_SCHEDULER 0
|
||||
#define portSVC_YIELD 1
|
||||
#define portSVC_RAISE_PRIVILEGE 2
|
||||
#define portSVC_SYSTEM_CALL_ENTER 3 /* System calls with upto 4 parameters. */
|
||||
#define portSVC_SYSTEM_CALL_ENTER_1 4 /* System calls with 5 parameters. */
|
||||
#define portSVC_SYSTEM_CALL_EXIT 5
|
||||
|
||||
/* Scheduler utilities. */
|
||||
|
||||
|
@ -348,6 +387,16 @@ extern void vResetPrivilege( void );
|
|||
#define portRESET_PRIVILEGE() vResetPrivilege()
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
extern BaseType_t xPortIsTaskPrivileged( void );
|
||||
|
||||
/**
|
||||
* @brief Checks whether or not the calling task is privileged.
|
||||
*
|
||||
* @return pdTRUE if the calling task is privileged, pdFALSE otherwise.
|
||||
*/
|
||||
#define portIS_TASK_PRIVILEGED() xPortIsTaskPrivileged()
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
#ifndef configENFORCE_SYSTEM_CALLS_FROM_KERNEL_ONLY
|
||||
#warning "configENFORCE_SYSTEM_CALLS_FROM_KERNEL_ONLY is not defined. We recommend defining it to 1 in FreeRTOSConfig.h for better security. https://www.FreeRTOS.org/FreeRTOS-V10.3.x.html"
|
||||
#define configENFORCE_SYSTEM_CALLS_FROM_KERNEL_ONLY 0
|
||||
|
|
Loading…
Add table
Add a link
Reference in a new issue