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Revert formatting on SDCC ports (#885)
Co-authored-by: Rahul Kar <118818625+kar-rahul-aws@users.noreply.github.com> Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
This commit is contained in:
Soren Ptak
GitHub
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9a2ce912ff
commit
96cdeaa725
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@ -53,19 +53,19 @@
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#define portCLEAR_INTERRUPT_FLAG() TMR2CN &= ~0x80;
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/* Used during a context switch to store the size of the stack being copied
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* to or from XRAM. */
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to or from XRAM. */
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data static uint8_t ucStackBytes;
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/* Used during a context switch to point to the next byte in XRAM from/to which
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* a RAM byte is to be copied. */
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a RAM byte is to be copied. */
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xdata static StackType_t * data pxXRAMStack;
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/* Used during a context switch to point to the next byte in RAM from/to which
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* an XRAM byte is to be copied. */
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an XRAM byte is to be copied. */
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data static StackType_t * data pxRAMStack;
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/* We require the address of the pxCurrentTCB variable, but don't want to know
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* any details of its type. */
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any details of its type. */
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typedef void TCB_t;
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extern volatile TCB_t * volatile pxCurrentTCB;
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@ -76,7 +76,6 @@ extern volatile TCB_t * volatile pxCurrentTCB;
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static void prvSetupTimerInterrupt( void );
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/*-----------------------------------------------------------*/
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/*
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* Macro that copies the current stack from internal RAM to XRAM. This is
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* required as the 8051 only contains enough internal RAM for a single stack,
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@ -85,23 +84,23 @@ static void prvSetupTimerInterrupt( void );
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#define portCOPY_STACK_TO_XRAM() \
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{ \
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/* pxCurrentTCB points to a TCB which itself points to the location into \
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* which the first stack byte should be copied. Set pxXRAMStack to point \
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* to the location into which the first stack byte is to be copied. */ \
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which the first stack byte should be copied. Set pxXRAMStack to point \
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to the location into which the first stack byte is to be copied. */ \
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pxXRAMStack = ( xdata StackType_t * ) *( ( xdata StackType_t ** ) pxCurrentTCB ); \
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\
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/* Set pxRAMStack to point to the first byte to be coped from the stack. */ \
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pxRAMStack = ( data StackType_t * data ) configSTACK_START; \
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\
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/* Calculate the size of the stack we are about to copy from the current \
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* stack pointer value. */ \
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stack pointer value. */ \
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ucStackBytes = SP - ( configSTACK_START - 1 ); \
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\
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/* Before starting to copy the stack, store the calculated stack size so \
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* the stack can be restored when the task is resumed. */ \
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the stack can be restored when the task is resumed. */ \
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*pxXRAMStack = ucStackBytes; \
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\
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/* Copy each stack byte in turn. pxXRAMStack is incremented first as we \
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* have already stored the stack size into XRAM. */ \
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have already stored the stack size into XRAM. */ \
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while( ucStackBytes ) \
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{ \
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pxXRAMStack++; \
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@ -119,12 +118,12 @@ static void prvSetupTimerInterrupt( void );
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#define portCOPY_XRAM_TO_STACK() \
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{ \
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/* Setup the pointers as per portCOPY_STACK_TO_XRAM(), but this time to \
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* copy the data back out of XRAM and into the stack. */ \
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copy the data back out of XRAM and into the stack. */ \
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pxXRAMStack = ( xdata StackType_t * ) *( ( xdata StackType_t ** ) pxCurrentTCB ); \
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pxRAMStack = ( data StackType_t * data ) ( configSTACK_START - 1 ); \
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\
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/* The first value stored in XRAM was the size of the stack - i.e. the \
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* number of bytes we need to copy back. */ \
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number of bytes we need to copy back. */ \
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ucStackBytes = pxXRAMStack[ 0 ]; \
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\
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/* Copy the required number of bytes back into the stack. */ \
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@ -149,7 +148,7 @@ static void prvSetupTimerInterrupt( void );
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{ \
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_asm \
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/* Push ACC first, as when restoring the context it must be restored \
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* last (it is used to set the IE register). */ \
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last (it is used to set the IE register). */ \
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push ACC \
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/* Store the IE register then disable interrupts. */ \
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push IE \
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@ -195,8 +194,8 @@ static void prvSetupTimerInterrupt( void );
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pop DPH \
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pop DPL \
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/* The next byte of the stack is the IE register. Only the global \
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* enable bit forms part of the task context. Pop off the IE then set \
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* the global enable bit to match that of the stored IE register. */ \
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enable bit forms part of the task context. Pop off the IE then set \
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the global enable bit to match that of the stored IE register. */ \
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pop ACC \
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JB ACC.7,0098$ \
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CLR IE.7 \
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@ -214,9 +213,7 @@ static void prvSetupTimerInterrupt( void );
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/*
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* See header file for description.
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*/
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StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
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TaskFunction_t pxCode,
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void * pvParameters )
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StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters )
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{
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uint32_t ulAddress;
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StackType_t *pxStartOfStack;
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@ -226,19 +223,19 @@ StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
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pxTopOfStack++;
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/* Place a few bytes of known values on the bottom of the stack.
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* This is just useful for debugging and can be uncommented if required.
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This is just useful for debugging and can be uncommented if required.
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*pxTopOfStack = 0x11;
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* pxTopOfStack++;
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pxTopOfStack++;
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*pxTopOfStack = 0x22;
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* pxTopOfStack++;
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pxTopOfStack++;
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*pxTopOfStack = 0x33;
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* pxTopOfStack++;
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pxTopOfStack++;
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*/
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/* Simulate how the stack would look after a call to the scheduler tick
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* ISR.
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*
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* The return address that would have been pushed by the MCU. */
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ISR.
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The return address that would have been pushed by the MCU. */
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ulAddress = ( uint32_t ) pxCode;
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*pxTopOfStack = ( StackType_t ) ulAddress;
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ulAddress >>= 8;
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@ -255,7 +252,7 @@ StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
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pxTopOfStack++;
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/* The function parameters will be passed in the DPTR and B register as
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* a three byte generic pointer is used. */
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a three byte generic pointer is used. */
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ulAddress = ( uint32_t ) pvParameters;
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*pxTopOfStack = ( StackType_t ) ulAddress; /* DPL */
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ulAddress >>= 8;
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@ -288,13 +285,13 @@ StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
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*pxTopOfStack = 0xbb; /* BP */
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/* Dont increment the stack size here as we don't want to include
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* the stack size byte as part of the stack size count.
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*
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* Finally we place the stack size at the beginning. */
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the stack size byte as part of the stack size count.
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Finally we place the stack size at the beginning. */
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*pxStartOfStack = ( StackType_t ) ( pxTopOfStack - pxStartOfStack );
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/* Unlike most ports, we return the start of the stack as this is where the
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* size of the stack is stored. */
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size of the stack is stored. */
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return pxStartOfStack;
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}
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/*-----------------------------------------------------------*/
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@ -308,11 +305,11 @@ BaseType_t xPortStartScheduler( void )
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prvSetupTimerInterrupt();
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/* Make sure we start with the expected SFR page. This line should not
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* really be required. */
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really be required. */
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SFRPAGE = 0;
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/* Copy the stack for the first task to execute from XRAM into the stack,
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* restore the task context from the new stack, then start running the task. */
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restore the task context from the new stack, then start running the task. */
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portCOPY_XRAM_TO_STACK();
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portRESTORE_CONTEXT();
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@ -334,11 +331,11 @@ void vPortEndScheduler( void )
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void vPortYield( void ) _naked
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{
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/* Save the execution context onto the stack, then copy the entire stack
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* to XRAM. This is necessary as the internal RAM is only large enough to
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* hold one stack, and we want one per task.
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*
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* PERFORMANCE COULD BE IMPROVED BY ONLY COPYING TO XRAM IF A TASK SWITCH
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* IS REQUIRED. */
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to XRAM. This is necessary as the internal RAM is only large enough to
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hold one stack, and we want one per task.
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PERFORMANCE COULD BE IMPROVED BY ONLY COPYING TO XRAM IF A TASK SWITCH
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IS REQUIRED. */
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portSAVE_CONTEXT();
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portCOPY_STACK_TO_XRAM();
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@ -346,7 +343,7 @@ void vPortYield( void ) _naked
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vTaskSwitchContext();
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/* Copy the stack of the task about to execute from XRAM into RAM and
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* restore it's context ready to run on exiting. */
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restore it's context ready to run on exiting. */
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portCOPY_XRAM_TO_STACK();
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portRESTORE_CONTEXT();
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}
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@ -356,8 +353,8 @@ void vPortYield( void ) _naked
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void vTimer2ISR( void ) interrupt 5 _naked
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{
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/* Preemptive context switch function triggered by the timer 2 ISR.
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* This does the same as vPortYield() (see above) with the addition
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* of incrementing the RTOS tick count. */
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This does the same as vPortYield() (see above) with the addition
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of incrementing the RTOS tick count. */
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portSAVE_CONTEXT();
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portCOPY_STACK_TO_XRAM();
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@ -371,16 +368,16 @@ void vPortYield( void ) _naked
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portCOPY_XRAM_TO_STACK();
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portRESTORE_CONTEXT();
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}
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#else /* if configUSE_PREEMPTION == 1 */
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#else
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void vTimer2ISR( void ) interrupt 5
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{
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/* When using the cooperative scheduler the timer 2 ISR is only
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* required to increment the RTOS tick count. */
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required to increment the RTOS tick count. */
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xTaskIncrementTick();
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portCLEAR_INTERRUPT_FLAG();
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}
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#endif /* if configUSE_PREEMPTION == 1 */
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#endif
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/*-----------------------------------------------------------*/
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static void prvSetupTimerInterrupt( void )
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@ -397,7 +394,7 @@ static void prvSetupTimerInterrupt( void )
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/* NOTE: This uses a timer only present on 8052 architecture. */
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/* Remember the current SFR page so we can restore it at the end of the
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* function. */
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function. */
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ucOriginalSFRPage = SFRPAGE;
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SFRPAGE = 0;
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@ -416,7 +413,7 @@ static void prvSetupTimerInterrupt( void )
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IE |= portTIMER_2_INTERRUPT_ENABLE;
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/* Interrupts are disabled when this is called so the timer can be started
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* here. */
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here. */
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TMR2CN = portENABLE_TIMER;
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/* Restore the original SFR page. */
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@ -73,15 +73,13 @@ typedef unsigned char UBaseType_t;
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/*-----------------------------------------------------------*/
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/* Critical section management. */
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#define portENTER_CRITICAL() \
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_asm \
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#define portENTER_CRITICAL() _asm \
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push ACC \
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push IE \
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_endasm; \
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EA = 0;
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#define portEXIT_CRITICAL() \
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_asm \
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#define portEXIT_CRITICAL() _asm \
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pop ACC \
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_endasm; \
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ACC &= 0x80; \
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@ -105,8 +103,7 @@ void vPortYield( void ) _naked;
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#define portYIELD() vPortYield();
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/*-----------------------------------------------------------*/
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#define portNOP() \
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_asm \
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#define portNOP() _asm \
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nop \
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_endasm;
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