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Revert formatting on SDCC ports (#885)

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Co-authored-by: Rahul Kar <118818625+kar-rahul-aws@users.noreply.github.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
This commit is contained in:
Soren Ptak 2023-11-23 03:14:36 -08:00 committed by GitHub
parent 9a2ce912ff
commit 96cdeaa725
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2 changed files with 306 additions and 312 deletions
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87
portable/SDCC/Cygnal/port.c
View file

@ -53,19 +53,19 @@
#define portCLEAR_INTERRUPT_FLAG() TMR2CN &= ~0x80; #define portCLEAR_INTERRUPT_FLAG() TMR2CN &= ~0x80;
/* Used during a context switch to store the size of the stack being copied /* Used during a context switch to store the size of the stack being copied
* to or from XRAM. */ to or from XRAM. */
data static uint8_t ucStackBytes; data static uint8_t ucStackBytes;
/* Used during a context switch to point to the next byte in XRAM from/to which /* Used during a context switch to point to the next byte in XRAM from/to which
* a RAM byte is to be copied. */ a RAM byte is to be copied. */
xdata static StackType_t * data pxXRAMStack; xdata static StackType_t * data pxXRAMStack;
/* Used during a context switch to point to the next byte in RAM from/to which /* Used during a context switch to point to the next byte in RAM from/to which
* an XRAM byte is to be copied. */ an XRAM byte is to be copied. */
data static StackType_t * data pxRAMStack; data static StackType_t * data pxRAMStack;
/* We require the address of the pxCurrentTCB variable, but don't want to know /* We require the address of the pxCurrentTCB variable, but don't want to know
* any details of its type. */ any details of its type. */
typedef void TCB_t; typedef void TCB_t;
extern volatile TCB_t * volatile pxCurrentTCB; extern volatile TCB_t * volatile pxCurrentTCB;
@ -76,7 +76,6 @@ extern volatile TCB_t * volatile pxCurrentTCB;
static void prvSetupTimerInterrupt( void ); static void prvSetupTimerInterrupt( void );
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
/* /*
* Macro that copies the current stack from internal RAM to XRAM. This is * Macro that copies the current stack from internal RAM to XRAM. This is
* required as the 8051 only contains enough internal RAM for a single stack, * required as the 8051 only contains enough internal RAM for a single stack,
@ -85,23 +84,23 @@ static void prvSetupTimerInterrupt( void );
#define portCOPY_STACK_TO_XRAM() \ #define portCOPY_STACK_TO_XRAM() \
{ \ { \
/* pxCurrentTCB points to a TCB which itself points to the location into \ /* pxCurrentTCB points to a TCB which itself points to the location into \
* which the first stack byte should be copied. Set pxXRAMStack to point \ which the first stack byte should be copied. Set pxXRAMStack to point \
* to the location into which the first stack byte is to be copied. */ \ to the location into which the first stack byte is to be copied. */ \
pxXRAMStack = ( xdata StackType_t * ) *( ( xdata StackType_t ** ) pxCurrentTCB ); \ pxXRAMStack = ( xdata StackType_t * ) *( ( xdata StackType_t ** ) pxCurrentTCB ); \
\ \
/* Set pxRAMStack to point to the first byte to be coped from the stack. */ \ /* Set pxRAMStack to point to the first byte to be coped from the stack. */ \
pxRAMStack = ( data StackType_t * data ) configSTACK_START; \ pxRAMStack = ( data StackType_t * data ) configSTACK_START; \
\ \
/* Calculate the size of the stack we are about to copy from the current \ /* Calculate the size of the stack we are about to copy from the current \
* stack pointer value. */ \ stack pointer value. */ \
ucStackBytes = SP - ( configSTACK_START - 1 ); \ ucStackBytes = SP - ( configSTACK_START - 1 ); \
\ \
/* Before starting to copy the stack, store the calculated stack size so \ /* Before starting to copy the stack, store the calculated stack size so \
* the stack can be restored when the task is resumed. */ \ the stack can be restored when the task is resumed. */ \
*pxXRAMStack = ucStackBytes; \ *pxXRAMStack = ucStackBytes; \
\ \
/* Copy each stack byte in turn. pxXRAMStack is incremented first as we \ /* Copy each stack byte in turn. pxXRAMStack is incremented first as we \
* have already stored the stack size into XRAM. */ \ have already stored the stack size into XRAM. */ \
while( ucStackBytes ) \ while( ucStackBytes ) \
{ \ { \
pxXRAMStack++; \ pxXRAMStack++; \
@ -119,12 +118,12 @@ static void prvSetupTimerInterrupt( void );
#define portCOPY_XRAM_TO_STACK() \ #define portCOPY_XRAM_TO_STACK() \
{ \ { \
/* Setup the pointers as per portCOPY_STACK_TO_XRAM(), but this time to \ /* Setup the pointers as per portCOPY_STACK_TO_XRAM(), but this time to \
* copy the data back out of XRAM and into the stack. */ \ copy the data back out of XRAM and into the stack. */ \
pxXRAMStack = ( xdata StackType_t * ) *( ( xdata StackType_t ** ) pxCurrentTCB ); \ pxXRAMStack = ( xdata StackType_t * ) *( ( xdata StackType_t ** ) pxCurrentTCB ); \
pxRAMStack = ( data StackType_t * data ) ( configSTACK_START - 1 ); \ pxRAMStack = ( data StackType_t * data ) ( configSTACK_START - 1 ); \
\ \
/* The first value stored in XRAM was the size of the stack - i.e. the \ /* The first value stored in XRAM was the size of the stack - i.e. the \
* number of bytes we need to copy back. */ \ number of bytes we need to copy back. */ \
ucStackBytes = pxXRAMStack[ 0 ]; \ ucStackBytes = pxXRAMStack[ 0 ]; \
\ \
/* Copy the required number of bytes back into the stack. */ \ /* Copy the required number of bytes back into the stack. */ \
@ -149,7 +148,7 @@ static void prvSetupTimerInterrupt( void );
{ \ { \
_asm \ _asm \
/* Push ACC first, as when restoring the context it must be restored \ /* Push ACC first, as when restoring the context it must be restored \
* last (it is used to set the IE register). */ \ last (it is used to set the IE register). */ \
push ACC \ push ACC \
/* Store the IE register then disable interrupts. */ \ /* Store the IE register then disable interrupts. */ \
push IE \ push IE \
@ -195,8 +194,8 @@ static void prvSetupTimerInterrupt( void );
pop DPH \ pop DPH \
pop DPL \ pop DPL \
/* The next byte of the stack is the IE register. Only the global \ /* The next byte of the stack is the IE register. Only the global \
* enable bit forms part of the task context. Pop off the IE then set \ enable bit forms part of the task context. Pop off the IE then set \
* the global enable bit to match that of the stored IE register. */ \ the global enable bit to match that of the stored IE register. */ \
pop ACC \ pop ACC \
JB ACC.7,0098$ \ JB ACC.7,0098$ \
CLR IE.7 \ CLR IE.7 \
@ -214,9 +213,7 @@ static void prvSetupTimerInterrupt( void );
/* /*
* See header file for description. * See header file for description.
*/ */
StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack, StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters )
TaskFunction_t pxCode,
void * pvParameters )
{ {
uint32_t ulAddress; uint32_t ulAddress;
StackType_t *pxStartOfStack; StackType_t *pxStartOfStack;
@ -226,19 +223,19 @@ StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
pxTopOfStack++; pxTopOfStack++;
/* Place a few bytes of known values on the bottom of the stack. /* Place a few bytes of known values on the bottom of the stack.
* This is just useful for debugging and can be uncommented if required. This is just useful for debugging and can be uncommented if required.
*pxTopOfStack = 0x11; *pxTopOfStack = 0x11;
* pxTopOfStack++; pxTopOfStack++;
*pxTopOfStack = 0x22; *pxTopOfStack = 0x22;
* pxTopOfStack++; pxTopOfStack++;
*pxTopOfStack = 0x33; *pxTopOfStack = 0x33;
* pxTopOfStack++; pxTopOfStack++;
*/ */
/* Simulate how the stack would look after a call to the scheduler tick /* Simulate how the stack would look after a call to the scheduler tick
* ISR. ISR.
*
* The return address that would have been pushed by the MCU. */ The return address that would have been pushed by the MCU. */
ulAddress = ( uint32_t ) pxCode; ulAddress = ( uint32_t ) pxCode;
*pxTopOfStack = ( StackType_t ) ulAddress; *pxTopOfStack = ( StackType_t ) ulAddress;
ulAddress >>= 8; ulAddress >>= 8;
@ -255,7 +252,7 @@ StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
pxTopOfStack++; pxTopOfStack++;
/* The function parameters will be passed in the DPTR and B register as /* The function parameters will be passed in the DPTR and B register as
* a three byte generic pointer is used. */ a three byte generic pointer is used. */
ulAddress = ( uint32_t ) pvParameters; ulAddress = ( uint32_t ) pvParameters;
*pxTopOfStack = ( StackType_t ) ulAddress; /* DPL */ *pxTopOfStack = ( StackType_t ) ulAddress; /* DPL */
ulAddress >>= 8; ulAddress >>= 8;
@ -288,13 +285,13 @@ StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
*pxTopOfStack = 0xbb; /* BP */ *pxTopOfStack = 0xbb; /* BP */
/* Dont increment the stack size here as we don't want to include /* Dont increment the stack size here as we don't want to include
* the stack size byte as part of the stack size count. the stack size byte as part of the stack size count.
*
* Finally we place the stack size at the beginning. */ Finally we place the stack size at the beginning. */
*pxStartOfStack = ( StackType_t ) ( pxTopOfStack - pxStartOfStack ); *pxStartOfStack = ( StackType_t ) ( pxTopOfStack - pxStartOfStack );
/* Unlike most ports, we return the start of the stack as this is where the /* Unlike most ports, we return the start of the stack as this is where the
* size of the stack is stored. */ size of the stack is stored. */
return pxStartOfStack; return pxStartOfStack;
} }
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
@ -308,11 +305,11 @@ BaseType_t xPortStartScheduler( void )
prvSetupTimerInterrupt(); prvSetupTimerInterrupt();
/* Make sure we start with the expected SFR page. This line should not /* Make sure we start with the expected SFR page. This line should not
* really be required. */ really be required. */
SFRPAGE = 0; SFRPAGE = 0;
/* Copy the stack for the first task to execute from XRAM into the stack, /* Copy the stack for the first task to execute from XRAM into the stack,
* restore the task context from the new stack, then start running the task. */ restore the task context from the new stack, then start running the task. */
portCOPY_XRAM_TO_STACK(); portCOPY_XRAM_TO_STACK();
portRESTORE_CONTEXT(); portRESTORE_CONTEXT();
@ -334,11 +331,11 @@ void vPortEndScheduler( void )
void vPortYield( void ) _naked void vPortYield( void ) _naked
{ {
/* Save the execution context onto the stack, then copy the entire stack /* Save the execution context onto the stack, then copy the entire stack
* to XRAM. This is necessary as the internal RAM is only large enough to to XRAM. This is necessary as the internal RAM is only large enough to
* hold one stack, and we want one per task. hold one stack, and we want one per task.
*
* PERFORMANCE COULD BE IMPROVED BY ONLY COPYING TO XRAM IF A TASK SWITCH PERFORMANCE COULD BE IMPROVED BY ONLY COPYING TO XRAM IF A TASK SWITCH
* IS REQUIRED. */ IS REQUIRED. */
portSAVE_CONTEXT(); portSAVE_CONTEXT();
portCOPY_STACK_TO_XRAM(); portCOPY_STACK_TO_XRAM();
@ -346,7 +343,7 @@ void vPortYield( void ) _naked
vTaskSwitchContext(); vTaskSwitchContext();
/* Copy the stack of the task about to execute from XRAM into RAM and /* Copy the stack of the task about to execute from XRAM into RAM and
* restore it's context ready to run on exiting. */ restore it's context ready to run on exiting. */
portCOPY_XRAM_TO_STACK(); portCOPY_XRAM_TO_STACK();
portRESTORE_CONTEXT(); portRESTORE_CONTEXT();
} }
@ -356,8 +353,8 @@ void vPortYield( void ) _naked
void vTimer2ISR( void ) interrupt 5 _naked void vTimer2ISR( void ) interrupt 5 _naked
{ {
/* Preemptive context switch function triggered by the timer 2 ISR. /* Preemptive context switch function triggered by the timer 2 ISR.
* This does the same as vPortYield() (see above) with the addition This does the same as vPortYield() (see above) with the addition
* of incrementing the RTOS tick count. */ of incrementing the RTOS tick count. */
portSAVE_CONTEXT(); portSAVE_CONTEXT();
portCOPY_STACK_TO_XRAM(); portCOPY_STACK_TO_XRAM();
@ -371,16 +368,16 @@ void vPortYield( void ) _naked
portCOPY_XRAM_TO_STACK(); portCOPY_XRAM_TO_STACK();
portRESTORE_CONTEXT(); portRESTORE_CONTEXT();
} }
#else /* if configUSE_PREEMPTION == 1 */ #else
void vTimer2ISR( void ) interrupt 5 void vTimer2ISR( void ) interrupt 5
{ {
/* When using the cooperative scheduler the timer 2 ISR is only /* When using the cooperative scheduler the timer 2 ISR is only
* required to increment the RTOS tick count. */ required to increment the RTOS tick count. */
xTaskIncrementTick(); xTaskIncrementTick();
portCLEAR_INTERRUPT_FLAG(); portCLEAR_INTERRUPT_FLAG();
} }
#endif /* if configUSE_PREEMPTION == 1 */ #endif
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
static void prvSetupTimerInterrupt( void ) static void prvSetupTimerInterrupt( void )
@ -397,7 +394,7 @@ static void prvSetupTimerInterrupt( void )
/* NOTE: This uses a timer only present on 8052 architecture. */ /* NOTE: This uses a timer only present on 8052 architecture. */
/* Remember the current SFR page so we can restore it at the end of the /* Remember the current SFR page so we can restore it at the end of the
* function. */ function. */
ucOriginalSFRPage = SFRPAGE; ucOriginalSFRPage = SFRPAGE;
SFRPAGE = 0; SFRPAGE = 0;
@ -416,7 +413,7 @@ static void prvSetupTimerInterrupt( void )
IE |= portTIMER_2_INTERRUPT_ENABLE; IE |= portTIMER_2_INTERRUPT_ENABLE;
/* Interrupts are disabled when this is called so the timer can be started /* Interrupts are disabled when this is called so the timer can be started
* here. */ here. */
TMR2CN = portENABLE_TIMER; TMR2CN = portENABLE_TIMER;
/* Restore the original SFR page. */ /* Restore the original SFR page. */

9
portable/SDCC/Cygnal/portmacro.h
View file

@ -73,15 +73,13 @@ typedef unsigned char UBaseType_t;
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
/* Critical section management. */ /* Critical section management. */
#define portENTER_CRITICAL() \ #define portENTER_CRITICAL() _asm \
_asm \
push ACC \ push ACC \
push IE \ push IE \
_endasm; \ _endasm; \
EA = 0; EA = 0;
#define portEXIT_CRITICAL() \ #define portEXIT_CRITICAL() _asm \
_asm \
pop ACC \ pop ACC \
_endasm; \ _endasm; \
ACC &= 0x80; \ ACC &= 0x80; \
@ -105,8 +103,7 @@ void vPortYield( void ) _naked;
#define portYIELD() vPortYield(); #define portYIELD() vPortYield();
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
#define portNOP() \ #define portNOP() _asm \
_asm \
nop \ nop \
_endasm; _endasm;