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https://github.com/FreeRTOS/FreeRTOS-Kernel.git
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Merge branch 'main' into ARM_CRx_MPU
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commit
96ab824bb9
7 changed files with 40 additions and 13 deletions
5
.github/.cSpellWords.txt
vendored
5
.github/.cSpellWords.txt
vendored
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@ -698,6 +698,7 @@ TXUBR
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TXVC
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TXVDIS
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UDCP
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uncrustify
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UNDADD
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UNRE
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URAD
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@ -713,6 +714,10 @@ VDDCORE
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VECT
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VECTACTIVE
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VECTKEY
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visualisation
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vldmdbeq
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vldmia
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vldmiaeq
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VMSRNE
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VPOPNE
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VPUSHNE
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@ -509,12 +509,36 @@
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#endif /* configUSE_TIMERS */
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#ifndef portHAS_NESTED_INTERRUPTS
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#if defined( portSET_INTERRUPT_MASK_FROM_ISR ) && defined( portCLEAR_INTERRUPT_MASK_FROM_ISR )
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#define portHAS_NESTED_INTERRUPTS 1
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#else
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#define portHAS_NESTED_INTERRUPTS 0
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#endif
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#endif
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#ifndef portSET_INTERRUPT_MASK_FROM_ISR
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#define portSET_INTERRUPT_MASK_FROM_ISR() 0
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#if ( portHAS_NESTED_INTERRUPTS == 1 )
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#error portSET_INTERRUPT_MASK_FROM_ISR must be defined for ports that support nested interrupts (i.e. portHAS_NESTED_INTERRUPTS is set to 1)
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#else
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#define portSET_INTERRUPT_MASK_FROM_ISR() 0
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#endif
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#else
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#if ( portHAS_NESTED_INTERRUPTS == 0 )
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#error portSET_INTERRUPT_MASK_FROM_ISR must not be defined for ports that do not support nested interrupts (i.e. portHAS_NESTED_INTERRUPTS is set to 0)
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#endif
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#endif
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#ifndef portCLEAR_INTERRUPT_MASK_FROM_ISR
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#define portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedStatusValue ) ( void ) ( uxSavedStatusValue )
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#if ( portHAS_NESTED_INTERRUPTS == 1 )
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#error portCLEAR_INTERRUPT_MASK_FROM_ISR must be defined for ports that support nested interrupts (i.e. portHAS_NESTED_INTERRUPTS is set to 1)
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#else
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#define portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedStatusValue ) ( void ) ( uxSavedStatusValue )
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#endif
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#else
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#if ( portHAS_NESTED_INTERRUPTS == 0 )
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#error portCLEAR_INTERRUPT_MASK_FROM_ISR must not be defined for ports that do not support nested interrupts (i.e. portHAS_NESTED_INTERRUPTS is set to 0)
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#endif
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#endif
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#ifndef portCLEAN_UP_TCB
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@ -33,6 +33,14 @@
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* This file implements atomic functions by disabling interrupts globally.
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* Implementations with architecture specific atomic instructions can be
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* provided under each compiler directory.
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*
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* The atomic interface can be used in FreeRTOS tasks on all FreeRTOS ports. It
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* can also be used in Interrupt Service Routines (ISRs) on FreeRTOS ports that
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* support nested interrupts (i.e. portHAS_NESTED_INTERRUPTS is set to 1). The
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* atomic interface must not be used in ISRs on FreeRTOS ports that do not
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* support nested interrupts (i.e. portHAS_NESTED_INTERRUPTS is set to 0)
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* because ISRs on these ports cannot be interrupted and therefore, do not need
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* atomics in ISRs.
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*/
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#ifndef ATOMIC_H
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@ -59,7 +67,7 @@
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* ATOMIC_ENTER_CRITICAL().
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*
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*/
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#if defined( portSET_INTERRUPT_MASK_FROM_ISR )
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#if ( portHAS_NESTED_INTERRUPTS == 1 )
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/* Nested interrupt scheme is supported in this port. */
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#define ATOMIC_ENTER_CRITICAL() \
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@ -81,7 +81,6 @@ add_library(freertos_kernel_port STATIC
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# ARMv6-M / Cortex-M0 Raspberry PI RP2040 port for GCC
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$<$<STREQUAL:${FREERTOS_PORT},GCC_RP2040>:
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ThirdParty/GCC/RP2040/idle_task_static_memory.c
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ThirdParty/GCC/RP2040/port.c>
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# ARMv7-M ports for GCC
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@ -111,9 +111,6 @@ extern void vTaskSwitchContext( void );
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/* Critical section management. */
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#define portCRITICAL_NESTING_IN_TCB 0
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#define portSET_INTERRUPT_MASK_FROM_ISR() 0
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#define portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedStatusValue ) ( void ) uxSavedStatusValue
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#define portDISABLE_INTERRUPTS() __asm volatile ( "csrc mstatus, 8" )
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#define portENABLE_INTERRUPTS() __asm volatile ( "csrs mstatus, 8" )
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@ -113,9 +113,6 @@ extern void vTaskSwitchContext( void );
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/* Critical section management. */
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#define portCRITICAL_NESTING_IN_TCB 0
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#define portSET_INTERRUPT_MASK_FROM_ISR() 0
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#define portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedStatusValue ) ( void ) uxSavedStatusValue
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#define portDISABLE_INTERRUPTS() __disable_interrupt()
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#define portENABLE_INTERRUPTS() __enable_interrupt()
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@ -139,9 +139,6 @@
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#define portSET_INTERRUPT_MASK() rtos_interrupt_mask_all()
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#define portCLEAR_INTERRUPT_MASK( ulState ) rtos_interrupt_mask_set( ulState )
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#define portSET_INTERRUPT_MASK_FROM_ISR() ( 0 )
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#define portCLEAR_INTERRUPT_MASK_FROM_ISR( x ) ( ( void ) x )
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/*
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* Will enable interrupts if ulState is non-zero.
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*/
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