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https://github.com/FreeRTOS/FreeRTOS-Kernel.git
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Change interface between the MAC and uIP task in the RX62N/RDK/Renesas demo to use a queue in place of the binary semaphore. This is so the queue can be used to indicate the type of event that has occurred.
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@ -246,23 +246,29 @@ unsigned long ulBytesReceived;
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if( ulBytesReceived > 0 )
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{
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pxCurrentRxDesc->status &= ~( FP1 | FP0 );
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pxCurrentRxDesc->status |= ACT;
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/* Mark the pxDescriptor buffer as free as uip_buf is going to be set to
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the buffer that contains the received data. */
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prvReturnBuffer( uip_buf );
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/* Point uip_buf to the data about ot be processed. */
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uip_buf = ( void * ) pxCurrentRxDesc->buf_p;
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/* Allocate a new buffer to the descriptor, as uip_buf is now using it's
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old descriptor. */
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pxCurrentRxDesc->buf_p = prvGetNextBuffer();
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/* Prepare the descriptor to go again. */
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pxCurrentRxDesc->status &= ~( FP1 | FP0 );
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pxCurrentRxDesc->status |= ACT;
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/* Move onto the next buffer in the ring. */
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pxCurrentRxDesc = pxCurrentRxDesc->next;
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if( EDMAC.EDRRR.LONG == 0x00000000L )
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{
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/* Restart Ethernet if it has stopped */
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EDMAC.EDRRR.LONG = 0x00000001L;
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}
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/* Mark the pxDescriptor buffer as free as uip_buf is going to be set to
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the buffer that contains the received data. */
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prvReturnBuffer( uip_buf );
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uip_buf = ( void * ) pxCurrentRxDesc->buf_p;
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/* Move onto the next buffer in the ring. */
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pxCurrentRxDesc = pxCurrentRxDesc->next;
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}
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return ulBytesReceived;
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@ -504,7 +510,6 @@ static void prvConfigureEtherCAndEDMAC( void )
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/* Set the EDMAC interrupt priority. */
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_IPR( _ETHER_EINT ) = configKERNEL_INTERRUPT_PRIORITY;
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/* TODO: Check bit 5 */
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/* Enable interrupts of interest only. */
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EDMAC.EESIPR.LONG = emacTX_END_INTERRUPT | emacRX_END_INTERRUPT;
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ETHERC.RFLR.LONG = 1518; /* Ether payload is 1500+ CRC */
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@ -521,7 +526,8 @@ static void prvConfigureEtherCAndEDMAC( void )
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EDMAC.TFTR.LONG = 0x00000000; /* Threshold of Tx_FIFO */
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EDMAC.FDR.LONG = 0x00000000; /* Transmit fifo & receive fifo is 256 bytes */
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EDMAC.RMCR.LONG = 0x00000003; /* Receive function is normal mode(continued) */
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ETHERC.ECMR.BIT.PRM = 0; /* Ensure promiscuous mode is off. */
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/* Enable the interrupt... */
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_IEN( _ETHER_EINT ) = 1;
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}
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@ -532,19 +538,14 @@ void vEMAC_ISR_Handler( void )
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{
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unsigned long ul = EDMAC.EESR.LONG;
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long lHigherPriorityTaskWoken = pdFALSE;
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extern xSemaphoreHandle xEMACSemaphore;
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static long ulTxEndInts = 0;
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extern xQueueHandle xEMACEventQueue;
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const unsigned long ulRxEvent = uipETHERNET_RX_EVENT;
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/* Has a Tx end occurred? */
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if( ul & emacTX_END_INTERRUPT )
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{
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++ulTxEndInts;
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if( ulTxEndInts >= 2 )
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{
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/* Only return the buffer to the pool once both Txes have completed. */
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prvReturnBuffer( ( void * ) xTxDescriptors[ 0 ].buf_p );
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ulTxEndInts = 0;
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}
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/* Only return the buffer to the pool once both Txes have completed. */
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prvReturnBuffer( ( void * ) xTxDescriptors[ 0 ].buf_p );
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EDMAC.EESR.LONG = emacTX_END_INTERRUPT;
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}
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@ -552,7 +553,7 @@ static long ulTxEndInts = 0;
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if( ul & emacRX_END_INTERRUPT )
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{
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/* Make sure the Ethernet task is not blocked waiting for a packet. */
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xSemaphoreGiveFromISR( xEMACSemaphore, &lHigherPriorityTaskWoken );
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xQueueSendFromISR( xEMACEventQueue, &ulRxEvent, &lHigherPriorityTaskWoken );
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portYIELD_FROM_ISR( lHigherPriorityTaskWoken );
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EDMAC.EESR.LONG = emacRX_END_INTERRUPT;
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}
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