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Style: Make Renesas RXv3 DPFPU port layer consistent with uncrustify.

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Add '/* *INDENT-OFF* */' and '/* *INDENT-ON* */' around inline assembly code in C source files.
Add '; /* *INDENT-OFF* */' at the top of assembly source file.
Remove '1 tab == 4 spaces!'.
Change tab to spaces.
Beautification by uncrustify.
Beautification by hand (no conflict with uncrustify).
Fix inconsistency which I didn't notice at the commit 386d854: DFPU --> DPFPU.

No changes are caused in the MOT and SREC files which are built.
This commit is contained in:
NoMaY (a user of Japan.RenesasRulz.com) 2020-08-25 18:29:04 +09:00
parent 1d8df4752e
commit 968759135e
7 changed files with 803 additions and 783 deletions
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316
portable/GCC/RX700v3_DPFPU/port.c
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@ -22,14 +22,13 @@
* https://www.FreeRTOS.org * https://www.FreeRTOS.org
* https://github.com/FreeRTOS * https://github.com/FreeRTOS
* *
* 1 tab == 4 spaces!
*/ */
/*----------------------------------------------------------- /*-----------------------------------------------------------
* Implementation of functions defined in portable.h for the RXv3 DPFPU port. * Implementation of functions defined in portable.h for the RXv3 DPFPU port.
*----------------------------------------------------------*/ *----------------------------------------------------------*/
#warning Testing for DFPU support in this port is not yet complete #warning Testing for DPFPU support in this port is not yet complete
/* Scheduler includes. */ /* Scheduler includes. */
#include "FreeRTOS.h" #include "FreeRTOS.h"
@ -40,43 +39,39 @@
/* Hardware specifics. */ /* Hardware specifics. */
#if ( configINCLUDE_PLATFORM_H_INSTEAD_OF_IODEFINE_H == 1 ) #if ( configINCLUDE_PLATFORM_H_INSTEAD_OF_IODEFINE_H == 1 )
#include "platform.h" #include "platform.h"
#else
#else /* configINCLUDE_PLATFORM_H_INSTEAD_OF_IODEFINE_H */
#include "iodefine.h" #include "iodefine.h"
#endif
#endif /* configINCLUDE_PLATFORM_H_INSTEAD_OF_IODEFINE_H */
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
/* Tasks should start with interrupts enabled and in Supervisor mode, therefore /* Tasks should start with interrupts enabled and in Supervisor mode, therefore
* PSW is set with U and I set, and PM and IPL clear. */ * PSW is set with U and I set, and PM and IPL clear. */
#define portINITIAL_PSW ( ( StackType_t ) 0x00030000 ) #define portINITIAL_PSW ( ( StackType_t ) 0x00030000 )
#define portINITIAL_FPSW ( ( StackType_t ) 0x00000100 ) #define portINITIAL_FPSW ( ( StackType_t ) 0x00000100 )
#define portINITIAL_DPSW ( ( StackType_t ) 0x00000100 ) #define portINITIAL_DPSW ( ( StackType_t ) 0x00000100 )
#define portINITIAL_DCMR ( ( StackType_t ) 0x00000000 ) #define portINITIAL_DCMR ( ( StackType_t ) 0x00000000 )
#define portINITIAL_DECNT ( ( StackType_t ) 0x00000001 ) #define portINITIAL_DECNT ( ( StackType_t ) 0x00000001 )
/* Tasks are not created with a DPFPU context, but can be given a DPFPU context /* Tasks are not created with a DPFPU context, but can be given a DPFPU context
* after they have been created. A variable is stored as part of the tasks context * after they have been created. A variable is stored as part of the tasks context
* that holds portNO_DPFPU_CONTEXT if the task does not have a DPFPU context, or * that holds portNO_DPFPU_CONTEXT if the task does not have a DPFPU context, or
* any other value if the task does have a DPFPU context. */ * any other value if the task does have a DPFPU context. */
#define portNO_DPFPU_CONTEXT ( ( StackType_t ) 0 ) #define portNO_DPFPU_CONTEXT ( ( StackType_t ) 0 )
#define portHAS_DPFPU_CONTEXT ( ( StackType_t ) 1 ) #define portHAS_DPFPU_CONTEXT ( ( StackType_t ) 1 )
/* The space on the stack required to hold the DPFPU data registers. This is 16 /* The space on the stack required to hold the DPFPU data registers. This is 16
* 64-bit registers. */ * 64-bit registers. */
#define portDPFPU_DATA_REGISTER_WORDS ( 16 * 2 ) #define portDPFPU_DATA_REGISTER_WORDS ( 16 * 2 )
/* These macros allow a critical section to be added around the call to /* These macros allow a critical section to be added around the call to
* xTaskIncrementTick(), which is only ever called from interrupts at the kernel * xTaskIncrementTick(), which is only ever called from interrupts at the kernel
* priority - ie a known priority. Therefore these local macros are a slight * priority - ie a known priority. Therefore these local macros are a slight
* optimisation compared to calling the global SET/CLEAR_INTERRUPT_MASK macros, * optimisation compared to calling the global SET/CLEAR_INTERRUPT_MASK macros,
* which would require the old IPL to be read first and stored in a local variable. */ * which would require the old IPL to be read first and stored in a local variable. */
#define portMASK_INTERRUPTS_FROM_KERNEL_ISR() __asm volatile ( "MVTIPL %0" ::"i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY ) ) #define portMASK_INTERRUPTS_FROM_KERNEL_ISR() __asm volatile ( "MVTIPL %0" ::"i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY ) )
#define portUNMASK_INTERRUPTS_FROM_KERNEL_ISR() __asm volatile ( "MVTIPL %0" ::"i" ( configKERNEL_INTERRUPT_PRIORITY ) ) #define portUNMASK_INTERRUPTS_FROM_KERNEL_ISR() __asm volatile ( "MVTIPL %0" ::"i" ( configKERNEL_INTERRUPT_PRIORITY ) )
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
@ -96,11 +91,11 @@ static void prvStartFirstTask( void ) __attribute__( ( naked ) );
R_BSP_PRAGMA_INTERRUPT( vSoftwareInterruptISR, VECT( ICU, SWINT ) ) R_BSP_PRAGMA_INTERRUPT( vSoftwareInterruptISR, VECT( ICU, SWINT ) )
R_BSP_ATTRIB_INTERRUPT void vSoftwareInterruptISR( void ) __attribute__( ( naked ) ); R_BSP_ATTRIB_INTERRUPT void vSoftwareInterruptISR( void ) __attribute__( ( naked ) );
#else /* configINCLUDE_PLATFORM_H_INSTEAD_OF_IODEFINE_H */ #else
void vSoftwareInterruptISR( void ) __attribute__( ( naked ) ); void vSoftwareInterruptISR( void ) __attribute__( ( naked ) );
#endif /* configINCLUDE_PLATFORM_H_INSTEAD_OF_IODEFINE_H */ #endif
/* /*
* The tick ISR handler. The peripheral used is configured by the application * The tick ISR handler. The peripheral used is configured by the application
@ -111,11 +106,11 @@ static void prvStartFirstTask( void ) __attribute__( ( naked ) );
R_BSP_PRAGMA_INTERRUPT( vTickISR, _VECT( configTICK_VECTOR ) ) R_BSP_PRAGMA_INTERRUPT( vTickISR, _VECT( configTICK_VECTOR ) )
R_BSP_ATTRIB_INTERRUPT void vTickISR( void ); /* Do not add __attribute__( ( interrupt ) ). */ R_BSP_ATTRIB_INTERRUPT void vTickISR( void ); /* Do not add __attribute__( ( interrupt ) ). */
#else /* configINCLUDE_PLATFORM_H_INSTEAD_OF_IODEFINE_H */ #else
void vTickISR( void ) __attribute__( ( interrupt ) ); void vTickISR( void ) __attribute__( ( interrupt ) );
#endif /* configINCLUDE_PLATFORM_H_INSTEAD_OF_IODEFINE_H */ #endif
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
@ -125,7 +120,7 @@ static void prvStartFirstTask( void ) __attribute__( ( naked ) );
StackType_t ulPortTaskHasDPFPUContext = portNO_DPFPU_CONTEXT; StackType_t ulPortTaskHasDPFPUContext = portNO_DPFPU_CONTEXT;
#endif /* configUSE_TASK_DPFPU_SUPPORT */ #endif
/* This is accessed by the inline assembler functions so is file scope for /* This is accessed by the inline assembler functions so is file scope for
* convenience. */ * convenience. */
@ -221,37 +216,37 @@ StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
#ifdef USE_FULL_REGISTER_INITIALISATION #ifdef USE_FULL_REGISTER_INITIALISATION
{ {
pxTopOfStack -= 2; pxTopOfStack -= 2;
*(double *)pxTopOfStack = 1515.1515; /* DR15. */ *( double * ) pxTopOfStack = 1515.1515; /* DR15. */
pxTopOfStack -= 2; pxTopOfStack -= 2;
*(double *)pxTopOfStack = 1414.1414; /* DR14. */ *( double * ) pxTopOfStack = 1414.1414; /* DR14. */
pxTopOfStack -= 2; pxTopOfStack -= 2;
*(double *)pxTopOfStack = 1313.1313; /* DR13. */ *( double * ) pxTopOfStack = 1313.1313; /* DR13. */
pxTopOfStack -= 2; pxTopOfStack -= 2;
*(double *)pxTopOfStack = 1212.1212; /* DR12. */ *( double * ) pxTopOfStack = 1212.1212; /* DR12. */
pxTopOfStack -= 2; pxTopOfStack -= 2;
*(double *)pxTopOfStack = 1111.1111; /* DR11. */ *( double * ) pxTopOfStack = 1111.1111; /* DR11. */
pxTopOfStack -= 2; pxTopOfStack -= 2;
*(double *)pxTopOfStack = 1010.1010; /* DR10. */ *( double * ) pxTopOfStack = 1010.1010; /* DR10. */
pxTopOfStack -= 2; pxTopOfStack -= 2;
*(double *)pxTopOfStack = 909.0909; /* DR9. */ *( double * ) pxTopOfStack = 909.0909; /* DR9. */
pxTopOfStack -= 2; pxTopOfStack -= 2;
*(double *)pxTopOfStack = 808.0808; /* DR8. */ *( double * ) pxTopOfStack = 808.0808; /* DR8. */
pxTopOfStack -= 2; pxTopOfStack -= 2;
*(double *)pxTopOfStack = 707.0707; /* DR7. */ *( double * ) pxTopOfStack = 707.0707; /* DR7. */
pxTopOfStack -= 2; pxTopOfStack -= 2;
*(double *)pxTopOfStack = 606.0606; /* DR6. */ *( double * ) pxTopOfStack = 606.0606; /* DR6. */
pxTopOfStack -= 2; pxTopOfStack -= 2;
*(double *)pxTopOfStack = 505.0505; /* DR5. */ *( double * ) pxTopOfStack = 505.0505; /* DR5. */
pxTopOfStack -= 2; pxTopOfStack -= 2;
*(double *)pxTopOfStack = 404.0404; /* DR4. */ *( double * ) pxTopOfStack = 404.0404; /* DR4. */
pxTopOfStack -= 2; pxTopOfStack -= 2;
*(double *)pxTopOfStack = 303.0303; /* DR3. */ *( double * ) pxTopOfStack = 303.0303; /* DR3. */
pxTopOfStack -= 2; pxTopOfStack -= 2;
*(double *)pxTopOfStack = 202.0202; /* DR2. */ *( double * ) pxTopOfStack = 202.0202; /* DR2. */
pxTopOfStack -= 2; pxTopOfStack -= 2;
*(double *)pxTopOfStack = 101.0101; /* DR1. */ *( double * ) pxTopOfStack = 101.0101; /* DR1. */
pxTopOfStack -= 2; pxTopOfStack -= 2;
*(double *)pxTopOfStack = 9876.54321;/* DR0. */ *( double * ) pxTopOfStack = 9876.54321; /* DR0. */
} }
#else /* ifdef USE_FULL_REGISTER_INITIALISATION */ #else /* ifdef USE_FULL_REGISTER_INITIALISATION */
{ {
@ -270,11 +265,11 @@ StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
{ {
/* Omit DPFPU support. */ /* Omit DPFPU support. */
} }
#else /* if ( configUSE_TASK_DPFPU_SUPPORT == 1 ) */ #else /* configUSE_TASK_DPFPU_SUPPORT */
{ {
#error Invalid configUSE_TASK_DPFPU_SUPPORT setting - configUSE_TASK_DPFPU_SUPPORT must be set to 0, 1, 2, or left undefined. #error Invalid configUSE_TASK_DPFPU_SUPPORT setting - configUSE_TASK_DPFPU_SUPPORT must be set to 0, 1, 2, or left undefined.
} }
#endif /* if ( configUSE_TASK_DPFPU_SUPPORT == 1 ) */ #endif /* configUSE_TASK_DPFPU_SUPPORT */
return pxTopOfStack; return pxTopOfStack;
} }
@ -334,18 +329,19 @@ static void prvStartFirstTask( void )
{ {
__asm volatile __asm volatile
( (
/* *INDENT-OFF* */
/* When starting the scheduler there is nothing that needs moving to the /* When starting the scheduler there is nothing that needs moving to the
* interrupt stack because the function is not called from an interrupt. * interrupt stack because the function is not called from an interrupt.
* Just ensure the current stack is the user stack. */ * Just ensure the current stack is the user stack. */
"SETPSW U \n"\ "SETPSW U \n"\
/* Obtain the location of the stack associated with which ever task /* Obtain the location of the stack associated with which ever task
* pxCurrentTCB is currently pointing to. */ * pxCurrentTCB is currently pointing to. */
"MOV.L #_pxCurrentTCB, R15 \n"\ "MOV.L #_pxCurrentTCB, R15 \n"\
"MOV.L [R15], R15 \n"\ "MOV.L [ R15 ], R15 \n"\
"MOV.L [R15], R0 \n"\ "MOV.L [ R15 ], R0 \n"\
/* Restore the registers from the stack of the task pointed to by /* Restore the registers from the stack of the task pointed to by
@ -355,54 +351,56 @@ static void prvStartFirstTask( void )
/* The restored ulPortTaskHasDPFPUContext is to be zero here. /* The restored ulPortTaskHasDPFPUContext is to be zero here.
* So, it is never necessary to restore the DPFPU context here. */ * So, it is never necessary to restore the DPFPU context here. */
"POP R15 \n"\ "POP R15 \n"\
"MOV.L #_ulPortTaskHasDPFPUContext, R14 \n"\ "MOV.L #_ulPortTaskHasDPFPUContext, R14 \n"\
"MOV.L R15, [R14] \n"\ "MOV.L R15, [ R14 ] \n"\
#elif ( configUSE_TASK_DPFPU_SUPPORT == 2 ) #elif ( configUSE_TASK_DPFPU_SUPPORT == 2 )
/* Restore the DPFPU context. */ /* Restore the DPFPU context. */
"DPOPM.L DPSW-DECNT \n"\ "DPOPM.L DPSW-DECNT \n"\
"DPOPM.D DR0-DR15 \n"\ "DPOPM.D DR0-DR15 \n"\
#endif /* if ( configUSE_TASK_DPFPU_SUPPORT == 1 ) */ #endif /* configUSE_TASK_DPFPU_SUPPORT */
"POP R15 \n"\ "POP R15 \n"\
/* Accumulator low 32 bits. */ /* Accumulator low 32 bits. */
"MVTACLO R15, A0 \n"\ "MVTACLO R15, A0 \n"\
"POP R15 \n"\ "POP R15 \n"\
/* Accumulator high 32 bits. */ /* Accumulator high 32 bits. */
"MVTACHI R15, A0 \n"\ "MVTACHI R15, A0 \n"\
"POP R15 \n"\ "POP R15 \n"\
/* Accumulator guard. */ /* Accumulator guard. */
"MVTACGU R15, A0 \n"\ "MVTACGU R15, A0 \n"\
"POP R15 \n"\ "POP R15 \n"\
/* Accumulator low 32 bits. */ /* Accumulator low 32 bits. */
"MVTACLO R15, A1 \n"\ "MVTACLO R15, A1 \n"\
"POP R15 \n"\ "POP R15 \n"\
/* Accumulator high 32 bits. */ /* Accumulator high 32 bits. */
"MVTACHI R15, A1 \n"\ "MVTACHI R15, A1 \n"\
"POP R15 \n"\ "POP R15 \n"\
/* Accumulator guard. */ /* Accumulator guard. */
"MVTACGU R15, A1 \n"\ "MVTACGU R15, A1 \n"\
"POP R15 \n"\ "POP R15 \n"\
/* Floating point status word. */ /* Floating point status word. */
"MVTC R15, FPSW \n"\ "MVTC R15, FPSW \n"\
/* R1 to R15 - R0 is not included as it is the SP. */ /* R1 to R15 - R0 is not included as it is the SP. */
"POPM R1-R15 \n"\ "POPM R1-R15 \n"\
/* This pops the remaining registers. */ /* This pops the remaining registers. */
"RTE \n"\ "RTE \n"\
"NOP \n"\ "NOP \n"\
"NOP \n" "NOP "
/* *INDENT-ON* */
); );
} }
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
@ -411,101 +409,103 @@ void vSoftwareInterruptISR( void )
{ {
__asm volatile __asm volatile
( (
/* *INDENT-OFF* */
/* Re-enable interrupts. */ /* Re-enable interrupts. */
"SETPSW I \n"\ "SETPSW I \n"\
/* Move the data that was automatically pushed onto the interrupt stack when /* Move the data that was automatically pushed onto the interrupt stack when
* the interrupt occurred from the interrupt stack to the user stack. * the interrupt occurred from the interrupt stack to the user stack.
* *
* R15 is saved before it is clobbered. */ * R15 is saved before it is clobbered. */
"PUSH.L R15 \n"\ "PUSH.L R15 \n"\
/* Read the user stack pointer. */ /* Read the user stack pointer. */
"MVFC USP, R15 \n"\ "MVFC USP, R15 \n"\
/* Move the address down to the data being moved. */ /* Move the address down to the data being moved. */
"SUB #12, R15 \n"\ "SUB #12, R15 \n"\
"MVTC R15, USP \n"\ "MVTC R15, USP \n"\
/* Copy the data across, R15, then PC, then PSW. */ /* Copy the data across, R15, then PC, then PSW. */
"MOV.L [ R0 ], [ R15 ] \n"\ "MOV.L [ R0 ], [ R15 ] \n"\
"MOV.L 4[ R0 ], 4[ R15 ] \n"\ "MOV.L 4[ R0 ], 4[ R15 ] \n"\
"MOV.L 8[ R0 ], 8[ R15 ] \n"\ "MOV.L 8[ R0 ], 8[ R15 ] \n"\
/* Move the interrupt stack pointer to its new correct position. */ /* Move the interrupt stack pointer to its new correct position. */
"ADD #12, R0 \n"\ "ADD #12, R0 \n"\
/* All the rest of the registers are saved directly to the user stack. */ /* All the rest of the registers are saved directly to the user stack. */
"SETPSW U \n"\ "SETPSW U \n"\
/* Save the rest of the general registers (R15 has been saved already). */ /* Save the rest of the general registers (R15 has been saved already). */
"PUSHM R1-R14 \n"\ "PUSHM R1-R14 \n"\
/* Save the FPSW and accumulators. */ /* Save the FPSW and accumulators. */
"MVFC FPSW, R15 \n"\ "MVFC FPSW, R15 \n"\
"PUSH.L R15 \n"\ "PUSH.L R15 \n"\
"MVFACGU #0, A1, R15 \n"\ "MVFACGU #0, A1, R15 \n"\
"PUSH.L R15 \n"\ "PUSH.L R15 \n"\
"MVFACHI #0, A1, R15 \n"\ "MVFACHI #0, A1, R15 \n"\
"PUSH.L R15 \n"\ "PUSH.L R15 \n"\
"MVFACLO #0, A1, R15 \n" /* Low order word. */ \ "MVFACLO #0, A1, R15 \n" /* Low order word. */ \
"PUSH.L R15 \n"\ "PUSH.L R15 \n"\
"MVFACGU #0, A0, R15 \n"\ "MVFACGU #0, A0, R15 \n"\
"PUSH.L R15 \n"\ "PUSH.L R15 \n"\
"MVFACHI #0, A0, R15 \n"\ "MVFACHI #0, A0, R15 \n"\
"PUSH.L R15 \n"\ "PUSH.L R15 \n"\
"MVFACLO #0, A0, R15 \n" /* Low order word. */ \ "MVFACLO #0, A0, R15 \n" /* Low order word. */ \
"PUSH.L R15 \n"\ "PUSH.L R15 \n"\
#if ( configUSE_TASK_DPFPU_SUPPORT == 1 ) #if ( configUSE_TASK_DPFPU_SUPPORT == 1 )
/* Does the task have a DPFPU context that needs saving? If /* Does the task have a DPFPU context that needs saving? If
* ulPortTaskHasDPFPUContext is 0 then no. */ * ulPortTaskHasDPFPUContext is 0 then no. */
"MOV.L #_ulPortTaskHasDPFPUContext, R15 \n"\ "MOV.L #_ulPortTaskHasDPFPUContext, R15 \n"\
"MOV.L [R15], R15 \n"\ "MOV.L [ R15 ], R15 \n"\
"CMP #0, R15 \n"\ "CMP #0, R15 \n"\
/* Save the DPFPU context, if any. */ /* Save the DPFPU context, if any. */
"BEQ.B ?+ \n"\ "BEQ.B ?+ \n"\
"DPUSHM.D DR0-DR15 \n"\ "DPUSHM.D DR0-DR15 \n"\
"DPUSHM.L DPSW-DECNT \n"\ "DPUSHM.L DPSW-DECNT \n"\
"?: \n"\ "?: \n"\
/* Save ulPortTaskHasDPFPUContext itself. */ /* Save ulPortTaskHasDPFPUContext itself. */
"PUSH.L R15 \n"\ "PUSH.L R15 \n"\
#elif ( configUSE_TASK_DPFPU_SUPPORT == 2 ) #elif ( configUSE_TASK_DPFPU_SUPPORT == 2 )
/* Save the DPFPU context, always. */ /* Save the DPFPU context, always. */
"DPUSHM.D DR0-DR15 \n"\ "DPUSHM.D DR0-DR15 \n"\
"DPUSHM.L DPSW-DECNT \n"\ "DPUSHM.L DPSW-DECNT \n"\
#endif /* if ( configUSE_TASK_DPFPU_SUPPORT == 1 ) */ #endif /* configUSE_TASK_DPFPU_SUPPORT */
/* Save the stack pointer to the TCB. */ /* Save the stack pointer to the TCB. */
"MOV.L #_pxCurrentTCB, R15 \n"\ "MOV.L #_pxCurrentTCB, R15 \n"\
"MOV.L [ R15 ], R15 \n"\ "MOV.L [ R15 ], R15 \n"\
"MOV.L R0, [ R15 ] \n"\ "MOV.L R0, [ R15 ] \n"\
/* Ensure the interrupt mask is set to the syscall priority while the kernel /* Ensure the interrupt mask is set to the syscall priority while the kernel
* structures are being accessed. */ * structures are being accessed. */
"MVTIPL %0 \n"\ "MVTIPL %0 \n"\
/* Select the next task to run. */ /* Select the next task to run. */
"BSR.A _vTaskSwitchContext \n"\ "BSR.A _vTaskSwitchContext \n"\
/* Reset the interrupt mask as no more data structure access is required. */ /* Reset the interrupt mask as no more data structure access is required. */
"MVTIPL %1 \n"\ "MVTIPL %1 \n"\
/* Load the stack pointer of the task that is now selected as the Running /* Load the stack pointer of the task that is now selected as the Running
* state task from its TCB. */ * state task from its TCB. */
"MOV.L #_pxCurrentTCB,R15 \n"\ "MOV.L #_pxCurrentTCB, R15 \n"\
"MOV.L [ R15 ], R15 \n"\ "MOV.L [ R15 ], R15 \n"\
"MOV.L [ R15 ], R0 \n"\ "MOV.L [ R15 ], R0 \n"\
/* Restore the context of the new task. The PSW (Program Status Word) and /* Restore the context of the new task. The PSW (Program Status Word) and
@ -515,56 +515,58 @@ void vSoftwareInterruptISR( void )
/* Is there a DPFPU context to restore? If the restored /* Is there a DPFPU context to restore? If the restored
* ulPortTaskHasDPFPUContext is zero then no. */ * ulPortTaskHasDPFPUContext is zero then no. */
"POP R15 \n"\ "POP R15 \n"\
"MOV.L #_ulPortTaskHasDPFPUContext, R14 \n"\ "MOV.L #_ulPortTaskHasDPFPUContext, R14 \n"\
"MOV.L R15, [R14] \n"\ "MOV.L R15, [ R14 ] \n"\
"CMP #0, R15 \n"\ "CMP #0, R15 \n"\
/* Restore the DPFPU context, if any. */ /* Restore the DPFPU context, if any. */
"BEQ.B ?+ \n"\ "BEQ.B ?+ \n"\
"DPOPM.L DPSW-DECNT \n"\ "DPOPM.L DPSW-DECNT \n"\
"DPOPM.D DR0-DR15 \n"\ "DPOPM.D DR0-DR15 \n"\
"?: \n"\ "?: \n"\
#elif ( configUSE_TASK_DPFPU_SUPPORT == 2 ) #elif ( configUSE_TASK_DPFPU_SUPPORT == 2 )
/* Restore the DPFPU context, always. */ /* Restore the DPFPU context, always. */
"DPOPM.L DPSW-DECNT \n"\ "DPOPM.L DPSW-DECNT \n"\
"DPOPM.D DR0-DR15 \n"\ "DPOPM.D DR0-DR15 \n"\
#endif /* if( configUSE_TASK_DPFPU_SUPPORT == 1 ) */ #endif /* configUSE_TASK_DPFPU_SUPPORT */
"POP R15 \n"\ "POP R15 \n"\
/* Accumulator low 32 bits. */ /* Accumulator low 32 bits. */
"MVTACLO R15, A0 \n"\ "MVTACLO R15, A0 \n"\
"POP R15 \n"\ "POP R15 \n"\
/* Accumulator high 32 bits. */ /* Accumulator high 32 bits. */
"MVTACHI R15, A0 \n"\ "MVTACHI R15, A0 \n"\
"POP R15 \n"\ "POP R15 \n"\
/* Accumulator guard. */ /* Accumulator guard. */
"MVTACGU R15, A0 \n"\ "MVTACGU R15, A0 \n"\
"POP R15 \n"\ "POP R15 \n"\
/* Accumulator low 32 bits. */ /* Accumulator low 32 bits. */
"MVTACLO R15, A1 \n"\ "MVTACLO R15, A1 \n"\
"POP R15 \n"\ "POP R15 \n"\
/* Accumulator high 32 bits. */ /* Accumulator high 32 bits. */
"MVTACHI R15, A1 \n"\ "MVTACHI R15, A1 \n"\
"POP R15 \n"\ "POP R15 \n"\
/* Accumulator guard. */ /* Accumulator guard. */
"MVTACGU R15, A1 \n"\ "MVTACGU R15, A1 \n"\
"POP R15 \n"\ "POP R15 \n"\
"MVTC R15, FPSW \n"\ "MVTC R15, FPSW \n"\
"POPM R1-R15 \n"\ "POPM R1-R15 \n"\
"RTE \n"\ "RTE \n"\
"NOP \n"\ "NOP \n"\
"NOP " "NOP "
::"i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY ), "i" ( configKERNEL_INTERRUPT_PRIORITY ) ::"i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY ), "i" ( configKERNEL_INTERRUPT_PRIORITY )
/* *INDENT-ON* */
); );
} }
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
@ -572,7 +574,7 @@ void vSoftwareInterruptISR( void )
void vTickISR( void ) void vTickISR( void )
{ {
/* Re-enabled interrupts. */ /* Re-enabled interrupts. */
__asm volatile ( "SETPSW I"); __asm volatile ( "SETPSW I" );
/* Increment the tick, and perform any processing the new tick value /* Increment the tick, and perform any processing the new tick value
* necessitates. Ensure IPL is at the max syscall value first. */ * necessitates. Ensure IPL is at the max syscall value first. */
@ -591,9 +593,11 @@ uint32_t ulPortGetIPL( void )
{ {
__asm volatile __asm volatile
( (
"MVFC PSW, R1 \n"\ /* *INDENT-OFF* */
"SHLR #24, R1 \n"\ "MVFC PSW, R1 \n"\
"RTS " "SHLR #24, R1 \n"\
"RTS "
/* *INDENT-ON* */
); );
/* This will never get executed, but keeps the compiler from complaining. */ /* This will never get executed, but keeps the compiler from complaining. */
@ -608,14 +612,16 @@ void vPortSetIPL( uint32_t ulNewIPL )
__asm volatile __asm volatile
( (
"PUSH R5 \n"\ /* *INDENT-OFF* */
"MVFC PSW, R5 \n"\ "PUSH R5 \n"\
"SHLL #24, R1 \n"\ "MVFC PSW, R5 \n"\
"AND #-0F000001H, R5 \n"\ "SHLL #24, R1 \n"\
"OR R1, R5 \n"\ "AND #-0F000001H, R5 \n"\
"MVTC R5, PSW \n"\ "OR R1, R5 \n"\
"POP R5 \n"\ "MVTC R5, PSW \n"\
"RTS " "POP R5 \n"\
"RTS "
/* *INDENT-ON* */
); );
} }
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/

171
portable/GCC/RX700v3_DPFPU/portmacro.h
View file

@ -22,16 +22,16 @@
* https://www.FreeRTOS.org * https://www.FreeRTOS.org
* https://github.com/FreeRTOS * https://github.com/FreeRTOS
* *
* 1 tab == 4 spaces!
*/ */
#ifndef PORTMACRO_H #ifndef PORTMACRO_H
#define PORTMACRO_H #define PORTMACRO_H
#ifdef __cplusplus /* *INDENT-OFF* */
extern "C" { #ifdef __cplusplus
#endif extern "C" {
#endif
/* *INDENT-ON* */
/*----------------------------------------------------------- /*-----------------------------------------------------------
* Port specific definitions. * Port specific definitions.
@ -43,11 +43,11 @@
*----------------------------------------------------------- *-----------------------------------------------------------
*/ */
/* When the FIT configurator or the Smart Configurator is used, platform.h has to be /* When the FIT configurator or the Smart Configurator is used, platform.h has to be
* used. */ * used. */
#ifndef configINCLUDE_PLATFORM_H_INSTEAD_OF_IODEFINE_H #ifndef configINCLUDE_PLATFORM_H_INSTEAD_OF_IODEFINE_H
#define configINCLUDE_PLATFORM_H_INSTEAD_OF_IODEFINE_H 0 #define configINCLUDE_PLATFORM_H_INSTEAD_OF_IODEFINE_H 0
#endif #endif
/* If configUSE_TASK_DPFPU_SUPPORT is set to 1 (or undefined) then each task will /* If configUSE_TASK_DPFPU_SUPPORT is set to 1 (or undefined) then each task will
* be created without a DPFPU context, and a task must call vTaskUsesDPFPU() before * be created without a DPFPU context, and a task must call vTaskUsesDPFPU() before
@ -55,110 +55,112 @@
* tasks are created with a DPFPU context by default, and calling vTaskUsesDPFPU() has * tasks are created with a DPFPU context by default, and calling vTaskUsesDPFPU() has
* no effect. If configUSE_TASK_DPFPU_SUPPORT is set to 0 then tasks never take care * no effect. If configUSE_TASK_DPFPU_SUPPORT is set to 0 then tasks never take care
* of any DPFPU context (even if DPFPU registers are used). */ * of any DPFPU context (even if DPFPU registers are used). */
#ifndef configUSE_TASK_DPFPU_SUPPORT #ifndef configUSE_TASK_DPFPU_SUPPORT
#define configUSE_TASK_DPFPU_SUPPORT 1 #define configUSE_TASK_DPFPU_SUPPORT 1
#endif #endif
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
/* Type definitions - these are a bit legacy and not really used now, other than /* Type definitions - these are a bit legacy and not really used now, other than
* portSTACK_TYPE and portBASE_TYPE. */ * portSTACK_TYPE and portBASE_TYPE. */
#define portCHAR char #define portCHAR char
#define portFLOAT float #define portFLOAT float
#define portDOUBLE double #define portDOUBLE double
#define portLONG long #define portLONG long
#define portSHORT short #define portSHORT short
#define portSTACK_TYPE uint32_t #define portSTACK_TYPE uint32_t
#define portBASE_TYPE long #define portBASE_TYPE long
typedef portSTACK_TYPE StackType_t; typedef portSTACK_TYPE StackType_t;
typedef long BaseType_t; typedef long BaseType_t;
typedef unsigned long UBaseType_t; typedef unsigned long UBaseType_t;
#if ( configUSE_16_BIT_TICKS == 1 ) #if ( configUSE_16_BIT_TICKS == 1 )
typedef uint16_t TickType_t; typedef uint16_t TickType_t;
#define portMAX_DELAY ( TickType_t ) 0xffff #define portMAX_DELAY ( TickType_t ) 0xffff
#else #else
typedef uint32_t TickType_t; typedef uint32_t TickType_t;
#define portMAX_DELAY ( TickType_t ) 0xffffffffUL #define portMAX_DELAY ( TickType_t ) 0xffffffffUL
/* 32-bit tick type on a 32-bit architecture, so reads of the tick count do /* 32-bit tick type on a 32-bit architecture, so reads of the tick count do
* not need to be guarded with a critical section. */ * not need to be guarded with a critical section. */
#define portTICK_TYPE_IS_ATOMIC 1 #define portTICK_TYPE_IS_ATOMIC 1
#endif #endif
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
/* Hardware specifics. */ /* Hardware specifics. */
#define portBYTE_ALIGNMENT 8 /* Could make four, according to manual. */ #define portBYTE_ALIGNMENT 8 /* Could make four, according to manual. */
#define portSTACK_GROWTH -1 #define portSTACK_GROWTH -1
#define portTICK_PERIOD_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ ) #define portTICK_PERIOD_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )
#define portNOP() __asm volatile ( "NOP" ) #define portNOP() __asm volatile ( "NOP" )
/* Yield equivalent to "*portITU_SWINTR = 0x01; ( void ) *portITU_SWINTR;" /* Yield equivalent to "*portITU_SWINTR = 0x01; ( void ) *portITU_SWINTR;"
* where portITU_SWINTR is the location of the software interrupt register * where portITU_SWINTR is the location of the software interrupt register
* (0x000872E0). Don't rely on the assembler to select a register, so instead * (0x000872E0). Don't rely on the assembler to select a register, so instead
* save and restore clobbered registers manually. */ * save and restore clobbered registers manually. */
#define portYIELD() \ /* *INDENT-OFF* */
__asm volatile \ #define portYIELD() \
( \ __asm volatile \
"PUSH.L R10 \n"\ ( \
"MOV.L #0x872E0, R10 \n"\ "PUSH.L R10 \n"\
"MOV.B #0x1, [R10] \n"\ "MOV.L #0x872E0, R10 \n"\
"CMP [R10].UB, R10 \n"\ "MOV.B #0x1, [ R10 ] \n"\
"POP R10 \n"\ "CMP [ R10 ].UB, R10 \n"\
:::"cc" \ "POP R10 "\
) :::"cc" \
)
/* *INDENT-ON* */
#define portYIELD_FROM_ISR( x ) if( ( x ) != pdFALSE ) portYIELD() #define portYIELD_FROM_ISR( x ) if( ( x ) != pdFALSE ) portYIELD()
/* Workaround to reduce errors/warnings caused by e2 studio CDT's INDEXER and CODAN. */ /* Workaround to reduce errors/warnings caused by e2 studio CDT's INDEXER and CODAN. */
#ifdef __CDT_PARSER__ #ifdef __CDT_PARSER__
#ifndef __asm #ifndef __asm
#define __asm asm #define __asm asm
#endif #endif
#ifndef __attribute__ #ifndef __attribute__
#define __attribute__( ... ) #define __attribute__( ... )
#endif
#endif #endif
#endif
/* These macros should not be called directly, but through the /* These macros should not be called directly, but through the
* taskENTER_CRITICAL() and taskEXIT_CRITICAL() macros. An extra check is * taskENTER_CRITICAL() and taskEXIT_CRITICAL() macros. An extra check is
* performed if configASSERT() is defined to ensure an assertion handler does not * performed if configASSERT() is defined to ensure an assertion handler does not
* inadvertently attempt to lower the IPL when the call to assert was triggered * inadvertently attempt to lower the IPL when the call to assert was triggered
* because the IPL value was found to be above configMAX_SYSCALL_INTERRUPT_PRIORITY * because the IPL value was found to be above configMAX_SYSCALL_INTERRUPT_PRIORITY
* when an ISR safe FreeRTOS API function was executed. ISR safe FreeRTOS API * when an ISR safe FreeRTOS API function was executed. ISR safe FreeRTOS API
* functions are those that end in FromISR. FreeRTOS maintains a separate * functions are those that end in FromISR. FreeRTOS maintains a separate
* interrupt API to ensure API function and interrupt entry is as fast and as * interrupt API to ensure API function and interrupt entry is as fast and as
* simple as possible. */ * simple as possible. */
#define portENABLE_INTERRUPTS() __asm volatile ( "MVTIPL #0") #define portENABLE_INTERRUPTS() __asm volatile ( "MVTIPL #0" )
#ifdef configASSERT #ifdef configASSERT
#define portASSERT_IF_INTERRUPT_PRIORITY_INVALID() configASSERT( ( ulPortGetIPL() <= configMAX_SYSCALL_INTERRUPT_PRIORITY ) ) #define portASSERT_IF_INTERRUPT_PRIORITY_INVALID() configASSERT( ( ulPortGetIPL() <= configMAX_SYSCALL_INTERRUPT_PRIORITY ) )
#define portDISABLE_INTERRUPTS() if( ulPortGetIPL() < configMAX_SYSCALL_INTERRUPT_PRIORITY ) __asm volatile ( "MVTIPL %0"::"i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY ) ) #define portDISABLE_INTERRUPTS() if( ulPortGetIPL() < configMAX_SYSCALL_INTERRUPT_PRIORITY ) __asm volatile ( "MVTIPL %0" ::"i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY ) )
#else #else
#define portDISABLE_INTERRUPTS() __asm volatile ( "MVTIPL %0"::"i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY ) ) #define portDISABLE_INTERRUPTS() __asm volatile ( "MVTIPL %0" ::"i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY ) )
#endif #endif
/* Critical nesting counts are stored in the TCB. */ /* Critical nesting counts are stored in the TCB. */
#define portCRITICAL_NESTING_IN_TCB ( 1 ) #define portCRITICAL_NESTING_IN_TCB ( 1 )
/* The critical nesting functions defined within tasks.c. */ /* The critical nesting functions defined within tasks.c. */
extern void vTaskEnterCritical( void ); extern void vTaskEnterCritical( void );
extern void vTaskExitCritical( void ); extern void vTaskExitCritical( void );
#define portENTER_CRITICAL() vTaskEnterCritical() #define portENTER_CRITICAL() vTaskEnterCritical()
#define portEXIT_CRITICAL() vTaskExitCritical() #define portEXIT_CRITICAL() vTaskExitCritical()
/* As this port allows interrupt nesting... */ /* As this port allows interrupt nesting... */
uint32_t ulPortGetIPL( void ) __attribute__( ( naked ) ); uint32_t ulPortGetIPL( void ) __attribute__( ( naked ) );
void vPortSetIPL( uint32_t ulNewIPL ) __attribute__( ( naked ) ); void vPortSetIPL( uint32_t ulNewIPL ) __attribute__( ( naked ) );
#define portSET_INTERRUPT_MASK_FROM_ISR() ulPortGetIPL(); portDISABLE_INTERRUPTS() #define portSET_INTERRUPT_MASK_FROM_ISR() ulPortGetIPL(); portDISABLE_INTERRUPTS()
#define portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedInterruptStatus ) vPortSetIPL( uxSavedInterruptStatus ) #define portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedInterruptStatus ) vPortSetIPL( uxSavedInterruptStatus )
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
/* Task function macros as described on the FreeRTOS.org WEB site. */ /* Task function macros as described on the FreeRTOS.org WEB site. */
#define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void * pvParameters ) #define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void * pvParameters )
#define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void * pvParameters ) #define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void * pvParameters )
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
@ -167,20 +169,23 @@
* themselves a DPFPU context before using any DPFPU instructions. If * themselves a DPFPU context before using any DPFPU instructions. If
* configUSE_TASK_DPFPU_SUPPORT is set to 2 then all tasks will have a DPFPU context * configUSE_TASK_DPFPU_SUPPORT is set to 2 then all tasks will have a DPFPU context
* by default. */ * by default. */
#if( configUSE_TASK_DPFPU_SUPPORT == 1 ) #if ( configUSE_TASK_DPFPU_SUPPORT == 1 )
void vPortTaskUsesDPFPU( void ); void vPortTaskUsesDPFPU( void );
#else #else
/* Each task has a DPFPU context already, so define this function away to
* nothing to prevent it being called accidentally. */ /* Each task has a DPFPU context already, so define this function away to
#define vPortTaskUsesDPFPU() * nothing to prevent it being called accidentally. */
#endif #define vPortTaskUsesDPFPU()
#define portTASK_USES_DPFPU() vPortTaskUsesDPFPU() #endif
#define portTASK_USES_DPFPU() vPortTaskUsesDPFPU()
/* Definition to allow compatibility with existing FreeRTOS Demo using flop.c. */ /* Definition to allow compatibility with existing FreeRTOS Demo using flop.c. */
#define portTASK_USES_FLOATING_POINT() vPortTaskUsesDPFPU() #define portTASK_USES_FLOATING_POINT() vPortTaskUsesDPFPU()
#ifdef __cplusplus /* *INDENT-OFF* */
} #ifdef __cplusplus
#endif }
#endif
/* *INDENT-ON* */
#endif /* PORTMACRO_H */ #endif /* PORTMACRO_H */

276
portable/IAR/RX700v3_DPFPU/port.c
View file

@ -22,14 +22,13 @@
* https://www.FreeRTOS.org * https://www.FreeRTOS.org
* https://github.com/FreeRTOS * https://github.com/FreeRTOS
* *
* 1 tab == 4 spaces!
*/ */
/*----------------------------------------------------------- /*-----------------------------------------------------------
* Implementation of functions defined in portable.h for the RXv3 DPFPU port. * Implementation of functions defined in portable.h for the RXv3 DPFPU port.
*----------------------------------------------------------*/ *----------------------------------------------------------*/
#warning Testing for DFPU support in this port is not yet complete #warning Testing for DPFPU support in this port is not yet complete
/* Scheduler includes. */ /* Scheduler includes. */
#include "FreeRTOS.h" #include "FreeRTOS.h"
@ -40,35 +39,31 @@
/* Hardware specifics. */ /* Hardware specifics. */
#if ( configINCLUDE_PLATFORM_H_INSTEAD_OF_IODEFINE_H == 1 ) #if ( configINCLUDE_PLATFORM_H_INSTEAD_OF_IODEFINE_H == 1 )
#include "platform.h" #include "platform.h"
#else
#else /* configINCLUDE_PLATFORM_H_INSTEAD_OF_IODEFINE_H */
#include "iodefine.h" #include "iodefine.h"
#endif
#endif /* configINCLUDE_PLATFORM_H_INSTEAD_OF_IODEFINE_H */
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
/* Tasks should start with interrupts enabled and in Supervisor mode, therefore /* Tasks should start with interrupts enabled and in Supervisor mode, therefore
* PSW is set with U and I set, and PM and IPL clear. */ * PSW is set with U and I set, and PM and IPL clear. */
#define portINITIAL_PSW ( ( StackType_t ) 0x00030000 ) #define portINITIAL_PSW ( ( StackType_t ) 0x00030000 )
#define portINITIAL_FPSW ( ( StackType_t ) 0x00000100 ) #define portINITIAL_FPSW ( ( StackType_t ) 0x00000100 )
#define portINITIAL_DPSW ( ( StackType_t ) 0x00000100 ) #define portINITIAL_DPSW ( ( StackType_t ) 0x00000100 )
#define portINITIAL_DCMR ( ( StackType_t ) 0x00000000 ) #define portINITIAL_DCMR ( ( StackType_t ) 0x00000000 )
#define portINITIAL_DECNT ( ( StackType_t ) 0x00000001 ) #define portINITIAL_DECNT ( ( StackType_t ) 0x00000001 )
/* Tasks are not created with a DPFPU context, but can be given a DPFPU context /* Tasks are not created with a DPFPU context, but can be given a DPFPU context
* after they have been created. A variable is stored as part of the tasks context * after they have been created. A variable is stored as part of the tasks context
* that holds portNO_DPFPU_CONTEXT if the task does not have a DPFPU context, or * that holds portNO_DPFPU_CONTEXT if the task does not have a DPFPU context, or
* any other value if the task does have a DPFPU context. */ * any other value if the task does have a DPFPU context. */
#define portNO_DPFPU_CONTEXT ( ( StackType_t ) 0 ) #define portNO_DPFPU_CONTEXT ( ( StackType_t ) 0 )
#define portHAS_DPFPU_CONTEXT ( ( StackType_t ) 1 ) #define portHAS_DPFPU_CONTEXT ( ( StackType_t ) 1 )
/* The space on the stack required to hold the DPFPU data registers. This is 16 /* The space on the stack required to hold the DPFPU data registers. This is 16
* 64-bit registers. */ * 64-bit registers. */
#define portDPFPU_DATA_REGISTER_WORDS ( 16 * 2 ) #define portDPFPU_DATA_REGISTER_WORDS ( 16 * 2 )
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
@ -99,7 +94,7 @@ __interrupt void vTickISR( void );
StackType_t ulPortTaskHasDPFPUContext = portNO_DPFPU_CONTEXT; StackType_t ulPortTaskHasDPFPUContext = portNO_DPFPU_CONTEXT;
#endif /* configUSE_TASK_DPFPU_SUPPORT */ #endif
/* This is accessed by the inline assembler functions so is file scope for /* This is accessed by the inline assembler functions so is file scope for
* convenience. */ * convenience. */
@ -195,37 +190,37 @@ StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
#ifdef USE_FULL_REGISTER_INITIALISATION #ifdef USE_FULL_REGISTER_INITIALISATION
{ {
pxTopOfStack -= 2; pxTopOfStack -= 2;
*(double *)pxTopOfStack = 1515.1515; /* DR15. */ *( double * ) pxTopOfStack = 1515.1515; /* DR15. */
pxTopOfStack -= 2; pxTopOfStack -= 2;
*(double *)pxTopOfStack = 1414.1414; /* DR14. */ *( double * ) pxTopOfStack = 1414.1414; /* DR14. */
pxTopOfStack -= 2; pxTopOfStack -= 2;
*(double *)pxTopOfStack = 1313.1313; /* DR13. */ *( double * ) pxTopOfStack = 1313.1313; /* DR13. */
pxTopOfStack -= 2; pxTopOfStack -= 2;
*(double *)pxTopOfStack = 1212.1212; /* DR12. */ *( double * ) pxTopOfStack = 1212.1212; /* DR12. */
pxTopOfStack -= 2; pxTopOfStack -= 2;
*(double *)pxTopOfStack = 1111.1111; /* DR11. */ *( double * ) pxTopOfStack = 1111.1111; /* DR11. */
pxTopOfStack -= 2; pxTopOfStack -= 2;
*(double *)pxTopOfStack = 1010.1010; /* DR10. */ *( double * ) pxTopOfStack = 1010.1010; /* DR10. */
pxTopOfStack -= 2; pxTopOfStack -= 2;
*(double *)pxTopOfStack = 909.0909; /* DR9. */ *( double * ) pxTopOfStack = 909.0909; /* DR9. */
pxTopOfStack -= 2; pxTopOfStack -= 2;
*(double *)pxTopOfStack = 808.0808; /* DR8. */ *( double * ) pxTopOfStack = 808.0808; /* DR8. */
pxTopOfStack -= 2; pxTopOfStack -= 2;
*(double *)pxTopOfStack = 707.0707; /* DR7. */ *( double * ) pxTopOfStack = 707.0707; /* DR7. */
pxTopOfStack -= 2; pxTopOfStack -= 2;
*(double *)pxTopOfStack = 606.0606; /* DR6. */ *( double * ) pxTopOfStack = 606.0606; /* DR6. */
pxTopOfStack -= 2; pxTopOfStack -= 2;
*(double *)pxTopOfStack = 505.0505; /* DR5. */ *( double * ) pxTopOfStack = 505.0505; /* DR5. */
pxTopOfStack -= 2; pxTopOfStack -= 2;
*(double *)pxTopOfStack = 404.0404; /* DR4. */ *( double * ) pxTopOfStack = 404.0404; /* DR4. */
pxTopOfStack -= 2; pxTopOfStack -= 2;
*(double *)pxTopOfStack = 303.0303; /* DR3. */ *( double * ) pxTopOfStack = 303.0303; /* DR3. */
pxTopOfStack -= 2; pxTopOfStack -= 2;
*(double *)pxTopOfStack = 202.0202; /* DR2. */ *( double * ) pxTopOfStack = 202.0202; /* DR2. */
pxTopOfStack -= 2; pxTopOfStack -= 2;
*(double *)pxTopOfStack = 101.0101; /* DR1. */ *( double * ) pxTopOfStack = 101.0101; /* DR1. */
pxTopOfStack -= 2; pxTopOfStack -= 2;
*(double *)pxTopOfStack = 9876.54321;/* DR0. */ *( double * ) pxTopOfStack = 9876.54321; /* DR0. */
} }
#else /* ifdef USE_FULL_REGISTER_INITIALISATION */ #else /* ifdef USE_FULL_REGISTER_INITIALISATION */
{ {
@ -244,11 +239,11 @@ StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
{ {
/* Omit DPFPU support. */ /* Omit DPFPU support. */
} }
#else /* if ( configUSE_TASK_DPFPU_SUPPORT == 1 ) */ #else /* configUSE_TASK_DPFPU_SUPPORT */
{ {
#error Invalid configUSE_TASK_DPFPU_SUPPORT setting - configUSE_TASK_DPFPU_SUPPORT must be set to 0, 1, 2, or left undefined. #error Invalid configUSE_TASK_DPFPU_SUPPORT setting - configUSE_TASK_DPFPU_SUPPORT must be set to 0, 1, 2, or left undefined.
} }
#endif /* if ( configUSE_TASK_DPFPU_SUPPORT == 1 ) */ #endif /* configUSE_TASK_DPFPU_SUPPORT */
return pxTopOfStack; return pxTopOfStack;
} }
@ -311,18 +306,19 @@ static void prvStartFirstTask( void )
{ {
__asm volatile __asm volatile
( (
/* *INDENT-OFF* */
/* When starting the scheduler there is nothing that needs moving to the /* When starting the scheduler there is nothing that needs moving to the
* interrupt stack because the function is not called from an interrupt. * interrupt stack because the function is not called from an interrupt.
* Just ensure the current stack is the user stack. */ * Just ensure the current stack is the user stack. */
"SETPSW U \n"\ "SETPSW U \n"\
/* Obtain the location of the stack associated with which ever task /* Obtain the location of the stack associated with which ever task
* pxCurrentTCB is currently pointing to. */ * pxCurrentTCB is currently pointing to. */
"MOV.L #_pxCurrentTCB, R15 \n"\ "MOV.L #_pxCurrentTCB, R15 \n"\
"MOV.L [R15], R15 \n"\ "MOV.L [ R15 ], R15 \n"\
"MOV.L [R15], R0 \n"\ "MOV.L [ R15 ], R0 \n"\
/* Restore the registers from the stack of the task pointed to by /* Restore the registers from the stack of the task pointed to by
@ -332,54 +328,56 @@ static void prvStartFirstTask( void )
/* The restored ulPortTaskHasDPFPUContext is to be zero here. /* The restored ulPortTaskHasDPFPUContext is to be zero here.
* So, it is never necessary to restore the DPFPU context here. */ * So, it is never necessary to restore the DPFPU context here. */
"POP R15 \n"\ "POP R15 \n"\
"MOV.L #_ulPortTaskHasDPFPUContext, R14 \n"\ "MOV.L #_ulPortTaskHasDPFPUContext, R14 \n"\
"MOV.L R15, [R14] \n"\ "MOV.L R15, [ R14 ] \n"\
#elif ( configUSE_TASK_DPFPU_SUPPORT == 2 ) #elif ( configUSE_TASK_DPFPU_SUPPORT == 2 )
/* Restore the DPFPU context. */ /* Restore the DPFPU context. */
"DPOPM.L DPSW-DECNT \n"\ "DPOPM.L DPSW-DECNT \n"\
"DPOPM.D DR0-DR15 \n"\ "DPOPM.D DR0-DR15 \n"\
#endif /* if ( configUSE_TASK_DPFPU_SUPPORT == 1 ) */ #endif /* configUSE_TASK_DPFPU_SUPPORT */
"POP R15 \n"\ "POP R15 \n"\
/* Accumulator low 32 bits. */ /* Accumulator low 32 bits. */
"MVTACLO R15, A0 \n"\ "MVTACLO R15, A0 \n"\
"POP R15 \n"\ "POP R15 \n"\
/* Accumulator high 32 bits. */ /* Accumulator high 32 bits. */
"MVTACHI R15, A0 \n"\ "MVTACHI R15, A0 \n"\
"POP R15 \n"\ "POP R15 \n"\
/* Accumulator guard. */ /* Accumulator guard. */
"MVTACGU R15, A0 \n"\ "MVTACGU R15, A0 \n"\
"POP R15 \n"\ "POP R15 \n"\
/* Accumulator low 32 bits. */ /* Accumulator low 32 bits. */
"MVTACLO R15, A1 \n"\ "MVTACLO R15, A1 \n"\
"POP R15 \n"\ "POP R15 \n"\
/* Accumulator high 32 bits. */ /* Accumulator high 32 bits. */
"MVTACHI R15, A1 \n"\ "MVTACHI R15, A1 \n"\
"POP R15 \n"\ "POP R15 \n"\
/* Accumulator guard. */ /* Accumulator guard. */
"MVTACGU R15, A1 \n"\ "MVTACGU R15, A1 \n"\
"POP R15 \n"\ "POP R15 \n"\
/* Floating point status word. */ /* Floating point status word. */
"MVTC R15, FPSW \n"\ "MVTC R15, FPSW \n"\
/* R1 to R15 - R0 is not included as it is the SP. */ /* R1 to R15 - R0 is not included as it is the SP. */
"POPM R1-R15 \n"\ "POPM R1-R15 \n"\
/* This pops the remaining registers. */ /* This pops the remaining registers. */
"RTE \n"\ "RTE \n"\
"NOP \n"\ "NOP \n"\
"NOP \n" "NOP "
/* *INDENT-ON* */
); );
} }
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
@ -389,101 +387,103 @@ __interrupt void vSoftwareInterruptISR( void )
{ {
__asm volatile __asm volatile
( (
/* *INDENT-OFF* */
/* Re-enable interrupts. */ /* Re-enable interrupts. */
"SETPSW I \n"\ "SETPSW I \n"\
/* Move the data that was automatically pushed onto the interrupt stack when /* Move the data that was automatically pushed onto the interrupt stack when
* the interrupt occurred from the interrupt stack to the user stack. * the interrupt occurred from the interrupt stack to the user stack.
* *
* R15 is saved before it is clobbered. */ * R15 is saved before it is clobbered. */
"PUSH.L R15 \n"\ "PUSH.L R15 \n"\
/* Read the user stack pointer. */ /* Read the user stack pointer. */
"MVFC USP, R15 \n"\ "MVFC USP, R15 \n"\
/* Move the address down to the data being moved. */ /* Move the address down to the data being moved. */
"SUB #12, R15 \n"\ "SUB #12, R15 \n"\
"MVTC R15, USP \n"\ "MVTC R15, USP \n"\
/* Copy the data across, R15, then PC, then PSW. */ /* Copy the data across, R15, then PC, then PSW. */
"MOV.L [ R0 ], [ R15 ] \n"\ "MOV.L [ R0 ], [ R15 ] \n"\
"MOV.L 4[ R0 ], 4[ R15 ] \n"\ "MOV.L 4[ R0 ], 4[ R15 ] \n"\
"MOV.L 8[ R0 ], 8[ R15 ] \n"\ "MOV.L 8[ R0 ], 8[ R15 ] \n"\
/* Move the interrupt stack pointer to its new correct position. */ /* Move the interrupt stack pointer to its new correct position. */
"ADD #12, R0 \n"\ "ADD #12, R0 \n"\
/* All the rest of the registers are saved directly to the user stack. */ /* All the rest of the registers are saved directly to the user stack. */
"SETPSW U \n"\ "SETPSW U \n"\
/* Save the rest of the general registers (R15 has been saved already). */ /* Save the rest of the general registers (R15 has been saved already). */
"PUSHM R1-R14 \n"\ "PUSHM R1-R14 \n"\
/* Save the FPSW and accumulators. */ /* Save the FPSW and accumulators. */
"MVFC FPSW, R15 \n"\ "MVFC FPSW, R15 \n"\
"PUSH.L R15 \n"\ "PUSH.L R15 \n"\
"MVFACGU #0, A1, R15 \n"\ "MVFACGU #0, A1, R15 \n"\
"PUSH.L R15 \n"\ "PUSH.L R15 \n"\
"MVFACHI #0, A1, R15 \n"\ "MVFACHI #0, A1, R15 \n"\
"PUSH.L R15 \n"\ "PUSH.L R15 \n"\
"MVFACLO #0, A1, R15 \n" /* Low order word. */ \ "MVFACLO #0, A1, R15 \n" /* Low order word. */ \
"PUSH.L R15 \n"\ "PUSH.L R15 \n"\
"MVFACGU #0, A0, R15 \n"\ "MVFACGU #0, A0, R15 \n"\
"PUSH.L R15 \n"\ "PUSH.L R15 \n"\
"MVFACHI #0, A0, R15 \n"\ "MVFACHI #0, A0, R15 \n"\
"PUSH.L R15 \n"\ "PUSH.L R15 \n"\
"MVFACLO #0, A0, R15 \n" /* Low order word. */ \ "MVFACLO #0, A0, R15 \n" /* Low order word. */ \
"PUSH.L R15 \n"\ "PUSH.L R15 \n"\
#if ( configUSE_TASK_DPFPU_SUPPORT == 1 ) #if ( configUSE_TASK_DPFPU_SUPPORT == 1 )
/* Does the task have a DPFPU context that needs saving? If /* Does the task have a DPFPU context that needs saving? If
* ulPortTaskHasDPFPUContext is 0 then no. */ * ulPortTaskHasDPFPUContext is 0 then no. */
"MOV.L #_ulPortTaskHasDPFPUContext, R15 \n"\ "MOV.L #_ulPortTaskHasDPFPUContext, R15 \n"\
"MOV.L [R15], R15 \n"\ "MOV.L [ R15 ], R15 \n"\
"CMP #0, R15 \n"\ "CMP #0, R15 \n"\
/* Save the DPFPU context, if any. */ /* Save the DPFPU context, if any. */
"BEQ.B __lab1 \n"\ "BEQ.B __lab1 \n"\
"DPUSHM.D DR0-DR15 \n"\ "DPUSHM.D DR0-DR15 \n"\
"DPUSHM.L DPSW-DECNT \n"\ "DPUSHM.L DPSW-DECNT \n"\
"__lab1: \n"\ "__lab1: \n"\
/* Save ulPortTaskHasDPFPUContext itself. */ /* Save ulPortTaskHasDPFPUContext itself. */
"PUSH.L R15 \n"\ "PUSH.L R15 \n"\
#elif ( configUSE_TASK_DPFPU_SUPPORT == 2 ) #elif ( configUSE_TASK_DPFPU_SUPPORT == 2 )
/* Save the DPFPU context, always. */ /* Save the DPFPU context, always. */
"DPUSHM.D DR0-DR15 \n"\ "DPUSHM.D DR0-DR15 \n"\
"DPUSHM.L DPSW-DECNT \n"\ "DPUSHM.L DPSW-DECNT \n"\
#endif /* if ( configUSE_TASK_DPFPU_SUPPORT == 1 ) */ #endif /* configUSE_TASK_DPFPU_SUPPORT */
/* Save the stack pointer to the TCB. */ /* Save the stack pointer to the TCB. */
"MOV.L #_pxCurrentTCB, R15 \n"\ "MOV.L #_pxCurrentTCB, R15 \n"\
"MOV.L [ R15 ], R15 \n"\ "MOV.L [ R15 ], R15 \n"\
"MOV.L R0, [ R15 ] \n"\ "MOV.L R0, [ R15 ] \n"\
/* Ensure the interrupt mask is set to the syscall priority while the kernel /* Ensure the interrupt mask is set to the syscall priority while the kernel
* structures are being accessed. */ * structures are being accessed. */
"MVTIPL %0 \n"\ "MVTIPL %0 \n"\
/* Select the next task to run. */ /* Select the next task to run. */
"BSR.A _vTaskSwitchContext \n"\ "BSR.A _vTaskSwitchContext \n"\
/* Reset the interrupt mask as no more data structure access is required. */ /* Reset the interrupt mask as no more data structure access is required. */
"MVTIPL %1 \n"\ "MVTIPL %1 \n"\
/* Load the stack pointer of the task that is now selected as the Running /* Load the stack pointer of the task that is now selected as the Running
* state task from its TCB. */ * state task from its TCB. */
"MOV.L #_pxCurrentTCB,R15 \n"\ "MOV.L #_pxCurrentTCB, R15 \n"\
"MOV.L [ R15 ], R15 \n"\ "MOV.L [ R15 ], R15 \n"\
"MOV.L [ R15 ], R0 \n"\ "MOV.L [ R15 ], R0 \n"\
/* Restore the context of the new task. The PSW (Program Status Word) and /* Restore the context of the new task. The PSW (Program Status Word) and
@ -493,56 +493,58 @@ __interrupt void vSoftwareInterruptISR( void )
/* Is there a DPFPU context to restore? If the restored /* Is there a DPFPU context to restore? If the restored
* ulPortTaskHasDPFPUContext is zero then no. */ * ulPortTaskHasDPFPUContext is zero then no. */
"POP R15 \n"\ "POP R15 \n"\
"MOV.L #_ulPortTaskHasDPFPUContext, R14 \n"\ "MOV.L #_ulPortTaskHasDPFPUContext, R14 \n"\
"MOV.L R15, [R14] \n"\ "MOV.L R15, [ R14 ] \n"\
"CMP #0, R15 \n"\ "CMP #0, R15 \n"\
/* Restore the DPFPU context, if any. */ /* Restore the DPFPU context, if any. */
"BEQ.B __lab2 \n"\ "BEQ.B __lab2 \n"\
"DPOPM.L DPSW-DECNT \n"\ "DPOPM.L DPSW-DECNT \n"\
"DPOPM.D DR0-DR15 \n"\ "DPOPM.D DR0-DR15 \n"\
"__lab2: \n"\ "__lab2: \n"\
#elif ( configUSE_TASK_DPFPU_SUPPORT == 2 ) #elif ( configUSE_TASK_DPFPU_SUPPORT == 2 )
/* Restore the DPFPU context, always. */ /* Restore the DPFPU context, always. */
"DPOPM.L DPSW-DECNT \n"\ "DPOPM.L DPSW-DECNT \n"\
"DPOPM.D DR0-DR15 \n"\ "DPOPM.D DR0-DR15 \n"\
#endif /* if( configUSE_TASK_DPFPU_SUPPORT == 1 ) */ #endif /* configUSE_TASK_DPFPU_SUPPORT */
"POP R15 \n"\ "POP R15 \n"\
/* Accumulator low 32 bits. */ /* Accumulator low 32 bits. */
"MVTACLO R15, A0 \n"\ "MVTACLO R15, A0 \n"\
"POP R15 \n"\ "POP R15 \n"\
/* Accumulator high 32 bits. */ /* Accumulator high 32 bits. */
"MVTACHI R15, A0 \n"\ "MVTACHI R15, A0 \n"\
"POP R15 \n"\ "POP R15 \n"\
/* Accumulator guard. */ /* Accumulator guard. */
"MVTACGU R15, A0 \n"\ "MVTACGU R15, A0 \n"\
"POP R15 \n"\ "POP R15 \n"\
/* Accumulator low 32 bits. */ /* Accumulator low 32 bits. */
"MVTACLO R15, A1 \n"\ "MVTACLO R15, A1 \n"\
"POP R15 \n"\ "POP R15 \n"\
/* Accumulator high 32 bits. */ /* Accumulator high 32 bits. */
"MVTACHI R15, A1 \n"\ "MVTACHI R15, A1 \n"\
"POP R15 \n"\ "POP R15 \n"\
/* Accumulator guard. */ /* Accumulator guard. */
"MVTACGU R15, A1 \n"\ "MVTACGU R15, A1 \n"\
"POP R15 \n"\ "POP R15 \n"\
"MVTC R15, FPSW \n"\ "MVTC R15, FPSW \n"\
"POPM R1-R15 \n"\ "POPM R1-R15 \n"\
"RTE \n"\ "RTE \n"\
"NOP \n"\ "NOP \n"\
"NOP " "NOP "
portCDT_NO_PARSE( :: ) "i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY ), "i" ( configKERNEL_INTERRUPT_PRIORITY ) portCDT_NO_PARSE( :: ) "i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY ), "i" ( configKERNEL_INTERRUPT_PRIORITY )
/* *INDENT-ON* */
); );
} }
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/

175
portable/IAR/RX700v3_DPFPU/portmacro.h
View file

@ -22,19 +22,19 @@
* https://www.FreeRTOS.org * https://www.FreeRTOS.org
* https://github.com/FreeRTOS * https://github.com/FreeRTOS
* *
* 1 tab == 4 spaces!
*/ */
#ifndef PORTMACRO_H #ifndef PORTMACRO_H
#define PORTMACRO_H #define PORTMACRO_H
/* Hardware specifics. */ /* Hardware specifics. */
#include <intrinsics.h> #include <intrinsics.h>
#ifdef __cplusplus /* *INDENT-OFF* */
extern "C" { #ifdef __cplusplus
#endif extern "C" {
#endif
/* *INDENT-ON* */
/*----------------------------------------------------------- /*-----------------------------------------------------------
* Port specific definitions. * Port specific definitions.
@ -46,11 +46,11 @@
*----------------------------------------------------------- *-----------------------------------------------------------
*/ */
/* When the FIT configurator or the Smart Configurator is used, platform.h has to be /* When the FIT configurator or the Smart Configurator is used, platform.h has to be
* used. */ * used. */
#ifndef configINCLUDE_PLATFORM_H_INSTEAD_OF_IODEFINE_H #ifndef configINCLUDE_PLATFORM_H_INSTEAD_OF_IODEFINE_H
#define configINCLUDE_PLATFORM_H_INSTEAD_OF_IODEFINE_H 0 #define configINCLUDE_PLATFORM_H_INSTEAD_OF_IODEFINE_H 0
#endif #endif
/* If configUSE_TASK_DPFPU_SUPPORT is set to 1 (or undefined) then each task will /* If configUSE_TASK_DPFPU_SUPPORT is set to 1 (or undefined) then each task will
* be created without a DPFPU context, and a task must call vTaskUsesDPFPU() before * be created without a DPFPU context, and a task must call vTaskUsesDPFPU() before
@ -58,111 +58,113 @@
* tasks are created with a DPFPU context by default, and calling vTaskUsesDPFPU() has * tasks are created with a DPFPU context by default, and calling vTaskUsesDPFPU() has
* no effect. If configUSE_TASK_DPFPU_SUPPORT is set to 0 then tasks never take care * no effect. If configUSE_TASK_DPFPU_SUPPORT is set to 0 then tasks never take care
* of any DPFPU context (even if DPFPU registers are used). */ * of any DPFPU context (even if DPFPU registers are used). */
#ifndef configUSE_TASK_DPFPU_SUPPORT #ifndef configUSE_TASK_DPFPU_SUPPORT
#define configUSE_TASK_DPFPU_SUPPORT 1 #define configUSE_TASK_DPFPU_SUPPORT 1
#endif #endif
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
/* Type definitions - these are a bit legacy and not really used now, other than /* Type definitions - these are a bit legacy and not really used now, other than
* portSTACK_TYPE and portBASE_TYPE. */ * portSTACK_TYPE and portBASE_TYPE. */
#define portCHAR char #define portCHAR char
#define portFLOAT float #define portFLOAT float
#define portDOUBLE double #define portDOUBLE double
#define portLONG long #define portLONG long
#define portSHORT short #define portSHORT short
#define portSTACK_TYPE uint32_t #define portSTACK_TYPE uint32_t
#define portBASE_TYPE long #define portBASE_TYPE long
typedef portSTACK_TYPE StackType_t; typedef portSTACK_TYPE StackType_t;
typedef long BaseType_t; typedef long BaseType_t;
typedef unsigned long UBaseType_t; typedef unsigned long UBaseType_t;
#if ( configUSE_16_BIT_TICKS == 1 ) #if ( configUSE_16_BIT_TICKS == 1 )
typedef uint16_t TickType_t; typedef uint16_t TickType_t;
#define portMAX_DELAY ( TickType_t ) 0xffff #define portMAX_DELAY ( TickType_t ) 0xffff
#else #else
typedef uint32_t TickType_t; typedef uint32_t TickType_t;
#define portMAX_DELAY ( TickType_t ) 0xffffffffUL #define portMAX_DELAY ( TickType_t ) 0xffffffffUL
/* 32-bit tick type on a 32-bit architecture, so reads of the tick count do /* 32-bit tick type on a 32-bit architecture, so reads of the tick count do
* not need to be guarded with a critical section. */ * not need to be guarded with a critical section. */
#define portTICK_TYPE_IS_ATOMIC 1 #define portTICK_TYPE_IS_ATOMIC 1
#endif #endif
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
/* Hardware specifics. */ /* Hardware specifics. */
#define portBYTE_ALIGNMENT 8 /* Could make four, according to manual. */ #define portBYTE_ALIGNMENT 8 /* Could make four, according to manual. */
#define portSTACK_GROWTH -1 #define portSTACK_GROWTH -1
#define portTICK_PERIOD_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ ) #define portTICK_PERIOD_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )
#define portNOP() __no_operation() #define portNOP() __no_operation()
/* Yield equivalent to "*portITU_SWINTR = 0x01; ( void ) *portITU_SWINTR;" /* Yield equivalent to "*portITU_SWINTR = 0x01; ( void ) *portITU_SWINTR;"
* where portITU_SWINTR is the location of the software interrupt register * where portITU_SWINTR is the location of the software interrupt register
* (0x000872E0). Don't rely on the assembler to select a register, so instead * (0x000872E0). Don't rely on the assembler to select a register, so instead
* save and restore clobbered registers manually. */ * save and restore clobbered registers manually. */
#define portYIELD() \ /* *INDENT-OFF* */
__asm volatile \ #define portYIELD() \
( \ __asm volatile \
"PUSH.L R10 \n"\ ( \
"MOV.L #0x872E0, R10 \n"\ "PUSH.L R10 \n"\
"MOV.B #0x1, [R10] \n"\ "MOV.L #0x872E0, R10 \n"\
"CMP [R10].UB, R10 \n"\ "MOV.B #0x1, [ R10 ] \n"\
"POP R10 \n"\ "CMP [ R10 ].UB, R10 \n"\
portCDT_NO_PARSE( ::: ) "cc"\ "POP R10 "\
) portCDT_NO_PARSE( ::: ) "cc"\
)
/* *INDENT-ON* */
#define portYIELD_FROM_ISR( x ) if( ( x ) != pdFALSE ) portYIELD() #define portYIELD_FROM_ISR( x ) if( ( x ) != pdFALSE ) portYIELD()
/* Workaround to reduce errors/warnings caused by e2 studio CDT's INDEXER and CODAN. */ /* Workaround to reduce errors/warnings caused by e2 studio CDT's INDEXER and CODAN. */
#ifdef __CDT_PARSER__ #ifdef __CDT_PARSER__
#ifndef __asm #ifndef __asm
#define __asm asm #define __asm asm
#endif #endif
#ifndef __attribute__ #ifndef __attribute__
#define __attribute__( ... ) #define __attribute__( ... )
#endif #endif
#define portCDT_NO_PARSE( token ) #define portCDT_NO_PARSE( token )
#else #else
#define portCDT_NO_PARSE( token ) token #define portCDT_NO_PARSE( token ) token
#endif #endif
/* These macros should not be called directly, but through the /* These macros should not be called directly, but through the
* taskENTER_CRITICAL() and taskEXIT_CRITICAL() macros. An extra check is * taskENTER_CRITICAL() and taskEXIT_CRITICAL() macros. An extra check is
* performed if configASSERT() is defined to ensure an assertion handler does not * performed if configASSERT() is defined to ensure an assertion handler does not
* inadvertently attempt to lower the IPL when the call to assert was triggered * inadvertently attempt to lower the IPL when the call to assert was triggered
* because the IPL value was found to be above configMAX_SYSCALL_INTERRUPT_PRIORITY * because the IPL value was found to be above configMAX_SYSCALL_INTERRUPT_PRIORITY
* when an ISR safe FreeRTOS API function was executed. ISR safe FreeRTOS API * when an ISR safe FreeRTOS API function was executed. ISR safe FreeRTOS API
* functions are those that end in FromISR. FreeRTOS maintains a separate * functions are those that end in FromISR. FreeRTOS maintains a separate
* interrupt API to ensure API function and interrupt entry is as fast and as * interrupt API to ensure API function and interrupt entry is as fast and as
* simple as possible. */ * simple as possible. */
#define portENABLE_INTERRUPTS() __set_interrupt_level( ( uint8_t ) 0 ) #define portENABLE_INTERRUPTS() __set_interrupt_level( ( uint8_t ) 0 )
#ifdef configASSERT #ifdef configASSERT
#define portASSERT_IF_INTERRUPT_PRIORITY_INVALID() configASSERT( ( __get_interrupt_level() <= configMAX_SYSCALL_INTERRUPT_PRIORITY ) ) #define portASSERT_IF_INTERRUPT_PRIORITY_INVALID() configASSERT( ( __get_interrupt_level() <= configMAX_SYSCALL_INTERRUPT_PRIORITY ) )
#define portDISABLE_INTERRUPTS() if( __get_interrupt_level() < configMAX_SYSCALL_INTERRUPT_PRIORITY ) __set_interrupt_level( ( uint8_t ) configMAX_SYSCALL_INTERRUPT_PRIORITY ) #define portDISABLE_INTERRUPTS() if( __get_interrupt_level() < configMAX_SYSCALL_INTERRUPT_PRIORITY ) __set_interrupt_level( ( uint8_t ) configMAX_SYSCALL_INTERRUPT_PRIORITY )
#else #else
#define portDISABLE_INTERRUPTS() __set_interrupt_level( ( uint8_t ) configMAX_SYSCALL_INTERRUPT_PRIORITY ) #define portDISABLE_INTERRUPTS() __set_interrupt_level( ( uint8_t ) configMAX_SYSCALL_INTERRUPT_PRIORITY )
#endif #endif
/* Critical nesting counts are stored in the TCB. */ /* Critical nesting counts are stored in the TCB. */
#define portCRITICAL_NESTING_IN_TCB ( 1 ) #define portCRITICAL_NESTING_IN_TCB ( 1 )
/* The critical nesting functions defined within tasks.c. */ /* The critical nesting functions defined within tasks.c. */
extern void vTaskEnterCritical( void ); extern void vTaskEnterCritical( void );
extern void vTaskExitCritical( void ); extern void vTaskExitCritical( void );
#define portENTER_CRITICAL() vTaskEnterCritical() #define portENTER_CRITICAL() vTaskEnterCritical()
#define portEXIT_CRITICAL() vTaskExitCritical() #define portEXIT_CRITICAL() vTaskExitCritical()
/* As this port allows interrupt nesting... */ /* As this port allows interrupt nesting... */
#define portSET_INTERRUPT_MASK_FROM_ISR() __get_interrupt_level(); portDISABLE_INTERRUPTS() #define portSET_INTERRUPT_MASK_FROM_ISR() __get_interrupt_level(); portDISABLE_INTERRUPTS()
#define portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedInterruptStatus ) __set_interrupt_level( ( uint8_t ) ( uxSavedInterruptStatus ) ) #define portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedInterruptStatus ) __set_interrupt_level( ( uint8_t ) ( uxSavedInterruptStatus ) )
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
/* Task function macros as described on the FreeRTOS.org WEB site. */ /* Task function macros as described on the FreeRTOS.org WEB site. */
#define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void * pvParameters ) #define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void * pvParameters )
#define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void * pvParameters ) #define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void * pvParameters )
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
@ -171,25 +173,28 @@
* themselves a DPFPU context before using any DPFPU instructions. If * themselves a DPFPU context before using any DPFPU instructions. If
* configUSE_TASK_DPFPU_SUPPORT is set to 2 then all tasks will have a DPFPU context * configUSE_TASK_DPFPU_SUPPORT is set to 2 then all tasks will have a DPFPU context
* by default. */ * by default. */
#if( configUSE_TASK_DPFPU_SUPPORT == 1 ) #if ( configUSE_TASK_DPFPU_SUPPORT == 1 )
void vPortTaskUsesDPFPU( void ); void vPortTaskUsesDPFPU( void );
#else #else
/* Each task has a DPFPU context already, so define this function away to
* nothing to prevent it being called accidentally. */ /* Each task has a DPFPU context already, so define this function away to
#define vPortTaskUsesDPFPU() * nothing to prevent it being called accidentally. */
#endif #define vPortTaskUsesDPFPU()
#define portTASK_USES_DPFPU() vPortTaskUsesDPFPU() #endif
#define portTASK_USES_DPFPU() vPortTaskUsesDPFPU()
/* Definition to allow compatibility with existing FreeRTOS Demo using flop.c. */ /* Definition to allow compatibility with existing FreeRTOS Demo using flop.c. */
#define portTASK_USES_FLOATING_POINT() vPortTaskUsesDPFPU() #define portTASK_USES_FLOATING_POINT() vPortTaskUsesDPFPU()
/* Prevent warnings of undefined behaviour: the order of volatile accesses is /* Prevent warnings of undefined behaviour: the order of volatile accesses is
* undefined - all warnings have been manually checked and are not an issue, and * undefined - all warnings have been manually checked and are not an issue, and
* the warnings cannot be prevent by code changes without undesirable effects. */ * the warnings cannot be prevent by code changes without undesirable effects. */
#pragma diag_suppress=Pa082 #pragma diag_suppress=Pa082
#ifdef __cplusplus /* *INDENT-OFF* */
} #ifdef __cplusplus
#endif }
#endif
/* *INDENT-ON* */
#endif /* PORTMACRO_H */ #endif /* PORTMACRO_H */

403
portable/Renesas/RX700v3_DPFPU/port.c
View file

@ -22,14 +22,13 @@
* https://www.FreeRTOS.org * https://www.FreeRTOS.org
* https://github.com/FreeRTOS * https://github.com/FreeRTOS
* *
* 1 tab == 4 spaces!
*/ */
/*----------------------------------------------------------- /*-----------------------------------------------------------
* Implementation of functions defined in portable.h for the RXv3 DPFPU port. * Implementation of functions defined in portable.h for the RXv3 DPFPU port.
*----------------------------------------------------------*/ *----------------------------------------------------------*/
#warning Testing for DFPU support in this port is not yet complete #warning Testing for DPFPU support in this port is not yet complete
/* Scheduler includes. */ /* Scheduler includes. */
#include "FreeRTOS.h" #include "FreeRTOS.h"
@ -40,35 +39,31 @@
/* Hardware specifics. */ /* Hardware specifics. */
#if ( configINCLUDE_PLATFORM_H_INSTEAD_OF_IODEFINE_H == 1 ) #if ( configINCLUDE_PLATFORM_H_INSTEAD_OF_IODEFINE_H == 1 )
#include "platform.h" #include "platform.h"
#else
#else /* configINCLUDE_PLATFORM_H_INSTEAD_OF_IODEFINE_H */
#include "iodefine.h" #include "iodefine.h"
#endif
#endif /* configINCLUDE_PLATFORM_H_INSTEAD_OF_IODEFINE_H */
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
/* Tasks should start with interrupts enabled and in Supervisor mode, therefore /* Tasks should start with interrupts enabled and in Supervisor mode, therefore
* PSW is set with U and I set, and PM and IPL clear. */ * PSW is set with U and I set, and PM and IPL clear. */
#define portINITIAL_PSW ( ( StackType_t ) 0x00030000 ) #define portINITIAL_PSW ( ( StackType_t ) 0x00030000 )
#define portINITIAL_FPSW ( ( StackType_t ) 0x00000100 ) #define portINITIAL_FPSW ( ( StackType_t ) 0x00000100 )
#define portINITIAL_DPSW ( ( StackType_t ) 0x00000100 ) #define portINITIAL_DPSW ( ( StackType_t ) 0x00000100 )
#define portINITIAL_DCMR ( ( StackType_t ) 0x00000000 ) #define portINITIAL_DCMR ( ( StackType_t ) 0x00000000 )
#define portINITIAL_DECNT ( ( StackType_t ) 0x00000001 ) #define portINITIAL_DECNT ( ( StackType_t ) 0x00000001 )
/* Tasks are not created with a DPFPU context, but can be given a DPFPU context /* Tasks are not created with a DPFPU context, but can be given a DPFPU context
* after they have been created. A variable is stored as part of the tasks context * after they have been created. A variable is stored as part of the tasks context
* that holds portNO_DPFPU_CONTEXT if the task does not have a DPFPU context, or * that holds portNO_DPFPU_CONTEXT if the task does not have a DPFPU context, or
* any other value if the task does have a DPFPU context. */ * any other value if the task does have a DPFPU context. */
#define portNO_DPFPU_CONTEXT ( ( StackType_t ) 0 ) #define portNO_DPFPU_CONTEXT ( ( StackType_t ) 0 )
#define portHAS_DPFPU_CONTEXT ( ( StackType_t ) 1 ) #define portHAS_DPFPU_CONTEXT ( ( StackType_t ) 1 )
/* The space on the stack required to hold the DPFPU data registers. This is 16 /* The space on the stack required to hold the DPFPU data registers. This is 16
* 64-bit registers. */ * 64-bit registers. */
#define portDPFPU_DATA_REGISTER_WORDS ( 16 * 2 ) #define portDPFPU_DATA_REGISTER_WORDS ( 16 * 2 )
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
@ -115,7 +110,7 @@ void vTickISR( void );
StackType_t ulPortTaskHasDPFPUContext = portNO_DPFPU_CONTEXT; StackType_t ulPortTaskHasDPFPUContext = portNO_DPFPU_CONTEXT;
#endif /* configUSE_TASK_DPFPU_SUPPORT */ #endif
/* This is accessed by the inline assembler functions so is file scope for /* This is accessed by the inline assembler functions so is file scope for
* convenience. */ * convenience. */
@ -211,37 +206,37 @@ StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
#ifdef USE_FULL_REGISTER_INITIALISATION #ifdef USE_FULL_REGISTER_INITIALISATION
{ {
pxTopOfStack -= 2; pxTopOfStack -= 2;
*(double *)pxTopOfStack = 1515.1515; /* DR15. */ *( double * ) pxTopOfStack = 1515.1515; /* DR15. */
pxTopOfStack -= 2; pxTopOfStack -= 2;
*(double *)pxTopOfStack = 1414.1414; /* DR14. */ *( double * ) pxTopOfStack = 1414.1414; /* DR14. */
pxTopOfStack -= 2; pxTopOfStack -= 2;
*(double *)pxTopOfStack = 1313.1313; /* DR13. */ *( double * ) pxTopOfStack = 1313.1313; /* DR13. */
pxTopOfStack -= 2; pxTopOfStack -= 2;
*(double *)pxTopOfStack = 1212.1212; /* DR12. */ *( double * ) pxTopOfStack = 1212.1212; /* DR12. */
pxTopOfStack -= 2; pxTopOfStack -= 2;
*(double *)pxTopOfStack = 1111.1111; /* DR11. */ *( double * ) pxTopOfStack = 1111.1111; /* DR11. */
pxTopOfStack -= 2; pxTopOfStack -= 2;
*(double *)pxTopOfStack = 1010.1010; /* DR10. */ *( double * ) pxTopOfStack = 1010.1010; /* DR10. */
pxTopOfStack -= 2; pxTopOfStack -= 2;
*(double *)pxTopOfStack = 909.0909; /* DR9. */ *( double * ) pxTopOfStack = 909.0909; /* DR9. */
pxTopOfStack -= 2; pxTopOfStack -= 2;
*(double *)pxTopOfStack = 808.0808; /* DR8. */ *( double * ) pxTopOfStack = 808.0808; /* DR8. */
pxTopOfStack -= 2; pxTopOfStack -= 2;
*(double *)pxTopOfStack = 707.0707; /* DR7. */ *( double * ) pxTopOfStack = 707.0707; /* DR7. */
pxTopOfStack -= 2; pxTopOfStack -= 2;
*(double *)pxTopOfStack = 606.0606; /* DR6. */ *( double * ) pxTopOfStack = 606.0606; /* DR6. */
pxTopOfStack -= 2; pxTopOfStack -= 2;
*(double *)pxTopOfStack = 505.0505; /* DR5. */ *( double * ) pxTopOfStack = 505.0505; /* DR5. */
pxTopOfStack -= 2; pxTopOfStack -= 2;
*(double *)pxTopOfStack = 404.0404; /* DR4. */ *( double * ) pxTopOfStack = 404.0404; /* DR4. */
pxTopOfStack -= 2; pxTopOfStack -= 2;
*(double *)pxTopOfStack = 303.0303; /* DR3. */ *( double * ) pxTopOfStack = 303.0303; /* DR3. */
pxTopOfStack -= 2; pxTopOfStack -= 2;
*(double *)pxTopOfStack = 202.0202; /* DR2. */ *( double * ) pxTopOfStack = 202.0202; /* DR2. */
pxTopOfStack -= 2; pxTopOfStack -= 2;
*(double *)pxTopOfStack = 101.0101; /* DR1. */ *( double * ) pxTopOfStack = 101.0101; /* DR1. */
pxTopOfStack -= 2; pxTopOfStack -= 2;
*(double *)pxTopOfStack = 9876.54321;/* DR0. */ *( double * ) pxTopOfStack = 9876.54321; /* DR0. */
} }
#else /* ifdef USE_FULL_REGISTER_INITIALISATION */ #else /* ifdef USE_FULL_REGISTER_INITIALISATION */
{ {
@ -260,11 +255,11 @@ StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
{ {
/* Omit DPFPU support. */ /* Omit DPFPU support. */
} }
#else /* if ( configUSE_TASK_DPFPU_SUPPORT == 1 ) */ #else /* configUSE_TASK_DPFPU_SUPPORT */
{ {
#error Invalid configUSE_TASK_DPFPU_SUPPORT setting - configUSE_TASK_DPFPU_SUPPORT must be set to 0, 1, 2, or left undefined. #error Invalid configUSE_TASK_DPFPU_SUPPORT setting - configUSE_TASK_DPFPU_SUPPORT must be set to 0, 1, 2, or left undefined.
} }
#endif /* if ( configUSE_TASK_DPFPU_SUPPORT == 1 ) */ #endif /* configUSE_TASK_DPFPU_SUPPORT */
return pxTopOfStack; return pxTopOfStack;
} }
@ -329,78 +324,80 @@ void vPortEndScheduler( void )
#pragma inline_asm prvStartFirstTask #pragma inline_asm prvStartFirstTask
static void prvStartFirstTask( void ) static void prvStartFirstTask( void )
{ {
#ifndef __CDT_PARSER__ #ifndef __CDT_PARSER__
/* *INDENT-OFF* */
/* When starting the scheduler there is nothing that needs moving to the /* When starting the scheduler there is nothing that needs moving to the
* interrupt stack because the function is not called from an interrupt. * interrupt stack because the function is not called from an interrupt.
* Just ensure the current stack is the user stack. */ * Just ensure the current stack is the user stack. */
SETPSW U SETPSW U
/* Obtain the location of the stack associated with which ever task /* Obtain the location of the stack associated with which ever task
* pxCurrentTCB is currently pointing to. */ * pxCurrentTCB is currently pointing to. */
MOV.L # _pxCurrentTCB, R15 MOV.L #_pxCurrentTCB, R15
MOV.L [ R15 ], R15 MOV.L [ R15 ], R15
MOV.L [ R15 ], R0 MOV.L [ R15 ], R0
/* Restore the registers from the stack of the task pointed to by /* Restore the registers from the stack of the task pointed to by
* pxCurrentTCB. */ * pxCurrentTCB. */
#if ( configUSE_TASK_DPFPU_SUPPORT == 1 ) #if ( configUSE_TASK_DPFPU_SUPPORT == 1 )
/* The restored ulPortTaskHasDPFPUContext is to be zero here. /* The restored ulPortTaskHasDPFPUContext is to be zero here.
* So, it is never necessary to restore the DPFPU context here. */ * So, it is never necessary to restore the DPFPU context here. */
POP R15 POP R15
MOV.L # _ulPortTaskHasDPFPUContext, R14 MOV.L #_ulPortTaskHasDPFPUContext, R14
MOV.L R15, [ R14 ] MOV.L R15, [ R14 ]
#elif ( configUSE_TASK_DPFPU_SUPPORT == 2 ) #elif ( configUSE_TASK_DPFPU_SUPPORT == 2 )
/* Restore the DPFPU context. */ /* Restore the DPFPU context. */
DPOPM.L DPSW-DECNT DPOPM.L DPSW-DECNT
DPOPM.D DR0-DR15 DPOPM.D DR0-DR15
#endif /* if ( configUSE_TASK_DPFPU_SUPPORT == 1 ) */ #endif /* configUSE_TASK_DPFPU_SUPPORT */
POP R15 POP R15
/* Accumulator low 32 bits. */ /* Accumulator low 32 bits. */
MVTACLO R15, A0 MVTACLO R15, A0
POP R15 POP R15
/* Accumulator high 32 bits. */ /* Accumulator high 32 bits. */
MVTACHI R15, A0 MVTACHI R15, A0
POP R15 POP R15
/* Accumulator guard. */ /* Accumulator guard. */
MVTACGU R15, A0 MVTACGU R15, A0
POP R15 POP R15
/* Accumulator low 32 bits. */ /* Accumulator low 32 bits. */
MVTACLO R15, A1 MVTACLO R15, A1
POP R15 POP R15
/* Accumulator high 32 bits. */ /* Accumulator high 32 bits. */
MVTACHI R15, A1 MVTACHI R15, A1
POP R15 POP R15
/* Accumulator guard. */ /* Accumulator guard. */
MVTACGU R15, A1 MVTACGU R15, A1
POP R15 POP R15
/* Floating point status word. */ /* Floating point status word. */
MVTC R15, FPSW MVTC R15, FPSW
/* R1 to R15 - R0 is not included as it is the SP. */ /* R1 to R15 - R0 is not included as it is the SP. */
POPM R1-R15 POPM R1-R15
/* This pops the remaining registers. */ /* This pops the remaining registers. */
RTE RTE
NOP NOP
NOP NOP
#endif /* ifndef __CDT_PARSER__ */ /* *INDENT-ON* */
#endif /* ifndef __CDT_PARSER__ */
} }
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
@ -413,163 +410,165 @@ void vSoftwareInterruptISR( void )
#pragma inline_asm prvYieldHandler #pragma inline_asm prvYieldHandler
static void prvYieldHandler( void ) static void prvYieldHandler( void )
{ {
#ifndef __CDT_PARSER__ #ifndef __CDT_PARSER__
/* *INDENT-OFF* */
/* Re-enable interrupts. */ /* Re-enable interrupts. */
SETPSW I SETPSW I
/* Move the data that was automatically pushed onto the interrupt stack when /* Move the data that was automatically pushed onto the interrupt stack when
* the interrupt occurred from the interrupt stack to the user stack. * the interrupt occurred from the interrupt stack to the user stack.
* *
* R15 is saved before it is clobbered. */ * R15 is saved before it is clobbered. */
PUSH.L R15 PUSH.L R15
/* Read the user stack pointer. */ /* Read the user stack pointer. */
MVFC USP, R15 MVFC USP, R15
/* Move the address down to the data being moved. */ /* Move the address down to the data being moved. */
SUB # 12, R15 SUB #12, R15
MVTC R15, USP MVTC R15, USP
/* Copy the data across, R15, then PC, then PSW. */ /* Copy the data across, R15, then PC, then PSW. */
MOV.L [ R0 ], [ R15 ] MOV.L [ R0 ], [ R15 ]
MOV.L 4[ R0 ], 4[ R15 ] MOV.L 4[ R0 ], 4[ R15 ]
MOV.L 8[ R0 ], 8[ R15 ] MOV.L 8[ R0 ], 8[ R15 ]
/* Move the interrupt stack pointer to its new correct position. */ /* Move the interrupt stack pointer to its new correct position. */
ADD # 12, R0 ADD #12, R0
/* All the rest of the registers are saved directly to the user stack. */ /* All the rest of the registers are saved directly to the user stack. */
SETPSW U SETPSW U
/* Save the rest of the general registers (R15 has been saved already). */ /* Save the rest of the general registers (R15 has been saved already). */
PUSHM R1-R14 PUSHM R1-R14
/* Save the FPSW and accumulators. */ /* Save the FPSW and accumulators. */
MVFC FPSW, R15 MVFC FPSW, R15
PUSH.L R15 PUSH.L R15
MVFACGU # 0, A1, R15 MVFACGU #0, A1, R15
PUSH.L R15 PUSH.L R15
MVFACHI # 0, A1, R15 MVFACHI #0, A1, R15
PUSH.L R15 PUSH.L R15
MVFACLO # 0, A1, R15 /* Low order word. */ MVFACLO #0, A1, R15 /* Low order word. */
PUSH.L R15 PUSH.L R15
MVFACGU # 0, A0, R15 MVFACGU #0, A0, R15
PUSH.L R15 PUSH.L R15
MVFACHI # 0, A0, R15 MVFACHI #0, A0, R15
PUSH.L R15 PUSH.L R15
MVFACLO # 0, A0, R15 /* Low order word. */ MVFACLO #0, A0, R15 /* Low order word. */
PUSH.L R15 PUSH.L R15
#if ( configUSE_TASK_DPFPU_SUPPORT == 1 ) #if ( configUSE_TASK_DPFPU_SUPPORT == 1 )
/* Does the task have a DPFPU context that needs saving? If /* Does the task have a DPFPU context that needs saving? If
* ulPortTaskHasDPFPUContext is 0 then no. */ * ulPortTaskHasDPFPUContext is 0 then no. */
MOV.L # _ulPortTaskHasDPFPUContext, R15 MOV.L #_ulPortTaskHasDPFPUContext, R15
MOV.L [ R15 ], R15 MOV.L [ R15 ], R15
CMP # 0, R15 CMP #0, R15
/* Save the DPFPU context, if any. */ /* Save the DPFPU context, if any. */
BEQ.B ?+ BEQ.B ?+
DPUSHM.D DR0-DR15 DPUSHM.D DR0-DR15
DPUSHM.L DPSW-DECNT DPUSHM.L DPSW-DECNT
?: ?:
/* Save ulPortTaskHasDPFPUContext itself. */ /* Save ulPortTaskHasDPFPUContext itself. */
PUSH.L R15 PUSH.L R15
#elif ( configUSE_TASK_DPFPU_SUPPORT == 2 ) #elif ( configUSE_TASK_DPFPU_SUPPORT == 2 )
/* Save the DPFPU context, always. */ /* Save the DPFPU context, always. */
DPUSHM.D DR0-DR15 DPUSHM.D DR0-DR15
DPUSHM.L DPSW-DECNT DPUSHM.L DPSW-DECNT
#endif /* if ( configUSE_TASK_DPFPU_SUPPORT == 1 ) */ #endif /* configUSE_TASK_DPFPU_SUPPORT */
/* Save the stack pointer to the TCB. */ /* Save the stack pointer to the TCB. */
MOV.L # _pxCurrentTCB, R15 MOV.L #_pxCurrentTCB, R15
MOV.L [ R15 ], R15 MOV.L [ R15 ], R15
MOV.L R0, [ R15 ] MOV.L R0, [ R15 ]
/* Ensure the interrupt mask is set to the syscall priority while the kernel /* Ensure the interrupt mask is set to the syscall priority while the kernel
* structures are being accessed. */ * structures are being accessed. */
MVTIPL # configMAX_SYSCALL_INTERRUPT_PRIORITY MVTIPL #configMAX_SYSCALL_INTERRUPT_PRIORITY
/* Select the next task to run. */ /* Select the next task to run. */
BSR.A _vTaskSwitchContext BSR.A _vTaskSwitchContext
/* Reset the interrupt mask as no more data structure access is required. */ /* Reset the interrupt mask as no more data structure access is required. */
MVTIPL # configKERNEL_INTERRUPT_PRIORITY MVTIPL #configKERNEL_INTERRUPT_PRIORITY
/* Load the stack pointer of the task that is now selected as the Running /* Load the stack pointer of the task that is now selected as the Running
* state task from its TCB. */ * state task from its TCB. */
MOV.L # _pxCurrentTCB, R15 MOV.L #_pxCurrentTCB, R15
MOV.L [ R15 ], R15 MOV.L [ R15 ], R15
MOV.L [ R15 ], R0 MOV.L [ R15 ], R0
/* Restore the context of the new task. The PSW (Program Status Word) and /* Restore the context of the new task. The PSW (Program Status Word) and
* PC will be popped by the RTE instruction. */ * PC will be popped by the RTE instruction. */
#if ( configUSE_TASK_DPFPU_SUPPORT == 1 ) #if ( configUSE_TASK_DPFPU_SUPPORT == 1 )
/* Is there a DPFPU context to restore? If the restored /* Is there a DPFPU context to restore? If the restored
* ulPortTaskHasDPFPUContext is zero then no. */ * ulPortTaskHasDPFPUContext is zero then no. */
POP R15 POP R15
MOV.L # _ulPortTaskHasDPFPUContext, R14 MOV.L #_ulPortTaskHasDPFPUContext, R14
MOV.L R15, [ R14 ] MOV.L R15, [ R14 ]
CMP # 0, R15 CMP #0, R15
/* Restore the DPFPU context, if any. */ /* Restore the DPFPU context, if any. */
BEQ.B ?+ BEQ.B ?+
DPOPM.L DPSW-DECNT DPOPM.L DPSW-DECNT
DPOPM.D DR0-DR15 DPOPM.D DR0-DR15
?: ?:
#elif ( configUSE_TASK_DPFPU_SUPPORT == 2 ) #elif ( configUSE_TASK_DPFPU_SUPPORT == 2 )
/* Restore the DPFPU context, always. */ /* Restore the DPFPU context, always. */
DPOPM.L DPSW-DECNT DPOPM.L DPSW-DECNT
DPOPM.D DR0-DR15 DPOPM.D DR0-DR15
#endif /* if ( configUSE_TASK_DPFPU_SUPPORT == 1 ) */ #endif /* configUSE_TASK_DPFPU_SUPPORT */
POP R15 POP R15
/* Accumulator low 32 bits. */ /* Accumulator low 32 bits. */
MVTACLO R15, A0 MVTACLO R15, A0
POP R15 POP R15
/* Accumulator high 32 bits. */ /* Accumulator high 32 bits. */
MVTACHI R15, A0 MVTACHI R15, A0
POP R15 POP R15
/* Accumulator guard. */ /* Accumulator guard. */
MVTACGU R15, A0 MVTACGU R15, A0
POP R15 POP R15
/* Accumulator low 32 bits. */ /* Accumulator low 32 bits. */
MVTACLO R15, A1 MVTACLO R15, A1
POP R15 POP R15
/* Accumulator high 32 bits. */ /* Accumulator high 32 bits. */
MVTACHI R15, A1 MVTACHI R15, A1
POP R15 POP R15
/* Accumulator guard. */ /* Accumulator guard. */
MVTACGU R15, A1 MVTACGU R15, A1
POP R15 POP R15
MVTC R15, FPSW MVTC R15, FPSW
POPM R1-R15 POPM R1-R15
RTE RTE
NOP NOP
NOP NOP
#endif /* ifndef __CDT_PARSER__ */ /* *INDENT-ON* */
#endif /* ifndef __CDT_PARSER__ */
} }
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/

68
portable/Renesas/RX700v3_DPFPU/port_asm.src
View file

@ -1,41 +1,39 @@
;/* ; /* *INDENT-OFF* */
; * FreeRTOS Kernel V10.3.1 ; /*
; * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * FreeRTOS Kernel V10.3.1
; * ; * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
; * Permission is hereby granted, free of charge, to any person obtaining a copy of ; *
; * this software and associated documentation files (the "Software"), to deal in ; * Permission is hereby granted, free of charge, to any person obtaining a copy of
; * the Software without restriction, including without limitation the rights to ; * this software and associated documentation files (the "Software"), to deal in
; * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of ; * the Software without restriction, including without limitation the rights to
; * the Software, and to permit persons to whom the Software is furnished to do so, ; * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
; * subject to the following conditions: ; * the Software, and to permit persons to whom the Software is furnished to do so,
; * ; * subject to the following conditions:
; * The above copyright notice and this permission notice shall be included in all ; *
; * copies or substantial portions of the Software. ; * The above copyright notice and this permission notice shall be included in all
; * ; * copies or substantial portions of the Software.
; * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR ; *
; * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS ; * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
; * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR ; * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
; * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER ; * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
; * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN ; * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
; * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. ; * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
; * ; * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
; * https://www.FreeRTOS.org ; *
; * https://github.com/FreeRTOS ; * https://www.FreeRTOS.org
; * ; * https://github.com/FreeRTOS
; * 1 tab == 4 spaces! ; *
; */ ; */
.GLB _vSoftwareInterruptISR
.GLB _vSoftwareInterruptEntry
.SECTION P,CODE .GLB _vSoftwareInterruptISR
.GLB _vSoftwareInterruptEntry
.SECTION P,CODE
_vSoftwareInterruptEntry: _vSoftwareInterruptEntry:
BRA _vSoftwareInterruptISR BRA _vSoftwareInterruptISR
.RVECTOR 27, _vSoftwareInterruptEntry
.END
.RVECTOR 27, _vSoftwareInterruptEntry
.END

177
portable/Renesas/RX700v3_DPFPU/portmacro.h
View file

@ -22,19 +22,19 @@
* https://www.FreeRTOS.org * https://www.FreeRTOS.org
* https://github.com/FreeRTOS * https://github.com/FreeRTOS
* *
* 1 tab == 4 spaces!
*/ */
#ifndef PORTMACRO_H #ifndef PORTMACRO_H
#define PORTMACRO_H #define PORTMACRO_H
#ifdef __cplusplus /* *INDENT-OFF* */
extern "C" { #ifdef __cplusplus
#endif extern "C" {
#endif
/* *INDENT-ON* */
/* Hardware specifics. */ /* Hardware specifics. */
#include <machine.h> #include <machine.h>
/*----------------------------------------------------------- /*-----------------------------------------------------------
* Port specific definitions. * Port specific definitions.
@ -46,11 +46,11 @@
*----------------------------------------------------------- *-----------------------------------------------------------
*/ */
/* When the FIT configurator or the Smart Configurator is used, platform.h has to be /* When the FIT configurator or the Smart Configurator is used, platform.h has to be
* used. */ * used. */
#ifndef configINCLUDE_PLATFORM_H_INSTEAD_OF_IODEFINE_H #ifndef configINCLUDE_PLATFORM_H_INSTEAD_OF_IODEFINE_H
#define configINCLUDE_PLATFORM_H_INSTEAD_OF_IODEFINE_H 0 #define configINCLUDE_PLATFORM_H_INSTEAD_OF_IODEFINE_H 0
#endif #endif
/* If configUSE_TASK_DPFPU_SUPPORT is set to 1 (or undefined) then each task will /* If configUSE_TASK_DPFPU_SUPPORT is set to 1 (or undefined) then each task will
* be created without a DPFPU context, and a task must call vTaskUsesDPFPU() before * be created without a DPFPU context, and a task must call vTaskUsesDPFPU() before
@ -58,106 +58,108 @@
* tasks are created with a DPFPU context by default, and calling vTaskUsesDPFPU() has * tasks are created with a DPFPU context by default, and calling vTaskUsesDPFPU() has
* no effect. If configUSE_TASK_DPFPU_SUPPORT is set to 0 then tasks never take care * no effect. If configUSE_TASK_DPFPU_SUPPORT is set to 0 then tasks never take care
* of any DPFPU context (even if DPFPU registers are used). */ * of any DPFPU context (even if DPFPU registers are used). */
#ifndef configUSE_TASK_DPFPU_SUPPORT #ifndef configUSE_TASK_DPFPU_SUPPORT
#define configUSE_TASK_DPFPU_SUPPORT 1 #define configUSE_TASK_DPFPU_SUPPORT 1
#endif #endif
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
/* Type definitions - these are a bit legacy and not really used now, other than /* Type definitions - these are a bit legacy and not really used now, other than
* portSTACK_TYPE and portBASE_TYPE. */ * portSTACK_TYPE and portBASE_TYPE. */
#define portCHAR char #define portCHAR char
#define portFLOAT float #define portFLOAT float
#define portDOUBLE double #define portDOUBLE double
#define portLONG long #define portLONG long
#define portSHORT short #define portSHORT short
#define portSTACK_TYPE uint32_t #define portSTACK_TYPE uint32_t
#define portBASE_TYPE long #define portBASE_TYPE long
typedef portSTACK_TYPE StackType_t; typedef portSTACK_TYPE StackType_t;
typedef long BaseType_t; typedef long BaseType_t;
typedef unsigned long UBaseType_t; typedef unsigned long UBaseType_t;
#if ( configUSE_16_BIT_TICKS == 1 ) #if ( configUSE_16_BIT_TICKS == 1 )
typedef uint16_t TickType_t; typedef uint16_t TickType_t;
#define portMAX_DELAY ( TickType_t ) 0xffff #define portMAX_DELAY ( TickType_t ) 0xffff
#else #else
typedef uint32_t TickType_t; typedef uint32_t TickType_t;
#define portMAX_DELAY ( TickType_t ) 0xffffffffUL #define portMAX_DELAY ( TickType_t ) 0xffffffffUL
/* 32-bit tick type on a 32-bit architecture, so reads of the tick count do /* 32-bit tick type on a 32-bit architecture, so reads of the tick count do
* not need to be guarded with a critical section. */ * not need to be guarded with a critical section. */
#define portTICK_TYPE_IS_ATOMIC 1 #define portTICK_TYPE_IS_ATOMIC 1
#endif #endif
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
/* Hardware specifics. */ /* Hardware specifics. */
#define portBYTE_ALIGNMENT 8 /* Could make four, according to manual. */ #define portBYTE_ALIGNMENT 8 /* Could make four, according to manual. */
#define portSTACK_GROWTH -1 #define portSTACK_GROWTH -1
#define portTICK_PERIOD_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ ) #define portTICK_PERIOD_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )
#define portNOP() nop() #define portNOP() nop()
/* Yield equivalent to "*portITU_SWINTR = 0x01; ( void ) *portITU_SWINTR;" /* Yield equivalent to "*portITU_SWINTR = 0x01; ( void ) *portITU_SWINTR;"
* where portITU_SWINTR is the location of the software interrupt register * where portITU_SWINTR is the location of the software interrupt register
* (0x000872E0). Don't rely on the assembler to select a register, so instead * (0x000872E0). Don't rely on the assembler to select a register, so instead
* save and restore clobbered registers manually. */ * save and restore clobbered registers manually. */
#pragma inline_asm vPortYield /* *INDENT-OFF* */
static void vPortYield( void ) #pragma inline_asm vPortYield
{ static void vPortYield( void )
#ifndef __CDT_PARSER__ {
/* Save clobbered register - may not actually be necessary if inline asm #ifndef __CDT_PARSER__
* functions are considered to use the same rules as function calls by the /* Save clobbered register - may not actually be necessary if inline asm
* compiler. */ * functions are considered to use the same rules as function calls by the
PUSH.L R5 * compiler. */
/* Set ITU SWINTR. */ PUSH.L R5
MOV.L # 000872E0H, R5 /* Set ITU SWINTR. */
MOV.B # 1, [ R5 ] MOV.L #000872E0H, R5
/* Read back to ensure the value is taken before proceeding. */ MOV.B #1, [ R5 ]
CMP [ R5 ].UB, R5 /* Read back to ensure the value is taken before proceeding. */
/* Restore clobbered register to its previous value. */ CMP [ R5 ].UB, R5
POP R5 /* Restore clobbered register to its previous value. */
#endif POP R5
} #endif
}
/* *INDENT-ON* */
#define portYIELD() vPortYield() #define portYIELD() vPortYield()
#define portYIELD_FROM_ISR( x ) if( ( x ) != pdFALSE ) portYIELD() #define portYIELD_FROM_ISR( x ) if( ( x ) != pdFALSE ) portYIELD()
/* These macros should not be called directly, but through the /* These macros should not be called directly, but through the
* taskENTER_CRITICAL() and taskEXIT_CRITICAL() macros. An extra check is * taskENTER_CRITICAL() and taskEXIT_CRITICAL() macros. An extra check is
* performed if configASSERT() is defined to ensure an assertion handler does not * performed if configASSERT() is defined to ensure an assertion handler does not
* inadvertently attempt to lower the IPL when the call to assert was triggered * inadvertently attempt to lower the IPL when the call to assert was triggered
* because the IPL value was found to be above configMAX_SYSCALL_INTERRUPT_PRIORITY * because the IPL value was found to be above configMAX_SYSCALL_INTERRUPT_PRIORITY
* when an ISR safe FreeRTOS API function was executed. ISR safe FreeRTOS API * when an ISR safe FreeRTOS API function was executed. ISR safe FreeRTOS API
* functions are those that end in FromISR. FreeRTOS maintains a separate * functions are those that end in FromISR. FreeRTOS maintains a separate
* interrupt API to ensure API function and interrupt entry is as fast and as * interrupt API to ensure API function and interrupt entry is as fast and as
* simple as possible. */ * simple as possible. */
#define portENABLE_INTERRUPTS() set_ipl( ( long ) 0 ) #define portENABLE_INTERRUPTS() set_ipl( ( long ) 0 )
#ifdef configASSERT #ifdef configASSERT
#define portASSERT_IF_INTERRUPT_PRIORITY_INVALID() configASSERT( ( get_ipl() <= configMAX_SYSCALL_INTERRUPT_PRIORITY ) ) #define portASSERT_IF_INTERRUPT_PRIORITY_INVALID() configASSERT( ( get_ipl() <= configMAX_SYSCALL_INTERRUPT_PRIORITY ) )
#define portDISABLE_INTERRUPTS() if( get_ipl() < configMAX_SYSCALL_INTERRUPT_PRIORITY ) set_ipl( ( long ) configMAX_SYSCALL_INTERRUPT_PRIORITY ) #define portDISABLE_INTERRUPTS() if( get_ipl() < configMAX_SYSCALL_INTERRUPT_PRIORITY ) set_ipl( ( long ) configMAX_SYSCALL_INTERRUPT_PRIORITY )
#else #else
#define portDISABLE_INTERRUPTS() set_ipl( ( long ) configMAX_SYSCALL_INTERRUPT_PRIORITY ) #define portDISABLE_INTERRUPTS() set_ipl( ( long ) configMAX_SYSCALL_INTERRUPT_PRIORITY )
#endif #endif
/* Critical nesting counts are stored in the TCB. */ /* Critical nesting counts are stored in the TCB. */
#define portCRITICAL_NESTING_IN_TCB ( 1 ) #define portCRITICAL_NESTING_IN_TCB ( 1 )
/* The critical nesting functions defined within tasks.c. */ /* The critical nesting functions defined within tasks.c. */
extern void vTaskEnterCritical( void ); extern void vTaskEnterCritical( void );
extern void vTaskExitCritical( void ); extern void vTaskExitCritical( void );
#define portENTER_CRITICAL() vTaskEnterCritical() #define portENTER_CRITICAL() vTaskEnterCritical()
#define portEXIT_CRITICAL() vTaskExitCritical() #define portEXIT_CRITICAL() vTaskExitCritical()
/* As this port allows interrupt nesting... */ /* As this port allows interrupt nesting... */
#define portSET_INTERRUPT_MASK_FROM_ISR() ( UBaseType_t ) get_ipl(); set_ipl( ( long ) configMAX_SYSCALL_INTERRUPT_PRIORITY ) #define portSET_INTERRUPT_MASK_FROM_ISR() ( UBaseType_t ) get_ipl(); set_ipl( ( long ) configMAX_SYSCALL_INTERRUPT_PRIORITY )
#define portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedInterruptStatus ) set_ipl( ( long ) uxSavedInterruptStatus ) #define portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedInterruptStatus ) set_ipl( ( long ) uxSavedInterruptStatus )
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
/* Task function macros as described on the FreeRTOS.org WEB site. */ /* Task function macros as described on the FreeRTOS.org WEB site. */
#define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void * pvParameters ) #define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void * pvParameters )
#define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void * pvParameters ) #define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void * pvParameters )
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
@ -166,20 +168,23 @@
* themselves a DPFPU context before using any DPFPU instructions. If * themselves a DPFPU context before using any DPFPU instructions. If
* configUSE_TASK_DPFPU_SUPPORT is set to 2 then all tasks will have a DPFPU context * configUSE_TASK_DPFPU_SUPPORT is set to 2 then all tasks will have a DPFPU context
* by default. */ * by default. */
#if( configUSE_TASK_DPFPU_SUPPORT == 1 ) #if ( configUSE_TASK_DPFPU_SUPPORT == 1 )
void vPortTaskUsesDPFPU( void ); void vPortTaskUsesDPFPU( void );
#else #else
/* Each task has a DPFPU context already, so define this function away to
* nothing to prevent it being called accidentally. */ /* Each task has a DPFPU context already, so define this function away to
#define vPortTaskUsesDPFPU() * nothing to prevent it being called accidentally. */
#endif #define vPortTaskUsesDPFPU()
#define portTASK_USES_DPFPU() vPortTaskUsesDPFPU() #endif
#define portTASK_USES_DPFPU() vPortTaskUsesDPFPU()
/* Definition to allow compatibility with existing FreeRTOS Demo using flop.c. */ /* Definition to allow compatibility with existing FreeRTOS Demo using flop.c. */
#define portTASK_USES_FLOATING_POINT() vPortTaskUsesDPFPU() #define portTASK_USES_FLOATING_POINT() vPortTaskUsesDPFPU()
#ifdef __cplusplus /* *INDENT-OFF* */
} #ifdef __cplusplus
#endif }
#endif
/* *INDENT-ON* */
#endif /* PORTMACRO_H */ #endif /* PORTMACRO_H */