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Updated ESP32 port-layer to ESP-IDF v4.4.2 (#572)
* Xtensa_ESP32: Added esp-idf v4.4.2 specific changes * Xtensa_ESP32: Updated SPDX license identifiers
This commit is contained in:
Laukik Hase
GitHub
parent
195a351ec7
commit
963abe6c48
15 changed files with 854 additions and 1096 deletions
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@ -74,12 +74,20 @@
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#include <xtensa/config/core.h>
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#include <xtensa/config/system.h> /* required for XSHAL_CLIB */
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#include <xtensa/xtruntime.h>
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#include "soc/spinlock.h"
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#include "esp_timer.h" /* required for FreeRTOS run time stats */
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#include "esp_system.h"
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#include "esp_idf_version.h"
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#include "esp_heap_caps.h"
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/* TODO: Resolve build warnings generated due to this header inclusion */
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#include "hal/cpu_hal.h"
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#include <esp_heap_caps.h>
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/* TODO: These includes are not directly used in this file. They are kept into to prevent a breaking change. Remove these. */
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#include <limits.h>
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#include <xtensa/xtensa_api.h>
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#include "soc/cpu.h"
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#include "soc/soc_memory_layout.h"
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#if (ESP_IDF_VERSION >= ESP_IDF_VERSION_VAL(4, 2, 0))
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#include "soc/compare_set.h"
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@ -127,54 +135,12 @@
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#include "esp_attr.h"
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/* "mux" data structure (spinlock) */
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typedef struct
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{
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/* owner field values:
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* 0 - Uninitialized (invalid)
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* portMUX_FREE_VAL - Mux is free, can be locked by either CPU
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* CORE_ID_REGVAL_PRO / CORE_ID_REGVAL_APP - Mux is locked to the particular core
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*
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* Any value other than portMUX_FREE_VAL, CORE_ID_REGVAL_PRO, CORE_ID_REGVAL_APP indicates corruption
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*/
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uint32_t owner;
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/* count field:
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* If mux is unlocked, count should be zero.
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* If mux is locked, count is non-zero & represents the number of recursive locks on the mux.
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*/
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uint32_t count;
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#ifdef CONFIG_FREERTOS_PORTMUX_DEBUG
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const char * lastLockedFn;
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int lastLockedLine;
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#endif
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} portMUX_TYPE;
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#define portMUX_FREE_VAL 0xB33FFFFF
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/* Special constants for vPortCPUAcquireMutexTimeout() */
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#define portMUX_NO_TIMEOUT ( -1 ) /* When passed for 'timeout_cycles', spin forever if necessary */
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#define portMUX_TRY_LOCK 0 /* Try to acquire the spinlock a single time only */
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/* Keep this in sync with the portMUX_TYPE struct definition please. */
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#ifndef CONFIG_FREERTOS_PORTMUX_DEBUG
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#define portMUX_INITIALIZER_UNLOCKED \
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{ \
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.owner = portMUX_FREE_VAL, \
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.count = 0, \
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}
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#else
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#define portMUX_INITIALIZER_UNLOCKED \
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{ \
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.owner = portMUX_FREE_VAL, \
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.count = 0, \
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.lastLockedFn = "(never locked)", \
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.lastLockedLine = -1 \
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}
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#endif /* ifndef CONFIG_FREERTOS_PORTMUX_DEBUG */
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#define portASSERT_IF_IN_ISR() vPortAssertIfInISR()
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void vPortAssertIfInISR();
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typedef spinlock_t portMUX_TYPE; /**< Spinlock type used by FreeRTOS critical sections */
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#define portMUX_INITIALIZER_UNLOCKED SPINLOCK_INITIALIZER /**< Spinlock initializer */
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#define portMUX_FREE_VAL SPINLOCK_FREE /**< Spinlock is free. [refactor-todo] check if this is still required */
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#define portMUX_NO_TIMEOUT SPINLOCK_WAIT_FOREVER /**< When passed for 'timeout_cycles', spin forever if necessary. [refactor-todo] check if this is still required */
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#define portMUX_TRY_LOCK SPINLOCK_NO_WAIT /**< Try to acquire the spinlock a single time only. [refactor-todo] check if this is still required */
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#define portMUX_INITIALIZE(mux) spinlock_initialize(mux) /*< Initialize a spinlock to its unlocked state */
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#define portCRITICAL_NESTING_IN_TCB 1
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@ -200,7 +166,7 @@
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* This all assumes that interrupts are either entirely disabled or enabled. Interrupt priority levels
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* will break this scheme.
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*
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* Remark: For the ESP32, portENTER_CRITICAL and portENTER_CRITICAL_ISR both alias vTaskEnterCritical, meaning
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* Remark: For the ESP32, portENTER_CRITICAL and portENTER_CRITICAL_ISR both alias vPortEnterCritical, meaning
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* that either function can be called both from ISR as well as task context. This is not standard FreeRTOS
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* behaviour; please keep this in mind if you need any compatibility with other FreeRTOS implementations.
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*/
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@ -255,6 +221,8 @@
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} \
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} while( 0 )
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#define portASSERT_IF_IN_ISR() vPortAssertIfInISR()
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void vPortAssertIfInISR(void);
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/* Critical section management. NW-TODO: replace XTOS_SET_INTLEVEL with more efficient version, if any? */
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/* These cannot be nested. They should be used with a lot of care and cannot be called from interrupt level. */
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@ -266,18 +234,22 @@
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/* Cleaner solution allows nested interrupts disabling and restoring via local registers or stack. */
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/* They can be called from interrupts too. */
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/* WARNING: Only applies to current CPU. See notes above. */
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static inline unsigned portENTER_CRITICAL_NESTED()
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static inline UBaseType_t __attribute__( ( always_inline ) ) xPortSetInterruptMaskFromISR( void )
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{
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unsigned state = XTOS_SET_INTLEVEL( XCHAL_EXCM_LEVEL );
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UBaseType_t prev_int_level = XTOS_SET_INTLEVEL( XCHAL_EXCM_LEVEL );
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portbenchmarkINTERRUPT_DISABLE();
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return state;
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return prev_int_level;
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}
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static inline void __attribute__( ( always_inline ) ) vPortClearInterruptMaskFromISR( UBaseType_t prev_level )
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{
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portbenchmarkINTERRUPT_RESTORE( prev_level );
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XTOS_RESTORE_JUST_INTLEVEL( prev_level );
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}
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#define portEXIT_CRITICAL_NESTED( state ) do { portbenchmarkINTERRUPT_RESTORE( state ); XTOS_RESTORE_JUST_INTLEVEL( state ); } while( 0 )
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/* These FreeRTOS versions are similar to the nested versions above */
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#define portSET_INTERRUPT_MASK_FROM_ISR() portENTER_CRITICAL_NESTED()
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#define portCLEAR_INTERRUPT_MASK_FROM_ISR( state ) portEXIT_CRITICAL_NESTED( state )
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#define portSET_INTERRUPT_MASK_FROM_ISR() xPortSetInterruptMaskFromISR()
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#define portCLEAR_INTERRUPT_MASK_FROM_ISR( prev_level ) vPortClearInterruptMaskFromISR( prev_level )
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/*Because the ROM routines don't necessarily handle a stack in external RAM correctly, we force */
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/*the stack memory to always be internal. */
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@ -352,7 +324,7 @@
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#else
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static inline void uxPortCompareSetExtram(volatile uint32_t *addr, uint32_t compare, uint32_t *set)
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{
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#if defined(CONFIG_ESP32_SPIRAM_SUPPORT)
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#if defined(CONFIG_SPIRAM)
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compare_and_set_extram(addr, compare, set);
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#endif
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}
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@ -374,18 +346,47 @@
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#ifdef CONFIG_FREERTOS_RUN_TIME_STATS_USING_ESP_TIMER
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/* Coarse resolution time (us) */
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#define portALT_GET_RUN_TIME_COUNTER_VALUE( x ) x = ( uint32_t ) esp_timer_get_time()
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#define portALT_GET_RUN_TIME_COUNTER_VALUE( x ) do { x = ( uint32_t )esp_timer_get_time(); } while( 0 )
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#endif
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/* Kernel utilities. */
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void vPortYield( void );
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void vPortEvaluateYieldFromISR( int argc, ... );
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void _frxt_setup_switch( void );
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#define portYIELD() vPortYield()
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#define portYIELD_FROM_ISR() { traceISR_EXIT_TO_SCHEDULER(); _frxt_setup_switch(); }
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/* Macro to count number of arguments of a __VA_ARGS__ used to support portYIELD_FROM_ISR with,
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* or without arguments. The macro counts only 0 or 1 arguments.
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*
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* In the future, we want to switch to C++20. We also want to become compatible with clang.
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* Hence, we provide two versions of the following macros which are using variadic arguments.
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* The first one is using the GNU extension ##__VA_ARGS__. The second one is using the C++20 feature __VA_OPT__(,).
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* This allows users to compile their code with standard C++20 enabled instead of the GNU extension.
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* Below C++20, we haven't found any good alternative to using ##__VA_ARGS__.
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*/
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#if defined( __cplusplus ) && ( __cplusplus > 201703L )
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#define portGET_ARGUMENT_COUNT(...) portGET_ARGUMENT_COUNT_INNER( 0 __VA_OPT__(,) __VA_ARGS__, 1 , 0 )
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#else
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#define portGET_ARGUMENT_COUNT(...) portGET_ARGUMENT_COUNT_INNER( 0, ##__VA_ARGS__, 1, 0 )
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#endif
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#define portGET_ARGUMENT_COUNT_INNER( zero, one, count, ... ) count
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static inline uint32_t xPortGetCoreID();
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_Static_assert( portGET_ARGUMENT_COUNT() == 0, "portGET_ARGUMENT_COUNT() result does not match for 0 arguments" );
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_Static_assert( portGET_ARGUMENT_COUNT( 1 ) == 1, "portGET_ARGUMENT_COUNT() result does not match for 1 argument" );
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#define portYIELD() vPortYield()
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/* The macro below could be used when passing a single argument, or without any argument,
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* it was developed to support both usages of portYIELD inside of an ISR. Any other usage form
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* might result in undesired behaviour
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*/
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#if defined( __cplusplus ) && ( __cplusplus > 201703L )
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#define portYIELD_FROM_ISR(...) vPortEvaluateYieldFromISR( portGET_ARGUMENT_COUNT( __VA_ARGS__ ) __VA_OPT__( , ) __VA_ARGS__ )
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#else
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#define portYIELD_FROM_ISR(...) vPortEvaluateYieldFromISR( portGET_ARGUMENT_COUNT( __VA_ARGS__ ), ##__VA_ARGS__ )
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#endif
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static inline BaseType_t xPortGetCoreID();
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/*-----------------------------------------------------------*/
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@ -428,10 +429,11 @@
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#endif
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void vApplicationSleep( TickType_t xExpectedIdleTime );
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void vPortSetStackWatchpoint( void* pxStackStart );
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#define portSUPPRESS_TICKS_AND_SLEEP( idleTime ) vApplicationSleep( idleTime )
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void _xt_coproc_release( volatile void * coproc_sa_base );
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/*-----------------------------------------------------------*/
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#if (ESP_IDF_VERSION >= ESP_IDF_VERSION_VAL(4, 2, 0))
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@ -458,10 +460,6 @@
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/*-----------------------------------------------------------*/
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void _xt_coproc_release( volatile void * coproc_sa_base );
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/*
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* Map to the memory management routines required for the port.
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*
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@ -520,20 +518,31 @@
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#endif
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/* Multi-core: get current core ID */
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static inline uint32_t IRAM_ATTR xPortGetCoreID()
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static inline BaseType_t IRAM_ATTR xPortGetCoreID()
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{
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int id;
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asm (
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"rsr.prid %0\n"
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" extui %0,%0,13,1"
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: "=r" ( id ) );
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return id;
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return ( uint32_t )cpu_hal_get_core_id();
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}
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/* Get tick rate per second */
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uint32_t xPortGetTickRateHz( void );
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static inline bool IRAM_ATTR xPortCanYield(void)
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{
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uint32_t ps_reg = 0;
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//Get the current value of PS (processor status) register
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RSR(PS, ps_reg);
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/*
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* intlevel = (ps_reg & 0xf);
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* excm = (ps_reg >> 4) & 0x1;
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* CINTLEVEL is max(excm * EXCMLEVEL, INTLEVEL), where EXCMLEVEL is 3.
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* However, just return true, only intlevel is zero.
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*/
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return ((ps_reg & PS_INTLEVEL_MASK) == 0);
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}
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/* porttrace */
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#if configUSE_TRACE_FACILITY_2
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#include "porttrace.h"
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