mirror of
https://github.com/FreeRTOS/FreeRTOS-Kernel.git
synced 2025-08-19 17:48:33 -04:00
Updated AVR32 demos and added AVR32 UC3B demo.
This commit is contained in:
Richard Barry
parent
45e7e5ac55
commit
94c94d3c0e
164 changed files with 21458 additions and 3994 deletions
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@ -1,15 +1,16 @@
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/******************************************************************************
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* Exception and interrupt vectors.
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/*This file is prepared for Doxygen automatic documentation generation.*/
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/*! \file *********************************************************************
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*
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* This file has been built from the Newlib exception.S. It maps all events
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* supported by a UC3.
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* \brief Exception and interrupt vectors.
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*
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* This file maps all events supported by an AVR32UC.
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*
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* - Compiler: IAR EWAVR32
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* - Supported devices: All AVR32A devices with an INTC module can be used.
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* - Supported devices: All AVR32UC devices with an INTC module can be used.
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* - AppNote:
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*
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* - author Atmel Corporation: http://www.atmel.com \n
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* Support email: avr32@atmel.com
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* \author Atmel Corporation: http://www.atmel.com \n
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* Support and FAQ: http://support.atmel.no/
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*
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******************************************************************************/
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@ -41,11 +42,14 @@
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*/
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#include <avr32/iouc3a0512.h>
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#include <avr32/uc3a0512.h>
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#include <avr32/io.h>
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#include "intc.h"
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//! @{
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//! \verbatim
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// Start of Exception Vector Table.
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// EVBA must be aligned with a power of two strictly greater than the EVBA-
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@ -66,107 +70,107 @@ _evba:
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ORG 0x000
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// Unrecoverable Exception.
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_handle_Unrecoverable_Exception:
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rjmp $
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rjmp _handle_Unrecoverable_Exception
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ORG 0x004
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// TLB Multiple Hit: UNUSED IN AVR32A.
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// TLB Multiple Hit: UNUSED IN AVR32UC.
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_handle_TLB_Multiple_Hit:
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rjmp $
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rjmp _handle_TLB_Multiple_Hit
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ORG 0x008
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// Bus Error Data Fetch.
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_handle_Bus_Error_Data_Fetch:
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rjmp $
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rjmp _handle_Bus_Error_Data_Fetch
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ORG 0x00C
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// Bus Error Instruction Fetch.
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_handle_Bus_Error_Instruction_Fetch:
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rjmp $
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rjmp _handle_Bus_Error_Instruction_Fetch
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ORG 0x010
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// NMI.
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_handle_NMI:
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rjmp $
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rjmp _handle_NMI
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ORG 0x014
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// Instruction Address.
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_handle_Instruction_Address:
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rjmp $
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rjmp _handle_Instruction_Address
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ORG 0x018
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// ITLB Protection.
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_handle_ITLB_Protection:
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rjmp $
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rjmp _handle_ITLB_Protection
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ORG 0x01C
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// Breakpoint.
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_handle_Breakpoint:
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rjmp $
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rjmp _handle_Breakpoint
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ORG 0x020
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// Illegal Opcode.
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_handle_Illegal_Opcode:
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rjmp $
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rjmp _handle_Illegal_Opcode
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ORG 0x024
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// Unimplemented Instruction.
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_handle_Unimplemented_Instruction:
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rjmp $
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rjmp _handle_Unimplemented_Instruction
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ORG 0x028
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// Privilege Violation.
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_handle_Privilege_Violation:
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rjmp $
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rjmp _handle_Privilege_Violation
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ORG 0x02C
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// Floating-Point: UNUSED IN AVR32A.
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// Floating-Point: UNUSED IN AVR32UC.
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_handle_Floating_Point:
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rjmp $
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rjmp _handle_Floating_Point
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ORG 0x030
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// Coprocessor Absent: UNUSED IN AVR32A.
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// Coprocessor Absent: UNUSED IN AVR32UC.
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_handle_Coprocessor_Absent:
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rjmp $
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rjmp _handle_Coprocessor_Absent
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ORG 0x034
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// Data Address (Read).
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_handle_Data_Address_Read:
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rjmp $
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rjmp _handle_Data_Address_Read
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ORG 0x038
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// Data Address (Write).
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_handle_Data_Address_Write:
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rjmp $
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rjmp _handle_Data_Address_Write
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ORG 0x03C
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// DTLB Protection (Read).
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_handle_DTLB_Protection_Read:
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rjmp $
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rjmp _handle_DTLB_Protection_Read
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ORG 0x040
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// DTLB Protection (Write).
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_handle_DTLB_Protection_Write:
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rjmp $
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rjmp _handle_DTLB_Protection_Write
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ORG 0x044
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// DTLB Modified: UNUSED IN AVR32A.
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// DTLB Modified: UNUSED IN AVR32UC.
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_handle_DTLB_Modified:
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rjmp $
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rjmp _handle_DTLB_Modified
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ORG 0x050
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// ITLB Miss: UNUSED IN AVR32A.
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// ITLB Miss: UNUSED IN AVR32UC.
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_handle_ITLB_Miss:
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rjmp $
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rjmp _handle_ITLB_Miss
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ORG 0x060
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// DTLB Miss (Read): UNUSED IN AVR32A.
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// DTLB Miss (Read): UNUSED IN AVR32UC.
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_handle_DTLB_Miss_Read:
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rjmp $
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rjmp _handle_DTLB_Miss_Read
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ORG 0x070
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// DTLB Miss (Write): UNUSED IN AVR32A.
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// DTLB Miss (Write): UNUSED IN AVR32UC.
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_handle_DTLB_Miss_Write:
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rjmp $
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rjmp _handle_DTLB_Miss_Write
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ORG 0x100
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// Supervisor Call.
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@ -300,3 +304,7 @@ ipr_val:
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END
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//! \endverbatim
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//! @}
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@ -8,7 +8,7 @@
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* - AppNote:
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*
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* \author Atmel Corporation: http://www.atmel.com \n
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* Support email: avr32@atmel.com
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* Support and FAQ: http://support.atmel.no/
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*
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*****************************************************************************/
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@ -50,12 +50,10 @@
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/* Scheduler includes. */
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#include "FreeRTOS.h"
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/* Get rid of inline in task.h. */
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#include "task.h"
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/* AVR32 UC3 includes. */
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#include <avr32/iouc3a0512.h>
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#include <avr32/io.h>
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#include <intrinsics.h>
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#include "gpio.h"
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@ -79,6 +77,10 @@ volatile unsigned portLONG ulCriticalNesting = 9999UL;
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#if( configTICK_USE_TC==0 )
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static void prvScheduleNextTick( void );
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#endif
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/* Setup the timer to generate the tick interrupts. */
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static void prvSetupTimerInterrupt( void );
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/*-----------------------------------------------------------*/
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/*
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@ -111,21 +113,27 @@ int __low_level_init(void)
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/* Code section present if and only if the debug trace is activated. */
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#if configDBG
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{
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static const usart_options_t usart_opt =
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static const gpio_map_t DBG_USART_GPIO_MAP =
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{
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.baudrate = configDBG_USART_BAUDRATE,
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.charlength = 8,
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.paritytype = USART_NO_PARITY,
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.stopbits = USART_1_STOPBIT,
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.channelmode = USART_MODE_NORMAL
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{ configDBG_USART_RX_PIN, configDBG_USART_RX_FUNCTION },
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{ configDBG_USART_TX_PIN, configDBG_USART_TX_FUNCTION }
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};
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static const usart_options_t DBG_USART_OPTIONS =
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{
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.baudrate = configDBG_USART_BAUDRATE,
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.charlength = 8,
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.paritytype = USART_NO_PARITY,
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.stopbits = USART_1_STOPBIT,
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.channelmode = USART_NORMAL_CHMODE
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};
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/* Initialize the USART used for the debug trace with the configured parameters. */
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extern volatile avr32_usart_t *volatile stdio_usart_base;
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stdio_usart_base = configDBG_USART;
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gpio_enable_module_pin(configDBG_USART_RX_PIN, configDBG_USART_RX_FUNCTION);
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gpio_enable_module_pin(configDBG_USART_TX_PIN, configDBG_USART_TX_FUNCTION);
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usart_init_rs232(configDBG_USART, &usart_opt, configCPU_CLOCK_HZ);
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gpio_enable_module( DBG_USART_GPIO_MAP,
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sizeof( DBG_USART_GPIO_MAP ) / sizeof( DBG_USART_GPIO_MAP[0] ) );
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usart_init_rs232(configDBG_USART, &DBG_USART_OPTIONS, configCPU_CLOCK_HZ);
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}
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#endif
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@ -159,15 +167,15 @@ static void vTick( void )
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/* Save the context of the interrupted task. */
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portSAVE_CONTEXT_OS_INT();
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/* Schedule the COUNT&COMPARE match interrupt in (configCPU_CLOCK_HZ/configTICK_RATE_HZ)
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clock cycles from now. */
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#if( configTICK_USE_TC==1 )
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/* Clear the interrupt flag. */
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AVR32_TC.channel[configTICK_TC_CHANNEL].sr;
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#else
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/* Schedule the COUNT&COMPARE match interrupt in (configCPU_CLOCK_HZ/configTICK_RATE_HZ)
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clock cycles from now. */
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prvScheduleNextTick();
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#endif
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/* Because FreeRTOS is not supposed to run with nested interrupts, put all OS
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calls in a critical section . */
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portENTER_CRITICAL();
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@ -219,10 +227,6 @@ void vPortExitCritical( void )
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}
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/*-----------------------------------------------------------*/
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/* Setup the timer to generate the tick interrupts. */
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static void prvSetupTimerInterrupt( void );
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/*-----------------------------------------------------------*/
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/*
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* Initialise the stack of a task to look exactly as if a call to
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* portSAVE_CONTEXT had been called.
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@ -282,13 +286,39 @@ void vPortEndScheduler( void )
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/* Schedule the COUNT&COMPARE match interrupt in (configCPU_CLOCK_HZ/configTICK_RATE_HZ)
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clock cycles from now. */
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#if( configTICK_USE_TC==0 )
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static void prvScheduleFirstTick(void)
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{
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unsigned long lCycles;
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lCycles = Get_system_register(AVR32_COUNT);
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lCycles += (configCPU_CLOCK_HZ/configTICK_RATE_HZ);
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// If lCycles ends up to be 0, make it 1 so that the COMPARE and exception
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// generation feature does not get disabled.
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if(0 == lCycles)
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{
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lCycles++;
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}
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Set_system_register(AVR32_COMPARE, lCycles);
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}
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static void prvScheduleNextTick(void)
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{
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unsigned long lCountVal, lCompareVal;
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unsigned long lCycles, lCount;
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lCountVal = Get_system_register(AVR32_COUNT);
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lCompareVal = lCountVal + (configCPU_CLOCK_HZ/configTICK_RATE_HZ);
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Set_system_register(AVR32_COMPARE, lCompareVal);
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lCycles = Get_system_register(AVR32_COMPARE);
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lCycles += (configCPU_CLOCK_HZ/configTICK_RATE_HZ);
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// If lCycles ends up to be 0, make it 1 so that the COMPARE and exception
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// generation feature does not get disabled.
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if(0 == lCycles)
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{
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lCycles++;
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}
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lCount = Get_system_register(AVR32_COUNT);
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if( lCycles < lCount )
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{ // We missed a tick, recover for the next.
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lCycles += (configCPU_CLOCK_HZ/configTICK_RATE_HZ);
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}
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Set_system_register(AVR32_COMPARE, lCycles);
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}
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#endif
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/*-----------------------------------------------------------*/
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@ -357,7 +387,7 @@ static void prvSetupTimerInterrupt(void)
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/* Set the compare triggers.
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Remember TC counter is 16-bits, so counting second is not possible!
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That's why we configure it to count ms. */
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tc_write_rc( tc, configTICK_TC_CHANNEL, ( configPBA_CLOCK_HZ / 4) / 1000 );
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tc_write_rc( tc, configTICK_TC_CHANNEL, ( configPBA_CLOCK_HZ / 4) / configTICK_RATE_HZ );
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tc_configure_interrupts( tc, configTICK_TC_CHANNEL, &tc_interrupt );
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@ -367,7 +397,7 @@ static void prvSetupTimerInterrupt(void)
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#else
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{
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INTC_register_interrupt((__int_handler)&vTick, AVR32_CORE_COMPARE_IRQ, INT0);
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prvScheduleNextTick();
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prvScheduleFirstTick();
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}
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#endif
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}
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@ -8,7 +8,7 @@
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* - AppNote:
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*
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* \author Atmel Corporation: http://www.atmel.com \n
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* Support email: avr32@atmel.com
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* Support and FAQ: http://support.atmel.no/
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*
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*****************************************************************************/
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@ -61,7 +61,7 @@
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* These settings should not be altered.
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*-----------------------------------------------------------
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*/
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#include <avr32/iouc3a0512.h>
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#include <avr32/io.h>
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#include "intc.h"
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#include "compiler.h"
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@ -118,7 +118,7 @@
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* The current source file name and line number are output with a colon before
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* the formatted string.
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* A carriage return and a linefeed are appended to the output.
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* stdout is redirected by Newlib to the USART configured by configDBG_USART.
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* stdout is redirected to the USART configured by configDBG_USART.
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* The parameters are the same as for the standard printf function.
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* There is no return value.
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* SHALL NOT BE CALLED FROM WITHIN AN INTERRUPT as fputs and printf use malloc,
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@ -508,11 +508,11 @@ extern void *pvPortRealloc( void *pv, size_t xSize );
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\
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/* With the cooperative scheduler, as there is no context switch by interrupt, */ \
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/* there is also no context save. */ \
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}
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/*
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* Input parameter: in R12, boolean. Perform a vTaskSwitchContext() if 1
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*/
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}
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/*
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* Input parameter: in R12, boolean. Perform a vTaskSwitchContext() if 1
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*/
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#define portEXIT_SWITCHING_ISR() \
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{ \
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__asm__ __volatile__ ( \
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@ -523,14 +523,14 @@ extern void *pvPortRealloc( void *pv, size_t xSize );
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/* there is also no context restore. */ \
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"rete" \
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); \
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}
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#else
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/*
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* ISR entry and exit macros. These are only required if a task switch
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* is required from the ISR.
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*/
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}
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#else
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/*
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* ISR entry and exit macros. These are only required if a task switch
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* is required from the ISR.
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*/
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#define portENTER_SWITCHING_ISR() \
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{ \
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extern volatile unsigned portLONG ulCriticalNesting; \
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@ -1,5 +1,3 @@
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/* This source file is part of the ATMEL FREERTOS-0.9.0 Release */
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/*This file is prepared for Doxygen automatic documentation generation.*/
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/*! \file *********************************************************************
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||||
*
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@ -11,7 +9,7 @@
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* - AppNote:
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||||
*
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||||
* \author Atmel Corporation: http://www.atmel.com \n
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||||
* Support email: avr32@atmel.com
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||||
* Support and FAQ: http://support.atmel.no/
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||||
*
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******************************************************************************/
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@ -44,7 +42,7 @@
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#include <yfuns.h>
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#include <avr32/iouc3a0512.h>
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#include <avr32/io.h>
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#include "usart.h"
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|
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@ -1,5 +1,3 @@
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/* This source file is part of the ATMEL FREERTOS-0.9.0 Release */
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/*This file is prepared for Doxygen automatic documentation generation.*/
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/*! \file *********************************************************************
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||||
*
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|
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@ -11,7 +9,7 @@
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|||
* - AppNote:
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||||
*
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||||
* \author Atmel Corporation: http://www.atmel.com \n
|
||||
* Support email: avr32@atmel.com
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||||
* Support and FAQ: http://support.atmel.no/
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||||
*
|
||||
******************************************************************************/
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@ -44,7 +42,7 @@
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#include <yfuns.h>
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#include <avr32/iouc3a0512.h>
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#include <avr32/io.h>
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#include "usart.h"
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