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Updated AVR32 demos and added AVR32 UC3B demo.

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This commit is contained in:
Richard Barry 2007-07-27 07:59:50 +00:00
parent 45e7e5ac55
commit 94c94d3c0e
164 changed files with 21458 additions and 3994 deletions
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17
Source/include/list.h
View file

@ -61,6 +61,12 @@
* \ingroup FreeRTOSIntro
*/
/*
Changes from V4.3.1
+ Included local const within listGET_OWNER_OF_NEXT_ENTRY() to assist
compiler with optimisation. Thanks B.R.
*/
#ifndef LIST_H
#define LIST_H
@ -158,14 +164,17 @@ typedef struct xLIST
* \ingroup LinkedList
*/
#define listGET_OWNER_OF_NEXT_ENTRY( pxTCB, pxList ) \
{ \
xList * const pxConstList = pxList; \
/* Increment the index to the next item and return the item, ensuring */ \
/* we don't return the marker used at the end of the list. */ \
( pxList )->pxIndex = ( pxList )->pxIndex->pxNext; \
if( ( pxList )->pxIndex == ( xListItem * ) &( ( pxList )->xListEnd ) ) \
( pxConstList )->pxIndex = ( pxConstList )->pxIndex->pxNext; \
if( ( pxConstList )->pxIndex == ( xListItem * ) &( ( pxConstList )->xListEnd ) ) \
{ \
( pxList )->pxIndex = ( pxList )->pxIndex->pxNext; \
( pxConstList )->pxIndex = ( pxConstList )->pxIndex->pxNext; \
} \
pxTCB = ( pxList )->pxIndex->pvOwner
pxTCB = ( pxConstList )->pxIndex->pvOwner; \
}
/*

14
Source/include/portable.h
View file

@ -188,12 +188,18 @@
typedef void ( __interrupt __far *pxISR )();
#endif
#ifdef GCC_AVR32_PORT
#include "portmacro.h"
#ifdef __GNUC__
#ifdef __AVR32_AVR32A__
#include "portmacro.h"
#endif
#endif
#ifdef IAR_AVR32_PORT
#include "portmacro.h"
#ifdef __ICCAVR32__
#ifdef __CORE__
#if __CORE__ == __AVR32A__
#include "portmacro.h"
#endif
#endif
#endif
/*

583
Source/portable/GCC/AVR32_UC3/exception.S
View file

@ -1,286 +1,297 @@
/******************************************************************************
* Exception and interrupt vectors.
*
* This file has been built from the Newlib exception.S. It maps all events
* supported by a UC3.
*
* - Compiler: GNU GCC for AVR32
* - Supported devices: All AVR32A devices with an INTC module can be used.
* - AppNote:
*
* - author Atmel Corporation: http://www.atmel.com \n
* Support email: avr32@atmel.com
*
******************************************************************************/
/* Copyright (c) 2007, Atmel Corporation All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3. The name of ATMEL may not be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND
* SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT,
* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include <avr32/io.h>
#include "intc.h"
.section .exception, "ax"
// Start of Exception Vector Table.
// EVBA must be aligned with a power of two strictly greater than the EVBA-
// relative offset of the last vector.
.balign 0x200
// Export symbol.
.global _evba
_evba:
.org 0x000
// Unrecoverable Exception.
_handle_Unrecoverable_Exception:
rjmp $
.org 0x004
// TLB Multiple Hit: UNUSED IN AVR32A.
_handle_TLB_Multiple_Hit:
rjmp $
.org 0x008
// Bus Error Data Fetch.
_handle_Bus_Error_Data_Fetch:
rjmp $
.org 0x00C
// Bus Error Instruction Fetch.
_handle_Bus_Error_Instruction_Fetch:
rjmp $
.org 0x010
// NMI.
_handle_NMI:
rjmp $
.org 0x014
// Instruction Address.
_handle_Instruction_Address:
rjmp $
.org 0x018
// ITLB Protection.
_handle_ITLB_Protection:
rjmp $
.org 0x01C
// Breakpoint.
_handle_Breakpoint:
rjmp $
.org 0x020
// Illegal Opcode.
_handle_Illegal_Opcode:
rjmp $
.org 0x024
// Unimplemented Instruction.
_handle_Unimplemented_Instruction:
rjmp $
.org 0x028
// Privilege Violation.
_handle_Privilege_Violation:
rjmp $
.org 0x02C
// Floating-Point: UNUSED IN AVR32A.
_handle_Floating_Point:
rjmp $
.org 0x030
// Coprocessor Absent: UNUSED IN AVR32A.
_handle_Coprocessor_Absent:
rjmp $
.org 0x034
// Data Address (Read).
_handle_Data_Address_Read:
rjmp $
.org 0x038
// Data Address (Write).
_handle_Data_Address_Write:
rjmp $
.org 0x03C
// DTLB Protection (Read).
_handle_DTLB_Protection_Read:
rjmp $
.org 0x040
// DTLB Protection (Write).
_handle_DTLB_Protection_Write:
rjmp $
.org 0x044
// DTLB Modified: UNUSED IN AVR32A.
_handle_DTLB_Modified:
rjmp $
.org 0x050
// ITLB Miss: UNUSED IN AVR32A.
_handle_ITLB_Miss:
rjmp $
.org 0x060
// DTLB Miss (Read): UNUSED IN AVR32A.
_handle_DTLB_Miss_Read:
rjmp $
.org 0x070
// DTLB Miss (Write): UNUSED IN AVR32A.
_handle_DTLB_Miss_Write:
rjmp $
.org 0x100
// Supervisor Call.
_handle_Supervisor_Call:
lda.w pc, SCALLYield
// Interrupt support.
// The interrupt controller must provide the offset address relative to EVBA.
// Important note:
// All interrupts call a C function named _get_interrupt_handler.
// This function will read group and interrupt line number to then return in
// R12 a pointer to a user-provided interrupt handler.
.balign 4
_int0:
// R8-R12, LR, PC and SR are automatically pushed onto the system stack by the
// CPU upon interrupt entry.
#if 1 // B1832: interrupt stack changed to exception stack if exception is detected.
mfsr r12, AVR32_SR
bfextu r12, r12, AVR32_SR_M0_OFFSET, AVR32_SR_M0_SIZE + AVR32_SR_M1_SIZE + AVR32_SR_M2_SIZE
cp.w r12, 0b110
brlo _int0_normal
lddsp r12, sp[0 * 4]
stdsp sp[6 * 4], r12
lddsp r12, sp[1 * 4]
stdsp sp[7 * 4], r12
lddsp r12, sp[3 * 4]
sub sp, -6 * 4
rete
_int0_normal:
#endif
mov r12, 0 // Pass the int_lev parameter to the _get_interrupt_handler function.
call _get_interrupt_handler
cp.w r12, 0 // Get the pointer to the interrupt handler returned by the function.
movne pc, r12 // If this was not a spurious interrupt (R12 != NULL), jump to the handler.
rete // If this was a spurious interrupt (R12 == NULL), return from event handler.
_int1:
// R8-R12, LR, PC and SR are automatically pushed onto the system stack by the
// CPU upon interrupt entry.
#if 1 // B1832: interrupt stack changed to exception stack if exception is detected.
mfsr r12, AVR32_SR
bfextu r12, r12, AVR32_SR_M0_OFFSET, AVR32_SR_M0_SIZE + AVR32_SR_M1_SIZE + AVR32_SR_M2_SIZE
cp.w r12, 0b110
brlo _int1_normal
lddsp r12, sp[0 * 4]
stdsp sp[6 * 4], r12
lddsp r12, sp[1 * 4]
stdsp sp[7 * 4], r12
lddsp r12, sp[3 * 4]
sub sp, -6 * 4
rete
_int1_normal:
#endif
mov r12, 1 // Pass the int_lev parameter to the _get_interrupt_handler function.
call _get_interrupt_handler
cp.w r12, 0 // Get the pointer to the interrupt handler returned by the function.
movne pc, r12 // If this was not a spurious interrupt (R12 != NULL), jump to the handler.
rete // If this was a spurious interrupt (R12 == NULL), return from event handler.
_int2:
// R8-R12, LR, PC and SR are automatically pushed onto the system stack by the
// CPU upon interrupt entry.
#if 1 // B1832: interrupt stack changed to exception stack if exception is detected.
mfsr r12, AVR32_SR
bfextu r12, r12, AVR32_SR_M0_OFFSET, AVR32_SR_M0_SIZE + AVR32_SR_M1_SIZE + AVR32_SR_M2_SIZE
cp.w r12, 0b110
brlo _int2_normal
lddsp r12, sp[0 * 4]
stdsp sp[6 * 4], r12
lddsp r12, sp[1 * 4]
stdsp sp[7 * 4], r12
lddsp r12, sp[3 * 4]
sub sp, -6 * 4
rete
_int2_normal:
#endif
mov r12, 2 // Pass the int_lev parameter to the _get_interrupt_handler function.
call _get_interrupt_handler
cp.w r12, 0 // Get the pointer to the interrupt handler returned by the function.
movne pc, r12 // If this was not a spurious interrupt (R12 != NULL), jump to the handler.
rete // If this was a spurious interrupt (R12 == NULL), return from event handler.
_int3:
// R8-R12, LR, PC and SR are automatically pushed onto the system stack by the
// CPU upon interrupt entry.
#if 1 // B1832: interrupt stack changed to exception stack if exception is detected.
mfsr r12, AVR32_SR
bfextu r12, r12, AVR32_SR_M0_OFFSET, AVR32_SR_M0_SIZE + AVR32_SR_M1_SIZE + AVR32_SR_M2_SIZE
cp.w r12, 0b110
brlo _int3_normal
lddsp r12, sp[0 * 4]
stdsp sp[6 * 4], r12
lddsp r12, sp[1 * 4]
stdsp sp[7 * 4], r12
lddsp r12, sp[3 * 4]
sub sp, -6 * 4
rete
_int3_normal:
#endif
mov r12, 3 // Pass the int_lev parameter to the _get_interrupt_handler function.
call _get_interrupt_handler
cp.w r12, 0 // Get the pointer to the interrupt handler returned by the function.
movne pc, r12 // If this was not a spurious interrupt (R12 != NULL), jump to the handler.
rete // If this was a spurious interrupt (R12 == NULL), return from event handler.
// Constant data area.
.balign 4
// Values to store in the interrupt priority registers for the various interrupt priority levels.
// The interrupt priority registers contain the interrupt priority level and
// the EVBA-relative interrupt vector offset.
.global ipr_val
ipr_val:
.word (INT0 << AVR32_INTC_IPR0_INTLEV_OFFSET) | (_int0 - _evba),\
(INT1 << AVR32_INTC_IPR0_INTLEV_OFFSET) | (_int1 - _evba),\
(INT2 << AVR32_INTC_IPR0_INTLEV_OFFSET) | (_int2 - _evba),\
(INT3 << AVR32_INTC_IPR0_INTLEV_OFFSET) | (_int3 - _evba)
/*This file is prepared for Doxygen automatic documentation generation.*/
/*! \file *********************************************************************
*
* \brief Exception and interrupt vectors.
*
* This file maps all events supported by an AVR32UC.
*
* - Compiler: GNU GCC for AVR32
* - Supported devices: All AVR32UC devices with an INTC module can be used.
* - AppNote:
*
* \author Atmel Corporation: http://www.atmel.com \n
* Support and FAQ: http://support.atmel.no/
*
******************************************************************************/
/* Copyright (c) 2007, Atmel Corporation All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3. The name of ATMEL may not be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND
* SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT,
* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include <avr32/io.h>
#include "intc.h"
//! @{
//! \verbatim
.section .exception, "ax", @progbits
// Start of Exception Vector Table.
// EVBA must be aligned with a power of two strictly greater than the EVBA-
// relative offset of the last vector.
.balign 0x200
// Export symbol.
.global _evba
.type _evba, @function
_evba:
.org 0x000
// Unrecoverable Exception.
_handle_Unrecoverable_Exception:
rjmp $
.org 0x004
// TLB Multiple Hit: UNUSED IN AVR32UC.
_handle_TLB_Multiple_Hit:
rjmp $
.org 0x008
// Bus Error Data Fetch.
_handle_Bus_Error_Data_Fetch:
rjmp $
.org 0x00C
// Bus Error Instruction Fetch.
_handle_Bus_Error_Instruction_Fetch:
rjmp $
.org 0x010
// NMI.
_handle_NMI:
rjmp $
.org 0x014
// Instruction Address.
_handle_Instruction_Address:
rjmp $
.org 0x018
// ITLB Protection.
_handle_ITLB_Protection:
rjmp $
.org 0x01C
// Breakpoint.
_handle_Breakpoint:
rjmp $
.org 0x020
// Illegal Opcode.
_handle_Illegal_Opcode:
rjmp $
.org 0x024
// Unimplemented Instruction.
_handle_Unimplemented_Instruction:
rjmp $
.org 0x028
// Privilege Violation.
_handle_Privilege_Violation:
rjmp $
.org 0x02C
// Floating-Point: UNUSED IN AVR32UC.
_handle_Floating_Point:
rjmp $
.org 0x030
// Coprocessor Absent: UNUSED IN AVR32UC.
_handle_Coprocessor_Absent:
rjmp $
.org 0x034
// Data Address (Read).
_handle_Data_Address_Read:
rjmp $
.org 0x038
// Data Address (Write).
_handle_Data_Address_Write:
rjmp $
.org 0x03C
// DTLB Protection (Read).
_handle_DTLB_Protection_Read:
rjmp $
.org 0x040
// DTLB Protection (Write).
_handle_DTLB_Protection_Write:
rjmp $
.org 0x044
// DTLB Modified: UNUSED IN AVR32UC.
_handle_DTLB_Modified:
rjmp $
.org 0x050
// ITLB Miss: UNUSED IN AVR32UC.
_handle_ITLB_Miss:
rjmp $
.org 0x060
// DTLB Miss (Read): UNUSED IN AVR32UC.
_handle_DTLB_Miss_Read:
rjmp $
.org 0x070
// DTLB Miss (Write): UNUSED IN AVR32UC.
_handle_DTLB_Miss_Write:
rjmp $
.org 0x100
// Supervisor Call.
_handle_Supervisor_Call:
lda.w pc, SCALLYield
// Interrupt support.
// The interrupt controller must provide the offset address relative to EVBA.
// Important note:
// All interrupts call a C function named _get_interrupt_handler.
// This function will read group and interrupt line number to then return in
// R12 a pointer to a user-provided interrupt handler.
.balign 4
_int0:
// R8-R12, LR, PC and SR are automatically pushed onto the system stack by the
// CPU upon interrupt entry.
#if 1 // B1832: interrupt stack changed to exception stack if exception is detected.
mfsr r12, AVR32_SR
bfextu r12, r12, AVR32_SR_M0_OFFSET, AVR32_SR_M0_SIZE + AVR32_SR_M1_SIZE + AVR32_SR_M2_SIZE
cp.w r12, 0b110
brlo _int0_normal
lddsp r12, sp[0 * 4]
stdsp sp[6 * 4], r12
lddsp r12, sp[1 * 4]
stdsp sp[7 * 4], r12
lddsp r12, sp[3 * 4]
sub sp, -6 * 4
rete
_int0_normal:
#endif
mov r12, 0 // Pass the int_lev parameter to the _get_interrupt_handler function.
call _get_interrupt_handler
cp.w r12, 0 // Get the pointer to the interrupt handler returned by the function.
movne pc, r12 // If this was not a spurious interrupt (R12 != NULL), jump to the handler.
rete // If this was a spurious interrupt (R12 == NULL), return from event handler.
_int1:
// R8-R12, LR, PC and SR are automatically pushed onto the system stack by the
// CPU upon interrupt entry.
#if 1 // B1832: interrupt stack changed to exception stack if exception is detected.
mfsr r12, AVR32_SR
bfextu r12, r12, AVR32_SR_M0_OFFSET, AVR32_SR_M0_SIZE + AVR32_SR_M1_SIZE + AVR32_SR_M2_SIZE
cp.w r12, 0b110
brlo _int1_normal
lddsp r12, sp[0 * 4]
stdsp sp[6 * 4], r12
lddsp r12, sp[1 * 4]
stdsp sp[7 * 4], r12
lddsp r12, sp[3 * 4]
sub sp, -6 * 4
rete
_int1_normal:
#endif
mov r12, 1 // Pass the int_lev parameter to the _get_interrupt_handler function.
call _get_interrupt_handler
cp.w r12, 0 // Get the pointer to the interrupt handler returned by the function.
movne pc, r12 // If this was not a spurious interrupt (R12 != NULL), jump to the handler.
rete // If this was a spurious interrupt (R12 == NULL), return from event handler.
_int2:
// R8-R12, LR, PC and SR are automatically pushed onto the system stack by the
// CPU upon interrupt entry.
#if 1 // B1832: interrupt stack changed to exception stack if exception is detected.
mfsr r12, AVR32_SR
bfextu r12, r12, AVR32_SR_M0_OFFSET, AVR32_SR_M0_SIZE + AVR32_SR_M1_SIZE + AVR32_SR_M2_SIZE
cp.w r12, 0b110
brlo _int2_normal
lddsp r12, sp[0 * 4]
stdsp sp[6 * 4], r12
lddsp r12, sp[1 * 4]
stdsp sp[7 * 4], r12
lddsp r12, sp[3 * 4]
sub sp, -6 * 4
rete
_int2_normal:
#endif
mov r12, 2 // Pass the int_lev parameter to the _get_interrupt_handler function.
call _get_interrupt_handler
cp.w r12, 0 // Get the pointer to the interrupt handler returned by the function.
movne pc, r12 // If this was not a spurious interrupt (R12 != NULL), jump to the handler.
rete // If this was a spurious interrupt (R12 == NULL), return from event handler.
_int3:
// R8-R12, LR, PC and SR are automatically pushed onto the system stack by the
// CPU upon interrupt entry.
#if 1 // B1832: interrupt stack changed to exception stack if exception is detected.
mfsr r12, AVR32_SR
bfextu r12, r12, AVR32_SR_M0_OFFSET, AVR32_SR_M0_SIZE + AVR32_SR_M1_SIZE + AVR32_SR_M2_SIZE
cp.w r12, 0b110
brlo _int3_normal
lddsp r12, sp[0 * 4]
stdsp sp[6 * 4], r12
lddsp r12, sp[1 * 4]
stdsp sp[7 * 4], r12
lddsp r12, sp[3 * 4]
sub sp, -6 * 4
rete
_int3_normal:
#endif
mov r12, 3 // Pass the int_lev parameter to the _get_interrupt_handler function.
call _get_interrupt_handler
cp.w r12, 0 // Get the pointer to the interrupt handler returned by the function.
movne pc, r12 // If this was not a spurious interrupt (R12 != NULL), jump to the handler.
rete // If this was a spurious interrupt (R12 == NULL), return from event handler.
// Constant data area.
.balign 4
// Values to store in the interrupt priority registers for the various interrupt priority levels.
// The interrupt priority registers contain the interrupt priority level and
// the EVBA-relative interrupt vector offset.
.global ipr_val
.type ipr_val, @object
ipr_val:
.word (INT0 << AVR32_INTC_IPR0_INTLEV_OFFSET) | (_int0 - _evba),\
(INT1 << AVR32_INTC_IPR0_INTLEV_OFFSET) | (_int1 - _evba),\
(INT2 << AVR32_INTC_IPR0_INTLEV_OFFSET) | (_int2 - _evba),\
(INT3 << AVR32_INTC_IPR0_INTLEV_OFFSET) | (_int3 - _evba)
//! \endverbatim
//! @}

64
Source/portable/GCC/AVR32_UC3/port.c
View file

@ -8,7 +8,7 @@
* - AppNote:
*
* \author Atmel Corporation: http://www.atmel.com \n
* Support email: avr32@atmel.com
* Support and FAQ: http://support.atmel.no/
*
*****************************************************************************/
@ -83,7 +83,8 @@ static void prvSetupTimerInterrupt( void );
/*-----------------------------------------------------------*/
/*
* Low-level initialization routine called during Newlib's startup.
* Low-level initialization routine called during startup, before the main
* function.
* This version comes in replacement to the default one provided by Newlib.
* Newlib's _init_startup only calls init_exceptions, but Newlib's exception
* vectors are not compatible with the SCALL management in the current FreeRTOS
@ -124,13 +125,19 @@ void _init_startup(void)
/* Code section present if and only if the debug trace is activated. */
#if configDBG
{
static const gpio_map_t DBG_USART_GPIO_MAP =
{
{ configDBG_USART_RX_PIN, configDBG_USART_RX_FUNCTION },
{ configDBG_USART_TX_PIN, configDBG_USART_TX_FUNCTION }
};
/* Initialize the USART used for the debug trace with the configured parameters. */
set_usart_base( ( void * ) configDBG_USART );
gpio_enable_module_pin( configDBG_USART_RX_PIN, configDBG_USART_RX_FUNCTION );
gpio_enable_module_pin( configDBG_USART_TX_PIN, configDBG_USART_TX_FUNCTION );
gpio_enable_module( DBG_USART_GPIO_MAP,
sizeof( DBG_USART_GPIO_MAP ) / sizeof( DBG_USART_GPIO_MAP[0] ) );
usart_init( configDBG_USART_BAUDRATE );
}
#endif
}
/*-----------------------------------------------------------*/
@ -194,15 +201,15 @@ __attribute__((__naked__)) static void vTick( void )
/* Save the context of the interrupted task. */
portSAVE_CONTEXT_OS_INT();
/* Schedule the COUNT&COMPARE match interrupt in (configCPU_CLOCK_HZ/configTICK_RATE_HZ)
clock cycles from now. */
#if( configTICK_USE_TC==1 )
/* Clear the interrupt flag. */
AVR32_TC.channel[configTICK_TC_CHANNEL].sr;
#else
/* Schedule the COUNT&COMPARE match interrupt in (configCPU_CLOCK_HZ/configTICK_RATE_HZ)
clock cycles from now. */
prvScheduleNextTick();
#endif
/* Because FreeRTOS is not supposed to run with nested interrupts, put all OS
calls in a critical section . */
portENTER_CRITICAL();
@ -253,7 +260,6 @@ void vPortExitCritical( void )
}
/*-----------------------------------------------------------*/
/*
* Initialise the stack of a task to look exactly as if a call to
* portSAVE_CONTEXT had been called.
@ -313,13 +319,39 @@ void vPortEndScheduler( void )
/* Schedule the COUNT&COMPARE match interrupt in (configCPU_CLOCK_HZ/configTICK_RATE_HZ)
clock cycles from now. */
#if( configTICK_USE_TC==0 )
static void prvScheduleFirstTick(void)
{
unsigned long lCycles;
lCycles = Get_system_register(AVR32_COUNT);
lCycles += (configCPU_CLOCK_HZ/configTICK_RATE_HZ);
// If lCycles ends up to be 0, make it 1 so that the COMPARE and exception
// generation feature does not get disabled.
if(0 == lCycles)
{
lCycles++;
}
Set_system_register(AVR32_COMPARE, lCycles);
}
static void prvScheduleNextTick(void)
{
unsigned long lCountVal, lCompareVal;
unsigned long lCycles, lCount;
lCountVal = Get_system_register(AVR32_COUNT);
lCompareVal = lCountVal + (configCPU_CLOCK_HZ/configTICK_RATE_HZ);
Set_system_register(AVR32_COMPARE, lCompareVal);
lCycles = Get_system_register(AVR32_COMPARE);
lCycles += (configCPU_CLOCK_HZ/configTICK_RATE_HZ);
// If lCycles ends up to be 0, make it 1 so that the COMPARE and exception
// generation feature does not get disabled.
if(0 == lCycles)
{
lCycles++;
}
lCount = Get_system_register(AVR32_COUNT);
if( lCycles < lCount )
{ // We missed a tick, recover for the next.
lCycles += (configCPU_CLOCK_HZ/configTICK_RATE_HZ);
}
Set_system_register(AVR32_COMPARE, lCycles);
}
#endif
/*-----------------------------------------------------------*/
@ -383,12 +415,12 @@ static void prvSetupTimerInterrupt(void)
INTC_register_interrupt(&vTick, configTICK_TC_IRQ, INT0);
/* Initialize the timer/counter. */
tc_init_waveform(tc, &waveform_opt);
tc_init_waveform(tc, &waveform_opt);
/* Set the compare triggers.
Remember TC counter is 16-bits, so counting second is not possible!
That's why we configure it to count ms. */
tc_write_rc( tc, configTICK_TC_CHANNEL, ( configPBA_CLOCK_HZ/ 4) / 1000 );
tc_write_rc( tc, configTICK_TC_CHANNEL, ( configPBA_CLOCK_HZ / 4) / configTICK_RATE_HZ );
tc_configure_interrupts( tc, configTICK_TC_CHANNEL, &tc_interrupt );
@ -398,7 +430,7 @@ static void prvSetupTimerInterrupt(void)
#else
{
INTC_register_interrupt(&vTick, AVR32_CORE_COMPARE_IRQ, INT0);
prvScheduleNextTick();
prvScheduleFirstTick();
}
#endif
}

4
Source/portable/GCC/AVR32_UC3/portmacro.h
View file

@ -8,7 +8,7 @@
* - AppNote:
*
* \author Atmel Corporation: http://www.atmel.com \n
* Support email: avr32@atmel.com
* Support and FAQ: http://support.atmel.no/
*
*****************************************************************************/
@ -117,7 +117,7 @@
* The current source file name and line number are output with a colon before
* the formatted string.
* A carriage return and a linefeed are appended to the output.
* stdout is redirected by Newlib to the USART configured by configDBG_USART.
* stdout is redirected to the USART configured by configDBG_USART.
* The parameters are the same as for the standard printf function.
* There is no return value.
* SHALL NOT BE CALLED FROM WITHIN AN INTERRUPT as fputs and printf use malloc,

82
Source/portable/IAR/AVR32_UC3/exception.s82
View file

@ -1,15 +1,16 @@
/******************************************************************************
* Exception and interrupt vectors.
/*This file is prepared for Doxygen automatic documentation generation.*/
/*! \file *********************************************************************
*
* This file has been built from the Newlib exception.S. It maps all events
* supported by a UC3.
* \brief Exception and interrupt vectors.
*
* This file maps all events supported by an AVR32UC.
*
* - Compiler: IAR EWAVR32
* - Supported devices: All AVR32A devices with an INTC module can be used.
* - Supported devices: All AVR32UC devices with an INTC module can be used.
* - AppNote:
*
* - author Atmel Corporation: http://www.atmel.com \n
* Support email: avr32@atmel.com
* \author Atmel Corporation: http://www.atmel.com \n
* Support and FAQ: http://support.atmel.no/
*
******************************************************************************/
@ -41,11 +42,14 @@
*/
#include <avr32/iouc3a0512.h>
#include <avr32/uc3a0512.h>
#include <avr32/io.h>
#include "intc.h"
//! @{
//! \verbatim
// Start of Exception Vector Table.
// EVBA must be aligned with a power of two strictly greater than the EVBA-
@ -66,107 +70,107 @@ _evba:
ORG 0x000
// Unrecoverable Exception.
_handle_Unrecoverable_Exception:
rjmp $
rjmp _handle_Unrecoverable_Exception
ORG 0x004
// TLB Multiple Hit: UNUSED IN AVR32A.
// TLB Multiple Hit: UNUSED IN AVR32UC.
_handle_TLB_Multiple_Hit:
rjmp $
rjmp _handle_TLB_Multiple_Hit
ORG 0x008
// Bus Error Data Fetch.
_handle_Bus_Error_Data_Fetch:
rjmp $
rjmp _handle_Bus_Error_Data_Fetch
ORG 0x00C
// Bus Error Instruction Fetch.
_handle_Bus_Error_Instruction_Fetch:
rjmp $
rjmp _handle_Bus_Error_Instruction_Fetch
ORG 0x010
// NMI.
_handle_NMI:
rjmp $
rjmp _handle_NMI
ORG 0x014
// Instruction Address.
_handle_Instruction_Address:
rjmp $
rjmp _handle_Instruction_Address
ORG 0x018
// ITLB Protection.
_handle_ITLB_Protection:
rjmp $
rjmp _handle_ITLB_Protection
ORG 0x01C
// Breakpoint.
_handle_Breakpoint:
rjmp $
rjmp _handle_Breakpoint
ORG 0x020
// Illegal Opcode.
_handle_Illegal_Opcode:
rjmp $
rjmp _handle_Illegal_Opcode
ORG 0x024
// Unimplemented Instruction.
_handle_Unimplemented_Instruction:
rjmp $
rjmp _handle_Unimplemented_Instruction
ORG 0x028
// Privilege Violation.
_handle_Privilege_Violation:
rjmp $
rjmp _handle_Privilege_Violation
ORG 0x02C
// Floating-Point: UNUSED IN AVR32A.
// Floating-Point: UNUSED IN AVR32UC.
_handle_Floating_Point:
rjmp $
rjmp _handle_Floating_Point
ORG 0x030
// Coprocessor Absent: UNUSED IN AVR32A.
// Coprocessor Absent: UNUSED IN AVR32UC.
_handle_Coprocessor_Absent:
rjmp $
rjmp _handle_Coprocessor_Absent
ORG 0x034
// Data Address (Read).
_handle_Data_Address_Read:
rjmp $
rjmp _handle_Data_Address_Read
ORG 0x038
// Data Address (Write).
_handle_Data_Address_Write:
rjmp $
rjmp _handle_Data_Address_Write
ORG 0x03C
// DTLB Protection (Read).
_handle_DTLB_Protection_Read:
rjmp $
rjmp _handle_DTLB_Protection_Read
ORG 0x040
// DTLB Protection (Write).
_handle_DTLB_Protection_Write:
rjmp $
rjmp _handle_DTLB_Protection_Write
ORG 0x044
// DTLB Modified: UNUSED IN AVR32A.
// DTLB Modified: UNUSED IN AVR32UC.
_handle_DTLB_Modified:
rjmp $
rjmp _handle_DTLB_Modified
ORG 0x050
// ITLB Miss: UNUSED IN AVR32A.
// ITLB Miss: UNUSED IN AVR32UC.
_handle_ITLB_Miss:
rjmp $
rjmp _handle_ITLB_Miss
ORG 0x060
// DTLB Miss (Read): UNUSED IN AVR32A.
// DTLB Miss (Read): UNUSED IN AVR32UC.
_handle_DTLB_Miss_Read:
rjmp $
rjmp _handle_DTLB_Miss_Read
ORG 0x070
// DTLB Miss (Write): UNUSED IN AVR32A.
// DTLB Miss (Write): UNUSED IN AVR32UC.
_handle_DTLB_Miss_Write:
rjmp $
rjmp _handle_DTLB_Miss_Write
ORG 0x100
// Supervisor Call.
@ -300,3 +304,7 @@ ipr_val:
END
//! \endverbatim
//! @}

82
Source/portable/IAR/AVR32_UC3/port.c
View file

@ -8,7 +8,7 @@
* - AppNote:
*
* \author Atmel Corporation: http://www.atmel.com \n
* Support email: avr32@atmel.com
* Support and FAQ: http://support.atmel.no/
*
*****************************************************************************/
@ -50,12 +50,10 @@
/* Scheduler includes. */
#include "FreeRTOS.h"
/* Get rid of inline in task.h. */
#include "task.h"
/* AVR32 UC3 includes. */
#include <avr32/iouc3a0512.h>
#include <avr32/io.h>
#include <intrinsics.h>
#include "gpio.h"
@ -79,6 +77,10 @@ volatile unsigned portLONG ulCriticalNesting = 9999UL;
#if( configTICK_USE_TC==0 )
static void prvScheduleNextTick( void );
#endif
/* Setup the timer to generate the tick interrupts. */
static void prvSetupTimerInterrupt( void );
/*-----------------------------------------------------------*/
/*
@ -111,21 +113,27 @@ int __low_level_init(void)
/* Code section present if and only if the debug trace is activated. */
#if configDBG
{
static const usart_options_t usart_opt =
static const gpio_map_t DBG_USART_GPIO_MAP =
{
.baudrate = configDBG_USART_BAUDRATE,
.charlength = 8,
.paritytype = USART_NO_PARITY,
.stopbits = USART_1_STOPBIT,
.channelmode = USART_MODE_NORMAL
{ configDBG_USART_RX_PIN, configDBG_USART_RX_FUNCTION },
{ configDBG_USART_TX_PIN, configDBG_USART_TX_FUNCTION }
};
static const usart_options_t DBG_USART_OPTIONS =
{
.baudrate = configDBG_USART_BAUDRATE,
.charlength = 8,
.paritytype = USART_NO_PARITY,
.stopbits = USART_1_STOPBIT,
.channelmode = USART_NORMAL_CHMODE
};
/* Initialize the USART used for the debug trace with the configured parameters. */
extern volatile avr32_usart_t *volatile stdio_usart_base;
stdio_usart_base = configDBG_USART;
gpio_enable_module_pin(configDBG_USART_RX_PIN, configDBG_USART_RX_FUNCTION);
gpio_enable_module_pin(configDBG_USART_TX_PIN, configDBG_USART_TX_FUNCTION);
usart_init_rs232(configDBG_USART, &usart_opt, configCPU_CLOCK_HZ);
gpio_enable_module( DBG_USART_GPIO_MAP,
sizeof( DBG_USART_GPIO_MAP ) / sizeof( DBG_USART_GPIO_MAP[0] ) );
usart_init_rs232(configDBG_USART, &DBG_USART_OPTIONS, configCPU_CLOCK_HZ);
}
#endif
@ -159,15 +167,15 @@ static void vTick( void )
/* Save the context of the interrupted task. */
portSAVE_CONTEXT_OS_INT();
/* Schedule the COUNT&COMPARE match interrupt in (configCPU_CLOCK_HZ/configTICK_RATE_HZ)
clock cycles from now. */
#if( configTICK_USE_TC==1 )
/* Clear the interrupt flag. */
AVR32_TC.channel[configTICK_TC_CHANNEL].sr;
#else
/* Schedule the COUNT&COMPARE match interrupt in (configCPU_CLOCK_HZ/configTICK_RATE_HZ)
clock cycles from now. */
prvScheduleNextTick();
#endif
/* Because FreeRTOS is not supposed to run with nested interrupts, put all OS
calls in a critical section . */
portENTER_CRITICAL();
@ -219,10 +227,6 @@ void vPortExitCritical( void )
}
/*-----------------------------------------------------------*/
/* Setup the timer to generate the tick interrupts. */
static void prvSetupTimerInterrupt( void );
/*-----------------------------------------------------------*/
/*
* Initialise the stack of a task to look exactly as if a call to
* portSAVE_CONTEXT had been called.
@ -282,13 +286,39 @@ void vPortEndScheduler( void )
/* Schedule the COUNT&COMPARE match interrupt in (configCPU_CLOCK_HZ/configTICK_RATE_HZ)
clock cycles from now. */
#if( configTICK_USE_TC==0 )
static void prvScheduleFirstTick(void)
{
unsigned long lCycles;
lCycles = Get_system_register(AVR32_COUNT);
lCycles += (configCPU_CLOCK_HZ/configTICK_RATE_HZ);
// If lCycles ends up to be 0, make it 1 so that the COMPARE and exception
// generation feature does not get disabled.
if(0 == lCycles)
{
lCycles++;
}
Set_system_register(AVR32_COMPARE, lCycles);
}
static void prvScheduleNextTick(void)
{
unsigned long lCountVal, lCompareVal;
unsigned long lCycles, lCount;
lCountVal = Get_system_register(AVR32_COUNT);
lCompareVal = lCountVal + (configCPU_CLOCK_HZ/configTICK_RATE_HZ);
Set_system_register(AVR32_COMPARE, lCompareVal);
lCycles = Get_system_register(AVR32_COMPARE);
lCycles += (configCPU_CLOCK_HZ/configTICK_RATE_HZ);
// If lCycles ends up to be 0, make it 1 so that the COMPARE and exception
// generation feature does not get disabled.
if(0 == lCycles)
{
lCycles++;
}
lCount = Get_system_register(AVR32_COUNT);
if( lCycles < lCount )
{ // We missed a tick, recover for the next.
lCycles += (configCPU_CLOCK_HZ/configTICK_RATE_HZ);
}
Set_system_register(AVR32_COMPARE, lCycles);
}
#endif
/*-----------------------------------------------------------*/
@ -357,7 +387,7 @@ static void prvSetupTimerInterrupt(void)
/* Set the compare triggers.
Remember TC counter is 16-bits, so counting second is not possible!
That's why we configure it to count ms. */
tc_write_rc( tc, configTICK_TC_CHANNEL, ( configPBA_CLOCK_HZ / 4) / 1000 );
tc_write_rc( tc, configTICK_TC_CHANNEL, ( configPBA_CLOCK_HZ / 4) / configTICK_RATE_HZ );
tc_configure_interrupts( tc, configTICK_TC_CHANNEL, &tc_interrupt );
@ -367,7 +397,7 @@ static void prvSetupTimerInterrupt(void)
#else
{
INTC_register_interrupt((__int_handler)&vTick, AVR32_CORE_COMPARE_IRQ, INT0);
prvScheduleNextTick();
prvScheduleFirstTick();
}
#endif
}

32
Source/portable/IAR/AVR32_UC3/portmacro.h
View file

@ -8,7 +8,7 @@
* - AppNote:
*
* \author Atmel Corporation: http://www.atmel.com \n
* Support email: avr32@atmel.com
* Support and FAQ: http://support.atmel.no/
*
*****************************************************************************/
@ -61,7 +61,7 @@
* These settings should not be altered.
*-----------------------------------------------------------
*/
#include <avr32/iouc3a0512.h>
#include <avr32/io.h>
#include "intc.h"
#include "compiler.h"
@ -118,7 +118,7 @@
* The current source file name and line number are output with a colon before
* the formatted string.
* A carriage return and a linefeed are appended to the output.
* stdout is redirected by Newlib to the USART configured by configDBG_USART.
* stdout is redirected to the USART configured by configDBG_USART.
* The parameters are the same as for the standard printf function.
* There is no return value.
* SHALL NOT BE CALLED FROM WITHIN AN INTERRUPT as fputs and printf use malloc,
@ -508,11 +508,11 @@ extern void *pvPortRealloc( void *pv, size_t xSize );
\
/* With the cooperative scheduler, as there is no context switch by interrupt, */ \
/* there is also no context save. */ \
}
/*
* Input parameter: in R12, boolean. Perform a vTaskSwitchContext() if 1
*/
}
/*
* Input parameter: in R12, boolean. Perform a vTaskSwitchContext() if 1
*/
#define portEXIT_SWITCHING_ISR() \
{ \
__asm__ __volatile__ ( \
@ -523,14 +523,14 @@ extern void *pvPortRealloc( void *pv, size_t xSize );
/* there is also no context restore. */ \
"rete" \
); \
}
#else
/*
* ISR entry and exit macros. These are only required if a task switch
* is required from the ISR.
*/
}
#else
/*
* ISR entry and exit macros. These are only required if a task switch
* is required from the ISR.
*/
#define portENTER_SWITCHING_ISR() \
{ \
extern volatile unsigned portLONG ulCriticalNesting; \

6
Source/portable/IAR/AVR32_UC3/read.c
View file

@ -1,5 +1,3 @@
/* This source file is part of the ATMEL FREERTOS-0.9.0 Release */
/*This file is prepared for Doxygen automatic documentation generation.*/
/*! \file *********************************************************************
*
@ -11,7 +9,7 @@
* - AppNote:
*
* \author Atmel Corporation: http://www.atmel.com \n
* Support email: avr32@atmel.com
* Support and FAQ: http://support.atmel.no/
*
******************************************************************************/
@ -44,7 +42,7 @@
#include <yfuns.h>
#include <avr32/iouc3a0512.h>
#include <avr32/io.h>
#include "usart.h"

6
Source/portable/IAR/AVR32_UC3/write.c
View file

@ -1,5 +1,3 @@
/* This source file is part of the ATMEL FREERTOS-0.9.0 Release */
/*This file is prepared for Doxygen automatic documentation generation.*/
/*! \file *********************************************************************
*
@ -11,7 +9,7 @@
* - AppNote:
*
* \author Atmel Corporation: http://www.atmel.com \n
* Support email: avr32@atmel.com
* Support and FAQ: http://support.atmel.no/
*
******************************************************************************/
@ -44,7 +42,7 @@
#include <yfuns.h>
#include <avr32/iouc3a0512.h>
#include <avr32/io.h>
#include "usart.h"