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https://github.com/FreeRTOS/FreeRTOS-Kernel.git
synced 2025-08-19 17:48:33 -04:00
Updated AVR32 demos and added AVR32 UC3B demo.
This commit is contained in:
Richard Barry
parent
45e7e5ac55
commit
94c94d3c0e
164 changed files with 21458 additions and 3994 deletions
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@ -1,5 +1,3 @@
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/* This source file is part of the ATMEL FREERTOS-0.9.0 Release */
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/*This file has been prepared for Doxygen automatic documentation generation.*/
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/*! \file *********************************************************************
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*
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@ -10,7 +8,7 @@
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* - AppNote:
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*
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* \author Atmel Corporation: http://www.atmel.com \n
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* Support email: avr32@atmel.com
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* Support and FAQ: http://support.atmel.no/
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*
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*****************************************************************************/
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@ -43,7 +41,7 @@
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/*
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BASIC INTERRUPT DRIVEN SERIAL PORT DRIVER FOR USART0.
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BASIC INTERRUPT DRIVEN SERIAL PORT DRIVER FOR USART.
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*/
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/* Scheduler includes. */
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@ -53,15 +51,7 @@
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/* Demo application includes. */
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#include "serial.h"
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#if __GNUC__
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#include <avr32/io.h>
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#elif __ICCAVR32__
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#include <avr32/iouc3a0512.h>
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#else
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#error Unknown compiler
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#endif
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#include <avr32/io.h>
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#include "board.h"
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#include "gpio.h"
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@ -95,17 +85,17 @@ static void vprvSerialCreateQueues( unsigned portBASE_TYPE uxQueueLength,
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#pragma optimize = no_inline
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#endif
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static portBASE_TYPE prvUSART0_ISR_NonNakedBehaviour( void )
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static portBASE_TYPE prvUSART_ISR_NonNakedBehaviour( void )
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{
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/* Now we can declare the local variables. */
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signed portCHAR cChar;
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portBASE_TYPE xTaskWokenByTx = pdFALSE, xTaskWokenByRx = pdFALSE;
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unsigned portLONG ulStatus;
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volatile avr32_usart_t *usart0 = &AVR32_USART0;
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volatile avr32_usart_t *usart = serialPORT_USART;
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portBASE_TYPE retstatus;
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/* What caused the interrupt? */
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ulStatus = usart0->csr & usart0->imr;
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ulStatus = usart->csr & usart->imr;
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if (ulStatus & AVR32_USART_CSR_TXRDY_MASK)
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{
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@ -121,19 +111,19 @@ static portBASE_TYPE prvUSART0_ISR_NonNakedBehaviour( void )
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{
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/* A character was retrieved from the queue so can be sent to the
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THR now. */
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usart0->thr = cChar;
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usart->thr = cChar;
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}
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else
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{
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/* Queue empty, nothing to send so turn off the Tx interrupt. */
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usart0->idr = AVR32_USART_IDR_TXRDY_MASK;
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usart->idr = AVR32_USART_IDR_TXRDY_MASK;
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}
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}
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if (ulStatus & AVR32_USART_CSR_RXRDY_MASK)
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{
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/* The interrupt was caused by the receiver getting data. */
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cChar = usart0->rhr; //TODO
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cChar = usart->rhr; //TODO
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/* Because FreeRTOS is not supposed to run with nested interrupts, put all OS
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calls in a critical section . */
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@ -154,7 +144,7 @@ static portBASE_TYPE prvUSART0_ISR_NonNakedBehaviour( void )
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/*-----------------------------------------------------------*/
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/*
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* USART0 interrupt service routine.
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* USART interrupt service routine.
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*/
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#if __GNUC__
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__attribute__((__naked__))
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@ -162,15 +152,15 @@ static portBASE_TYPE prvUSART0_ISR_NonNakedBehaviour( void )
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#pragma shadow_registers = full // Naked.
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#endif
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static void vUSART0_ISR( void )
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static void vUSART_ISR( void )
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{
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/* This ISR can cause a context switch, so the first statement must be a
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call to the portENTER_SWITCHING_ISR() macro. This must be BEFORE any
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variable declarations. */
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portENTER_SWITCHING_ISR();
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prvUSART0_ISR_NonNakedBehaviour();
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prvUSART_ISR_NonNakedBehaviour();
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/* Exit the ISR. If a task was woken by either a character being received
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or transmitted then a context switch will occur. */
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portEXIT_SWITCHING_ISR();
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@ -183,14 +173,20 @@ static void vUSART0_ISR( void )
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*/
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xComPortHandle xSerialPortInitMinimal( unsigned portLONG ulWantedBaud, unsigned portBASE_TYPE uxQueueLength )
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{
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static const gpio_map_t USART_GPIO_MAP =
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{
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{ serialPORT_USART_RX_PIN, serialPORT_USART_RX_FUNCTION },
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{ serialPORT_USART_TX_PIN, serialPORT_USART_TX_FUNCTION }
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};
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xComPortHandle xReturn = serHANDLE;
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volatile avr32_usart_t *usart0 = &AVR32_USART0;
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int cd; /* USART0 Clock Divider. */
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volatile avr32_usart_t *usart = serialPORT_USART;
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int cd; /* USART Clock Divider. */
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/* Create the rx and tx queues. */
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vprvSerialCreateQueues( uxQueueLength, &xRxedChars, &xCharsForTx );
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/* Configure USART0. */
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/* Configure USART. */
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if( ( xRxedChars != serINVALID_QUEUE ) &&
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( xCharsForTx != serINVALID_QUEUE ) &&
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( ulWantedBaud != ( unsigned portLONG ) 0 ) )
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@ -198,20 +194,20 @@ int cd; /* USART0 Clock Divider. */
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portENTER_CRITICAL();
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{
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/**
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** Reset USART0.
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** Reset USART.
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**/
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/* Disable all USART0 interrupt sources to begin... */
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usart0->idr = 0xFFFFFFFF;
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/* Disable all USART interrupt sources to begin... */
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usart->idr = 0xFFFFFFFF;
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/* Reset mode and other registers that could cause unpredictable
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behaviour after reset */
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usart0->mr = 0; /* Reset Mode register. */
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usart0->rtor = 0; /* Reset Receiver Time-out register. */
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usart0->ttgr = 0; /* Reset Transmitter Timeguard register. */
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usart->mr = 0; /* Reset Mode register. */
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usart->rtor = 0; /* Reset Receiver Time-out register. */
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usart->ttgr = 0; /* Reset Transmitter Timeguard register. */
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/* Shutdown RX and TX, reset status bits, reset iterations in CSR, reset NACK
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and turn off DTR and RTS */
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usart0->cr = AVR32_USART_CR_RSTRX_MASK |
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usart->cr = AVR32_USART_CR_RSTRX_MASK |
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AVR32_USART_CR_RSTTX_MASK |
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AVR32_USART_CR_RXDIS_MASK |
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AVR32_USART_CR_TXDIS_MASK |
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@ -222,13 +218,12 @@ int cd; /* USART0 Clock Divider. */
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AVR32_USART_CR_RTSDIS_MASK;
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/**
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** Configure USART0.
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** Configure USART.
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**/
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/* Enable USART0 RXD & TXD pins. */
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gpio_enable_module_pin(AVR32_USART0_RXD_0_PIN, AVR32_USART0_RXD_0_FUNCTION);
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gpio_enable_module_pin(AVR32_USART0_TXD_0_PIN, AVR32_USART0_TXD_0_FUNCTION);
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/* Enable USART RXD & TXD pins. */
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gpio_enable_module( USART_GPIO_MAP, sizeof( USART_GPIO_MAP ) / sizeof( USART_GPIO_MAP[0] ) );
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/* Set the USART0 baudrate to be as close as possible to the wanted baudrate. */
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/* Set the USART baudrate to be as close as possible to the wanted baudrate. */
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/*
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* ** BAUDRATE CALCULATION **
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*
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@ -242,52 +237,52 @@ int cd; /* USART0 Clock Divider. */
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if( ulWantedBaud < ( configCPU_CLOCK_HZ / 16 ) )
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{
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/* Use 8x oversampling */
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usart0->mr |= (1<<AVR32_USART_MR_OVER_OFFSET);
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usart->mr |= (1<<AVR32_USART_MR_OVER_OFFSET);
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cd = configCPU_CLOCK_HZ / (8*ulWantedBaud);
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if( cd < 2 )
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if( cd < 2 )
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{
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return serINVALID_COMPORT_HANDLER;
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}
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usart0->brgr = (cd << AVR32_USART_BRGR_CD_OFFSET);
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}
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else
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usart->brgr = (cd << AVR32_USART_BRGR_CD_OFFSET);
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}
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else
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{
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/* Use 16x oversampling */
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usart0->mr &= ~(1<<AVR32_USART_MR_OVER_OFFSET);
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usart->mr &= ~(1<<AVR32_USART_MR_OVER_OFFSET);
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cd = configCPU_CLOCK_HZ / (16*ulWantedBaud);
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if( cd > 65535 )
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if( cd > 65535 )
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{
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/* Baudrate is too low */
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return serINVALID_COMPORT_HANDLER;
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}
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}
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usart0->brgr = (cd << AVR32_USART_BRGR_CD_OFFSET);
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usart->brgr = (cd << AVR32_USART_BRGR_CD_OFFSET);
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/* Set the USART0 Mode register: Mode=Normal(0), Clk selection=MCK(0),
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/* Set the USART Mode register: Mode=Normal(0), Clk selection=MCK(0),
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CHRL=8, SYNC=0(asynchronous), PAR=None, NBSTOP=1, CHMODE=0, MSBF=0,
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MODE9=0, CKLO=0, OVER(previously done when setting the baudrate),
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other fields not used in this mode. */
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usart0->mr |= ((8-5) << AVR32_USART_MR_CHRL_OFFSET ) |
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usart->mr |= ((8-5) << AVR32_USART_MR_CHRL_OFFSET ) |
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( 4 << AVR32_USART_MR_PAR_OFFSET ) |
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( 1 << AVR32_USART_MR_NBSTOP_OFFSET);
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/* Write the Transmit Timeguard Register */
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usart0->ttgr = 0;
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usart->ttgr = 0;
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/* Register the USART0 interrupt handler to the interrupt controller and
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enable the USART0 interrupt. */
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INTC_register_interrupt((__int_handler)&vUSART0_ISR, AVR32_USART0_IRQ, INT1);
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/* Enable USART0 interrupt sources (but not Tx for now)... */
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usart0->ier = AVR32_USART_IER_RXRDY_MASK;
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/* Register the USART interrupt handler to the interrupt controller and
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enable the USART interrupt. */
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INTC_register_interrupt((__int_handler)&vUSART_ISR, serialPORT_USART_IRQ, INT1);
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/* Enable USART interrupt sources (but not Tx for now)... */
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usart->ier = AVR32_USART_IER_RXRDY_MASK;
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/* Enable receiver and transmitter... */
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usart0->cr |= AVR32_USART_CR_TXEN_MASK | AVR32_USART_CR_RXEN_MASK;
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usart->cr |= AVR32_USART_CR_TXEN_MASK | AVR32_USART_CR_RXEN_MASK;
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}
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portEXIT_CRITICAL();
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}
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@ -340,7 +335,7 @@ signed portCHAR *pxNext;
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signed portBASE_TYPE xSerialPutChar( xComPortHandle pxPort, signed portCHAR cOutChar, portTickType xBlockTime )
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{
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volatile avr32_usart_t *usart0 = &AVR32_USART0;
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volatile avr32_usart_t *usart = serialPORT_USART;
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/* Place the character in the queue of characters to be transmitted. */
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if( xQueueSend( xCharsForTx, &cOutChar, xBlockTime ) != pdPASS )
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queue and send it. This does not need to be in a critical section as
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if the interrupt has already removed the character the next interrupt
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will simply turn off the Tx interrupt again. */
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usart0->ier = (1 << AVR32_USART_IER_TXRDY_OFFSET);
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usart->ier = (1 << AVR32_USART_IER_TXRDY_OFFSET);
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return pdPASS;
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}
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