len0rd/FreeRTOS-Kernel
1
0
Fork 0
mirror of https://github.com/FreeRTOS/FreeRTOS-Kernel.git synced 2025-08-19 09:38:32 -04:00
Code Issues Projects Releases Packages Wiki Activity

Browse source
This commit is contained in:
Richard Barry 2006-05-28 08:17:56 +00:00
parent 416c6b9791
commit 946da76519
323 changed files with 2062 additions and 1947 deletions
Download patch file Download diff file Expand all files Collapse all files

20
Demo/lwIP_Demo_Rowley_ARM7/EMAC/SAM7_EMAC_ISR.c
View file

@ -1,24 +1,24 @@
/*
FreeRTOS V4.0.1 - Copyright (C) 2003-2006 Richard Barry.
FreeRTOS.org V4.0.2 - Copyright (C) 2003-2006 Richard Barry.
This file is part of the FreeRTOS distribution.
This file is part of the FreeRTOS.org distribution.
FreeRTOS is free software; you can redistribute it and/or modify
FreeRTOS.org is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or
(at your option) any later version.
FreeRTOS is distributed in the hope that it will be useful,
FreeRTOS.org is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with FreeRTOS; if not, write to the Free Software
along with FreeRTOS.org; if not, write to the Free Software
Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
A special exception to the GPL can be applied should you wish to distribute
a combined work that includes FreeRTOS, without being obliged to provide
a combined work that includes FreeRTOS.org, without being obliged to provide
the source code for any proprietary components. See the licensing section
of http://www.FreeRTOS.org for full details of how and when the exception
can be applied.
@ -36,6 +36,11 @@ Changes from V3.2.4
+ Also read the EMAC_RSR register in the EMAC ISR as a work around the
the EMAC bug that can reset the RX bit in EMAC_ISR register before the
bit has been read.
Changes from V4.0.1
+ Only check the interrupt status register to see if an EMAC Tx interrupt
has occurred. Previously the TSR register was also inspected.
*/
#include "FreeRTOS.h"
@ -80,8 +85,7 @@ void vEMACISR( void )
AT91C_BASE_EMAC->EMAC_RSR = AT91C_EMAC_REC;
}
ulEventStatus = AT91C_BASE_EMAC->EMAC_TSR;
if( ( ulIntStatus & AT91C_EMAC_TCOMP ) || ( ulEventStatus & AT91C_EMAC_COMP ) )
if( ulIntStatus & AT91C_EMAC_TCOMP )
{
/* A frame has been transmitted. Mark all the buffers used by the
frame just transmitted as free again. */