mirror of
https://github.com/FreeRTOS/FreeRTOS-Kernel.git
synced 2025-08-19 17:48:33 -04:00
Remove unnecessary use of portLONG, portCHAR and portSHORT.
Change version number in headers.
This commit is contained in:
Richard Barry
parent
f625cf929a
commit
9468e36040
126 changed files with 4893 additions and 4768 deletions
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@ -1,48 +1,49 @@
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/*
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FreeRTOS V5.4.2 - Copyright (C) 2009 Real Time Engineers Ltd.
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FreeRTOS V6.0.0 - Copyright (C) 2009 Real Time Engineers Ltd.
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This file is part of the FreeRTOS distribution.
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This file is part of the FreeRTOS distribution.
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FreeRTOS is free software; you can redistribute it and/or modify it under
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the terms of the GNU General Public License (version 2) as published by the
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Free Software Foundation and modified by the FreeRTOS exception.
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**NOTE** The exception to the GPL is included to allow you to distribute a
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combined work that includes FreeRTOS without being obliged to provide the
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source code for proprietary components outside of the FreeRTOS kernel.
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Alternative commercial license and support terms are also available upon
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request. See the licensing section of http://www.FreeRTOS.org for full
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license details.
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FreeRTOS is free software; you can redistribute it and/or modify it under
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the terms of the GNU General Public License (version 2) as published by the
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Free Software Foundation and modified by the FreeRTOS exception.
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**NOTE** The exception to the GPL is included to allow you to distribute a
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combined work that includes FreeRTOS without being obliged to provide the
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source code for proprietary components outside of the FreeRTOS kernel.
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Alternative commercial license and support terms are also available upon
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request. See the licensing section of http://www.FreeRTOS.org for full
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license details.
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FreeRTOS is distributed in the hope that it will be useful, but WITHOUT
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ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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more details.
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FreeRTOS is distributed in the hope that it will be useful, but WITHOUT
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ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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more details.
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You should have received a copy of the GNU General Public License along
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with FreeRTOS; if not, write to the Free Software Foundation, Inc., 59
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Temple Place, Suite 330, Boston, MA 02111-1307 USA.
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You should have received a copy of the GNU General Public License along
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with FreeRTOS; if not, write to the Free Software Foundation, Inc., 59
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Temple Place, Suite 330, Boston, MA 02111-1307 USA.
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***************************************************************************
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* *
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* Looking for a quick start? Then check out the FreeRTOS eBook! *
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* See http://www.FreeRTOS.org/Documentation for details *
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* *
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***************************************************************************
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***************************************************************************
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* *
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* The FreeRTOS eBook and reference manual are available to purchase for a *
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* small fee. Help yourself get started quickly while also helping the *
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* FreeRTOS project! See http://www.FreeRTOS.org/Documentation for details *
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* *
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***************************************************************************
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1 tab == 4 spaces!
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1 tab == 4 spaces!
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Please ensure to read the configuration and relevant port sections of the
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online documentation.
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Please ensure to read the configuration and relevant port sections of the
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online documentation.
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http://www.FreeRTOS.org - Documentation, latest information, license and
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contact details.
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http://www.FreeRTOS.org - Documentation, latest information, license and
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contact details.
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http://www.SafeRTOS.com - A version that is certified for use in safety
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critical systems.
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http://www.SafeRTOS.com - A version that is certified for use in safety
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critical systems.
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http://www.OpenRTOS.com - Commercial support, development, porting,
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licensing and training services.
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http://www.OpenRTOS.com - Commercial support, development, porting,
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licensing and training services.
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*/
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/*
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@ -76,37 +77,37 @@
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/*-----------------------------------------------------------*/
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/* Hardwired i2c address of the WIZNet device. */
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#define tcpDEVICE_ADDRESS ( ( unsigned portCHAR ) 0x00 )
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#define tcpDEVICE_ADDRESS ( ( unsigned char ) 0x00 )
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/* Constants used to configure the Tx and Rx buffer sizes within the WIZnet
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device. */
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#define tcp8K_RX ( ( unsigned portCHAR ) 0x03 )
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#define tcp8K_TX ( ( unsigned portCHAR ) 0x03 )
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#define tcp8K_RX ( ( unsigned char ) 0x03 )
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#define tcp8K_TX ( ( unsigned char ) 0x03 )
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/* Constants used to generate the WIZnet internal buffer addresses. */
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#define tcpSINGLE_SOCKET_ADDR_MASK ( ( unsigned portLONG ) 0x1fff )
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#define tcpSINGLE_SOCKET_ADDR_OFFSET ( ( unsigned portLONG ) 0x4000 )
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#define tcpSINGLE_SOCKET_ADDR_MASK ( ( unsigned long ) 0x1fff )
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#define tcpSINGLE_SOCKET_ADDR_OFFSET ( ( unsigned long ) 0x4000 )
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/* Bit definitions of the commands that can be sent to the command register. */
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#define tcpRESET_CMD ( ( unsigned portCHAR ) 0x80 )
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#define tcpSYS_INIT_CMD ( ( unsigned portCHAR ) 0x01 )
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#define tcpSOCK_STREAM ( ( unsigned portCHAR ) 0x01 )
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#define tcpSOCK_INIT ( ( unsigned portCHAR ) 0x02 )
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#define tcpLISTEN_CMD ( ( unsigned portCHAR ) 0x08 )
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#define tcpRECEIVE_CMD ( ( unsigned portCHAR ) 0x40 )
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#define tcpDISCONNECT_CMD ( ( unsigned portCHAR ) 0x10 )
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#define tcpSEND_CMD ( ( unsigned portCHAR ) 0x20 )
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#define tcpRESET_CMD ( ( unsigned char ) 0x80 )
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#define tcpSYS_INIT_CMD ( ( unsigned char ) 0x01 )
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#define tcpSOCK_STREAM ( ( unsigned char ) 0x01 )
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#define tcpSOCK_INIT ( ( unsigned char ) 0x02 )
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#define tcpLISTEN_CMD ( ( unsigned char ) 0x08 )
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#define tcpRECEIVE_CMD ( ( unsigned char ) 0x40 )
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#define tcpDISCONNECT_CMD ( ( unsigned char ) 0x10 )
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#define tcpSEND_CMD ( ( unsigned char ) 0x20 )
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/* Constants required to handle the interrupts. */
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#define tcpCLEAR_EINT0 ( 1 )
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#define i2cCLEAR_ALL_INTERRUPTS ( ( unsigned portCHAR ) 0xff )
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#define i2cCHANNEL_0_ISR_ENABLE ( ( unsigned portCHAR ) 0x01 )
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#define i2cCHANNEL_0_ISR_DISABLE ( ( unsigned portCHAR ) 0x00 )
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#define i2cCLEAR_ALL_INTERRUPTS ( ( unsigned char ) 0xff )
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#define i2cCHANNEL_0_ISR_ENABLE ( ( unsigned char ) 0x01 )
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#define i2cCHANNEL_0_ISR_DISABLE ( ( unsigned char ) 0x00 )
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#define tcpWAKE_ON_EINT0 ( 1 )
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#define tcpENABLE_EINT0_FUNCTION ( ( unsigned portLONG ) 0x01 )
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#define tcpEINT0_VIC_CHANNEL_BIT ( ( unsigned portLONG ) 0x4000 )
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#define tcpEINT0_VIC_CHANNEL ( ( unsigned portLONG ) 14 )
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#define tcpEINT0_VIC_ENABLE ( ( unsigned portLONG ) 0x0020 )
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#define tcpENABLE_EINT0_FUNCTION ( ( unsigned long ) 0x01 )
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#define tcpEINT0_VIC_CHANNEL_BIT ( ( unsigned long ) 0x4000 )
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#define tcpEINT0_VIC_CHANNEL ( ( unsigned long ) 14 )
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#define tcpEINT0_VIC_ENABLE ( ( unsigned long ) 0x0020 )
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/* Various delays used in the driver. */
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#define tcpRESET_DELAY ( ( portTickType ) 16 / portTICK_RATE_MS )
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@ -117,49 +118,49 @@ device. */
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#define tcpNO_DELAY ( ( portTickType ) 0 )
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/* Length of the data to read for various register reads. */
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#define tcpSTATUS_READ_LEN ( ( unsigned portLONG ) 1 )
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#define tcpSHADOW_READ_LEN ( ( unsigned portLONG ) 1 )
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#define tcpSTATUS_READ_LEN ( ( unsigned long ) 1 )
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#define tcpSHADOW_READ_LEN ( ( unsigned long ) 1 )
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/* Register addresses within the WIZnet device. */
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#define tcpCOMMAND_REG ( ( unsigned portSHORT ) 0x0000 )
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#define tcpGATEWAY_ADDR_REG ( ( unsigned portSHORT ) 0x0080 )
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#define tcpSUBNET_MASK_REG ( ( unsigned portSHORT ) 0x0084 )
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#define tcpSOURCE_HA_REG ( ( unsigned portSHORT ) 0x0088 )
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#define tpcSOURCE_IP_REG ( ( unsigned portSHORT ) 0x008E )
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#define tpcSOCKET_OPT_REG ( ( unsigned portSHORT ) 0x00A1 )
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#define tcpSOURCE_PORT_REG ( ( unsigned portSHORT ) 0x00AE )
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#define tcpTX_WRITE_POINTER_REG ( ( unsigned portSHORT ) 0x0040 )
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#define tcpTX_READ_POINTER_REG ( ( unsigned portSHORT ) 0x0044 )
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#define tcpTX_ACK_POINTER_REG ( ( unsigned portSHORT ) 0x0018 )
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#define tcpTX_MEM_SIZE_REG ( ( unsigned portSHORT ) 0x0096 )
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#define tcpRX_MEM_SIZE_REG ( ( unsigned portSHORT ) 0x0095 )
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#define tcpINTERRUPT_STATUS_REG ( ( unsigned portSHORT ) 0x0004 )
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#define tcpTX_WRITE_SHADOW_REG ( ( unsigned portSHORT ) 0x01F0 )
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#define tcpTX_ACK_SHADOW_REG ( ( unsigned portSHORT ) 0x01E2 )
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#define tcpISR_MASK_REG ( ( unsigned portSHORT ) 0x0009 )
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#define tcpINTERRUPT_REG ( ( unsigned portSHORT ) 0x0008 )
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#define tcpSOCKET_STATE_REG ( ( unsigned portSHORT ) 0x00a0 )
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#define tcpCOMMAND_REG ( ( unsigned short ) 0x0000 )
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#define tcpGATEWAY_ADDR_REG ( ( unsigned short ) 0x0080 )
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#define tcpSUBNET_MASK_REG ( ( unsigned short ) 0x0084 )
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#define tcpSOURCE_HA_REG ( ( unsigned short ) 0x0088 )
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#define tpcSOURCE_IP_REG ( ( unsigned short ) 0x008E )
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#define tpcSOCKET_OPT_REG ( ( unsigned short ) 0x00A1 )
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#define tcpSOURCE_PORT_REG ( ( unsigned short ) 0x00AE )
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#define tcpTX_WRITE_POINTER_REG ( ( unsigned short ) 0x0040 )
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#define tcpTX_READ_POINTER_REG ( ( unsigned short ) 0x0044 )
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#define tcpTX_ACK_POINTER_REG ( ( unsigned short ) 0x0018 )
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#define tcpTX_MEM_SIZE_REG ( ( unsigned short ) 0x0096 )
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#define tcpRX_MEM_SIZE_REG ( ( unsigned short ) 0x0095 )
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#define tcpINTERRUPT_STATUS_REG ( ( unsigned short ) 0x0004 )
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#define tcpTX_WRITE_SHADOW_REG ( ( unsigned short ) 0x01F0 )
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#define tcpTX_ACK_SHADOW_REG ( ( unsigned short ) 0x01E2 )
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#define tcpISR_MASK_REG ( ( unsigned short ) 0x0009 )
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#define tcpINTERRUPT_REG ( ( unsigned short ) 0x0008 )
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#define tcpSOCKET_STATE_REG ( ( unsigned short ) 0x00a0 )
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/* Constants required for hardware setup. */
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#define tcpRESET_ACTIVE_LOW ( ( unsigned portLONG ) 0x20 )
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#define tcpRESET_ACTIVE_HIGH ( ( unsigned portLONG ) 0x10 )
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#define tcpRESET_ACTIVE_LOW ( ( unsigned long ) 0x20 )
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#define tcpRESET_ACTIVE_HIGH ( ( unsigned long ) 0x10 )
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/* Constants defining the source of the WIZnet ISR. */
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#define tcpISR_SYS_INIT ( ( unsigned portCHAR ) 0x01 )
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#define tcpISR_SOCKET_INIT ( ( unsigned portCHAR ) 0x02 )
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#define tcpISR_ESTABLISHED ( ( unsigned portCHAR ) 0x04 )
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#define tcpISR_CLOSED ( ( unsigned portCHAR ) 0x08 )
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#define tcpISR_TIMEOUT ( ( unsigned portCHAR ) 0x10 )
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#define tcpISR_TX_COMPLETE ( ( unsigned portCHAR ) 0x20 )
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#define tcpISR_RX_COMPLETE ( ( unsigned portCHAR ) 0x40 )
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#define tcpISR_SYS_INIT ( ( unsigned char ) 0x01 )
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#define tcpISR_SOCKET_INIT ( ( unsigned char ) 0x02 )
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#define tcpISR_ESTABLISHED ( ( unsigned char ) 0x04 )
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#define tcpISR_CLOSED ( ( unsigned char ) 0x08 )
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#define tcpISR_TIMEOUT ( ( unsigned char ) 0x10 )
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#define tcpISR_TX_COMPLETE ( ( unsigned char ) 0x20 )
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#define tcpISR_RX_COMPLETE ( ( unsigned char ) 0x40 )
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/* Constants defining the socket status bits. */
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#define tcpSTATUS_ESTABLISHED ( ( unsigned portCHAR ) 0x06 )
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#define tcpSTATUS_LISTEN ( ( unsigned portCHAR ) 0x02 )
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#define tcpSTATUS_ESTABLISHED ( ( unsigned char ) 0x06 )
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#define tcpSTATUS_LISTEN ( ( unsigned char ) 0x02 )
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/* Misc constants. */
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#define tcpNO_STATUS_BITS ( ( unsigned portCHAR ) 0x00 )
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#define i2cNO_ADDR_REQUIRED ( ( unsigned portSHORT ) 0x0000 )
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#define tcpNO_STATUS_BITS ( ( unsigned char ) 0x00 )
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#define i2cNO_ADDR_REQUIRED ( ( unsigned short ) 0x0000 )
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#define i2cNO_DATA_REQUIRED ( 0x0000 )
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#define tcpISR_QUEUE_LENGTH ( ( unsigned portBASE_TYPE ) 10 )
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#define tcpISR_QUEUE_ITEM_SIZE ( ( unsigned portBASE_TYPE ) 0 )
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@ -170,29 +171,29 @@ device. */
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/* Message definitions. The IP address, MAC address, gateway address, etc.
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is set here! */
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const unsigned portCHAR const ucDataGAR[] = { 172, 25, 218, 3 }; /* Gateway address. */
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const unsigned portCHAR const ucDataMSR[] = { 255, 255, 255, 0 }; /* Subnet mask. */
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const unsigned portCHAR const ucDataSIPR[] = { 172, 25, 218, 201 };/* IP address. */
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const unsigned portCHAR const ucDataSHAR[] = { 00, 23, 30, 41, 15, 26 }; /* MAC address - DO NOT USE THIS ON A PUBLIC NETWORK! */
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const unsigned char const ucDataGAR[] = { 172, 25, 218, 3 }; /* Gateway address. */
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const unsigned char const ucDataMSR[] = { 255, 255, 255, 0 }; /* Subnet mask. */
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const unsigned char const ucDataSIPR[] = { 172, 25, 218, 201 };/* IP address. */
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const unsigned char const ucDataSHAR[] = { 00, 23, 30, 41, 15, 26 }; /* MAC address - DO NOT USE THIS ON A PUBLIC NETWORK! */
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/* Other fixed messages. */
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const unsigned portCHAR const ucDataReset[] = { tcpRESET_CMD };
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const unsigned portCHAR const ucDataInit[] = { tcpSYS_INIT_CMD };
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const unsigned portCHAR const ucDataProtocol[] = { tcpSOCK_STREAM };
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const unsigned portCHAR const ucDataPort[] = { 0xBA, 0xCC };
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const unsigned portCHAR const ucDataSockInit[] = { tcpSOCK_INIT };
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const unsigned portCHAR const ucDataTxWritePointer[] = { 0x11, 0x22, 0x00, 0x00 };
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const unsigned portCHAR const ucDataTxAckPointer[] = { 0x11, 0x22, 0x00, 0x00 };
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const unsigned portCHAR const ucDataTxReadPointer[] = { 0x11, 0x22, 0x00, 0x00 };
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const unsigned portCHAR const ucDataListen[] = { tcpLISTEN_CMD };
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const unsigned portCHAR const ucDataReceiveCmd[] = { tcpRECEIVE_CMD };
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const unsigned portCHAR const ucDataSetTxBufSize[] = { tcp8K_TX };
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const unsigned portCHAR const ucDataSetRxBufSize[] = { tcp8K_RX };
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const unsigned portCHAR const ucDataSend[] = { tcpSEND_CMD };
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const unsigned portCHAR const ucDataDisconnect[] = { tcpDISCONNECT_CMD };
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const unsigned portCHAR const ucDataEnableISR[] = { i2cCHANNEL_0_ISR_ENABLE };
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const unsigned portCHAR const ucDataDisableISR[] = { i2cCHANNEL_0_ISR_DISABLE };
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const unsigned portCHAR const ucDataClearInterrupt[] = { i2cCLEAR_ALL_INTERRUPTS };
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const unsigned char const ucDataReset[] = { tcpRESET_CMD };
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const unsigned char const ucDataInit[] = { tcpSYS_INIT_CMD };
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const unsigned char const ucDataProtocol[] = { tcpSOCK_STREAM };
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const unsigned char const ucDataPort[] = { 0xBA, 0xCC };
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const unsigned char const ucDataSockInit[] = { tcpSOCK_INIT };
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const unsigned char const ucDataTxWritePointer[] = { 0x11, 0x22, 0x00, 0x00 };
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const unsigned char const ucDataTxAckPointer[] = { 0x11, 0x22, 0x00, 0x00 };
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const unsigned char const ucDataTxReadPointer[] = { 0x11, 0x22, 0x00, 0x00 };
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const unsigned char const ucDataListen[] = { tcpLISTEN_CMD };
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const unsigned char const ucDataReceiveCmd[] = { tcpRECEIVE_CMD };
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const unsigned char const ucDataSetTxBufSize[] = { tcp8K_TX };
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const unsigned char const ucDataSetRxBufSize[] = { tcp8K_RX };
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const unsigned char const ucDataSend[] = { tcpSEND_CMD };
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const unsigned char const ucDataDisconnect[] = { tcpDISCONNECT_CMD };
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const unsigned char const ucDataEnableISR[] = { i2cCHANNEL_0_ISR_ENABLE };
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const unsigned char const ucDataDisableISR[] = { i2cCHANNEL_0_ISR_DISABLE };
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const unsigned char const ucDataClearInterrupt[] = { i2cCLEAR_ALL_INTERRUPTS };
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static xSemaphoreHandle xMessageComplete = NULL;
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xQueueHandle xTCPISRQueue = NULL;
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@ -201,23 +202,23 @@ xQueueHandle xTCPISRQueue = NULL;
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static void prvSendSamplePage( void );
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/* Read a register from the WIZnet device via the i2c interface. */
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static void prvReadRegister( unsigned portCHAR *pucDestination, unsigned portSHORT usAddress, unsigned portLONG ulLength );
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static void prvReadRegister( unsigned char *pucDestination, unsigned short usAddress, unsigned long ulLength );
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/* Send the entire Tx buffer (the Tx buffer within the WIZnet device). */
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static void prvFlushBuffer( unsigned portLONG ulTxAddress );
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static void prvFlushBuffer( unsigned long ulTxAddress );
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/* Write a string to the WIZnet Tx buffer. */
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static void prvWriteString( const portCHAR * const pucTxBuffer, portLONG lTxLen, unsigned portLONG *pulTxAddress );
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static void prvWriteString( const char * const pucTxBuffer, long lTxLen, unsigned long *pulTxAddress );
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/* Convert a number to a string. */
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void ultoa( unsigned portLONG ulVal, portCHAR *pcBuffer, portLONG lIgnore );
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void ultoa( unsigned long ulVal, char *pcBuffer, long lIgnore );
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/*-----------------------------------------------------------*/
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void ultoa( unsigned portLONG ulVal, portCHAR *pcBuffer, portLONG lIgnore )
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void ultoa( unsigned long ulVal, char *pcBuffer, long lIgnore )
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{
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unsigned portLONG lNibble;
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portLONG lIndex;
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unsigned long lNibble;
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long lIndex;
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/* Simple routine to convert an unsigned long value into a string in hex
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format. */
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@ -249,9 +250,9 @@ portLONG lIndex;
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}
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/*-----------------------------------------------------------*/
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static void prvReadRegister( unsigned portCHAR *pucDestination, unsigned portSHORT usAddress, unsigned portLONG ulLength )
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static void prvReadRegister( unsigned char *pucDestination, unsigned short usAddress, unsigned long ulLength )
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{
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unsigned portCHAR ucRxBuffer[ tcpMAX_REGISTER_LEN ];
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unsigned char ucRxBuffer[ tcpMAX_REGISTER_LEN ];
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/* Read a register value from the WIZnet device. */
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@ -259,7 +260,7 @@ unsigned portCHAR ucRxBuffer[ tcpMAX_REGISTER_LEN ];
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i2cMessage( ucRxBuffer, i2cNO_DATA_REQUIRED, tcpDEVICE_ADDRESS, usAddress, i2cWRITE, NULL, portMAX_DELAY );
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/* Then read back from that address. */
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i2cMessage( ( unsigned portCHAR * ) pucDestination, ulLength, tcpDEVICE_ADDRESS, i2cNO_ADDR_REQUIRED, i2cREAD, xMessageComplete, portMAX_DELAY );
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i2cMessage( ( unsigned char * ) pucDestination, ulLength, tcpDEVICE_ADDRESS, i2cNO_ADDR_REQUIRED, i2cREAD, xMessageComplete, portMAX_DELAY );
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/* I2C messages are queued so use the semaphore to wait for the read to
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complete - otherwise we will leave this function before the I2C
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@ -315,7 +316,7 @@ void vTCPHardReset( void )
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extern void ( vEINT0_ISR_Wrapper )( void );
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VICIntSelect &= ~( tcpEINT0_VIC_CHANNEL_BIT );
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VICVectAddr3 = ( portLONG ) vEINT0_ISR_Wrapper;
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VICVectAddr3 = ( long ) vEINT0_ISR_Wrapper;
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VICVectCntl3 = tcpEINT0_VIC_CHANNEL | tcpEINT0_VIC_ENABLE;
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}
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@ -328,10 +329,10 @@ void vTCPHardReset( void )
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}
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/*-----------------------------------------------------------*/
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portLONG lTCPSoftReset( void )
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long lTCPSoftReset( void )
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{
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unsigned portCHAR ucStatus;
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extern volatile portLONG lTransactionCompleted;
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unsigned char ucStatus;
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extern volatile long lTransactionCompleted;
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|
||||
/* Send a message to the WIZnet device to tell it set all it's registers
|
||||
back to their default states. Then setup the WIZnet device as required. */
|
||||
|
|
@ -364,7 +365,7 @@ extern volatile portLONG lTransactionCompleted;
|
|||
/* We should find that the sys init was successful. */
|
||||
if( ucStatus != tcpISR_SYS_INIT )
|
||||
{
|
||||
return ( portLONG ) pdFAIL;
|
||||
return ( long ) pdFAIL;
|
||||
}
|
||||
|
||||
/* No i2c errors yet. */
|
||||
|
|
@ -372,13 +373,13 @@ extern volatile portLONG lTransactionCompleted;
|
|||
lTransactionCompleted = pdTRUE;
|
||||
portEXIT_CRITICAL();
|
||||
|
||||
return ( portLONG ) pdPASS;
|
||||
return ( long ) pdPASS;
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
portLONG lTCPCreateSocket( void )
|
||||
long lTCPCreateSocket( void )
|
||||
{
|
||||
unsigned portCHAR ucStatus;
|
||||
unsigned char ucStatus;
|
||||
|
||||
/* Create and configure a socket. */
|
||||
|
||||
|
|
@ -393,7 +394,7 @@ unsigned portCHAR ucStatus;
|
|||
{
|
||||
/* For some reason the message was not transmitted within our block
|
||||
period. */
|
||||
return ( portLONG ) pdFAIL;
|
||||
return ( long ) pdFAIL;
|
||||
}
|
||||
|
||||
/* Allow the socket to initialise. */
|
||||
|
|
@ -405,7 +406,7 @@ unsigned portCHAR ucStatus;
|
|||
/* We should find that the socket init was successful. */
|
||||
if( ucStatus != tcpISR_SOCKET_INIT )
|
||||
{
|
||||
return ( portLONG ) pdFAIL;
|
||||
return ( long ) pdFAIL;
|
||||
}
|
||||
|
||||
|
||||
|
|
@ -417,13 +418,13 @@ unsigned portCHAR ucStatus;
|
|||
i2cMessage( ucDataTxAckPointer, sizeof( ucDataTxAckPointer ), tcpDEVICE_ADDRESS, tcpTX_ACK_POINTER_REG, i2cWRITE, NULL, portMAX_DELAY );
|
||||
vTaskDelay( tcpSHORT_DELAY );
|
||||
|
||||
return ( portLONG ) pdPASS;
|
||||
return ( long ) pdPASS;
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
void vTCPListen( void )
|
||||
{
|
||||
unsigned portCHAR ucISR;
|
||||
unsigned char ucISR;
|
||||
|
||||
/* Start a passive listen on the socket. */
|
||||
|
||||
|
|
@ -455,12 +456,12 @@ unsigned portCHAR ucISR;
|
|||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
portLONG lProcessConnection( void )
|
||||
long lProcessConnection( void )
|
||||
{
|
||||
unsigned portCHAR ucISR, ucState, ucLastState = 2, ucShadow;
|
||||
extern volatile portLONG lTransactionCompleted;
|
||||
portLONG lSameStateCount = 0, lDataSent = pdFALSE;
|
||||
unsigned portLONG ulWritePointer, ulAckPointer;
|
||||
unsigned char ucISR, ucState, ucLastState = 2, ucShadow;
|
||||
extern volatile long lTransactionCompleted;
|
||||
long lSameStateCount = 0, lDataSent = pdFALSE;
|
||||
unsigned long ulWritePointer, ulAckPointer;
|
||||
|
||||
/* No I2C errors can yet have occurred. */
|
||||
portENTER_CRITICAL();
|
||||
|
|
@ -528,7 +529,7 @@ unsigned portLONG ulWritePointer, ulAckPointer;
|
|||
vTaskDelay( tcpSHORT_DELAY );
|
||||
|
||||
/* Then we can read the real register. */
|
||||
prvReadRegister( ( unsigned portCHAR * ) &ulWritePointer, tcpTX_WRITE_POINTER_REG, sizeof( ulWritePointer ) );
|
||||
prvReadRegister( ( unsigned char * ) &ulWritePointer, tcpTX_WRITE_POINTER_REG, sizeof( ulWritePointer ) );
|
||||
|
||||
/* We cannot do anything more here but need to remember that
|
||||
this interrupt has occurred. */
|
||||
|
|
@ -560,7 +561,7 @@ unsigned portLONG ulWritePointer, ulAckPointer;
|
|||
register. */
|
||||
prvReadRegister( &ucShadow, tcpTX_ACK_SHADOW_REG, tcpSHADOW_READ_LEN );
|
||||
vTaskDelay( tcpSHORT_DELAY );
|
||||
prvReadRegister( ( unsigned portCHAR * ) &ulAckPointer, tcpTX_ACK_POINTER_REG, sizeof( ulWritePointer ) );
|
||||
prvReadRegister( ( unsigned char * ) &ulAckPointer, tcpTX_ACK_POINTER_REG, sizeof( ulWritePointer ) );
|
||||
|
||||
if( ulAckPointer == ulWritePointer )
|
||||
{
|
||||
|
|
@ -619,9 +620,9 @@ unsigned portLONG ulWritePointer, ulAckPointer;
|
|||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
static void prvWriteString( const portCHAR * const pucTxBuffer, portLONG lTxLen, unsigned portLONG *pulTxAddress )
|
||||
static void prvWriteString( const char * const pucTxBuffer, long lTxLen, unsigned long *pulTxAddress )
|
||||
{
|
||||
unsigned portLONG ulSendAddress;
|
||||
unsigned long ulSendAddress;
|
||||
|
||||
/* Send a string to the Tx buffer internal to the WIZnet device. */
|
||||
|
||||
|
|
@ -630,7 +631,7 @@ unsigned portLONG ulSendAddress;
|
|||
|
||||
/* Send the buffer to the calculated address. Use the semaphore so we
|
||||
can wait until the entire message has been transferred. */
|
||||
i2cMessage( ( unsigned portCHAR * ) pucTxBuffer, lTxLen, tcpDEVICE_ADDRESS, ( unsigned portSHORT ) ulSendAddress, i2cWRITE, xMessageComplete, portMAX_DELAY );
|
||||
i2cMessage( ( unsigned char * ) pucTxBuffer, lTxLen, tcpDEVICE_ADDRESS, ( unsigned short ) ulSendAddress, i2cWRITE, xMessageComplete, portMAX_DELAY );
|
||||
|
||||
/* Wait until the semaphore indicates that the message has been transferred. */
|
||||
if( !xSemaphoreTake( xMessageComplete, tcpLONG_DELAY ) )
|
||||
|
|
@ -640,13 +641,13 @@ unsigned portLONG ulSendAddress;
|
|||
|
||||
/* Return the new address of the end of the buffer (within the WIZnet
|
||||
device). */
|
||||
*pulTxAddress += ( unsigned portLONG ) lTxLen;
|
||||
*pulTxAddress += ( unsigned long ) lTxLen;
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
static void prvFlushBuffer( unsigned portLONG ulTxAddress )
|
||||
static void prvFlushBuffer( unsigned long ulTxAddress )
|
||||
{
|
||||
unsigned portCHAR ucTxBuffer[ tcpMAX_REGISTER_LEN ];
|
||||
unsigned char ucTxBuffer[ tcpMAX_REGISTER_LEN ];
|
||||
|
||||
/* We have written some data to the Tx buffer internal to the WIZnet
|
||||
device. Now we update the Tx pointer inside the WIZnet then send a
|
||||
|
|
@ -657,13 +658,13 @@ unsigned portCHAR ucTxBuffer[ tcpMAX_REGISTER_LEN ];
|
|||
ulTxAddress = htonl( ulTxAddress );
|
||||
|
||||
/* Place the new Tx pointer in the string to be transmitted. */
|
||||
ucTxBuffer[ 0 ] = ( unsigned portCHAR ) ( ulTxAddress & 0xff );
|
||||
ucTxBuffer[ 0 ] = ( unsigned char ) ( ulTxAddress & 0xff );
|
||||
ulTxAddress >>= 8;
|
||||
ucTxBuffer[ 1 ] = ( unsigned portCHAR ) ( ulTxAddress & 0xff );
|
||||
ucTxBuffer[ 1 ] = ( unsigned char ) ( ulTxAddress & 0xff );
|
||||
ulTxAddress >>= 8;
|
||||
ucTxBuffer[ 2 ] = ( unsigned portCHAR ) ( ulTxAddress & 0xff );
|
||||
ucTxBuffer[ 2 ] = ( unsigned char ) ( ulTxAddress & 0xff );
|
||||
ulTxAddress >>= 8;
|
||||
ucTxBuffer[ 3 ] = ( unsigned portCHAR ) ( ulTxAddress & 0xff );
|
||||
ucTxBuffer[ 3 ] = ( unsigned char ) ( ulTxAddress & 0xff );
|
||||
ulTxAddress >>= 8;
|
||||
|
||||
/* And send it to the WIZnet device. */
|
||||
|
|
@ -688,12 +689,12 @@ unsigned portCHAR ucTxBuffer[ tcpMAX_REGISTER_LEN ];
|
|||
|
||||
static void prvSendSamplePage( void )
|
||||
{
|
||||
extern portLONG lErrorInTask;
|
||||
unsigned portLONG ulTxAddress;
|
||||
unsigned portCHAR ucShadow;
|
||||
portLONG lIndex;
|
||||
static unsigned portLONG ulRefreshCount = 0x00;
|
||||
static portCHAR cPageBuffer[ tcpBUFFER_LEN ];
|
||||
extern long lErrorInTask;
|
||||
unsigned long ulTxAddress;
|
||||
unsigned char ucShadow;
|
||||
long lIndex;
|
||||
static unsigned long ulRefreshCount = 0x00;
|
||||
static char cPageBuffer[ tcpBUFFER_LEN ];
|
||||
|
||||
|
||||
/* This function just generates a sample page of HTML which gets
|
||||
|
|
@ -709,7 +710,7 @@ static portCHAR cPageBuffer[ tcpBUFFER_LEN ];
|
|||
vTaskDelay( tcpSHORT_DELAY );
|
||||
|
||||
/* Now we can read the real pointer value. */
|
||||
prvReadRegister( ( unsigned portCHAR * ) &ulTxAddress, tcpTX_WRITE_POINTER_REG, sizeof( ulTxAddress ) );
|
||||
prvReadRegister( ( unsigned char * ) &ulTxAddress, tcpTX_WRITE_POINTER_REG, sizeof( ulTxAddress ) );
|
||||
|
||||
/* Make sure endieness is correct. */
|
||||
ulTxAddress = htonl( ulTxAddress );
|
||||
|
|
@ -724,13 +725,13 @@ static portCHAR cPageBuffer[ tcpBUFFER_LEN ];
|
|||
ultoa( xTaskGetTickCount(), &( cPageBuffer[ lIndex ] ), 0 );
|
||||
strcat( cPageBuffer, "<br>Number of tasks executing = ");
|
||||
lIndex = strlen( cPageBuffer );
|
||||
ultoa( ( unsigned portLONG ) uxTaskGetNumberOfTasks(), &( cPageBuffer[ lIndex ] ), 0 );
|
||||
ultoa( ( unsigned long ) uxTaskGetNumberOfTasks(), &( cPageBuffer[ lIndex ] ), 0 );
|
||||
strcat( cPageBuffer, "<br>IO port 0 state (used by flash tasks) = 0x" );
|
||||
lIndex = strlen( cPageBuffer );
|
||||
ultoa( ( unsigned portLONG ) GPIO0_IOPIN, &( cPageBuffer[ lIndex ] ), 0 );
|
||||
ultoa( ( unsigned long ) GPIO0_IOPIN, &( cPageBuffer[ lIndex ] ), 0 );
|
||||
strcat( cPageBuffer, "<br>Refresh = 0x" );
|
||||
lIndex = strlen( cPageBuffer );
|
||||
ultoa( ( unsigned portLONG ) ulRefreshCount, &( cPageBuffer[ lIndex ] ), 0 );
|
||||
ultoa( ( unsigned long ) ulRefreshCount, &( cPageBuffer[ lIndex ] ), 0 );
|
||||
|
||||
if( lErrorInTask )
|
||||
{
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue